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You searched for subject:(transistor). Showing records 1 – 30 of 1118 total matches.

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University of Illinois – Urbana-Champaign

1. James, Adam L. Process Development for High Speed Transistor Laser Operation.

Degree: PhD, 1200, 2011, University of Illinois – Urbana-Champaign

 The transistor laser (TL) o ers advantages over conventional diode laser structure. The TL uses high base doping and minority carrier collection to reduce the… (more)

Subjects/Keywords: Transistor Laser

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APA (6th Edition):

James, A. L. (2011). Process Development for High Speed Transistor Laser Operation. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/18567

Chicago Manual of Style (16th Edition):

James, Adam L. “Process Development for High Speed Transistor Laser Operation.” 2011. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed January 22, 2020. http://hdl.handle.net/2142/18567.

MLA Handbook (7th Edition):

James, Adam L. “Process Development for High Speed Transistor Laser Operation.” 2011. Web. 22 Jan 2020.

Vancouver:

James AL. Process Development for High Speed Transistor Laser Operation. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2011. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/2142/18567.

Council of Science Editors:

James AL. Process Development for High Speed Transistor Laser Operation. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2011. Available from: http://hdl.handle.net/2142/18567


Université de Grenoble

2. Morvan, Siméon. Transistors MOS sur films minces de Silicium-sur-Isolant (SOI) complètement désertés pour le noeud technologique 10nm : MOS transistors on thin fully depleted Silicon-On-Insulator (SOI) films for the 10nm technological node.

Degree: Docteur es, Sciences et technologie industrielles, 2013, Université de Grenoble

Depuis plusieurs générations technologiques, la réduction des dimensions des transistors à effet de champ Métal-Oxyde-Semiconducteur (MOSFET) n'est plus suffisante pour augmenter à elle seule les… (more)

Subjects/Keywords: Microélectronique; Transistor; FDSOI; Microelectronics; Transistor; FDSOI

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APA (6th Edition):

Morvan, S. (2013). Transistors MOS sur films minces de Silicium-sur-Isolant (SOI) complètement désertés pour le noeud technologique 10nm : MOS transistors on thin fully depleted Silicon-On-Insulator (SOI) films for the 10nm technological node. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2013GRENT047

Chicago Manual of Style (16th Edition):

Morvan, Siméon. “Transistors MOS sur films minces de Silicium-sur-Isolant (SOI) complètement désertés pour le noeud technologique 10nm : MOS transistors on thin fully depleted Silicon-On-Insulator (SOI) films for the 10nm technological node.” 2013. Doctoral Dissertation, Université de Grenoble. Accessed January 22, 2020. http://www.theses.fr/2013GRENT047.

MLA Handbook (7th Edition):

Morvan, Siméon. “Transistors MOS sur films minces de Silicium-sur-Isolant (SOI) complètement désertés pour le noeud technologique 10nm : MOS transistors on thin fully depleted Silicon-On-Insulator (SOI) films for the 10nm technological node.” 2013. Web. 22 Jan 2020.

Vancouver:

Morvan S. Transistors MOS sur films minces de Silicium-sur-Isolant (SOI) complètement désertés pour le noeud technologique 10nm : MOS transistors on thin fully depleted Silicon-On-Insulator (SOI) films for the 10nm technological node. [Internet] [Doctoral dissertation]. Université de Grenoble; 2013. [cited 2020 Jan 22]. Available from: http://www.theses.fr/2013GRENT047.

Council of Science Editors:

Morvan S. Transistors MOS sur films minces de Silicium-sur-Isolant (SOI) complètement désertés pour le noeud technologique 10nm : MOS transistors on thin fully depleted Silicon-On-Insulator (SOI) films for the 10nm technological node. [Doctoral Dissertation]. Université de Grenoble; 2013. Available from: http://www.theses.fr/2013GRENT047


Université de Grenoble

3. Diouf, Cheikh. Caractérisation électrique des transistors d’architecture innovante pour les longueurs de grilles décananométriques : Electrical Characterization of sub 100nm MOS transsitors with innovative architecture.

Degree: Docteur es, Nano electronique et nano technologies, 2013, Université de Grenoble

La taille du transistor MOS ne cesse de diminuer pour des questions de performance et de rentabilité de fabrication. Les procédés de fabrication évoluent, l'architecture… (more)

Subjects/Keywords: Caractérisation; Transistor; Mos; Characterization; Transistor; Mos; 620

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APA (6th Edition):

Diouf, C. (2013). Caractérisation électrique des transistors d’architecture innovante pour les longueurs de grilles décananométriques : Electrical Characterization of sub 100nm MOS transsitors with innovative architecture. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2013GRENT082

Chicago Manual of Style (16th Edition):

Diouf, Cheikh. “Caractérisation électrique des transistors d’architecture innovante pour les longueurs de grilles décananométriques : Electrical Characterization of sub 100nm MOS transsitors with innovative architecture.” 2013. Doctoral Dissertation, Université de Grenoble. Accessed January 22, 2020. http://www.theses.fr/2013GRENT082.

MLA Handbook (7th Edition):

Diouf, Cheikh. “Caractérisation électrique des transistors d’architecture innovante pour les longueurs de grilles décananométriques : Electrical Characterization of sub 100nm MOS transsitors with innovative architecture.” 2013. Web. 22 Jan 2020.

Vancouver:

Diouf C. Caractérisation électrique des transistors d’architecture innovante pour les longueurs de grilles décananométriques : Electrical Characterization of sub 100nm MOS transsitors with innovative architecture. [Internet] [Doctoral dissertation]. Université de Grenoble; 2013. [cited 2020 Jan 22]. Available from: http://www.theses.fr/2013GRENT082.

Council of Science Editors:

Diouf C. Caractérisation électrique des transistors d’architecture innovante pour les longueurs de grilles décananométriques : Electrical Characterization of sub 100nm MOS transsitors with innovative architecture. [Doctoral Dissertation]. Université de Grenoble; 2013. Available from: http://www.theses.fr/2013GRENT082


University of Cambridge

4. Cheng, Xiang. TFTs circuit simulation models and analogue building block designs.

Degree: PhD, 2018, University of Cambridge

 Building functional thin-film-transistor (TFT) circuits is crucial for applications such as wearable, implantable and transparent electronics. Therefore, developing a compact model of an emerging semiconductor… (more)

Subjects/Keywords: Thin film transistor; analogue circuit; Transistor modelling

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APA (6th Edition):

Cheng, X. (2018). TFTs circuit simulation models and analogue building block designs. (Doctoral Dissertation). University of Cambridge. Retrieved from https://www.repository.cam.ac.uk/bitstream/1810/271853/6/Cheng-2018-PhD.jpg ; https://www.repository.cam.ac.uk/bitstream/1810/271853/5/Cheng-2018-PhD.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/4/650a53fe-a4a7-45be-96d5-42856d1709cc.zip ; https://www.repository.cam.ac.uk/bitstream/1810/271853/3/license.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/2/650a53fe-a4a7-45be-96d5-42856d1709cc_confirmations.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/1/Cheng-2018-PhD

Chicago Manual of Style (16th Edition):

Cheng, Xiang. “TFTs circuit simulation models and analogue building block designs.” 2018. Doctoral Dissertation, University of Cambridge. Accessed January 22, 2020. https://www.repository.cam.ac.uk/bitstream/1810/271853/6/Cheng-2018-PhD.jpg ; https://www.repository.cam.ac.uk/bitstream/1810/271853/5/Cheng-2018-PhD.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/4/650a53fe-a4a7-45be-96d5-42856d1709cc.zip ; https://www.repository.cam.ac.uk/bitstream/1810/271853/3/license.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/2/650a53fe-a4a7-45be-96d5-42856d1709cc_confirmations.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/1/Cheng-2018-PhD.

MLA Handbook (7th Edition):

Cheng, Xiang. “TFTs circuit simulation models and analogue building block designs.” 2018. Web. 22 Jan 2020.

Vancouver:

Cheng X. TFTs circuit simulation models and analogue building block designs. [Internet] [Doctoral dissertation]. University of Cambridge; 2018. [cited 2020 Jan 22]. Available from: https://www.repository.cam.ac.uk/bitstream/1810/271853/6/Cheng-2018-PhD.jpg ; https://www.repository.cam.ac.uk/bitstream/1810/271853/5/Cheng-2018-PhD.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/4/650a53fe-a4a7-45be-96d5-42856d1709cc.zip ; https://www.repository.cam.ac.uk/bitstream/1810/271853/3/license.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/2/650a53fe-a4a7-45be-96d5-42856d1709cc_confirmations.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/1/Cheng-2018-PhD.

Council of Science Editors:

Cheng X. TFTs circuit simulation models and analogue building block designs. [Doctoral Dissertation]. University of Cambridge; 2018. Available from: https://www.repository.cam.ac.uk/bitstream/1810/271853/6/Cheng-2018-PhD.jpg ; https://www.repository.cam.ac.uk/bitstream/1810/271853/5/Cheng-2018-PhD.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/4/650a53fe-a4a7-45be-96d5-42856d1709cc.zip ; https://www.repository.cam.ac.uk/bitstream/1810/271853/3/license.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/2/650a53fe-a4a7-45be-96d5-42856d1709cc_confirmations.txt ; https://www.repository.cam.ac.uk/bitstream/1810/271853/1/Cheng-2018-PhD

5. Toumi, Ilhem. Contribution à l'étude et réalisation d'une technique ultra rapide pour l'étude de la dégradation NBTI.

Degree: 2015, Université M'Hamed Bougara Boumerdès

79 p. : ill. ; 30 cm

Parmi les modes de dégradation limitant la fiabilité des transistors MOSFET, un " nouveau " phénomène communément appelé… (more)

Subjects/Keywords: Transistor; Champ électrique

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APA (6th Edition):

Toumi, I. (2015). Contribution à l'étude et réalisation d'une technique ultra rapide pour l'étude de la dégradation NBTI. (Thesis). Université M'Hamed Bougara Boumerdès. Retrieved from http://dlibrary.univ-boumerdes.dz:8080/handle/123456789/2745

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Toumi, Ilhem. “Contribution à l'étude et réalisation d'une technique ultra rapide pour l'étude de la dégradation NBTI.” 2015. Thesis, Université M'Hamed Bougara Boumerdès. Accessed January 22, 2020. http://dlibrary.univ-boumerdes.dz:8080/handle/123456789/2745.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Toumi, Ilhem. “Contribution à l'étude et réalisation d'une technique ultra rapide pour l'étude de la dégradation NBTI.” 2015. Web. 22 Jan 2020.

Vancouver:

Toumi I. Contribution à l'étude et réalisation d'une technique ultra rapide pour l'étude de la dégradation NBTI. [Internet] [Thesis]. Université M'Hamed Bougara Boumerdès; 2015. [cited 2020 Jan 22]. Available from: http://dlibrary.univ-boumerdes.dz:8080/handle/123456789/2745.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Toumi I. Contribution à l'étude et réalisation d'une technique ultra rapide pour l'étude de la dégradation NBTI. [Thesis]. Université M'Hamed Bougara Boumerdès; 2015. Available from: http://dlibrary.univ-boumerdes.dz:8080/handle/123456789/2745

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Notre Dame

6. Kristof Tahy. Fabrication and characterization of 2D graphene and graphene nanoribbon field effect transistors</h1>.

Degree: MSin Electrical Engineering, Electrical Engineering, 2009, University of Notre Dame

  The recent discovery of graphene, a single atomic sheet of graphite, has ignited intense research activities to explore the electronic properties of this novel… (more)

Subjects/Keywords: nanoribbon; graphene; transistor

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APA (6th Edition):

Tahy, K. (2009). Fabrication and characterization of 2D graphene and graphene nanoribbon field effect transistors</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/bn999595w8s

Chicago Manual of Style (16th Edition):

Tahy, Kristof. “Fabrication and characterization of 2D graphene and graphene nanoribbon field effect transistors</h1>.” 2009. Masters Thesis, University of Notre Dame. Accessed January 22, 2020. https://curate.nd.edu/show/bn999595w8s.

MLA Handbook (7th Edition):

Tahy, Kristof. “Fabrication and characterization of 2D graphene and graphene nanoribbon field effect transistors</h1>.” 2009. Web. 22 Jan 2020.

Vancouver:

Tahy K. Fabrication and characterization of 2D graphene and graphene nanoribbon field effect transistors</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2009. [cited 2020 Jan 22]. Available from: https://curate.nd.edu/show/bn999595w8s.

Council of Science Editors:

Tahy K. Fabrication and characterization of 2D graphene and graphene nanoribbon field effect transistors</h1>. [Masters Thesis]. University of Notre Dame; 2009. Available from: https://curate.nd.edu/show/bn999595w8s


University of Notre Dame

7. Guowang Li. MBE Growth and Device Characteristics of Aluminum Gallium Nitride with High Aluminum Composition</h1>.

Degree: MSin Electrical Engineering, Electrical Engineering, 2010, University of Notre Dame

  III-V nitride semiconductors have exhibited a promising technology platform for optoelectronic and electronic devices. For low Al composition (<40 %) AlGaN/GaN high-electron mobility transistors… (more)

Subjects/Keywords: GaN; MBE; Transistor

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APA (6th Edition):

Li, G. (2010). MBE Growth and Device Characteristics of Aluminum Gallium Nitride with High Aluminum Composition</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/7w62f76443f

Chicago Manual of Style (16th Edition):

Li, Guowang. “MBE Growth and Device Characteristics of Aluminum Gallium Nitride with High Aluminum Composition</h1>.” 2010. Masters Thesis, University of Notre Dame. Accessed January 22, 2020. https://curate.nd.edu/show/7w62f76443f.

MLA Handbook (7th Edition):

Li, Guowang. “MBE Growth and Device Characteristics of Aluminum Gallium Nitride with High Aluminum Composition</h1>.” 2010. Web. 22 Jan 2020.

Vancouver:

Li G. MBE Growth and Device Characteristics of Aluminum Gallium Nitride with High Aluminum Composition</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2010. [cited 2020 Jan 22]. Available from: https://curate.nd.edu/show/7w62f76443f.

Council of Science Editors:

Li G. MBE Growth and Device Characteristics of Aluminum Gallium Nitride with High Aluminum Composition</h1>. [Masters Thesis]. University of Notre Dame; 2010. Available from: https://curate.nd.edu/show/7w62f76443f


University of Exeter

8. Gorbachev, Roman. Fabrication and transport properties of graphene-based nanostructures.

Degree: PhD, 2009, University of Exeter

 In this work fabrication and studies of transistor structures based on an atomic sheet of graphite, graphene, are described. Since graphene technology is in its… (more)

Subjects/Keywords: 621.3; graphene : transport : transistor : fabrication

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APA (6th Edition):

Gorbachev, R. (2009). Fabrication and transport properties of graphene-based nanostructures. (Doctoral Dissertation). University of Exeter. Retrieved from http://hdl.handle.net/10036/89275

Chicago Manual of Style (16th Edition):

Gorbachev, Roman. “Fabrication and transport properties of graphene-based nanostructures.” 2009. Doctoral Dissertation, University of Exeter. Accessed January 22, 2020. http://hdl.handle.net/10036/89275.

MLA Handbook (7th Edition):

Gorbachev, Roman. “Fabrication and transport properties of graphene-based nanostructures.” 2009. Web. 22 Jan 2020.

Vancouver:

Gorbachev R. Fabrication and transport properties of graphene-based nanostructures. [Internet] [Doctoral dissertation]. University of Exeter; 2009. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/10036/89275.

Council of Science Editors:

Gorbachev R. Fabrication and transport properties of graphene-based nanostructures. [Doctoral Dissertation]. University of Exeter; 2009. Available from: http://hdl.handle.net/10036/89275


Oregon State University

9. Chang, Ki Suk. An integrated MOS addressing circuit.

Degree: MS, Electrical and Electronics Engineering, 1969, Oregon State University

 This paper is a study of the design of an integrated MOS addressing circuit by using the modified two-phase dynamic shift register. This modified circuit… (more)

Subjects/Keywords: Transistor circuits

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APA (6th Edition):

Chang, K. S. (1969). An integrated MOS addressing circuit. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/46148

Chicago Manual of Style (16th Edition):

Chang, Ki Suk. “An integrated MOS addressing circuit.” 1969. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/46148.

MLA Handbook (7th Edition):

Chang, Ki Suk. “An integrated MOS addressing circuit.” 1969. Web. 22 Jan 2020.

Vancouver:

Chang KS. An integrated MOS addressing circuit. [Internet] [Masters thesis]. Oregon State University; 1969. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/46148.

Council of Science Editors:

Chang KS. An integrated MOS addressing circuit. [Masters Thesis]. Oregon State University; 1969. Available from: http://hdl.handle.net/1957/46148


Oregon State University

10. Wilkerson, John Lee. Transistor circuit design for optimum noise performance.

Degree: MS, Electrical Engineering, 1962, Oregon State University

Subjects/Keywords: Transistor circuits

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APA (6th Edition):

Wilkerson, J. L. (1962). Transistor circuit design for optimum noise performance. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/51566

Chicago Manual of Style (16th Edition):

Wilkerson, John Lee. “Transistor circuit design for optimum noise performance.” 1962. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/51566.

MLA Handbook (7th Edition):

Wilkerson, John Lee. “Transistor circuit design for optimum noise performance.” 1962. Web. 22 Jan 2020.

Vancouver:

Wilkerson JL. Transistor circuit design for optimum noise performance. [Internet] [Masters thesis]. Oregon State University; 1962. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/51566.

Council of Science Editors:

Wilkerson JL. Transistor circuit design for optimum noise performance. [Masters Thesis]. Oregon State University; 1962. Available from: http://hdl.handle.net/1957/51566


University of Illinois – Urbana-Champaign

11. Tchertchian, Paul A. Hybrid plasma-semiconductor devices.

Degree: PhD, 1200, 2010, University of Illinois – Urbana-Champaign

 A hybrid plasma-semiconductor phototransistor has been realized by substituting a plasma for the collector of an npn bipolar junction transistor. Designated as the plasma bipolar… (more)

Subjects/Keywords: Plasma; Transistor; Optoelectronic; Phototransistor

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APA (6th Edition):

Tchertchian, P. A. (2010). Hybrid plasma-semiconductor devices. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/17048

Chicago Manual of Style (16th Edition):

Tchertchian, Paul A. “Hybrid plasma-semiconductor devices.” 2010. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed January 22, 2020. http://hdl.handle.net/2142/17048.

MLA Handbook (7th Edition):

Tchertchian, Paul A. “Hybrid plasma-semiconductor devices.” 2010. Web. 22 Jan 2020.

Vancouver:

Tchertchian PA. Hybrid plasma-semiconductor devices. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2010. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/2142/17048.

Council of Science Editors:

Tchertchian PA. Hybrid plasma-semiconductor devices. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2010. Available from: http://hdl.handle.net/2142/17048


University of Notre Dame

12. Qin Zhang. Interband Tunnel Transistors</h1>.

Degree: PhD, Electrical Engineering, 2009, University of Notre Dame

  Interband tunnel transistors have been attracting increasing attention because of their potential to achieve subthreshold swings below the 60 mV/decade thermionic limit, and realize… (more)

Subjects/Keywords: Zener tunneling; graphene; tunnel transistor

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APA (6th Edition):

Zhang, Q. (2009). Interband Tunnel Transistors</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/5h73pv65c7m

Chicago Manual of Style (16th Edition):

Zhang, Qin. “Interband Tunnel Transistors</h1>.” 2009. Doctoral Dissertation, University of Notre Dame. Accessed January 22, 2020. https://curate.nd.edu/show/5h73pv65c7m.

MLA Handbook (7th Edition):

Zhang, Qin. “Interband Tunnel Transistors</h1>.” 2009. Web. 22 Jan 2020.

Vancouver:

Zhang Q. Interband Tunnel Transistors</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2009. [cited 2020 Jan 22]. Available from: https://curate.nd.edu/show/5h73pv65c7m.

Council of Science Editors:

Zhang Q. Interband Tunnel Transistors</h1>. [Doctoral Dissertation]. University of Notre Dame; 2009. Available from: https://curate.nd.edu/show/5h73pv65c7m


University of Notre Dame

13. Kristof Tahy. 2D Graphene and Graphene Nanoribbon Field Effect Transistors</h1>.

Degree: PhD, Electrical Engineering, 2012, University of Notre Dame

  The impressive properties of graphene such as the linear energy dispersion relation, room-temperature mobility as high as 15 000 cm2/V.s, and current densities in… (more)

Subjects/Keywords: transistor; graphene; FET; nanoribbon

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APA (6th Edition):

Tahy, K. (2012). 2D Graphene and Graphene Nanoribbon Field Effect Transistors</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/mw22v40831h

Chicago Manual of Style (16th Edition):

Tahy, Kristof. “2D Graphene and Graphene Nanoribbon Field Effect Transistors</h1>.” 2012. Doctoral Dissertation, University of Notre Dame. Accessed January 22, 2020. https://curate.nd.edu/show/mw22v40831h.

MLA Handbook (7th Edition):

Tahy, Kristof. “2D Graphene and Graphene Nanoribbon Field Effect Transistors</h1>.” 2012. Web. 22 Jan 2020.

Vancouver:

Tahy K. 2D Graphene and Graphene Nanoribbon Field Effect Transistors</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2012. [cited 2020 Jan 22]. Available from: https://curate.nd.edu/show/mw22v40831h.

Council of Science Editors:

Tahy K. 2D Graphene and Graphene Nanoribbon Field Effect Transistors</h1>. [Doctoral Dissertation]. University of Notre Dame; 2012. Available from: https://curate.nd.edu/show/mw22v40831h


University of Akron

14. Kucherlapati, Naga Swathi. Modeling of a Three Layer Coated Nanowire Transistor.

Degree: MSin Engineering, Electrical Engineering, 2010, University of Akron

  The integration density of silicon transistors is increasing from the past few decades due to rapid miniaturization. Bipolar junction transistors (BJT) successfully replaced vacuum… (more)

Subjects/Keywords: Electrical Engineering; nanowire transistor

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APA (6th Edition):

Kucherlapati, N. S. (2010). Modeling of a Three Layer Coated Nanowire Transistor. (Masters Thesis). University of Akron. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=akron1291935683

Chicago Manual of Style (16th Edition):

Kucherlapati, Naga Swathi. “Modeling of a Three Layer Coated Nanowire Transistor.” 2010. Masters Thesis, University of Akron. Accessed January 22, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=akron1291935683.

MLA Handbook (7th Edition):

Kucherlapati, Naga Swathi. “Modeling of a Three Layer Coated Nanowire Transistor.” 2010. Web. 22 Jan 2020.

Vancouver:

Kucherlapati NS. Modeling of a Three Layer Coated Nanowire Transistor. [Internet] [Masters thesis]. University of Akron; 2010. [cited 2020 Jan 22]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1291935683.

Council of Science Editors:

Kucherlapati NS. Modeling of a Three Layer Coated Nanowire Transistor. [Masters Thesis]. University of Akron; 2010. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1291935683


Oregon State University

15. Ewing, Gerald Dean. High-efficiency radio-frequency power amplifiers.

Degree: PhD, Electrical Engineering, 1964, Oregon State University

 This dissertation describes a new radio-frequency power-amplifier circuit and mode of operation that exceeds the efficiency of the conventional class C amplifier in the low… (more)

Subjects/Keywords: Transistor amplifiers

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APA (6th Edition):

Ewing, G. D. (1964). High-efficiency radio-frequency power amplifiers. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/20196

Chicago Manual of Style (16th Edition):

Ewing, Gerald Dean. “High-efficiency radio-frequency power amplifiers.” 1964. Doctoral Dissertation, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/20196.

MLA Handbook (7th Edition):

Ewing, Gerald Dean. “High-efficiency radio-frequency power amplifiers.” 1964. Web. 22 Jan 2020.

Vancouver:

Ewing GD. High-efficiency radio-frequency power amplifiers. [Internet] [Doctoral dissertation]. Oregon State University; 1964. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/20196.

Council of Science Editors:

Ewing GD. High-efficiency radio-frequency power amplifiers. [Doctoral Dissertation]. Oregon State University; 1964. Available from: http://hdl.handle.net/1957/20196

16. Suzuki, Kazunori. Evaluation of Functional Unit with Highly Reliable Cells : 高信頼セルによる演算器の提案と評価; コウシンライ セル ニ ヨル エンザンキ ノ テイアン ト ヒョウカ.

Degree: Nara Institute of Science and Technology / 奈良先端科学技術大学院大学

Subjects/Keywords: transistor variation

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APA (6th Edition):

Suzuki, K. (n.d.). Evaluation of Functional Unit with Highly Reliable Cells : 高信頼セルによる演算器の提案と評価; コウシンライ セル ニ ヨル エンザンキ ノ テイアン ト ヒョウカ. (Thesis). Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Retrieved from http://hdl.handle.net/10061/5143

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Suzuki, Kazunori. “Evaluation of Functional Unit with Highly Reliable Cells : 高信頼セルによる演算器の提案と評価; コウシンライ セル ニ ヨル エンザンキ ノ テイアン ト ヒョウカ.” Thesis, Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Accessed January 22, 2020. http://hdl.handle.net/10061/5143.

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Suzuki, Kazunori. “Evaluation of Functional Unit with Highly Reliable Cells : 高信頼セルによる演算器の提案と評価; コウシンライ セル ニ ヨル エンザンキ ノ テイアン ト ヒョウカ.” Web. 22 Jan 2020.

Note: this citation may be lacking information needed for this citation format:
No year of publication.

Vancouver:

Suzuki K. Evaluation of Functional Unit with Highly Reliable Cells : 高信頼セルによる演算器の提案と評価; コウシンライ セル ニ ヨル エンザンキ ノ テイアン ト ヒョウカ. [Internet] [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; [cited 2020 Jan 22]. Available from: http://hdl.handle.net/10061/5143.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.

Council of Science Editors:

Suzuki K. Evaluation of Functional Unit with Highly Reliable Cells : 高信頼セルによる演算器の提案と評価; コウシンライ セル ニ ヨル エンザンキ ノ テイアン ト ヒョウカ. [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; Available from: http://hdl.handle.net/10061/5143

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.


Penn State University

17. Pan, Suxing. A Novel Approach For Fabricating Nanochannel Templates For Si Nanowire Growth And Transistor Fabrication.

Degree: PhD, Engineering Science and Mechanics, 2013, Penn State University

 For the past decades, silicon nanowire (SiNW) has been extensively studied due to their unique electric, optical, and mechanical properties and great compatibility with modern… (more)

Subjects/Keywords: Silicon Nanowire; Transistor; AMOSFET

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APA (6th Edition):

Pan, S. (2013). A Novel Approach For Fabricating Nanochannel Templates For Si Nanowire Growth And Transistor Fabrication. (Doctoral Dissertation). Penn State University. Retrieved from https://etda.libraries.psu.edu/catalog/18933

Chicago Manual of Style (16th Edition):

Pan, Suxing. “A Novel Approach For Fabricating Nanochannel Templates For Si Nanowire Growth And Transistor Fabrication.” 2013. Doctoral Dissertation, Penn State University. Accessed January 22, 2020. https://etda.libraries.psu.edu/catalog/18933.

MLA Handbook (7th Edition):

Pan, Suxing. “A Novel Approach For Fabricating Nanochannel Templates For Si Nanowire Growth And Transistor Fabrication.” 2013. Web. 22 Jan 2020.

Vancouver:

Pan S. A Novel Approach For Fabricating Nanochannel Templates For Si Nanowire Growth And Transistor Fabrication. [Internet] [Doctoral dissertation]. Penn State University; 2013. [cited 2020 Jan 22]. Available from: https://etda.libraries.psu.edu/catalog/18933.

Council of Science Editors:

Pan S. A Novel Approach For Fabricating Nanochannel Templates For Si Nanowire Growth And Transistor Fabrication. [Doctoral Dissertation]. Penn State University; 2013. Available from: https://etda.libraries.psu.edu/catalog/18933


University of California – Irvine

18. Wang, Yung Yu. Graphene Based Transistors and Supported Lipid Bilayer.

Degree: Chemical and Biochemical Engineering, 2014, University of California – Irvine

 Graphene is an attractive material not only because of its electronic and optical properties, but also is considered for its potential applications in electronics and… (more)

Subjects/Keywords: Engineering; Graphene; Lipid bilayer; Transistor

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APA (6th Edition):

Wang, Y. Y. (2014). Graphene Based Transistors and Supported Lipid Bilayer. (Thesis). University of California – Irvine. Retrieved from http://www.escholarship.org/uc/item/1mj647gc

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Yung Yu. “Graphene Based Transistors and Supported Lipid Bilayer.” 2014. Thesis, University of California – Irvine. Accessed January 22, 2020. http://www.escholarship.org/uc/item/1mj647gc.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Yung Yu. “Graphene Based Transistors and Supported Lipid Bilayer.” 2014. Web. 22 Jan 2020.

Vancouver:

Wang YY. Graphene Based Transistors and Supported Lipid Bilayer. [Internet] [Thesis]. University of California – Irvine; 2014. [cited 2020 Jan 22]. Available from: http://www.escholarship.org/uc/item/1mj647gc.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang YY. Graphene Based Transistors and Supported Lipid Bilayer. [Thesis]. University of California – Irvine; 2014. Available from: http://www.escholarship.org/uc/item/1mj647gc

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

19. Qiu, Junyi. Analysis of transistor laser intra-cavity photon-assisted tunneling for direct voltage modulation.

Degree: MS, Electrical & Computer Engr, 2016, University of Illinois – Urbana-Champaign

 High-speed optical interconnect made with semiconductor lasers is expected to play an important role in the upcoming age of big data. The technology of diode… (more)

Subjects/Keywords: Transistor Laser; Photon-Assisted Tunneling

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APA (6th Edition):

Qiu, J. (2016). Analysis of transistor laser intra-cavity photon-assisted tunneling for direct voltage modulation. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/95598

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Qiu, Junyi. “Analysis of transistor laser intra-cavity photon-assisted tunneling for direct voltage modulation.” 2016. Thesis, University of Illinois – Urbana-Champaign. Accessed January 22, 2020. http://hdl.handle.net/2142/95598.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Qiu, Junyi. “Analysis of transistor laser intra-cavity photon-assisted tunneling for direct voltage modulation.” 2016. Web. 22 Jan 2020.

Vancouver:

Qiu J. Analysis of transistor laser intra-cavity photon-assisted tunneling for direct voltage modulation. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2016. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/2142/95598.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Qiu J. Analysis of transistor laser intra-cavity photon-assisted tunneling for direct voltage modulation. [Thesis]. University of Illinois – Urbana-Champaign; 2016. Available from: http://hdl.handle.net/2142/95598

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

20. Traa, Einar. An integrated analog multiplier circuit.

Degree: MS, Electrical and Electronics Engineering, 1968, Oregon State University

 The exponential characteristic of the base-emitter Junction in bipolar transistors was used to make an accurate and fairly temperature independent multiplier. Using hybrid-pi transistor models… (more)

Subjects/Keywords: Transistor circuits

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APA (6th Edition):

Traa, E. (1968). An integrated analog multiplier circuit. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/34159

Chicago Manual of Style (16th Edition):

Traa, Einar. “An integrated analog multiplier circuit.” 1968. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/34159.

MLA Handbook (7th Edition):

Traa, Einar. “An integrated analog multiplier circuit.” 1968. Web. 22 Jan 2020.

Vancouver:

Traa E. An integrated analog multiplier circuit. [Internet] [Masters thesis]. Oregon State University; 1968. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/34159.

Council of Science Editors:

Traa E. An integrated analog multiplier circuit. [Masters Thesis]. Oregon State University; 1968. Available from: http://hdl.handle.net/1957/34159


Oregon State University

21. Beutler, Robert Russel. An impulse-response measurement apparatus for linear systems using a rectangular input with a Poisson distribution of zero crossings.

Degree: MS, Electrical Engineering, 1965, Oregon State University

 For many applications it is desirable to be able to experimentally determine the impulse response of a linear system while it is in operation. Use… (more)

Subjects/Keywords: Transistor circuits

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APA (6th Edition):

Beutler, R. R. (1965). An impulse-response measurement apparatus for linear systems using a rectangular input with a Poisson distribution of zero crossings. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/47822

Chicago Manual of Style (16th Edition):

Beutler, Robert Russel. “An impulse-response measurement apparatus for linear systems using a rectangular input with a Poisson distribution of zero crossings.” 1965. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/47822.

MLA Handbook (7th Edition):

Beutler, Robert Russel. “An impulse-response measurement apparatus for linear systems using a rectangular input with a Poisson distribution of zero crossings.” 1965. Web. 22 Jan 2020.

Vancouver:

Beutler RR. An impulse-response measurement apparatus for linear systems using a rectangular input with a Poisson distribution of zero crossings. [Internet] [Masters thesis]. Oregon State University; 1965. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/47822.

Council of Science Editors:

Beutler RR. An impulse-response measurement apparatus for linear systems using a rectangular input with a Poisson distribution of zero crossings. [Masters Thesis]. Oregon State University; 1965. Available from: http://hdl.handle.net/1957/47822


Oregon State University

22. Anand, Satish Kumar. Majority logic circuits.

Degree: MS, Electrical Engineering, 1965, Oregon State University

 This thesis considers the worst-case design of transistor circuits for the realization of Majority Logic. First the meaning of Majority Logic is discussed. The requirement… (more)

Subjects/Keywords: Transistor circuits

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APA (6th Edition):

Anand, S. K. (1965). Majority logic circuits. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/48158

Chicago Manual of Style (16th Edition):

Anand, Satish Kumar. “Majority logic circuits.” 1965. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/48158.

MLA Handbook (7th Edition):

Anand, Satish Kumar. “Majority logic circuits.” 1965. Web. 22 Jan 2020.

Vancouver:

Anand SK. Majority logic circuits. [Internet] [Masters thesis]. Oregon State University; 1965. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/48158.

Council of Science Editors:

Anand SK. Majority logic circuits. [Masters Thesis]. Oregon State University; 1965. Available from: http://hdl.handle.net/1957/48158


Oregon State University

23. Bishop, Stanley Robert. A method for analysis of direct-coupled transistor amplifiers.

Degree: MS, Electrical Engineering, 1964, Oregon State University

 The demand for transistor circuitry to perform within more exacting specifications has created the need for a method to accurateIy predict transistor circuit performance. A… (more)

Subjects/Keywords: Transistor amplifiers

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APA (6th Edition):

Bishop, S. R. (1964). A method for analysis of direct-coupled transistor amplifiers. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/48485

Chicago Manual of Style (16th Edition):

Bishop, Stanley Robert. “A method for analysis of direct-coupled transistor amplifiers.” 1964. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/48485.

MLA Handbook (7th Edition):

Bishop, Stanley Robert. “A method for analysis of direct-coupled transistor amplifiers.” 1964. Web. 22 Jan 2020.

Vancouver:

Bishop SR. A method for analysis of direct-coupled transistor amplifiers. [Internet] [Masters thesis]. Oregon State University; 1964. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/48485.

Council of Science Editors:

Bishop SR. A method for analysis of direct-coupled transistor amplifiers. [Masters Thesis]. Oregon State University; 1964. Available from: http://hdl.handle.net/1957/48485


Oregon State University

24. Rux, Peter Turner. The field-effect transistor as a medium-speed, low-level chopper.

Degree: MS, Electrical Engineering, 1964, Oregon State University

Subjects/Keywords: Transistor amplifiers

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APA (6th Edition):

Rux, P. T. (1964). The field-effect transistor as a medium-speed, low-level chopper. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/48918

Chicago Manual of Style (16th Edition):

Rux, Peter Turner. “The field-effect transistor as a medium-speed, low-level chopper.” 1964. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/48918.

MLA Handbook (7th Edition):

Rux, Peter Turner. “The field-effect transistor as a medium-speed, low-level chopper.” 1964. Web. 22 Jan 2020.

Vancouver:

Rux PT. The field-effect transistor as a medium-speed, low-level chopper. [Internet] [Masters thesis]. Oregon State University; 1964. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/48918.

Council of Science Editors:

Rux PT. The field-effect transistor as a medium-speed, low-level chopper. [Masters Thesis]. Oregon State University; 1964. Available from: http://hdl.handle.net/1957/48918


Oregon State University

25. McGowan, Gerald Frank. Transistor DC amplifier design theory.

Degree: MS, Electrical Engineering, 1959, Oregon State University

Subjects/Keywords: Transistor amplifiers

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APA (6th Edition):

McGowan, G. F. (1959). Transistor DC amplifier design theory. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/49900

Chicago Manual of Style (16th Edition):

McGowan, Gerald Frank. “Transistor DC amplifier design theory.” 1959. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/49900.

MLA Handbook (7th Edition):

McGowan, Gerald Frank. “Transistor DC amplifier design theory.” 1959. Web. 22 Jan 2020.

Vancouver:

McGowan GF. Transistor DC amplifier design theory. [Internet] [Masters thesis]. Oregon State University; 1959. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/49900.

Council of Science Editors:

McGowan GF. Transistor DC amplifier design theory. [Masters Thesis]. Oregon State University; 1959. Available from: http://hdl.handle.net/1957/49900


Oregon State University

26. Kim, Sŭng-yŏng. Influence of surface fields on shallow planar-junction breakdown voltages.

Degree: MS, Electrical and Electronics Engineering, 1972, Oregon State University

 The influence of surface fields on the breakdown voltage is studied experimentally for p⁺-n silicon diodes with a junction depth of 0.5μ in order to… (more)

Subjects/Keywords: Transistor circuits

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APA (6th Edition):

Kim, S. (1972). Influence of surface fields on shallow planar-junction breakdown voltages. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/45742

Chicago Manual of Style (16th Edition):

Kim, Sŭng-yŏng. “Influence of surface fields on shallow planar-junction breakdown voltages.” 1972. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/45742.

MLA Handbook (7th Edition):

Kim, Sŭng-yŏng. “Influence of surface fields on shallow planar-junction breakdown voltages.” 1972. Web. 22 Jan 2020.

Vancouver:

Kim S. Influence of surface fields on shallow planar-junction breakdown voltages. [Internet] [Masters thesis]. Oregon State University; 1972. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/45742.

Council of Science Editors:

Kim S. Influence of surface fields on shallow planar-junction breakdown voltages. [Masters Thesis]. Oregon State University; 1972. Available from: http://hdl.handle.net/1957/45742


Oregon State University

27. Jomeswarng, Paichitr. Characteristics of analog switches using junction field-effect transistors.

Degree: MS, Electrical and Electronics Engineering, 1968, Oregon State University

 The junction-field effect transistor has been improved technically, so it is appropriate in analog switching applications. In this paper, use of a junction FET as… (more)

Subjects/Keywords: Transistor circuits

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APA (6th Edition):

Jomeswarng, P. (1968). Characteristics of analog switches using junction field-effect transistors. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/47418

Chicago Manual of Style (16th Edition):

Jomeswarng, Paichitr. “Characteristics of analog switches using junction field-effect transistors.” 1968. Masters Thesis, Oregon State University. Accessed January 22, 2020. http://hdl.handle.net/1957/47418.

MLA Handbook (7th Edition):

Jomeswarng, Paichitr. “Characteristics of analog switches using junction field-effect transistors.” 1968. Web. 22 Jan 2020.

Vancouver:

Jomeswarng P. Characteristics of analog switches using junction field-effect transistors. [Internet] [Masters thesis]. Oregon State University; 1968. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/1957/47418.

Council of Science Editors:

Jomeswarng P. Characteristics of analog switches using junction field-effect transistors. [Masters Thesis]. Oregon State University; 1968. Available from: http://hdl.handle.net/1957/47418

28. Mairiaux, Estelle. Développement d’une nouvelle filière de transistors bipolaires à hétérojonction AlIn(As)Sb/GaInSb en vue applications térahertz : Development of antimonide-based heterojunction bipolar transistors for terahertz applications.

Degree: Docteur es, Micro et nano technologies, acoustique et télécommunications, 2010, Université Lille I – Sciences et Technologies

Les semiconducteurs III-V antimoniés suscitent un intérêt grandissant pour les applications électroniques rapides et faible consommation. Ces matériaux de paramètre de maille supérieur à 6,1… (more)

Subjects/Keywords: Transistor bipolaire à hétérojonction

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APA (6th Edition):

Mairiaux, E. (2010). Développement d’une nouvelle filière de transistors bipolaires à hétérojonction AlIn(As)Sb/GaInSb en vue applications térahertz : Development of antimonide-based heterojunction bipolar transistors for terahertz applications. (Doctoral Dissertation). Université Lille I – Sciences et Technologies. Retrieved from http://www.theses.fr/2010LIL10096

Chicago Manual of Style (16th Edition):

Mairiaux, Estelle. “Développement d’une nouvelle filière de transistors bipolaires à hétérojonction AlIn(As)Sb/GaInSb en vue applications térahertz : Development of antimonide-based heterojunction bipolar transistors for terahertz applications.” 2010. Doctoral Dissertation, Université Lille I – Sciences et Technologies. Accessed January 22, 2020. http://www.theses.fr/2010LIL10096.

MLA Handbook (7th Edition):

Mairiaux, Estelle. “Développement d’une nouvelle filière de transistors bipolaires à hétérojonction AlIn(As)Sb/GaInSb en vue applications térahertz : Development of antimonide-based heterojunction bipolar transistors for terahertz applications.” 2010. Web. 22 Jan 2020.

Vancouver:

Mairiaux E. Développement d’une nouvelle filière de transistors bipolaires à hétérojonction AlIn(As)Sb/GaInSb en vue applications térahertz : Development of antimonide-based heterojunction bipolar transistors for terahertz applications. [Internet] [Doctoral dissertation]. Université Lille I – Sciences et Technologies; 2010. [cited 2020 Jan 22]. Available from: http://www.theses.fr/2010LIL10096.

Council of Science Editors:

Mairiaux E. Développement d’une nouvelle filière de transistors bipolaires à hétérojonction AlIn(As)Sb/GaInSb en vue applications térahertz : Development of antimonide-based heterojunction bipolar transistors for terahertz applications. [Doctoral Dissertation]. Université Lille I – Sciences et Technologies; 2010. Available from: http://www.theses.fr/2010LIL10096


University of Arizona

29. Enloe, Louis Henry, 1933-. TRANSISTOR DISTRIBUTED AMPLIFIERS .

Degree: 1959, University of Arizona

Subjects/Keywords: Transistor amplifiers.

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APA (6th Edition):

Enloe, Louis Henry, 1. (1959). TRANSISTOR DISTRIBUTED AMPLIFIERS . (Doctoral Dissertation). University of Arizona. Retrieved from http://hdl.handle.net/10150/284371

Chicago Manual of Style (16th Edition):

Enloe, Louis Henry, 1933-. “TRANSISTOR DISTRIBUTED AMPLIFIERS .” 1959. Doctoral Dissertation, University of Arizona. Accessed January 22, 2020. http://hdl.handle.net/10150/284371.

MLA Handbook (7th Edition):

Enloe, Louis Henry, 1933-. “TRANSISTOR DISTRIBUTED AMPLIFIERS .” 1959. Web. 22 Jan 2020.

Vancouver:

Enloe, Louis Henry 1. TRANSISTOR DISTRIBUTED AMPLIFIERS . [Internet] [Doctoral dissertation]. University of Arizona; 1959. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/10150/284371.

Council of Science Editors:

Enloe, Louis Henry 1. TRANSISTOR DISTRIBUTED AMPLIFIERS . [Doctoral Dissertation]. University of Arizona; 1959. Available from: http://hdl.handle.net/10150/284371


University of Waterloo

30. Ellard, Jackson. Thiophene-S,S-dioxidized indophenine for use in organic field effect transistors.

Degree: 2016, University of Waterloo

 To address the need for better n-type organic semiconductors, thiophene-S,S-dioxidized indophenine (IDTO) was developed. IDTO is a planar quinoidal molecule with deep energy levels which… (more)

Subjects/Keywords: organic field effect transistor

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APA (6th Edition):

Ellard, J. (2016). Thiophene-S,S-dioxidized indophenine for use in organic field effect transistors. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/11137

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ellard, Jackson. “Thiophene-S,S-dioxidized indophenine for use in organic field effect transistors.” 2016. Thesis, University of Waterloo. Accessed January 22, 2020. http://hdl.handle.net/10012/11137.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ellard, Jackson. “Thiophene-S,S-dioxidized indophenine for use in organic field effect transistors.” 2016. Web. 22 Jan 2020.

Vancouver:

Ellard J. Thiophene-S,S-dioxidized indophenine for use in organic field effect transistors. [Internet] [Thesis]. University of Waterloo; 2016. [cited 2020 Jan 22]. Available from: http://hdl.handle.net/10012/11137.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ellard J. Thiophene-S,S-dioxidized indophenine for use in organic field effect transistors. [Thesis]. University of Waterloo; 2016. Available from: http://hdl.handle.net/10012/11137

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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