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Universidade do Rio Grande do Sul

1. Lisboa, Carlos Arthur Lang. Dealing with radiation induced long duration transient faults in future technologies.

Degree: 2009, Universidade do Rio Grande do Sul

Com a evolução da tecnologia, dispositivos menores e mais rápidos ficam disponíveis para a fabricação de circuitos que, embora sejam mais eficientes, são mais sensíveis… (more)

Subjects/Keywords: Microeletrônica; Fault tolerance; Deteccao : Erros; Radiation effects; Low cost techniques; Tolerancia : Falhas

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lisboa, C. A. L. (2009). Dealing with radiation induced long duration transient faults in future technologies. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/17037

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lisboa, Carlos Arthur Lang. “Dealing with radiation induced long duration transient faults in future technologies.” 2009. Thesis, Universidade do Rio Grande do Sul. Accessed October 22, 2019. http://hdl.handle.net/10183/17037.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lisboa, Carlos Arthur Lang. “Dealing with radiation induced long duration transient faults in future technologies.” 2009. Web. 22 Oct 2019.

Vancouver:

Lisboa CAL. Dealing with radiation induced long duration transient faults in future technologies. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2009. [cited 2019 Oct 22]. Available from: http://hdl.handle.net/10183/17037.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lisboa CAL. Dealing with radiation induced long duration transient faults in future technologies. [Thesis]. Universidade do Rio Grande do Sul; 2009. Available from: http://hdl.handle.net/10183/17037

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

2. Silva, Jeferson Santiago da. Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages.

Degree: 2015, Universidade do Rio Grande do Sul

The increasing demand for high computational performance and massive data processing has driven the development of systems-on-chip. One implementation target for complex digital systems are… (more)

Subjects/Keywords: Microeletrônica; High-level synthesis; FPGA; Circuitos digitais; Design space exploration; Digital design; Optimization techniques

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APA (6th Edition):

Silva, J. S. d. (2015). Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/119082

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Silva, Jeferson Santiago da. “Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages.” 2015. Thesis, Universidade do Rio Grande do Sul. Accessed October 22, 2019. http://hdl.handle.net/10183/119082.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Silva, Jeferson Santiago da. “Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages.” 2015. Web. 22 Oct 2019.

Vancouver:

Silva JSd. Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2015. [cited 2019 Oct 22]. Available from: http://hdl.handle.net/10183/119082.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Silva JSd. Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages. [Thesis]. Universidade do Rio Grande do Sul; 2015. Available from: http://hdl.handle.net/10183/119082

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

3. ALVARO, Alexandre. A software component quality framework .

Degree: 2009, Universidade Federal de Pernambuco

 Um grande desafio da Engenharia de Software Baseada em Componentes (ESBC) é a qualidade dos componentes utilizados em um sistema. A confiabilidade de um sistema… (more)

Subjects/Keywords: Software Components; Software Component Quality; Component Quality Model; Component Evaluation Techniques and Component Evaluation Process

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APA (6th Edition):

ALVARO, A. (2009). A software component quality framework . (Thesis). Universidade Federal de Pernambuco. Retrieved from http://repositorio.ufpe.br/handle/123456789/1372

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

ALVARO, Alexandre. “A software component quality framework .” 2009. Thesis, Universidade Federal de Pernambuco. Accessed October 22, 2019. http://repositorio.ufpe.br/handle/123456789/1372.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

ALVARO, Alexandre. “A software component quality framework .” 2009. Web. 22 Oct 2019.

Vancouver:

ALVARO A. A software component quality framework . [Internet] [Thesis]. Universidade Federal de Pernambuco; 2009. [cited 2019 Oct 22]. Available from: http://repositorio.ufpe.br/handle/123456789/1372.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

ALVARO A. A software component quality framework . [Thesis]. Universidade Federal de Pernambuco; 2009. Available from: http://repositorio.ufpe.br/handle/123456789/1372

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

4. Ribeiro, Leandro do Prado. Exploring genetic biodiversity: secondary metabolites from Neotropical Annonaceae as a potential source of new pesticides.

Degree: PhD, Entomologia, 2014, University of São Paulo

 To investigate potential sources of novel grain protectors, this study evaluated, firstly, the bioactivity of ethanolic extracts (66) prepared from 29 species belonging to 11… (more)

Subjects/Keywords: Acetogeninas; Acetogenins; Aleloquímicos; Allelochemicals; Bioguided fractionations; Botanical insecticides; Chromatographic techniques; Fracionamentos biomonitorados; Inseticidas botânicos; Técnicas cromatográficas

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APA (6th Edition):

Ribeiro, L. d. P. (2014). Exploring genetic biodiversity: secondary metabolites from Neotropical Annonaceae as a potential source of new pesticides. (Doctoral Dissertation). University of São Paulo. Retrieved from http://www.teses.usp.br/teses/disponiveis/11/11146/tde-05052014-143830/ ;

Chicago Manual of Style (16th Edition):

Ribeiro, Leandro do Prado. “Exploring genetic biodiversity: secondary metabolites from Neotropical Annonaceae as a potential source of new pesticides.” 2014. Doctoral Dissertation, University of São Paulo. Accessed October 22, 2019. http://www.teses.usp.br/teses/disponiveis/11/11146/tde-05052014-143830/ ;.

MLA Handbook (7th Edition):

Ribeiro, Leandro do Prado. “Exploring genetic biodiversity: secondary metabolites from Neotropical Annonaceae as a potential source of new pesticides.” 2014. Web. 22 Oct 2019.

Vancouver:

Ribeiro LdP. Exploring genetic biodiversity: secondary metabolites from Neotropical Annonaceae as a potential source of new pesticides. [Internet] [Doctoral dissertation]. University of São Paulo; 2014. [cited 2019 Oct 22]. Available from: http://www.teses.usp.br/teses/disponiveis/11/11146/tde-05052014-143830/ ;.

Council of Science Editors:

Ribeiro LdP. Exploring genetic biodiversity: secondary metabolites from Neotropical Annonaceae as a potential source of new pesticides. [Doctoral Dissertation]. University of São Paulo; 2014. Available from: http://www.teses.usp.br/teses/disponiveis/11/11146/tde-05052014-143830/ ;


Universidade do Rio Grande do Sul

5. Rhod, Eduardo Luis. Quaternary CLB a falul tolerant quaternary FPGA.

Degree: 2012, Universidade do Rio Grande do Sul

A diminuição no tamanho dos transistores vem aumentando cada vez mais o número de funções que os dispositivos eletrônicos podem realizar. Apesar da diminuição do… (more)

Subjects/Keywords: Fault tolerant architectures; Microeletrônica; Quaternary circuits; Tolerancia : Falhas; Sistemas digitais; Error detection techniques; Soft error rate; FPGAs

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rhod, E. L. (2012). Quaternary CLB a falul tolerant quaternary FPGA. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/72925

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rhod, Eduardo Luis. “Quaternary CLB a falul tolerant quaternary FPGA.” 2012. Thesis, Universidade do Rio Grande do Sul. Accessed October 22, 2019. http://hdl.handle.net/10183/72925.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rhod, Eduardo Luis. “Quaternary CLB a falul tolerant quaternary FPGA.” 2012. Web. 22 Oct 2019.

Vancouver:

Rhod EL. Quaternary CLB a falul tolerant quaternary FPGA. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2012. [cited 2019 Oct 22]. Available from: http://hdl.handle.net/10183/72925.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rhod EL. Quaternary CLB a falul tolerant quaternary FPGA. [Thesis]. Universidade do Rio Grande do Sul; 2012. Available from: http://hdl.handle.net/10183/72925

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

6. Blanco, Fausto Richetti. A technique for interactive shape deformation on non-structured objects.

Degree: 2007, Universidade do Rio Grande do Sul

Este trabalho apresenta uma técnica para deformação interativa de objetos 3D não estruturados que combina o uso de sketches em 2D e manipulação interativa de… (more)

Subjects/Keywords: Computação gráfica; Object deformation; Interaction techniques; Realidade virtual; 3D; Curves and surfaces; Object modeling; Non-structured objects

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APA (6th Edition):

Blanco, F. R. (2007). A technique for interactive shape deformation on non-structured objects. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/11176

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Blanco, Fausto Richetti. “A technique for interactive shape deformation on non-structured objects.” 2007. Thesis, Universidade do Rio Grande do Sul. Accessed October 22, 2019. http://hdl.handle.net/10183/11176.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Blanco, Fausto Richetti. “A technique for interactive shape deformation on non-structured objects.” 2007. Web. 22 Oct 2019.

Vancouver:

Blanco FR. A technique for interactive shape deformation on non-structured objects. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2007. [cited 2019 Oct 22]. Available from: http://hdl.handle.net/10183/11176.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Blanco FR. A technique for interactive shape deformation on non-structured objects. [Thesis]. Universidade do Rio Grande do Sul; 2007. Available from: http://hdl.handle.net/10183/11176

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Pontifical Catholic University of Rio de Janeiro

7. HENRIQUE D ESCRAGNOLLE-TAUNAY. [en] A SPATIAL PARTITIONING HEURISTIC FOR AUTOMATIC ADJUSTMENT OF THE 3D NAVIGATION SPEED IN MULTISCALE VIRTUAL ENVIRONMENTS.

Degree: 2018, Pontifical Catholic University of Rio de Janeiro

[pt] Com a evolução tecnológica, ambientes virtuais em 3D crescem continuamente em complexidade; este é o caso de ambientes multiescala, i.e., ambientes que contêm grupos… (more)

Subjects/Keywords: [pt] COMPUTACAO GRAFICA; [en] COMPUTER GRAPHICS; [pt] REALIDADE VIRTUAL; [en] VIRTUAL REALITY; [pt] TECNICAS E METODOLOGIAS; [en] METHODOLOGY AND TECHNIQUES; [pt] TECNICAS INTERATIVAS; [en] INTERACTION TECHNIQUES; [pt] REALISMO E GRAFICOS TRIDIMENSIONAIS; [en] THREE-DIMENSIONAL GRAPHICS AND REALISM

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APA (6th Edition):

ESCRAGNOLLE-TAUNAY, H. D. (2018). [en] A SPATIAL PARTITIONING HEURISTIC FOR AUTOMATIC ADJUSTMENT OF THE 3D NAVIGATION SPEED IN MULTISCALE VIRTUAL ENVIRONMENTS. (Thesis). Pontifical Catholic University of Rio de Janeiro. Retrieved from http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=33439

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

ESCRAGNOLLE-TAUNAY, HENRIQUE D. “[en] A SPATIAL PARTITIONING HEURISTIC FOR AUTOMATIC ADJUSTMENT OF THE 3D NAVIGATION SPEED IN MULTISCALE VIRTUAL ENVIRONMENTS.” 2018. Thesis, Pontifical Catholic University of Rio de Janeiro. Accessed October 22, 2019. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=33439.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

ESCRAGNOLLE-TAUNAY, HENRIQUE D. “[en] A SPATIAL PARTITIONING HEURISTIC FOR AUTOMATIC ADJUSTMENT OF THE 3D NAVIGATION SPEED IN MULTISCALE VIRTUAL ENVIRONMENTS.” 2018. Web. 22 Oct 2019.

Vancouver:

ESCRAGNOLLE-TAUNAY HD. [en] A SPATIAL PARTITIONING HEURISTIC FOR AUTOMATIC ADJUSTMENT OF THE 3D NAVIGATION SPEED IN MULTISCALE VIRTUAL ENVIRONMENTS. [Internet] [Thesis]. Pontifical Catholic University of Rio de Janeiro; 2018. [cited 2019 Oct 22]. Available from: http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=33439.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

ESCRAGNOLLE-TAUNAY HD. [en] A SPATIAL PARTITIONING HEURISTIC FOR AUTOMATIC ADJUSTMENT OF THE 3D NAVIGATION SPEED IN MULTISCALE VIRTUAL ENVIRONMENTS. [Thesis]. Pontifical Catholic University of Rio de Janeiro; 2018. Available from: http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=33439

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

8. Chielle, Eduardo. Selective software-implemented hardware fault tolerance tecnhiques to detect soft errors in processors with reduced overhead.

Degree: 2016, Universidade do Rio Grande do Sul

Software-based fault tolerance techniques are a low-cost way to protect processors against soft errors. However, they introduce significant overheads to the execution time and code… (more)

Subjects/Keywords: SIHFT techniques; Microeletrônica; Tolerancia : Falhas : Software; Selective hardening; Transient faults; Processadores; Soft errors; Single event effects; SEU; SET; Processor; Reliability; Execution time; Code size; Energy consumption; Lower overheads

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APA (6th Edition):

Chielle, E. (2016). Selective software-implemented hardware fault tolerance tecnhiques to detect soft errors in processors with reduced overhead. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/142568

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chielle, Eduardo. “Selective software-implemented hardware fault tolerance tecnhiques to detect soft errors in processors with reduced overhead.” 2016. Thesis, Universidade do Rio Grande do Sul. Accessed October 22, 2019. http://hdl.handle.net/10183/142568.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chielle, Eduardo. “Selective software-implemented hardware fault tolerance tecnhiques to detect soft errors in processors with reduced overhead.” 2016. Web. 22 Oct 2019.

Vancouver:

Chielle E. Selective software-implemented hardware fault tolerance tecnhiques to detect soft errors in processors with reduced overhead. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2016. [cited 2019 Oct 22]. Available from: http://hdl.handle.net/10183/142568.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chielle E. Selective software-implemented hardware fault tolerance tecnhiques to detect soft errors in processors with reduced overhead. [Thesis]. Universidade do Rio Grande do Sul; 2016. Available from: http://hdl.handle.net/10183/142568

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Pontifical Catholic University of Rio de Janeiro

9. SILVIO FERNANDO BERNARDES PINTO. [en] HIGH-RESOLUTION DIRECTION FINDING TECHNIQUES EXPLOITING PRIOR KNOWLEDGE.

Degree: 2018, Pontifical Catholic University of Rio de Janeiro

[pt] A maioria dos métodos e algoritmos para estimação de direção é pouco precisa em cenários formados por fontes próximas, pequenos lotes de amostras e… (more)

Subjects/Keywords: [pt] ESTIMACAO DE PARAMETROS EM ALTA RESOLUCAO; [en] HIGH-RESOLUTION PARAMETER ESTIMATION; [pt] ESTIMACAO DE DIRECAO; [en] DIRECTION FINDING; [pt] TECNICAS AUXILIADAS POR CONHECIMENTO; [en] KNOWLEDGEAIDED TECHNIQUES

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APA (6th Edition):

PINTO, S. F. B. (2018). [en] HIGH-RESOLUTION DIRECTION FINDING TECHNIQUES EXPLOITING PRIOR KNOWLEDGE. (Thesis). Pontifical Catholic University of Rio de Janeiro. Retrieved from http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=34917

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

PINTO, SILVIO FERNANDO BERNARDES. “[en] HIGH-RESOLUTION DIRECTION FINDING TECHNIQUES EXPLOITING PRIOR KNOWLEDGE.” 2018. Thesis, Pontifical Catholic University of Rio de Janeiro. Accessed October 22, 2019. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=34917.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

PINTO, SILVIO FERNANDO BERNARDES. “[en] HIGH-RESOLUTION DIRECTION FINDING TECHNIQUES EXPLOITING PRIOR KNOWLEDGE.” 2018. Web. 22 Oct 2019.

Vancouver:

PINTO SFB. [en] HIGH-RESOLUTION DIRECTION FINDING TECHNIQUES EXPLOITING PRIOR KNOWLEDGE. [Internet] [Thesis]. Pontifical Catholic University of Rio de Janeiro; 2018. [cited 2019 Oct 22]. Available from: http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=34917.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

PINTO SFB. [en] HIGH-RESOLUTION DIRECTION FINDING TECHNIQUES EXPLOITING PRIOR KNOWLEDGE. [Thesis]. Pontifical Catholic University of Rio de Janeiro; 2018. Available from: http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=34917

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Pontifical Catholic University of Rio de Janeiro

10. LUCIANA SCHMID BLATTER MOREIRA. [en] RISK ANALYSIS IN A PORTFOLIO OF COMMODITIES: A CASE STUDY.

Degree: 2015, Pontifical Catholic University of Rio de Janeiro

[pt] Um dos principais desafios no mercado financeiro é simular preços mantendo a estrutura de correlação entre os inúmeros ativos de um portfólio. Análise de… (more)

Subjects/Keywords: [pt] OTIMIZACAO; [en] OPTIMIZATION; [pt] GARCH; [en] GARCH; [pt] VALUE-AT-RISK - VAR; [en] VALUE-AT-RISK - VAR; [pt] MOVIMENTO GEOMETRICO BROWNIANO; [en] GEOMETRIC BROWNIAN MOTION; [pt] ANALISE DE COMPONENTES PRINCIPAIS; [en] PRINCIPAL COMPONENT ANALYSIS; [pt] CONDITIONAL VALUE-AT-RISK - CVAR; [en] CONDITIONAL VALUE-AT-RISK - CVAR; [pt] MEDIDA OMEGA; [en] OMEGA THEORY; [pt] BACKTESTING TECHNIQUES; [en] BACKTESTING TECHNIQUES

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

MOREIRA, L. S. B. (2015). [en] RISK ANALYSIS IN A PORTFOLIO OF COMMODITIES: A CASE STUDY. (Thesis). Pontifical Catholic University of Rio de Janeiro. Retrieved from http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=24323

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

MOREIRA, LUCIANA SCHMID BLATTER. “[en] RISK ANALYSIS IN A PORTFOLIO OF COMMODITIES: A CASE STUDY.” 2015. Thesis, Pontifical Catholic University of Rio de Janeiro. Accessed October 22, 2019. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=24323.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

MOREIRA, LUCIANA SCHMID BLATTER. “[en] RISK ANALYSIS IN A PORTFOLIO OF COMMODITIES: A CASE STUDY.” 2015. Web. 22 Oct 2019.

Vancouver:

MOREIRA LSB. [en] RISK ANALYSIS IN A PORTFOLIO OF COMMODITIES: A CASE STUDY. [Internet] [Thesis]. Pontifical Catholic University of Rio de Janeiro; 2015. [cited 2019 Oct 22]. Available from: http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=24323.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

MOREIRA LSB. [en] RISK ANALYSIS IN A PORTFOLIO OF COMMODITIES: A CASE STUDY. [Thesis]. Pontifical Catholic University of Rio de Janeiro; 2015. Available from: http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=24323

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

11. Rhod, Eduardo Luis. Proposal of two solutions to cope with the faulty behavior of circuits in future technologies.

Degree: 2007, Universidade do Rio Grande do Sul

A diminuição no tamanho dos dispositivos nas tecnologias do futuro traz consigo um grande aumento na taxa de erros dos circuitos, na lógica combinacional e… (more)

Subjects/Keywords: Fault tolerant architectures; Microeletrônica; Tolerância a falhas; Memory based architectures; Reliable SoCs; Error detection techniques; Soft error rate

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rhod, E. L. (2007). Proposal of two solutions to cope with the faulty behavior of circuits in future technologies. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/16086

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rhod, Eduardo Luis. “Proposal of two solutions to cope with the faulty behavior of circuits in future technologies.” 2007. Thesis, Universidade do Rio Grande do Sul. Accessed October 22, 2019. http://hdl.handle.net/10183/16086.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rhod, Eduardo Luis. “Proposal of two solutions to cope with the faulty behavior of circuits in future technologies.” 2007. Web. 22 Oct 2019.

Vancouver:

Rhod EL. Proposal of two solutions to cope with the faulty behavior of circuits in future technologies. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2007. [cited 2019 Oct 22]. Available from: http://hdl.handle.net/10183/16086.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rhod EL. Proposal of two solutions to cope with the faulty behavior of circuits in future technologies. [Thesis]. Universidade do Rio Grande do Sul; 2007. Available from: http://hdl.handle.net/10183/16086

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Pontifical Catholic University of Rio de Janeiro

12. ALIMED CELECIA RAMOS. [en] MULTIPLE CLASSIFIER SYSTEM FOR MOTOR IMAGERY TASK CLASSIFICATION.

Degree: 2017, Pontifical Catholic University of Rio de Janeiro

[pt] Interfaces Cérebro Computador (BCIs) são sistemas artificiais que permitem a interação entre a pessoa e seu ambiente empregando a tradução de sinais elétricos cerebrais… (more)

Subjects/Keywords: [pt] PROCESSAMENTO DE SINAIS; [en] SIGNAL PROCESSING; [pt] ALGORITMOS GENETICOS; [en] GENETIC ALGORITHMS; [pt] SISTEMA DE MULTIPLOS CLASSIFICADORES; [en] MULTIPLE CLASSIFIER SYSTEM; [pt] INTERFACE CEREBRO COMPUTADOR; [en] BRAIN COMPUTER INTERFACE; [pt] IMAGINACAO MOTORA; [en] MOTOR IMAGERY; [pt] EEG; [en] EEG; [pt] TECNICAS DE FUSAO; [en] FUSION TECHNIQUES; [pt] MLP; [en] MLP

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APA (6th Edition):

RAMOS, A. C. (2017). [en] MULTIPLE CLASSIFIER SYSTEM FOR MOTOR IMAGERY TASK CLASSIFICATION. (Thesis). Pontifical Catholic University of Rio de Janeiro. Retrieved from http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=30903

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

RAMOS, ALIMED CELECIA. “[en] MULTIPLE CLASSIFIER SYSTEM FOR MOTOR IMAGERY TASK CLASSIFICATION.” 2017. Thesis, Pontifical Catholic University of Rio de Janeiro. Accessed October 22, 2019. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=30903.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

RAMOS, ALIMED CELECIA. “[en] MULTIPLE CLASSIFIER SYSTEM FOR MOTOR IMAGERY TASK CLASSIFICATION.” 2017. Web. 22 Oct 2019.

Vancouver:

RAMOS AC. [en] MULTIPLE CLASSIFIER SYSTEM FOR MOTOR IMAGERY TASK CLASSIFICATION. [Internet] [Thesis]. Pontifical Catholic University of Rio de Janeiro; 2017. [cited 2019 Oct 22]. Available from: http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=30903.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

RAMOS AC. [en] MULTIPLE CLASSIFIER SYSTEM FOR MOTOR IMAGERY TASK CLASSIFICATION. [Thesis]. Pontifical Catholic University of Rio de Janeiro; 2017. Available from: http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=30903

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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