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1. Mirza, Salma. Scalable, Memory-Intensive Scientific Computing on Field Programmable Gate Arrays.

Degree: MS, Electrical & Computer Engineering, 2010, University of Massachusetts

URL: https://scholarworks.umass.edu/theses/404

Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for many scientific computing problems. This is due to the memory bottleneck that is encountered with large arrays that must be stored in dynamic RAM. A system of FPGAs, with a large enough memory bandwidth, and clocked at only hundreds of MHz can outperform a CPU clocked at GHz in terms of floating point performance. An FPGA core designed for a target performance that does not unnecessarily exceed the memory imposed bottleneck can then be distributed, along with multiple memory interfaces, into a scalable architecture that overcomes the bandwidth limitation of a single interface. Interconnected cores can work together to solve a scientific computing problem and exploit a bandwidth that is the sum of the bandwidth available from all of their connected memory interfaces. The implementation demonstrates this concept of scalability with two memory interfaces through the use of available FPGA prototyping platforms. Even though the FPGAs operate at 133 MHz, which is twenty one times slower than an AMD Phenom X4 processor operating at 2.8 GHz, the system of two FPGAs performs eight times slower than the processor for the example problem of SMVM in heat transfer. However, the system is demonstrated to be scalable with a run-time that decreases linearly with respect to the available memory bandwidth. The floating point performance of a single board implementation is 12 GFlops which doubles to 24 GFlops for a two board implementation, for a gather or scatter operation on matrices of varying sizes.
*Advisors/Committee Members: Russell Tessier.*

Subjects/Keywords: Scientific Computation on FPGAs; Accelerating Scientific Computation; Sparse Matrix Vector Multiplications; Memory-Intensive Computation; Reconfigurable Computing; VLSI and Circuits, Embedded and Hardware Systems

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6^{th} Edition):

Mirza, S. (2010). Scalable, Memory-Intensive Scientific Computing on Field Programmable Gate Arrays. (Masters Thesis). University of Massachusetts. Retrieved from https://scholarworks.umass.edu/theses/404

Chicago Manual of Style (16^{th} Edition):

Mirza, Salma. “Scalable, Memory-Intensive Scientific Computing on Field Programmable Gate Arrays.” 2010. Masters Thesis, University of Massachusetts. Accessed July 11, 2020. https://scholarworks.umass.edu/theses/404.

MLA Handbook (7^{th} Edition):

Mirza, Salma. “Scalable, Memory-Intensive Scientific Computing on Field Programmable Gate Arrays.” 2010. Web. 11 Jul 2020.

Vancouver:

Mirza S. Scalable, Memory-Intensive Scientific Computing on Field Programmable Gate Arrays. [Internet] [Masters thesis]. University of Massachusetts; 2010. [cited 2020 Jul 11]. Available from: https://scholarworks.umass.edu/theses/404.

Council of Science Editors:

Mirza S. Scalable, Memory-Intensive Scientific Computing on Field Programmable Gate Arrays. [Masters Thesis]. University of Massachusetts; 2010. Available from: https://scholarworks.umass.edu/theses/404

Penn State University

2.
Teranishi, Keita.
SCLABLE HYBRID *SPARSE* LINEAR SOLVERS.

Degree: PhD, Computer Science and Engineering, 2004, Penn State University

URL: https://etda.libraries.psu.edu/catalog/6438

In many large-scale simulations that depend on
parallel processing to solve problems of scientific interest, the
application time can be dominated by the time for the underlying
sparse linear system solution. This thesis concerns the development
of effective sparse solvers for distributed memory multiprocessors
using a hybrid of direct and iterative sparse solution methods.
More specifically, we accelerate the convergence of an iterative
solution method, namely the method of Conjugate Gradients (CG)
using an incomplete Cholesky preconditioner. The latter is an
approximation to the sparse matrix factor used in a direct method.
Our parallel incomplete factorization scheme can support a range of
fill-in to provide flexible preconditioning that can meet the
requirements of a variety of applications. We have also developed
special techniques that allow the effective application of such
preconditioners on distributed memory multiprocessors; the
relatively large latencies of interprocessor communication on such
parallel computers make conventional schemes using parallel
substitution extremely inefficient. The first part of the
dissertation focuses on the design of a parallel tree-based
left-looking drop-threshold incomplete Cholesky factorization
scheme using extensions of techniques from direct methods. The
second part concerns modifications to the incomplete Cholesky
factor to enable its efficient application as a preconditioner;
these modifications concern selectively replacing certain
triangular submatrices in the factor by their approximate inverses.
We develop a `Selective Inversion' (SI) scheme based on explicit
inversion of selected submatrices and another variant using
Selective Sparse Approximate Inversion (SSAI). The final part of
the dissertation concerns latency-tolerant application of our
ICT-SI and ICT-SSAI preconditioners by selectively using parallel
matrix-vector multiplication instead of parallel substitution. We
analyze the computation and communication costs of all our schemes
for model sparse matrices arising from finite difference methods on
regular domains in two and three dimensions. We also provide
extensive empirical results on the performance of our methods on
such model matrices and others from practical applications. Our
results demonstrate that both our ICT-SI and ICT-SSAI hybrid
solvers are significantly more reliable than other preconditioned
CG solvers . Furthermore, although their scalability lags that of
some simpler schemes, they can still be the method of choice for
matrices that require relatively strong preconditioning for CG to
converge. Our analysis and experiments indicate that ICT-SSAI is
more scalable that ICT-SI; however, our experiments indicate that
this scalability is achieved at the expense of a slight decrease in
preconditioning quality. We have thus developed scalable and
reliable hybrid solvers that can potentially provide significant
improvements in the performance of modeling and simulation
applications.

Subjects/Keywords: parallel computing; numerical linear algebra; scientific computing; sparse matrix computation

Record Details Similar Records

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6^{th} Edition):

Teranishi, K. (2004). SCLABLE HYBRID SPARSE LINEAR SOLVERS. (Doctoral Dissertation). Penn State University. Retrieved from https://etda.libraries.psu.edu/catalog/6438

Chicago Manual of Style (16^{th} Edition):

Teranishi, Keita. “SCLABLE HYBRID SPARSE LINEAR SOLVERS.” 2004. Doctoral Dissertation, Penn State University. Accessed July 11, 2020. https://etda.libraries.psu.edu/catalog/6438.

MLA Handbook (7^{th} Edition):

Teranishi, Keita. “SCLABLE HYBRID SPARSE LINEAR SOLVERS.” 2004. Web. 11 Jul 2020.

Vancouver:

Teranishi K. SCLABLE HYBRID SPARSE LINEAR SOLVERS. [Internet] [Doctoral dissertation]. Penn State University; 2004. [cited 2020 Jul 11]. Available from: https://etda.libraries.psu.edu/catalog/6438.

Council of Science Editors:

Teranishi K. SCLABLE HYBRID SPARSE LINEAR SOLVERS. [Doctoral Dissertation]. Penn State University; 2004. Available from: https://etda.libraries.psu.edu/catalog/6438

3.
佐藤, 友規.
大規模スパース行列に対する連立一次方程式の精度保証付き数値計算 : Verification Of Solutions *Sparse* *Matrix* Equations.

Degree: 2016, Waseda University / 早稲田大学

URL: http://hdl.handle.net/2065/668

工学における問題を数値的に解く場合、問題を適切にモデル化し、それを有限要素法や有限差分法によって離散化することにより連立一次方程式の求解問題に帰着して、数値解法によって解くことが多く、場合にもよるが通常、係数行列は大規模なスパース行列となる。そこで本論文では、係数行列が大規模スパース行列である連立一次方程式の近似解を算出した上、その解に対し限られた資源の中で、精度保証付き数値計算試みる。特に、どの程度の規模の大きさの行列まで精度保証を行えるかを実験し、その結果を提供する。具体的には、数値計算ツールMATLABを使い、反復解法により近似解を求めるとともに、得られた近似解に対して対象となる行列が大規模であることを考慮しつつ、精度保証をかけることにより行った。

卒業論文

Subjects/Keywords: 数値計算; 精度保証; 連立一次方程式; スパース行列; Numerical Computation; Guaranteed Accuracy; Matrix Equations; Sparse Matrix

Record Details Similar Records

❌

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6^{th} Edition):

佐藤, . (2016). 大規模スパース行列に対する連立一次方程式の精度保証付き数値計算 : Verification Of Solutions Sparse Matrix Equations. (Thesis). Waseda University / 早稲田大学. Retrieved from http://hdl.handle.net/2065/668

Note: this citation may be lacking information needed for this citation format:

Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16^{th} Edition):

佐藤, 友規. “大規模スパース行列に対する連立一次方程式の精度保証付き数値計算 : Verification Of Solutions Sparse Matrix Equations.” 2016. Thesis, Waseda University / 早稲田大学. Accessed July 11, 2020. http://hdl.handle.net/2065/668.

Note: this citation may be lacking information needed for this citation format:

Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7^{th} Edition):

佐藤, 友規. “大規模スパース行列に対する連立一次方程式の精度保証付き数値計算 : Verification Of Solutions Sparse Matrix Equations.” 2016. Web. 11 Jul 2020.

Vancouver:

佐藤 . 大規模スパース行列に対する連立一次方程式の精度保証付き数値計算 : Verification Of Solutions Sparse Matrix Equations. [Internet] [Thesis]. Waseda University / 早稲田大学; 2016. [cited 2020 Jul 11]. Available from: http://hdl.handle.net/2065/668.

Note: this citation may be lacking information needed for this citation format:

Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

佐藤 . 大規模スパース行列に対する連立一次方程式の精度保証付き数値計算 : Verification Of Solutions Sparse Matrix Equations. [Thesis]. Waseda University / 早稲田大学; 2016. Available from: http://hdl.handle.net/2065/668

Not specified: Masters Thesis or Doctoral Dissertation