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You searched for subject:(soft error rate). Showing records 1 – 14 of 14 total matches.

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Vanderbilt University

1. Jiang, Hui. Design of soft-error-aware sequential circuits with power and speed optimization.

Degree: PhD, Electrical Engineering, 2018, Vanderbilt University

 A single-event effect (SEE) of circuits is strongly dependent on the supply voltage and the physical capacitance. Reduction in supply voltage as well as technology… (more)

Subjects/Keywords: power optimization; sequential circuit; soft error rate; Single event effects; empirical model

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APA (6th Edition):

Jiang, H. (2018). Design of soft-error-aware sequential circuits with power and speed optimization. (Doctoral Dissertation). Vanderbilt University. Retrieved from http://etd.library.vanderbilt.edu/available/etd-03192018-153616/ ;

Chicago Manual of Style (16th Edition):

Jiang, Hui. “Design of soft-error-aware sequential circuits with power and speed optimization.” 2018. Doctoral Dissertation, Vanderbilt University. Accessed November 15, 2019. http://etd.library.vanderbilt.edu/available/etd-03192018-153616/ ;.

MLA Handbook (7th Edition):

Jiang, Hui. “Design of soft-error-aware sequential circuits with power and speed optimization.” 2018. Web. 15 Nov 2019.

Vancouver:

Jiang H. Design of soft-error-aware sequential circuits with power and speed optimization. [Internet] [Doctoral dissertation]. Vanderbilt University; 2018. [cited 2019 Nov 15]. Available from: http://etd.library.vanderbilt.edu/available/etd-03192018-153616/ ;.

Council of Science Editors:

Jiang H. Design of soft-error-aware sequential circuits with power and speed optimization. [Doctoral Dissertation]. Vanderbilt University; 2018. Available from: http://etd.library.vanderbilt.edu/available/etd-03192018-153616/ ;


Universidade do Rio Grande do Sul

2. Rhod, Eduardo Luis. Quaternary CLB a falul tolerant quaternary FPGA.

Degree: 2012, Universidade do Rio Grande do Sul

A diminuição no tamanho dos transistores vem aumentando cada vez mais o número de funções que os dispositivos eletrônicos podem realizar. Apesar da diminuição do… (more)

Subjects/Keywords: Fault tolerant architectures; Microeletrônica; Quaternary circuits; Tolerancia : Falhas; Sistemas digitais; Error detection techniques; Soft error rate; FPGAs

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APA (6th Edition):

Rhod, E. L. (2012). Quaternary CLB a falul tolerant quaternary FPGA. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/72925

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rhod, Eduardo Luis. “Quaternary CLB a falul tolerant quaternary FPGA.” 2012. Thesis, Universidade do Rio Grande do Sul. Accessed November 15, 2019. http://hdl.handle.net/10183/72925.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rhod, Eduardo Luis. “Quaternary CLB a falul tolerant quaternary FPGA.” 2012. Web. 15 Nov 2019.

Vancouver:

Rhod EL. Quaternary CLB a falul tolerant quaternary FPGA. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2012. [cited 2019 Nov 15]. Available from: http://hdl.handle.net/10183/72925.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rhod EL. Quaternary CLB a falul tolerant quaternary FPGA. [Thesis]. Universidade do Rio Grande do Sul; 2012. Available from: http://hdl.handle.net/10183/72925

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

3. Souza, José Eduardo Pereira. Proposta de filtragem adaptativa de pulsos transientes para proteção de circuitos integrados sob efeito da radiação.

Degree: 2013, Universidade do Rio Grande do Sul

Esta dissertação propõe a utilização da técnica de filtragem adaptativa de pulsos transientes de modo a proteger os circuitos integrados sob efeito da radiação ionizante.… (more)

Subjects/Keywords: Microeletrônica; Radiation effects in circuit integrated; Circuitos integrados; SET pulse temporal filtering; Configurable delay circuit; Soft error rate

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APA (6th Edition):

Souza, J. E. P. (2013). Proposta de filtragem adaptativa de pulsos transientes para proteção de circuitos integrados sob efeito da radiação. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/99334

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Souza, José Eduardo Pereira. “Proposta de filtragem adaptativa de pulsos transientes para proteção de circuitos integrados sob efeito da radiação.” 2013. Thesis, Universidade do Rio Grande do Sul. Accessed November 15, 2019. http://hdl.handle.net/10183/99334.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Souza, José Eduardo Pereira. “Proposta de filtragem adaptativa de pulsos transientes para proteção de circuitos integrados sob efeito da radiação.” 2013. Web. 15 Nov 2019.

Vancouver:

Souza JEP. Proposta de filtragem adaptativa de pulsos transientes para proteção de circuitos integrados sob efeito da radiação. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2013. [cited 2019 Nov 15]. Available from: http://hdl.handle.net/10183/99334.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Souza JEP. Proposta de filtragem adaptativa de pulsos transientes para proteção de circuitos integrados sob efeito da radiação. [Thesis]. Universidade do Rio Grande do Sul; 2013. Available from: http://hdl.handle.net/10183/99334

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Saskatchewan

4. Andalibi, Zohreh. Channel Estimation in Coded Modulation Systems.

Degree: 2012, University of Saskatchewan

 With the outstanding performance of coded modulation techniques in fading channels, much research efforts have been carried out on the design of communication systems able… (more)

Subjects/Keywords: Channel Estimation; BICM; Bit-interleaved Coded Modulation; Iterative Receiver; Cramer Rao Bound; Soft Information; Error Rate

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APA (6th Edition):

Andalibi, Z. (2012). Channel Estimation in Coded Modulation Systems. (Thesis). University of Saskatchewan. Retrieved from http://hdl.handle.net/10388/ETD-2012-08-587

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Andalibi, Zohreh. “Channel Estimation in Coded Modulation Systems.” 2012. Thesis, University of Saskatchewan. Accessed November 15, 2019. http://hdl.handle.net/10388/ETD-2012-08-587.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Andalibi, Zohreh. “Channel Estimation in Coded Modulation Systems.” 2012. Web. 15 Nov 2019.

Vancouver:

Andalibi Z. Channel Estimation in Coded Modulation Systems. [Internet] [Thesis]. University of Saskatchewan; 2012. [cited 2019 Nov 15]. Available from: http://hdl.handle.net/10388/ETD-2012-08-587.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Andalibi Z. Channel Estimation in Coded Modulation Systems. [Thesis]. University of Saskatchewan; 2012. Available from: http://hdl.handle.net/10388/ETD-2012-08-587

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

5. Neale, Adam. Design and Analysis of an Adjacent Multi-bit Error Correcting Code for Nanoscale SRAMs.

Degree: 2014, University of Waterloo

 Increasing static random access memory (SRAM) bitcell density is a major driving force for semiconductor technology scaling. The industry standard 2x reduction in SRAM bitcell… (more)

Subjects/Keywords: SRAM; Error Correction Circuit; Soft Error Rate; Multi-bit Upset

Soft Error Rate Modeling . . . . . . . . . . . . . . . . . . . . . . . 144 5.1.3 28 nm Test… …Chip Design and Implementation . . . . . . . . . . . . . 144 5.1.4 Soft Error Rate… …Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 4.14 Soft Error Rate… …129 4.34 Raw error rate (radiation induced soft errors plus weak cells) vs. VDD… …underlying mechanisms are first described, and the increasing SRAM soft error rate in light of… 

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APA (6th Edition):

Neale, A. (2014). Design and Analysis of an Adjacent Multi-bit Error Correcting Code for Nanoscale SRAMs. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/8960

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Neale, Adam. “Design and Analysis of an Adjacent Multi-bit Error Correcting Code for Nanoscale SRAMs.” 2014. Thesis, University of Waterloo. Accessed November 15, 2019. http://hdl.handle.net/10012/8960.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Neale, Adam. “Design and Analysis of an Adjacent Multi-bit Error Correcting Code for Nanoscale SRAMs.” 2014. Web. 15 Nov 2019.

Vancouver:

Neale A. Design and Analysis of an Adjacent Multi-bit Error Correcting Code for Nanoscale SRAMs. [Internet] [Thesis]. University of Waterloo; 2014. [cited 2019 Nov 15]. Available from: http://hdl.handle.net/10012/8960.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Neale A. Design and Analysis of an Adjacent Multi-bit Error Correcting Code for Nanoscale SRAMs. [Thesis]. University of Waterloo; 2014. Available from: http://hdl.handle.net/10012/8960

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Michigan

6. Krishnaswamy, Smita. Design, Analysis and Test of Logic Circuits under Uncertainty.

Degree: PhD, Computer Science & Engineering, 2008, University of Michigan

 Integrated circuits are increasingly susceptible to uncertainty caused by soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects become detrimental… (more)

Subjects/Keywords: Logic Design; Electronic Design Automation; Soft Error; Circuit Reliability; Circuit Testing; Soft Error Rate Analysis; Engineering

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APA (6th Edition):

Krishnaswamy, S. (2008). Design, Analysis and Test of Logic Circuits under Uncertainty. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/61584

Chicago Manual of Style (16th Edition):

Krishnaswamy, Smita. “Design, Analysis and Test of Logic Circuits under Uncertainty.” 2008. Doctoral Dissertation, University of Michigan. Accessed November 15, 2019. http://hdl.handle.net/2027.42/61584.

MLA Handbook (7th Edition):

Krishnaswamy, Smita. “Design, Analysis and Test of Logic Circuits under Uncertainty.” 2008. Web. 15 Nov 2019.

Vancouver:

Krishnaswamy S. Design, Analysis and Test of Logic Circuits under Uncertainty. [Internet] [Doctoral dissertation]. University of Michigan; 2008. [cited 2019 Nov 15]. Available from: http://hdl.handle.net/2027.42/61584.

Council of Science Editors:

Krishnaswamy S. Design, Analysis and Test of Logic Circuits under Uncertainty. [Doctoral Dissertation]. University of Michigan; 2008. Available from: http://hdl.handle.net/2027.42/61584

7. Just, Guillaume. Caractérisation et modélisation des mémoires Flash embarquées destinées aux applications faible consommation et à forte contrainte de fiabilité. : Characterization and modeling of embedded Flash memories for low power and high reliability applications.

Degree: Docteur es, Micro et Nanoélectronique, 2013, Aix Marseille Université

De nombreuses applications industrielles spécifiques dans les secteurs tels que l'automobile, le médical et le spatial, requièrent un très haut niveau de fiabilité. Ce type… (more)

Subjects/Keywords: Mémoires non volatiles; Flash; Fiabilité; Perturbation en lecture (read-disturb); Modélisation; SILC; Consommation énergétique; Variation process; Particules radiatives; Taux d’aléas logique (Soft-Errare Rate, SER); Non-Volatile Memories; Flash memories; Reliability; Read-disturb issues; Modeling; SILC; Energy consumption; Process variations; Irradiative particles; Soft-Error Rate (SER)

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APA (6th Edition):

Just, G. (2013). Caractérisation et modélisation des mémoires Flash embarquées destinées aux applications faible consommation et à forte contrainte de fiabilité. : Characterization and modeling of embedded Flash memories for low power and high reliability applications. (Doctoral Dissertation). Aix Marseille Université. Retrieved from http://www.theses.fr/2013AIXM4716

Chicago Manual of Style (16th Edition):

Just, Guillaume. “Caractérisation et modélisation des mémoires Flash embarquées destinées aux applications faible consommation et à forte contrainte de fiabilité. : Characterization and modeling of embedded Flash memories for low power and high reliability applications.” 2013. Doctoral Dissertation, Aix Marseille Université. Accessed November 15, 2019. http://www.theses.fr/2013AIXM4716.

MLA Handbook (7th Edition):

Just, Guillaume. “Caractérisation et modélisation des mémoires Flash embarquées destinées aux applications faible consommation et à forte contrainte de fiabilité. : Characterization and modeling of embedded Flash memories for low power and high reliability applications.” 2013. Web. 15 Nov 2019.

Vancouver:

Just G. Caractérisation et modélisation des mémoires Flash embarquées destinées aux applications faible consommation et à forte contrainte de fiabilité. : Characterization and modeling of embedded Flash memories for low power and high reliability applications. [Internet] [Doctoral dissertation]. Aix Marseille Université 2013. [cited 2019 Nov 15]. Available from: http://www.theses.fr/2013AIXM4716.

Council of Science Editors:

Just G. Caractérisation et modélisation des mémoires Flash embarquées destinées aux applications faible consommation et à forte contrainte de fiabilité. : Characterization and modeling of embedded Flash memories for low power and high reliability applications. [Doctoral Dissertation]. Aix Marseille Université 2013. Available from: http://www.theses.fr/2013AIXM4716


Université Montpellier II

8. Gedion, Michael. Contamination des composants électroniques par des éléments radioactifs : Contamination of electronic devices by radiaoctive isotopes.

Degree: Docteur es, Electronique, 2012, Université Montpellier II

Cette thèse a pour objet l'étude des éléments radioactifs qui peuvent altérer le bon fonctionnement des composants électroniques au niveau terrestre. Ces éléments radioactifs sont… (more)

Subjects/Keywords: Particules alpha; Émetteurs alpha; Effets singulier; Simulation taux effets singulier; Mesure de contamination; Déséquilibre; Alpha aprticles; Alpha emitting particles; Single event upset; Soft error rate; Measurement of the contamination level

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APA (6th Edition):

Gedion, M. (2012). Contamination des composants électroniques par des éléments radioactifs : Contamination of electronic devices by radiaoctive isotopes. (Doctoral Dissertation). Université Montpellier II. Retrieved from http://www.theses.fr/2012MON20267

Chicago Manual of Style (16th Edition):

Gedion, Michael. “Contamination des composants électroniques par des éléments radioactifs : Contamination of electronic devices by radiaoctive isotopes.” 2012. Doctoral Dissertation, Université Montpellier II. Accessed November 15, 2019. http://www.theses.fr/2012MON20267.

MLA Handbook (7th Edition):

Gedion, Michael. “Contamination des composants électroniques par des éléments radioactifs : Contamination of electronic devices by radiaoctive isotopes.” 2012. Web. 15 Nov 2019.

Vancouver:

Gedion M. Contamination des composants électroniques par des éléments radioactifs : Contamination of electronic devices by radiaoctive isotopes. [Internet] [Doctoral dissertation]. Université Montpellier II; 2012. [cited 2019 Nov 15]. Available from: http://www.theses.fr/2012MON20267.

Council of Science Editors:

Gedion M. Contamination des composants électroniques par des éléments radioactifs : Contamination of electronic devices by radiaoctive isotopes. [Doctoral Dissertation]. Université Montpellier II; 2012. Available from: http://www.theses.fr/2012MON20267


Universidade do Rio Grande do Sul

9. Rhod, Eduardo Luis. Proposal of two solutions to cope with the faulty behavior of circuits in future technologies.

Degree: 2007, Universidade do Rio Grande do Sul

A diminuição no tamanho dos dispositivos nas tecnologias do futuro traz consigo um grande aumento na taxa de erros dos circuitos, na lógica combinacional e… (more)

Subjects/Keywords: Fault tolerant architectures; Microeletrônica; Tolerância a falhas; Memory based architectures; Reliable SoCs; Error detection techniques; Soft error rate

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APA (6th Edition):

Rhod, E. L. (2007). Proposal of two solutions to cope with the faulty behavior of circuits in future technologies. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/16086

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rhod, Eduardo Luis. “Proposal of two solutions to cope with the faulty behavior of circuits in future technologies.” 2007. Thesis, Universidade do Rio Grande do Sul. Accessed November 15, 2019. http://hdl.handle.net/10183/16086.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rhod, Eduardo Luis. “Proposal of two solutions to cope with the faulty behavior of circuits in future technologies.” 2007. Web. 15 Nov 2019.

Vancouver:

Rhod EL. Proposal of two solutions to cope with the faulty behavior of circuits in future technologies. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2007. [cited 2019 Nov 15]. Available from: http://hdl.handle.net/10183/16086.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rhod EL. Proposal of two solutions to cope with the faulty behavior of circuits in future technologies. [Thesis]. Universidade do Rio Grande do Sul; 2007. Available from: http://hdl.handle.net/10183/16086

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Warren, Kevin Mark. Sensitive Volume Models For Single Event Upset Analysis and Rate Prediction for Space, Atmospheric, and Terrestrial Radiation Environments.

Degree: PhD, Electrical Engineering, 2010, Vanderbilt University

 The multiple sensitive volume model is a spatial and mathematical description that relates energy deposited by a quantum of ionizing radiation to charge collection at… (more)

Subjects/Keywords: soft error rate; sensitive volume; radiation reliability; radiation effects; radiation effects; single event upset

…Predicted soft error rate as a function of Qcrit . The rates for 95% and 99% purified 11 B in BPSG… …calculations (right) for the MRED 241 Am alpha model. . . . . . . . 104 71. Soft error… …138 102. Solid-angle normalized error rate as a function of the ions tilt component from… …103. Solid-angle normalized error rate as a function of the ions roll component of the… …The relative error rate as a function of tilt for the flip-flop in the Adams 90% space… 

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APA (6th Edition):

Warren, K. M. (2010). Sensitive Volume Models For Single Event Upset Analysis and Rate Prediction for Space, Atmospheric, and Terrestrial Radiation Environments. (Doctoral Dissertation). Vanderbilt University. Retrieved from http://etd.library.vanderbilt.edu/available/etd-06302010-123902/ ;

Chicago Manual of Style (16th Edition):

Warren, Kevin Mark. “Sensitive Volume Models For Single Event Upset Analysis and Rate Prediction for Space, Atmospheric, and Terrestrial Radiation Environments.” 2010. Doctoral Dissertation, Vanderbilt University. Accessed November 15, 2019. http://etd.library.vanderbilt.edu/available/etd-06302010-123902/ ;.

MLA Handbook (7th Edition):

Warren, Kevin Mark. “Sensitive Volume Models For Single Event Upset Analysis and Rate Prediction for Space, Atmospheric, and Terrestrial Radiation Environments.” 2010. Web. 15 Nov 2019.

Vancouver:

Warren KM. Sensitive Volume Models For Single Event Upset Analysis and Rate Prediction for Space, Atmospheric, and Terrestrial Radiation Environments. [Internet] [Doctoral dissertation]. Vanderbilt University; 2010. [cited 2019 Nov 15]. Available from: http://etd.library.vanderbilt.edu/available/etd-06302010-123902/ ;.

Council of Science Editors:

Warren KM. Sensitive Volume Models For Single Event Upset Analysis and Rate Prediction for Space, Atmospheric, and Terrestrial Radiation Environments. [Doctoral Dissertation]. Vanderbilt University; 2010. Available from: http://etd.library.vanderbilt.edu/available/etd-06302010-123902/ ;


University of Southern California

11. Mohyuddin, Nasir. Low power and reliability assessment techniques for advanced processor design Page 1.

Degree: PhD, Computer Engineering, 2010, University of Southern California

 The rapid scaling of silicon technologies over the past decade has introduced some strenuous constraints for processor design. The technology progression has exacerbated the power… (more)

Subjects/Keywords: branch misprediction; instruction queue; dynamic power dissipation; static power dissipation; clock gating; drowsy cache; functional units; leakage power; cache hierarchy; cache replacement policy; LRU (least recently used); PLRU (pseudo least recently used); simplescalar; simpoints; MRR (modified random replacement policy); soft errors; reliability; instruction level parallelism (ILP); wrong-path instructions; branch misprediction penalty; re-order buffer (ROB); instructions per clock (IPC); probabilistic transfer matrix (PTM); error propagation; Von Neumann fault; error probability; partial Boolean difference; co-factor; signal probability; post-order (reverse DFS); reconvergent fanout; soft error rate (SER); quantum-dot cellular automaton (QCA)

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APA (6th Edition):

Mohyuddin, N. (2010). Low power and reliability assessment techniques for advanced processor design Page 1. (Doctoral Dissertation). University of Southern California. Retrieved from http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/15551/rec/3882

Chicago Manual of Style (16th Edition):

Mohyuddin, Nasir. “Low power and reliability assessment techniques for advanced processor design Page 1.” 2010. Doctoral Dissertation, University of Southern California. Accessed November 15, 2019. http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/15551/rec/3882.

MLA Handbook (7th Edition):

Mohyuddin, Nasir. “Low power and reliability assessment techniques for advanced processor design Page 1.” 2010. Web. 15 Nov 2019.

Vancouver:

Mohyuddin N. Low power and reliability assessment techniques for advanced processor design Page 1. [Internet] [Doctoral dissertation]. University of Southern California; 2010. [cited 2019 Nov 15]. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/15551/rec/3882.

Council of Science Editors:

Mohyuddin N. Low power and reliability assessment techniques for advanced processor design Page 1. [Doctoral Dissertation]. University of Southern California; 2010. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/15551/rec/3882

12. Μπούντας, Δημήτριος. Εργαλεία CAD για τον υπολογισμό ισχύος και αξιοπιστίας κυκλωμάτων VLSI.

Degree: 2009, University of Thessaly (UTH); Πανεπιστήμιο Θεσσαλίας

Subjects/Keywords: Κατανάλωση ισχύος; Ψηφιακό κύκλωμα; Προσομοίωση; Προχαρακτηρισμός; Πτώση τάσης τροφοδοσίας; Αξιοπιστία; Digital circuits; Re-synthesis; Simulation; Pre-characterization; IR-drop; Soft error rate

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APA (6th Edition):

Μπούντας, . . (2009). Εργαλεία CAD για τον υπολογισμό ισχύος και αξιοπιστίας κυκλωμάτων VLSI. (Thesis). University of Thessaly (UTH); Πανεπιστήμιο Θεσσαλίας. Retrieved from http://hdl.handle.net/10442/hedi/28801

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Μπούντας, Δημήτριος. “Εργαλεία CAD για τον υπολογισμό ισχύος και αξιοπιστίας κυκλωμάτων VLSI.” 2009. Thesis, University of Thessaly (UTH); Πανεπιστήμιο Θεσσαλίας. Accessed November 15, 2019. http://hdl.handle.net/10442/hedi/28801.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Μπούντας, Δημήτριος. “Εργαλεία CAD για τον υπολογισμό ισχύος και αξιοπιστίας κυκλωμάτων VLSI.” 2009. Web. 15 Nov 2019.

Vancouver:

Μπούντας . Εργαλεία CAD για τον υπολογισμό ισχύος και αξιοπιστίας κυκλωμάτων VLSI. [Internet] [Thesis]. University of Thessaly (UTH); Πανεπιστήμιο Θεσσαλίας; 2009. [cited 2019 Nov 15]. Available from: http://hdl.handle.net/10442/hedi/28801.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Μπούντας . Εργαλεία CAD για τον υπολογισμό ισχύος και αξιοπιστίας κυκλωμάτων VLSI. [Thesis]. University of Thessaly (UTH); Πανεπιστήμιο Θεσσαλίας; 2009. Available from: http://hdl.handle.net/10442/hedi/28801

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Vanderbilt University

13. Narasimham, Balaji. Characterization of heavy-ion, neutron and alpha particle-induced single-event transient pulse widths in advanced CMOS technologies.

Degree: PhD, Electrical Engineering, 2008, Vanderbilt University

 Radiation-induced soft errors have become a key reliability issue for advanced semiconductor integrated circuits. With technology scaling, a large fraction of the observed soft failures… (more)

Subjects/Keywords: soft error rate (SER); heavy-ion; soft error; pulse width; single event transient (SET); 3D-TCAD; scaling trends; cross-section; failure in time (FIT); alpha; neutron; Metal Oxide Semiconductors (Complementary)  – Effect of radiation on; Heavy ions; Neutrons; Alpha rays

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Narasimham, B. (2008). Characterization of heavy-ion, neutron and alpha particle-induced single-event transient pulse widths in advanced CMOS technologies. (Doctoral Dissertation). Vanderbilt University. Retrieved from http://etd.library.vanderbilt.edu/available/etd-11302008-210032/ ;

Chicago Manual of Style (16th Edition):

Narasimham, Balaji. “Characterization of heavy-ion, neutron and alpha particle-induced single-event transient pulse widths in advanced CMOS technologies.” 2008. Doctoral Dissertation, Vanderbilt University. Accessed November 15, 2019. http://etd.library.vanderbilt.edu/available/etd-11302008-210032/ ;.

MLA Handbook (7th Edition):

Narasimham, Balaji. “Characterization of heavy-ion, neutron and alpha particle-induced single-event transient pulse widths in advanced CMOS technologies.” 2008. Web. 15 Nov 2019.

Vancouver:

Narasimham B. Characterization of heavy-ion, neutron and alpha particle-induced single-event transient pulse widths in advanced CMOS technologies. [Internet] [Doctoral dissertation]. Vanderbilt University; 2008. [cited 2019 Nov 15]. Available from: http://etd.library.vanderbilt.edu/available/etd-11302008-210032/ ;.

Council of Science Editors:

Narasimham B. Characterization of heavy-ion, neutron and alpha particle-induced single-event transient pulse widths in advanced CMOS technologies. [Doctoral Dissertation]. Vanderbilt University; 2008. Available from: http://etd.library.vanderbilt.edu/available/etd-11302008-210032/ ;

14. Suh, Sangwook. Low-power discrete Fourier transform and soft-decision Viterbi decoder for OFDM receivers.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 The purpose of this research is to present a low-power wireless communication receiver with an enhanced performance by relieving the system complexity and performance degradation… (more)

Subjects/Keywords: Quantization; Power consumption; Bit error rate; Floating gate; Field-programmable analog array; Soft-decision; Viterbi decoder; Discrete Fourier transform; Orthogonal frequency-division multiplexing; Fourier transformations; Error-correcting codes (Information theory); Data transmission systems; Wireless communication systems; Orthogonal frequency division multiplexing

…CHAPTER 4: REDUCED-COMPLEXITY VITERBI DECODER WITH UN-QUANTIZED SOFT INFORMATION… …42 4.2.1 Soft Information… …48 4.2.4 Proposed Soft-Decision Viterbi Decoder ....................................... 50… …4.3 Soft-Decision Viterbi Decoder Implementation in FPAA ....................... 59 4.3.1… …46 Figure 19. (a) A 1/2 rate convolutional encoder with 2 shift registers, and… 

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Suh, S. (2011). Low-power discrete Fourier transform and soft-decision Viterbi decoder for OFDM receivers. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/42716

Chicago Manual of Style (16th Edition):

Suh, Sangwook. “Low-power discrete Fourier transform and soft-decision Viterbi decoder for OFDM receivers.” 2011. Doctoral Dissertation, Georgia Tech. Accessed November 15, 2019. http://hdl.handle.net/1853/42716.

MLA Handbook (7th Edition):

Suh, Sangwook. “Low-power discrete Fourier transform and soft-decision Viterbi decoder for OFDM receivers.” 2011. Web. 15 Nov 2019.

Vancouver:

Suh S. Low-power discrete Fourier transform and soft-decision Viterbi decoder for OFDM receivers. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2019 Nov 15]. Available from: http://hdl.handle.net/1853/42716.

Council of Science Editors:

Suh S. Low-power discrete Fourier transform and soft-decision Viterbi decoder for OFDM receivers. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/42716

.