Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for subject:(self timed). Showing records 1 – 11 of 11 total matches.

Search Limiters

Last 2 Years | English Only

No search limiters apply to these results.

▼ Search Limiters


Delft University of Technology

1. Karykis, G. (author). A high-resolution self-timed zero-crossing-based Incremental ?? ADC.

Degree: 2015, Delft University of Technology

This thesis discusses the d es ign and verification of a high-resolution self-timed incremental ?? ADC. The first self-timed incremental ?? ADC was presented by… (more)

Subjects/Keywords: energy-efficient; high-resolution; incremental ?? ADC; self-timed; zerocrossing-based integrator

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Karykis, G. (. (2015). A high-resolution self-timed zero-crossing-based Incremental ?? ADC. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:98bbf309-c0cd-4c7e-be40-6333d5427c9b

Chicago Manual of Style (16th Edition):

Karykis, G (author). “A high-resolution self-timed zero-crossing-based Incremental ?? ADC.” 2015. Masters Thesis, Delft University of Technology. Accessed September 21, 2020. http://resolver.tudelft.nl/uuid:98bbf309-c0cd-4c7e-be40-6333d5427c9b.

MLA Handbook (7th Edition):

Karykis, G (author). “A high-resolution self-timed zero-crossing-based Incremental ?? ADC.” 2015. Web. 21 Sep 2020.

Vancouver:

Karykis G(. A high-resolution self-timed zero-crossing-based Incremental ?? ADC. [Internet] [Masters thesis]. Delft University of Technology; 2015. [cited 2020 Sep 21]. Available from: http://resolver.tudelft.nl/uuid:98bbf309-c0cd-4c7e-be40-6333d5427c9b.

Council of Science Editors:

Karykis G(. A high-resolution self-timed zero-crossing-based Incremental ?? ADC. [Masters Thesis]. Delft University of Technology; 2015. Available from: http://resolver.tudelft.nl/uuid:98bbf309-c0cd-4c7e-be40-6333d5427c9b


Université de Grenoble

2. Ouchet, Florent. Analyse et amélioration de la robustesse des circuits asynchrones QDI : Robustness analysis and improvement of QDI self-timed circuits.

Degree: Docteur es, Sciences et technologie industrielles, 2011, Université de Grenoble

La conception de circuits intégrés asynchrones, notamment de circuits QDI (Quasi-Delay Insensitive), offrent la possibilité de disposer de circuits très robustes aux conditions environnementales (tension,… (more)

Subjects/Keywords: Asynchrone; Circuit; Vérification; Robustesse; Sécurité; QDI; Self-timed; Circuit; Verification; Robustness; Safety; QDI

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ouchet, F. (2011). Analyse et amélioration de la robustesse des circuits asynchrones QDI : Robustness analysis and improvement of QDI self-timed circuits. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2011GRENT062

Chicago Manual of Style (16th Edition):

Ouchet, Florent. “Analyse et amélioration de la robustesse des circuits asynchrones QDI : Robustness analysis and improvement of QDI self-timed circuits.” 2011. Doctoral Dissertation, Université de Grenoble. Accessed September 21, 2020. http://www.theses.fr/2011GRENT062.

MLA Handbook (7th Edition):

Ouchet, Florent. “Analyse et amélioration de la robustesse des circuits asynchrones QDI : Robustness analysis and improvement of QDI self-timed circuits.” 2011. Web. 21 Sep 2020.

Vancouver:

Ouchet F. Analyse et amélioration de la robustesse des circuits asynchrones QDI : Robustness analysis and improvement of QDI self-timed circuits. [Internet] [Doctoral dissertation]. Université de Grenoble; 2011. [cited 2020 Sep 21]. Available from: http://www.theses.fr/2011GRENT062.

Council of Science Editors:

Ouchet F. Analyse et amélioration de la robustesse des circuits asynchrones QDI : Robustness analysis and improvement of QDI self-timed circuits. [Doctoral Dissertation]. Université de Grenoble; 2011. Available from: http://www.theses.fr/2011GRENT062


Delft University of Technology

3. Chen, C. (author). Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.

Degree: 2012, Delft University of Technology

Microelectronics

Microelectronics & Computer Engineering

Electrical Engineering, Mathematics and Computer Science

Advisors/Committee Members: Pertijs, M.A.P. (mentor).

Subjects/Keywords: Incremental Delta-sigma ADC; self-timed; zero-crossing-based circuits; energy-efficient; low-power

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, C. (. (2012). Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef

Chicago Manual of Style (16th Edition):

Chen, C (author). “Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.” 2012. Masters Thesis, Delft University of Technology. Accessed September 21, 2020. http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef.

MLA Handbook (7th Edition):

Chen, C (author). “Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.” 2012. Web. 21 Sep 2020.

Vancouver:

Chen C(. Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. [Internet] [Masters thesis]. Delft University of Technology; 2012. [cited 2020 Sep 21]. Available from: http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef.

Council of Science Editors:

Chen C(. Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. [Masters Thesis]. Delft University of Technology; 2012. Available from: http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef

4. Liberg, Tim. GPU-accelerated Model Checking of Periodic Self-Suspending Real-Time Tasks.

Degree: Design and Engineering, 2012, Mälardalen University

  Efficient model checking is important in order to make this type of software verification useful for systems that are complex in their structure. If… (more)

Subjects/Keywords: GPU; Model Checking; Verification; CUDA; STS; Tree search; GPGPU; Periodic Self-Suspending Tasks; Real-Time; Scheduling; Timed automata

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liberg, T. (2012). GPU-accelerated Model Checking of Periodic Self-Suspending Real-Time Tasks. (Thesis). Mälardalen University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-14661

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liberg, Tim. “GPU-accelerated Model Checking of Periodic Self-Suspending Real-Time Tasks.” 2012. Thesis, Mälardalen University. Accessed September 21, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-14661.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liberg, Tim. “GPU-accelerated Model Checking of Periodic Self-Suspending Real-Time Tasks.” 2012. Web. 21 Sep 2020.

Vancouver:

Liberg T. GPU-accelerated Model Checking of Periodic Self-Suspending Real-Time Tasks. [Internet] [Thesis]. Mälardalen University; 2012. [cited 2020 Sep 21]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-14661.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liberg T. GPU-accelerated Model Checking of Periodic Self-Suspending Real-Time Tasks. [Thesis]. Mälardalen University; 2012. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-14661

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Rochester Institute of Technology

5. Diamond, Mitchell. A Self-timed implementation of the bi-way sorter systolic array processor.

Degree: Computer Engineering, 1993, Rochester Institute of Technology

Self-timed circuits with an appropriate handshake control circuit can be used to replace the global clock in a VLSI chip. By replacing the global clock… (more)

Subjects/Keywords: Bi-way sorter; Self-timed circuit; Systolic array; VLSI chip

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Diamond, M. (1993). A Self-timed implementation of the bi-way sorter systolic array processor. (Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/4613

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Diamond, Mitchell. “A Self-timed implementation of the bi-way sorter systolic array processor.” 1993. Thesis, Rochester Institute of Technology. Accessed September 21, 2020. https://scholarworks.rit.edu/theses/4613.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Diamond, Mitchell. “A Self-timed implementation of the bi-way sorter systolic array processor.” 1993. Web. 21 Sep 2020.

Vancouver:

Diamond M. A Self-timed implementation of the bi-way sorter systolic array processor. [Internet] [Thesis]. Rochester Institute of Technology; 1993. [cited 2020 Sep 21]. Available from: https://scholarworks.rit.edu/theses/4613.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Diamond M. A Self-timed implementation of the bi-way sorter systolic array processor. [Thesis]. Rochester Institute of Technology; 1993. Available from: https://scholarworks.rit.edu/theses/4613

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Toledo

6. Silwal, Roshan. Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator.

Degree: MSin Electrical Engineering, College of Engineering, 2013, University of Toledo

 Field Programmable Gate Array (FPGA) security has emerged as a challenging security paradigm in system design. Systems implemented on FPGAs require secure operations and communication.… (more)

Subjects/Keywords: Computer Engineering; Electrical Engineering; FPGA; STRO-PUF; Physical Unclonable Function; PUF; Self-Timed Ring Oscillator; Hardware Cryptography; Asynchronous Logic; Asynchronous Ring Oscillator

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Silwal, R. (2013). Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator. (Masters Thesis). University of Toledo. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=toledo1371088101

Chicago Manual of Style (16th Edition):

Silwal, Roshan. “Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator.” 2013. Masters Thesis, University of Toledo. Accessed September 21, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1371088101.

MLA Handbook (7th Edition):

Silwal, Roshan. “Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator.” 2013. Web. 21 Sep 2020.

Vancouver:

Silwal R. Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator. [Internet] [Masters thesis]. University of Toledo; 2013. [cited 2020 Sep 21]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=toledo1371088101.

Council of Science Editors:

Silwal R. Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator. [Masters Thesis]. University of Toledo; 2013. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=toledo1371088101

7. Cherkaoui, Abdelkarim. Générateurs de nombres véritablement aléatoires à base d'anneaux asynchrones : conception, caractérisation et sécurisation : Ring oscillator based true random number generators : design, characterization and security.

Degree: Docteur es, Microélectronique, 2014, Saint-Etienne

Les générateurs de nombres véritablement aléatoires (TRNG) sont des composants cruciaux dans certaines applications cryptographiques sensibles (génération de clés de chiffrement, génération de signatures DSA,… (more)

Subjects/Keywords: Cryptographie appliquée; Nombres aléatoires; TRNG; Jitter; Oscillateurs en anneau; Anneaux auto-séquencés; Modélisation stochastique; Applied cryptography; Random numbers; TRNG; Jitter; Ring oscillators; Self-timed rings; Stochastic modeling

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Cherkaoui, A. (2014). Générateurs de nombres véritablement aléatoires à base d'anneaux asynchrones : conception, caractérisation et sécurisation : Ring oscillator based true random number generators : design, characterization and security. (Doctoral Dissertation). Saint-Etienne. Retrieved from http://www.theses.fr/2014STET4011

Chicago Manual of Style (16th Edition):

Cherkaoui, Abdelkarim. “Générateurs de nombres véritablement aléatoires à base d'anneaux asynchrones : conception, caractérisation et sécurisation : Ring oscillator based true random number generators : design, characterization and security.” 2014. Doctoral Dissertation, Saint-Etienne. Accessed September 21, 2020. http://www.theses.fr/2014STET4011.

MLA Handbook (7th Edition):

Cherkaoui, Abdelkarim. “Générateurs de nombres véritablement aléatoires à base d'anneaux asynchrones : conception, caractérisation et sécurisation : Ring oscillator based true random number generators : design, characterization and security.” 2014. Web. 21 Sep 2020.

Vancouver:

Cherkaoui A. Générateurs de nombres véritablement aléatoires à base d'anneaux asynchrones : conception, caractérisation et sécurisation : Ring oscillator based true random number generators : design, characterization and security. [Internet] [Doctoral dissertation]. Saint-Etienne; 2014. [cited 2020 Sep 21]. Available from: http://www.theses.fr/2014STET4011.

Council of Science Editors:

Cherkaoui A. Générateurs de nombres véritablement aléatoires à base d'anneaux asynchrones : conception, caractérisation et sécurisation : Ring oscillator based true random number generators : design, characterization and security. [Doctoral Dissertation]. Saint-Etienne; 2014. Available from: http://www.theses.fr/2014STET4011


Brno University of Technology

8. Čurda, Vojtěch. Samočinné řízení vozidel: Autonomous Control of Cars.

Degree: 2020, Brno University of Technology

 The purpose of this bachelor's thesis is to create a model of a self-driving vehicle, along with its surroundings. At first, the thesis outlines the… (more)

Subjects/Keywords: samočinně řízené vozidlo; model; modelování systémů; simulace; UPPAAL Stratego; časované automaty; statistická analýza; self-driving vehicle; model; system modeling; simulation; UPPAAL Stratego; timed automata; statistical analysis

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Čurda, V. (2020). Samočinné řízení vozidel: Autonomous Control of Cars. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/191553

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Čurda, Vojtěch. “Samočinné řízení vozidel: Autonomous Control of Cars.” 2020. Thesis, Brno University of Technology. Accessed September 21, 2020. http://hdl.handle.net/11012/191553.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Čurda, Vojtěch. “Samočinné řízení vozidel: Autonomous Control of Cars.” 2020. Web. 21 Sep 2020.

Vancouver:

Čurda V. Samočinné řízení vozidel: Autonomous Control of Cars. [Internet] [Thesis]. Brno University of Technology; 2020. [cited 2020 Sep 21]. Available from: http://hdl.handle.net/11012/191553.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Čurda V. Samočinné řízení vozidel: Autonomous Control of Cars. [Thesis]. Brno University of Technology; 2020. Available from: http://hdl.handle.net/11012/191553

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

9. Sartori, Giovani Heriberto. Estudo e implementação de somador com detecção de fim de cálculo para circuitos assíncronos.

Degree: 2005, Universidade do Rio Grande do Sul

É contínua a procura por técnicas de construção de circuitos que ajudem a minimizar os problemas existentes no mercado de microeletrônica atual. Uma alternativa para… (more)

Subjects/Keywords: Microeletrônica; Arithmetic circuits; Circuitos assincronos; Self-timed architectures; Asynchronous circuits; Project and simulation of adders

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sartori, G. H. (2005). Estudo e implementação de somador com detecção de fim de cálculo para circuitos assíncronos. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/11487

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sartori, Giovani Heriberto. “Estudo e implementação de somador com detecção de fim de cálculo para circuitos assíncronos.” 2005. Thesis, Universidade do Rio Grande do Sul. Accessed September 21, 2020. http://hdl.handle.net/10183/11487.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sartori, Giovani Heriberto. “Estudo e implementação de somador com detecção de fim de cálculo para circuitos assíncronos.” 2005. Web. 21 Sep 2020.

Vancouver:

Sartori GH. Estudo e implementação de somador com detecção de fim de cálculo para circuitos assíncronos. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2005. [cited 2020 Sep 21]. Available from: http://hdl.handle.net/10183/11487.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sartori GH. Estudo e implementação de somador com detecção de fim de cálculo para circuitos assíncronos. [Thesis]. Universidade do Rio Grande do Sul; 2005. Available from: http://hdl.handle.net/10183/11487

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Einar, Marcus. Implementing and Testing Self-Timed Rings on a FPGA as Entropy Sources.

Degree: Faculty of Science & Engineering, 2015, Linköping UniversityLinköping University

  Random number generators are basic building blocks of modern cryptographic systems. Usually pseudo random number generators, carefully constructed deter- ministic algorithms that generate seemingly… (more)

Subjects/Keywords: Self-Timed Rings; FPGA; Field Programmable Gate Array; Entropy Generation; Computer Engineering; Datorteknik

…Oscillators . . . . . . . . . . . . 3.2 Self-Timed Rings . . . . . . . . . . . . . . . . . 3.2.1… …25 25 25 25 26 26 28 30 30 30 31 7 Conclusion 7.1 Self-timed ring as random number… …Random Number Generator Pseudo Random Number Generator True random Number Generator Self-Timed… …Ring Self-Timed Ring Random Number Generator Field-Programmable Gate array First In, First… …proposed and analysed self-timed rings (STR ) as a jittery clock that can be used to… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Einar, M. (2015). Implementing and Testing Self-Timed Rings on a FPGA as Entropy Sources. (Thesis). Linköping UniversityLinköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-119724

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Einar, Marcus. “Implementing and Testing Self-Timed Rings on a FPGA as Entropy Sources.” 2015. Thesis, Linköping UniversityLinköping University. Accessed September 21, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-119724.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Einar, Marcus. “Implementing and Testing Self-Timed Rings on a FPGA as Entropy Sources.” 2015. Web. 21 Sep 2020.

Vancouver:

Einar M. Implementing and Testing Self-Timed Rings on a FPGA as Entropy Sources. [Internet] [Thesis]. Linköping UniversityLinköping University; 2015. [cited 2020 Sep 21]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-119724.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Einar M. Implementing and Testing Self-Timed Rings on a FPGA as Entropy Sources. [Thesis]. Linköping UniversityLinköping University; 2015. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-119724

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

11. Sharifi Kolarijani, A. (author). Traffic Characterization of Aperiodic Control Systems.

Degree: 2014, Delft University of Technology

In networked systems, particularly over wireless or shared channels, the scarcity of communication resources makes the application of traditional control strategies with periodic sampling problematic.… (more)

Subjects/Keywords: networked control systems; event triggered control; self triggered control; formal verification; linear matrix inequality; timed automata

timed (or hybrid) automaton that captures its timing behavior. The self triggered… …9 3 Self Triggered System: Derivation of Quotient System 13 3-1 Self Triggered Strategy… …representation of the transitions in the hybrid automaton (or the timed automaton)… …it has no outgoing transition), and self loop=e. Note, that in given state diagram… …violations. This motivated researchers to propose a new class of approaches called self triggered… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sharifi Kolarijani, A. (. (2014). Traffic Characterization of Aperiodic Control Systems. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:c7ce35a5-fd26-4649-90aa-d3e6e12681e6

Chicago Manual of Style (16th Edition):

Sharifi Kolarijani, A (author). “Traffic Characterization of Aperiodic Control Systems.” 2014. Masters Thesis, Delft University of Technology. Accessed September 21, 2020. http://resolver.tudelft.nl/uuid:c7ce35a5-fd26-4649-90aa-d3e6e12681e6.

MLA Handbook (7th Edition):

Sharifi Kolarijani, A (author). “Traffic Characterization of Aperiodic Control Systems.” 2014. Web. 21 Sep 2020.

Vancouver:

Sharifi Kolarijani A(. Traffic Characterization of Aperiodic Control Systems. [Internet] [Masters thesis]. Delft University of Technology; 2014. [cited 2020 Sep 21]. Available from: http://resolver.tudelft.nl/uuid:c7ce35a5-fd26-4649-90aa-d3e6e12681e6.

Council of Science Editors:

Sharifi Kolarijani A(. Traffic Characterization of Aperiodic Control Systems. [Masters Thesis]. Delft University of Technology; 2014. Available from: http://resolver.tudelft.nl/uuid:c7ce35a5-fd26-4649-90aa-d3e6e12681e6

.