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You searched for subject:(runtime). Showing records 1 – 30 of 277 total matches.

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University of Waterloo

1. Wu, Chun Wah Wallace. Methods for Reducing Monitoring Overhead in Runtime Verification.

Degree: 2013, University of Waterloo

Runtime verification is a lightweight technique that serves to complement existing approaches, such as formal methods and testing, to ensure system correctness. In runtime verification,… (more)

Subjects/Keywords: software; runtime verification; runtime monitoring

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wu, C. W. W. (2013). Methods for Reducing Monitoring Overhead in Runtime Verification. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/7215

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wu, Chun Wah Wallace. “Methods for Reducing Monitoring Overhead in Runtime Verification.” 2013. Thesis, University of Waterloo. Accessed September 16, 2019. http://hdl.handle.net/10012/7215.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wu, Chun Wah Wallace. “Methods for Reducing Monitoring Overhead in Runtime Verification.” 2013. Web. 16 Sep 2019.

Vancouver:

Wu CWW. Methods for Reducing Monitoring Overhead in Runtime Verification. [Internet] [Thesis]. University of Waterloo; 2013. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/10012/7215.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wu CWW. Methods for Reducing Monitoring Overhead in Runtime Verification. [Thesis]. University of Waterloo; 2013. Available from: http://hdl.handle.net/10012/7215

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Notre Dame

2. Michael Loren Dickens. Surfer: Any-core Software Defined Radio</h1>.

Degree: PhD, Electrical Engineering, 2012, University of Notre Dame

  This thesis presents a general-purpose software defined radio architecture, Surfer, which has been designed to allow for dynamic modification of system behavior during runtime.… (more)

Subjects/Keywords: dynamic runtime reconfiguration

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APA (6th Edition):

Dickens, M. L. (2012). Surfer: Any-core Software Defined Radio</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/x633dz03j8g

Chicago Manual of Style (16th Edition):

Dickens, Michael Loren. “Surfer: Any-core Software Defined Radio</h1>.” 2012. Doctoral Dissertation, University of Notre Dame. Accessed September 16, 2019. https://curate.nd.edu/show/x633dz03j8g.

MLA Handbook (7th Edition):

Dickens, Michael Loren. “Surfer: Any-core Software Defined Radio</h1>.” 2012. Web. 16 Sep 2019.

Vancouver:

Dickens ML. Surfer: Any-core Software Defined Radio</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2012. [cited 2019 Sep 16]. Available from: https://curate.nd.edu/show/x633dz03j8g.

Council of Science Editors:

Dickens ML. Surfer: Any-core Software Defined Radio</h1>. [Doctoral Dissertation]. University of Notre Dame; 2012. Available from: https://curate.nd.edu/show/x633dz03j8g


University of Houston

3. Ge, Shiyao 1991-. Implementation and Evaluation of Additional Parallel Features of Coarary Fortran.

Degree: Computer Science, Department of, 2016, University of Houston

 The Fortran 2008 language standard added a feature called "coarrays" to allow parallel programming in Fortran with only minimal changes to existing sequential Fortran programs.… (more)

Subjects/Keywords: Coarray Fortran; Runtime library

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APA (6th Edition):

Ge, S. 1. (2016). Implementation and Evaluation of Additional Parallel Features of Coarary Fortran. (Thesis). University of Houston. Retrieved from http://hdl.handle.net/10657/3268

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ge, Shiyao 1991-. “Implementation and Evaluation of Additional Parallel Features of Coarary Fortran.” 2016. Thesis, University of Houston. Accessed September 16, 2019. http://hdl.handle.net/10657/3268.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ge, Shiyao 1991-. “Implementation and Evaluation of Additional Parallel Features of Coarary Fortran.” 2016. Web. 16 Sep 2019.

Vancouver:

Ge S1. Implementation and Evaluation of Additional Parallel Features of Coarary Fortran. [Internet] [Thesis]. University of Houston; 2016. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/10657/3268.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ge S1. Implementation and Evaluation of Additional Parallel Features of Coarary Fortran. [Thesis]. University of Houston; 2016. Available from: http://hdl.handle.net/10657/3268

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Waterloo

4. Eyolfson, Jonathan. Tracerory - Dynamic Tracematches and Unread Memory Detection for C/C++.

Degree: 2011, University of Waterloo

 Dynamic binary translation allows us to analyze a program during execution without the need for a compiler or the program's source code. In this work,… (more)

Subjects/Keywords: runtime monitoring; dynamic binary translation

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APA (6th Edition):

Eyolfson, J. (2011). Tracerory - Dynamic Tracematches and Unread Memory Detection for C/C++. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/6206

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Eyolfson, Jonathan. “Tracerory - Dynamic Tracematches and Unread Memory Detection for C/C++.” 2011. Thesis, University of Waterloo. Accessed September 16, 2019. http://hdl.handle.net/10012/6206.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Eyolfson, Jonathan. “Tracerory - Dynamic Tracematches and Unread Memory Detection for C/C++.” 2011. Web. 16 Sep 2019.

Vancouver:

Eyolfson J. Tracerory - Dynamic Tracematches and Unread Memory Detection for C/C++. [Internet] [Thesis]. University of Waterloo; 2011. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/10012/6206.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Eyolfson J. Tracerory - Dynamic Tracematches and Unread Memory Detection for C/C++. [Thesis]. University of Waterloo; 2011. Available from: http://hdl.handle.net/10012/6206

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

5. Luo, Qingzhou. Testing, runtime verification, and analysis of concurrent programs.

Degree: PhD, Computer Science, 2015, University of Illinois – Urbana-Champaign

 With the development of multi-core processors, concurrent programs are becoming more and more popular. Among several models, the multithreaded shared-memory model is the predominant programming… (more)

Subjects/Keywords: Runtime verification; concurrency; testing

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APA (6th Edition):

Luo, Q. (2015). Testing, runtime verification, and analysis of concurrent programs. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/87955

Chicago Manual of Style (16th Edition):

Luo, Qingzhou. “Testing, runtime verification, and analysis of concurrent programs.” 2015. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed September 16, 2019. http://hdl.handle.net/2142/87955.

MLA Handbook (7th Edition):

Luo, Qingzhou. “Testing, runtime verification, and analysis of concurrent programs.” 2015. Web. 16 Sep 2019.

Vancouver:

Luo Q. Testing, runtime verification, and analysis of concurrent programs. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2015. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/2142/87955.

Council of Science Editors:

Luo Q. Testing, runtime verification, and analysis of concurrent programs. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2015. Available from: http://hdl.handle.net/2142/87955


Rice University

6. Xu, Chao. Automated OS-level Device Runtime Power Management.

Degree: MS, Engineering, 2014, Rice University

 Hardware devices on a modern System-on-Chip (SoC), ranging from accelerators to IO controllers, usually account for the largest portion of the chip area. It is… (more)

Subjects/Keywords: Runtime power management; SoC; OS

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APA (6th Edition):

Xu, C. (2014). Automated OS-level Device Runtime Power Management. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/87791

Chicago Manual of Style (16th Edition):

Xu, Chao. “Automated OS-level Device Runtime Power Management.” 2014. Masters Thesis, Rice University. Accessed September 16, 2019. http://hdl.handle.net/1911/87791.

MLA Handbook (7th Edition):

Xu, Chao. “Automated OS-level Device Runtime Power Management.” 2014. Web. 16 Sep 2019.

Vancouver:

Xu C. Automated OS-level Device Runtime Power Management. [Internet] [Masters thesis]. Rice University; 2014. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/1911/87791.

Council of Science Editors:

Xu C. Automated OS-level Device Runtime Power Management. [Masters Thesis]. Rice University; 2014. Available from: http://hdl.handle.net/1911/87791

7. Virouleau, Philippe. Etude et amélioration de l'exploitation des architectures NUMA à travers des supports exécutifs : Studying and improving the use of NUMA architectures through runtime systems.

Degree: Docteur es, Informatique, 2018, Grenoble Alpes

L'évolution du calcul haute performance est aujourd'hui dirigée par les besoins des applications de simulation numérique.Ces applications sont exécutées sur des supercalculateurs qui peuvent proposer… (more)

Subjects/Keywords: Openmp; Runtime; Support exécutif; Compilation; Multicore; Openmp; Runtime; Multicore; Compilation; 004

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APA (6th Edition):

Virouleau, P. (2018). Etude et amélioration de l'exploitation des architectures NUMA à travers des supports exécutifs : Studying and improving the use of NUMA architectures through runtime systems. (Doctoral Dissertation). Grenoble Alpes. Retrieved from http://www.theses.fr/2018GREAM032

Chicago Manual of Style (16th Edition):

Virouleau, Philippe. “Etude et amélioration de l'exploitation des architectures NUMA à travers des supports exécutifs : Studying and improving the use of NUMA architectures through runtime systems.” 2018. Doctoral Dissertation, Grenoble Alpes. Accessed September 16, 2019. http://www.theses.fr/2018GREAM032.

MLA Handbook (7th Edition):

Virouleau, Philippe. “Etude et amélioration de l'exploitation des architectures NUMA à travers des supports exécutifs : Studying and improving the use of NUMA architectures through runtime systems.” 2018. Web. 16 Sep 2019.

Vancouver:

Virouleau P. Etude et amélioration de l'exploitation des architectures NUMA à travers des supports exécutifs : Studying and improving the use of NUMA architectures through runtime systems. [Internet] [Doctoral dissertation]. Grenoble Alpes; 2018. [cited 2019 Sep 16]. Available from: http://www.theses.fr/2018GREAM032.

Council of Science Editors:

Virouleau P. Etude et amélioration de l'exploitation des architectures NUMA à travers des supports exécutifs : Studying and improving the use of NUMA architectures through runtime systems. [Doctoral Dissertation]. Grenoble Alpes; 2018. Available from: http://www.theses.fr/2018GREAM032

8. Hugo, Andra-Ecaterina. Composability of parallel codes on heterogeneous architectures : La composition des codes parallèles sur plates-formes hétérogènes.

Degree: Docteur es, Informatique, 2014, Bordeaux

Pour répondre aux besoins de précision et d'efficacité des simulations scientifiques, la communauté du Calcul Haute Performance augmente progressivement les demandes en terme de parallélisme,… (more)

Subjects/Keywords: Composition; Support d'exécution; Hypervisor; Composability; Runtime; Hypervisor

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APA (6th Edition):

Hugo, A. (2014). Composability of parallel codes on heterogeneous architectures : La composition des codes parallèles sur plates-formes hétérogènes. (Doctoral Dissertation). Bordeaux. Retrieved from http://www.theses.fr/2014BORD0373

Chicago Manual of Style (16th Edition):

Hugo, Andra-Ecaterina. “Composability of parallel codes on heterogeneous architectures : La composition des codes parallèles sur plates-formes hétérogènes.” 2014. Doctoral Dissertation, Bordeaux. Accessed September 16, 2019. http://www.theses.fr/2014BORD0373.

MLA Handbook (7th Edition):

Hugo, Andra-Ecaterina. “Composability of parallel codes on heterogeneous architectures : La composition des codes parallèles sur plates-formes hétérogènes.” 2014. Web. 16 Sep 2019.

Vancouver:

Hugo A. Composability of parallel codes on heterogeneous architectures : La composition des codes parallèles sur plates-formes hétérogènes. [Internet] [Doctoral dissertation]. Bordeaux; 2014. [cited 2019 Sep 16]. Available from: http://www.theses.fr/2014BORD0373.

Council of Science Editors:

Hugo A. Composability of parallel codes on heterogeneous architectures : La composition des codes parallèles sur plates-formes hétérogènes. [Doctoral Dissertation]. Bordeaux; 2014. Available from: http://www.theses.fr/2014BORD0373

9. SARAVANAN SINNADURAI S/O GUNACHILAN. Runtime binary analysis for security.

Degree: 2007, National University of Singapore

Subjects/Keywords: Runtime security; DynamoRIO

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APA (6th Edition):

GUNACHILAN, S. S. S. (2007). Runtime binary analysis for security. (Thesis). National University of Singapore. Retrieved from http://scholarbank.nus.edu.sg/handle/10635/16121

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

GUNACHILAN, SARAVANAN SINNADURAI S/O. “Runtime binary analysis for security.” 2007. Thesis, National University of Singapore. Accessed September 16, 2019. http://scholarbank.nus.edu.sg/handle/10635/16121.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

GUNACHILAN, SARAVANAN SINNADURAI S/O. “Runtime binary analysis for security.” 2007. Web. 16 Sep 2019.

Vancouver:

GUNACHILAN SSS. Runtime binary analysis for security. [Internet] [Thesis]. National University of Singapore; 2007. [cited 2019 Sep 16]. Available from: http://scholarbank.nus.edu.sg/handle/10635/16121.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

GUNACHILAN SSS. Runtime binary analysis for security. [Thesis]. National University of Singapore; 2007. Available from: http://scholarbank.nus.edu.sg/handle/10635/16121

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Toronto

10. Tong, Xin. BarTLB: Barren Page Resistant TLB for Managed Runtime Environments.

Degree: 2014, University of Toronto

This thesis observes that many translation look-aside bu_er (TLB) misses in managed runtime language workloads originate from barren pages. That is, pages that contain mostly… (more)

Subjects/Keywords: manage runtime environment; TLB; virtual memory; 0984

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APA (6th Edition):

Tong, X. (2014). BarTLB: Barren Page Resistant TLB for Managed Runtime Environments. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/67904

Chicago Manual of Style (16th Edition):

Tong, Xin. “BarTLB: Barren Page Resistant TLB for Managed Runtime Environments.” 2014. Masters Thesis, University of Toronto. Accessed September 16, 2019. http://hdl.handle.net/1807/67904.

MLA Handbook (7th Edition):

Tong, Xin. “BarTLB: Barren Page Resistant TLB for Managed Runtime Environments.” 2014. Web. 16 Sep 2019.

Vancouver:

Tong X. BarTLB: Barren Page Resistant TLB for Managed Runtime Environments. [Internet] [Masters thesis]. University of Toronto; 2014. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/1807/67904.

Council of Science Editors:

Tong X. BarTLB: Barren Page Resistant TLB for Managed Runtime Environments. [Masters Thesis]. University of Toronto; 2014. Available from: http://hdl.handle.net/1807/67904

11. Kumar, Deepak. Runtime Verification with Controllable Time Predictability and Memory Utilization.

Degree: 2013, University of Waterloo

 The goal of runtime verifi cation is to inspect the well-being of a system by employing a monitor during its execution. Such monitoring imposes cost… (more)

Subjects/Keywords: Runtime Verification

runtime. Runtime verification [3, 15, 23, 27, 35, 38] (RV) is one such… …domain of embedded safety/mission-critical systems. The inherent cost of RV is runtime overhead… …reduction of resource requirement by runtime verification, techniques designed to make runtime… …respectively. In Chapter 8 we present an overview of our preceding work on runtime verification… …work and literature on runtime verification and control theory. Main focus of work discussed… 

Page 1 Page 2 Page 3 Page 4 Page 5 Page 6 Page 7

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APA (6th Edition):

Kumar, D. (2013). Runtime Verification with Controllable Time Predictability and Memory Utilization. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/7968

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kumar, Deepak. “Runtime Verification with Controllable Time Predictability and Memory Utilization.” 2013. Thesis, University of Waterloo. Accessed September 16, 2019. http://hdl.handle.net/10012/7968.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kumar, Deepak. “Runtime Verification with Controllable Time Predictability and Memory Utilization.” 2013. Web. 16 Sep 2019.

Vancouver:

Kumar D. Runtime Verification with Controllable Time Predictability and Memory Utilization. [Internet] [Thesis]. University of Waterloo; 2013. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/10012/7968.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kumar D. Runtime Verification with Controllable Time Predictability and Memory Utilization. [Thesis]. University of Waterloo; 2013. Available from: http://hdl.handle.net/10012/7968

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

12. Lee, Choonghwan. Preparation-free and comprehensive runtime verification tool for testing Java programs.

Degree: PhD, 0112, 2014, University of Illinois – Urbana-Champaign

Runtime verification is an effective and accurate technique for ensuring that an execution of a program conform to certain specifications at runtime. Although excessive runtime(more)

Subjects/Keywords: parametric specification; specification mining; runtime verification

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APA (6th Edition):

Lee, C. (2014). Preparation-free and comprehensive runtime verification tool for testing Java programs. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/46910

Chicago Manual of Style (16th Edition):

Lee, Choonghwan. “Preparation-free and comprehensive runtime verification tool for testing Java programs.” 2014. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed September 16, 2019. http://hdl.handle.net/2142/46910.

MLA Handbook (7th Edition):

Lee, Choonghwan. “Preparation-free and comprehensive runtime verification tool for testing Java programs.” 2014. Web. 16 Sep 2019.

Vancouver:

Lee C. Preparation-free and comprehensive runtime verification tool for testing Java programs. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2014. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/2142/46910.

Council of Science Editors:

Lee C. Preparation-free and comprehensive runtime verification tool for testing Java programs. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2014. Available from: http://hdl.handle.net/2142/46910


Indiana University

13. Vitousek, Michael M. Gradual Typing for Python, Unguarded .

Degree: 2019, Indiana University

 Gradual typing integrates static and dynamic typing with the guarantee that statically typed regions of a program will never have their types violated even if… (more)

Subjects/Keywords: type systems; gradual typing; runtime enforcement

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APA (6th Edition):

Vitousek, M. M. (2019). Gradual Typing for Python, Unguarded . (Thesis). Indiana University. Retrieved from http://hdl.handle.net/2022/23172

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vitousek, Michael M. “Gradual Typing for Python, Unguarded .” 2019. Thesis, Indiana University. Accessed September 16, 2019. http://hdl.handle.net/2022/23172.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vitousek, Michael M. “Gradual Typing for Python, Unguarded .” 2019. Web. 16 Sep 2019.

Vancouver:

Vitousek MM. Gradual Typing for Python, Unguarded . [Internet] [Thesis]. Indiana University; 2019. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/2022/23172.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vitousek MM. Gradual Typing for Python, Unguarded . [Thesis]. Indiana University; 2019. Available from: http://hdl.handle.net/2022/23172

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Queens University

14. Faiz Khademi, Amin. Browser Fingerprinting: Analysis, Detection, and Prevention at Runtime .

Degree: Computing, 2014, Queens University

 Most Web users are unaware of being identified or followed by web agents which leverage techniques such as browser fingerprinting (or fingerprinting). Data obtained through… (more)

Subjects/Keywords: Fingerprinting; Web Privacy; Detection; Prevention; Runtime

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APA (6th Edition):

Faiz Khademi, A. (2014). Browser Fingerprinting: Analysis, Detection, and Prevention at Runtime . (Thesis). Queens University. Retrieved from http://hdl.handle.net/1974/12604

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Faiz Khademi, Amin. “Browser Fingerprinting: Analysis, Detection, and Prevention at Runtime .” 2014. Thesis, Queens University. Accessed September 16, 2019. http://hdl.handle.net/1974/12604.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Faiz Khademi, Amin. “Browser Fingerprinting: Analysis, Detection, and Prevention at Runtime .” 2014. Web. 16 Sep 2019.

Vancouver:

Faiz Khademi A. Browser Fingerprinting: Analysis, Detection, and Prevention at Runtime . [Internet] [Thesis]. Queens University; 2014. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/1974/12604.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Faiz Khademi A. Browser Fingerprinting: Analysis, Detection, and Prevention at Runtime . [Thesis]. Queens University; 2014. Available from: http://hdl.handle.net/1974/12604

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


San Jose State University

15. Jimenez, Lomberto P. Runtime Reconfigurable Multi-Processor Architectures.

Degree: MS, Electrical Engineering, 2015, San Jose State University

  This thesis concentrated on the runtime reconfiguration of system-on-chip (SoC) cores to execute specific tasks. The premise was that if the cores could be… (more)

Subjects/Keywords: FPGA Partition; Multi-Processor; Reconfigurable; Runtime

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APA (6th Edition):

Jimenez, L. P. (2015). Runtime Reconfigurable Multi-Processor Architectures. (Masters Thesis). San Jose State University. Retrieved from https://doi.org/10.31979/etd.7rqs-3pun ; https://scholarworks.sjsu.edu/etd_theses/4544

Chicago Manual of Style (16th Edition):

Jimenez, Lomberto P. “Runtime Reconfigurable Multi-Processor Architectures.” 2015. Masters Thesis, San Jose State University. Accessed September 16, 2019. https://doi.org/10.31979/etd.7rqs-3pun ; https://scholarworks.sjsu.edu/etd_theses/4544.

MLA Handbook (7th Edition):

Jimenez, Lomberto P. “Runtime Reconfigurable Multi-Processor Architectures.” 2015. Web. 16 Sep 2019.

Vancouver:

Jimenez LP. Runtime Reconfigurable Multi-Processor Architectures. [Internet] [Masters thesis]. San Jose State University; 2015. [cited 2019 Sep 16]. Available from: https://doi.org/10.31979/etd.7rqs-3pun ; https://scholarworks.sjsu.edu/etd_theses/4544.

Council of Science Editors:

Jimenez LP. Runtime Reconfigurable Multi-Processor Architectures. [Masters Thesis]. San Jose State University; 2015. Available from: https://doi.org/10.31979/etd.7rqs-3pun ; https://scholarworks.sjsu.edu/etd_theses/4544


University of Waterloo

16. Barghi, Saman. Improving the Performance of User-level Runtime Systems for Concurrent Applications.

Degree: 2018, University of Waterloo

 Concurrency is an essential part of many modern large-scale software systems. Applications must handle millions of simultaneous requests from millions of connected devices. Handling such… (more)

Subjects/Keywords: Runtime; Concurrency; Thread Programming; Actor Model; User-level Threads; User-level Runtime

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Barghi, S. (2018). Improving the Performance of User-level Runtime Systems for Concurrent Applications. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/13935

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Barghi, Saman. “Improving the Performance of User-level Runtime Systems for Concurrent Applications.” 2018. Thesis, University of Waterloo. Accessed September 16, 2019. http://hdl.handle.net/10012/13935.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Barghi, Saman. “Improving the Performance of User-level Runtime Systems for Concurrent Applications.” 2018. Web. 16 Sep 2019.

Vancouver:

Barghi S. Improving the Performance of User-level Runtime Systems for Concurrent Applications. [Internet] [Thesis]. University of Waterloo; 2018. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/10012/13935.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Barghi S. Improving the Performance of User-level Runtime Systems for Concurrent Applications. [Thesis]. University of Waterloo; 2018. Available from: http://hdl.handle.net/10012/13935

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Waterloo

17. Khan, Waleed. RuSTL: Runtime Verification using Signal Temporal Logic.

Degree: 2019, University of Waterloo

 A system is classified to be a safety-critical system if its failure and/or malfunction of these devices may result in severe injuries or in extreme… (more)

Subjects/Keywords: Signal Temporal Logic; STL; runtime verification; RV; runtime monitoring; temporal logic; structured English text

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Khan, W. (2019). RuSTL: Runtime Verification using Signal Temporal Logic. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/14552

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Khan, Waleed. “RuSTL: Runtime Verification using Signal Temporal Logic.” 2019. Thesis, University of Waterloo. Accessed September 16, 2019. http://hdl.handle.net/10012/14552.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Khan, Waleed. “RuSTL: Runtime Verification using Signal Temporal Logic.” 2019. Web. 16 Sep 2019.

Vancouver:

Khan W. RuSTL: Runtime Verification using Signal Temporal Logic. [Internet] [Thesis]. University of Waterloo; 2019. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/10012/14552.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Khan W. RuSTL: Runtime Verification using Signal Temporal Logic. [Thesis]. University of Waterloo; 2019. Available from: http://hdl.handle.net/10012/14552

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Waterloo

18. Babaee Cheshmeahmadrezaee, Reza. Predictive Runtime Verification of Stochastic Systems.

Degree: 2019, University of Waterloo

Runtime Verification (RV) is the formal analysis of the execution of a system against some properties at runtime. RV is particularly useful for stochastic systems… (more)

Subjects/Keywords: runtime verification; predictive runtime verification; black box system; abstraction; importance sampling; stochastic system; prediction model

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Babaee Cheshmeahmadrezaee, R. (2019). Predictive Runtime Verification of Stochastic Systems. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/14876

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Babaee Cheshmeahmadrezaee, Reza. “Predictive Runtime Verification of Stochastic Systems.” 2019. Thesis, University of Waterloo. Accessed September 16, 2019. http://hdl.handle.net/10012/14876.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Babaee Cheshmeahmadrezaee, Reza. “Predictive Runtime Verification of Stochastic Systems.” 2019. Web. 16 Sep 2019.

Vancouver:

Babaee Cheshmeahmadrezaee R. Predictive Runtime Verification of Stochastic Systems. [Internet] [Thesis]. University of Waterloo; 2019. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/10012/14876.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Babaee Cheshmeahmadrezaee R. Predictive Runtime Verification of Stochastic Systems. [Thesis]. University of Waterloo; 2019. Available from: http://hdl.handle.net/10012/14876

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

19. Plácido Antônio de Souza Neto. JCML - Java Card Modeling Language: Definição e Implementação.

Degree: 2007, Universidade Federal do Rio Grande do Norte

Métodos formais poderiam ser usados para especificar e verificar software on-card em aplicações Java Card. O estilo de programação para smart cards requer verificação em… (more)

Subjects/Keywords: Métodos Formais; Java Card; JML; JCML; Verificação Runtime; Compilador; SISTEMAS DE COMPUTACAO; Formal Methods; Java Card; JML; JCML; Runtime Verification; Compiler

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Neto, P. A. d. S. (2007). JCML - Java Card Modeling Language: Definição e Implementação. (Thesis). Universidade Federal do Rio Grande do Norte. Retrieved from http://bdtd.bczm.ufrn.br/tedesimplificado//tde_busca/arquivo.php?codArquivo=1341

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Neto, Plácido Antônio de Souza. “JCML - Java Card Modeling Language: Definição e Implementação.” 2007. Thesis, Universidade Federal do Rio Grande do Norte. Accessed September 16, 2019. http://bdtd.bczm.ufrn.br/tedesimplificado//tde_busca/arquivo.php?codArquivo=1341.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Neto, Plácido Antônio de Souza. “JCML - Java Card Modeling Language: Definição e Implementação.” 2007. Web. 16 Sep 2019.

Vancouver:

Neto PAdS. JCML - Java Card Modeling Language: Definição e Implementação. [Internet] [Thesis]. Universidade Federal do Rio Grande do Norte; 2007. [cited 2019 Sep 16]. Available from: http://bdtd.bczm.ufrn.br/tedesimplificado//tde_busca/arquivo.php?codArquivo=1341.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Neto PAdS. JCML - Java Card Modeling Language: Definição e Implementação. [Thesis]. Universidade Federal do Rio Grande do Norte; 2007. Available from: http://bdtd.bczm.ufrn.br/tedesimplificado//tde_busca/arquivo.php?codArquivo=1341

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Norte

20. Souza Neto, Plácido Antônio de. JCML - Java Card Modeling Language: Definição e Implementação .

Degree: 2007, Universidade do Rio Grande do Norte

 Formal methods should be used to specify and verify on-card software in Java Card applications. Furthermore, Java Card programming style requires runtime verification of all… (more)

Subjects/Keywords: Métodos Formais; Java Card; JML; JCML; Verificação Runtime; Compilador; Formal Methods; Java Card; JML; JCML; Runtime Verification; Compiler

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Souza Neto, P. A. d. (2007). JCML - Java Card Modeling Language: Definição e Implementação . (Thesis). Universidade do Rio Grande do Norte. Retrieved from http://repositorio.ufrn.br/handle/123456789/17961

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Souza Neto, Plácido Antônio de. “JCML - Java Card Modeling Language: Definição e Implementação .” 2007. Thesis, Universidade do Rio Grande do Norte. Accessed September 16, 2019. http://repositorio.ufrn.br/handle/123456789/17961.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Souza Neto, Plácido Antônio de. “JCML - Java Card Modeling Language: Definição e Implementação .” 2007. Web. 16 Sep 2019.

Vancouver:

Souza Neto PAd. JCML - Java Card Modeling Language: Definição e Implementação . [Internet] [Thesis]. Universidade do Rio Grande do Norte; 2007. [cited 2019 Sep 16]. Available from: http://repositorio.ufrn.br/handle/123456789/17961.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Souza Neto PAd. JCML - Java Card Modeling Language: Definição e Implementação . [Thesis]. Universidade do Rio Grande do Norte; 2007. Available from: http://repositorio.ufrn.br/handle/123456789/17961

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

21. Stanisic, Luka. A Reproducible Research Methodology for Designing and Conducting Faithful Simulations of Dynamic HPC Applications : Méthodologie de recherche reproductible adaptée à la conception et à la conduite de simulations d'applications scientifique multitâche dynamiques.

Degree: Docteur es, Informatique, 2015, Grenoble Alpes

 L'évolution de l'informatique haute performance s'est réorientée au cours de cette dernière décennie. L'importante consommation énergétique des plates-formes modernes limite fortement la miniaturisation et l'augmentation… (more)

Subjects/Keywords: Évaluation de performances; Runtime; Hpc; Méthodologie; Recherche Reproducible; Simulation; Performance Evaluation; Runtime; Hpc; Methodology; Reproducible Research; Simulation; 621

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Stanisic, L. (2015). A Reproducible Research Methodology for Designing and Conducting Faithful Simulations of Dynamic HPC Applications : Méthodologie de recherche reproductible adaptée à la conception et à la conduite de simulations d'applications scientifique multitâche dynamiques. (Doctoral Dissertation). Grenoble Alpes. Retrieved from http://www.theses.fr/2015GREAM035

Chicago Manual of Style (16th Edition):

Stanisic, Luka. “A Reproducible Research Methodology for Designing and Conducting Faithful Simulations of Dynamic HPC Applications : Méthodologie de recherche reproductible adaptée à la conception et à la conduite de simulations d'applications scientifique multitâche dynamiques.” 2015. Doctoral Dissertation, Grenoble Alpes. Accessed September 16, 2019. http://www.theses.fr/2015GREAM035.

MLA Handbook (7th Edition):

Stanisic, Luka. “A Reproducible Research Methodology for Designing and Conducting Faithful Simulations of Dynamic HPC Applications : Méthodologie de recherche reproductible adaptée à la conception et à la conduite de simulations d'applications scientifique multitâche dynamiques.” 2015. Web. 16 Sep 2019.

Vancouver:

Stanisic L. A Reproducible Research Methodology for Designing and Conducting Faithful Simulations of Dynamic HPC Applications : Méthodologie de recherche reproductible adaptée à la conception et à la conduite de simulations d'applications scientifique multitâche dynamiques. [Internet] [Doctoral dissertation]. Grenoble Alpes; 2015. [cited 2019 Sep 16]. Available from: http://www.theses.fr/2015GREAM035.

Council of Science Editors:

Stanisic L. A Reproducible Research Methodology for Designing and Conducting Faithful Simulations of Dynamic HPC Applications : Méthodologie de recherche reproductible adaptée à la conception et à la conduite de simulations d'applications scientifique multitâche dynamiques. [Doctoral Dissertation]. Grenoble Alpes; 2015. Available from: http://www.theses.fr/2015GREAM035

22. Loulou, Hassan. Verifying Design Properties at Runtime Using an MDE-Based Approach Models @Run.Time Verification-Application to Autonomous Connected Vehicles : Vérification de propriétés de conception à l’exécution à l’aide d’une approche IDM, [email protected] verification - Application aux véhicules connectés autonomes.

Degree: Docteur es, Informatique, 2017, Paris Saclay

 Un véhicule autonome et connecté (ACV – pour Autonomous Connected Vehicle ) est un système cyber-physique où le monde réel et l’espace numérique virtuel se… (more)

Subjects/Keywords: [email protected]; Self-Adaptative; Formal methods; Securité; Véhicules Connectés Autonomes; [email protected]; Runtime adaptation; Self-Adaptative; Securité; Autonomous connected vehicles

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Loulou, H. (2017). Verifying Design Properties at Runtime Using an MDE-Based Approach Models @Run.Time Verification-Application to Autonomous Connected Vehicles : Vérification de propriétés de conception à l’exécution à l’aide d’une approche IDM, [email protected] verification - Application aux véhicules connectés autonomes. (Doctoral Dissertation). Paris Saclay. Retrieved from http://www.theses.fr/2017SACLS405

Chicago Manual of Style (16th Edition):

Loulou, Hassan. “Verifying Design Properties at Runtime Using an MDE-Based Approach Models @Run.Time Verification-Application to Autonomous Connected Vehicles : Vérification de propriétés de conception à l’exécution à l’aide d’une approche IDM, [email protected] verification - Application aux véhicules connectés autonomes.” 2017. Doctoral Dissertation, Paris Saclay. Accessed September 16, 2019. http://www.theses.fr/2017SACLS405.

MLA Handbook (7th Edition):

Loulou, Hassan. “Verifying Design Properties at Runtime Using an MDE-Based Approach Models @Run.Time Verification-Application to Autonomous Connected Vehicles : Vérification de propriétés de conception à l’exécution à l’aide d’une approche IDM, [email protected] verification - Application aux véhicules connectés autonomes.” 2017. Web. 16 Sep 2019.

Vancouver:

Loulou H. Verifying Design Properties at Runtime Using an MDE-Based Approach Models @Run.Time Verification-Application to Autonomous Connected Vehicles : Vérification de propriétés de conception à l’exécution à l’aide d’une approche IDM, [email protected] verification - Application aux véhicules connectés autonomes. [Internet] [Doctoral dissertation]. Paris Saclay; 2017. [cited 2019 Sep 16]. Available from: http://www.theses.fr/2017SACLS405.

Council of Science Editors:

Loulou H. Verifying Design Properties at Runtime Using an MDE-Based Approach Models @Run.Time Verification-Application to Autonomous Connected Vehicles : Vérification de propriétés de conception à l’exécution à l’aide d’une approche IDM, [email protected] verification - Application aux véhicules connectés autonomes. [Doctoral Dissertation]. Paris Saclay; 2017. Available from: http://www.theses.fr/2017SACLS405

23. Deshmeh, Gholamhossein. ADEPT Runtime/Scalability Predictor in support of Adaptive Scheduling.

Degree: PhD, Computer Science, 2013, National Library of Canada

  A job scheduler determines the order and duration of the allocation of resources, e.g. CPU, to the tasks waiting to run on a computer.… (more)

Subjects/Keywords: Applied sciences; Performance; Prediction; Runtime; Scalability; Adaptive scheduling

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Deshmeh, G. (2013). ADEPT Runtime/Scalability Predictor in support of Adaptive Scheduling. (Doctoral Dissertation). National Library of Canada. Retrieved from http://scholar.uwindsor.ca/etd/4943

Chicago Manual of Style (16th Edition):

Deshmeh, Gholamhossein. “ADEPT Runtime/Scalability Predictor in support of Adaptive Scheduling.” 2013. Doctoral Dissertation, National Library of Canada. Accessed September 16, 2019. http://scholar.uwindsor.ca/etd/4943.

MLA Handbook (7th Edition):

Deshmeh, Gholamhossein. “ADEPT Runtime/Scalability Predictor in support of Adaptive Scheduling.” 2013. Web. 16 Sep 2019.

Vancouver:

Deshmeh G. ADEPT Runtime/Scalability Predictor in support of Adaptive Scheduling. [Internet] [Doctoral dissertation]. National Library of Canada; 2013. [cited 2019 Sep 16]. Available from: http://scholar.uwindsor.ca/etd/4943.

Council of Science Editors:

Deshmeh G. ADEPT Runtime/Scalability Predictor in support of Adaptive Scheduling. [Doctoral Dissertation]. National Library of Canada; 2013. Available from: http://scholar.uwindsor.ca/etd/4943

24. Zarges, Christine. Theoretical foundations of artificial immune systems.

Degree: 2011, Technische Universität Dortmund

 Artificial immune systems (AIS) are a special class of biologically inspired algorithms, which are based on the immune system of vertebrates. The field constitutes a… (more)

Subjects/Keywords: Artificial immune systems; Randomized search heuristics; Runtime analysis; Theory; 004

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zarges, C. (2011). Theoretical foundations of artificial immune systems. (Thesis). Technische Universität Dortmund. Retrieved from http://hdl.handle.net/2003/28939

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zarges, Christine. “Theoretical foundations of artificial immune systems.” 2011. Thesis, Technische Universität Dortmund. Accessed September 16, 2019. http://hdl.handle.net/2003/28939.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zarges, Christine. “Theoretical foundations of artificial immune systems.” 2011. Web. 16 Sep 2019.

Vancouver:

Zarges C. Theoretical foundations of artificial immune systems. [Internet] [Thesis]. Technische Universität Dortmund; 2011. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/2003/28939.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zarges C. Theoretical foundations of artificial immune systems. [Thesis]. Technische Universität Dortmund; 2011. Available from: http://hdl.handle.net/2003/28939

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

25. Shrestha, Kavir. An Empirical Evaluation of the Effectiveness of JML Assertions as Test Oracles.

Degree: MS, Computer Science, 2010, U of Denver

  Test oracles remain one of the least understood aspects of the modern testing process. An oracle is a mechanism used by software testers and… (more)

Subjects/Keywords: design by contract; empirical study; runtime assertion checking; test oracles

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Shrestha, K. (2010). An Empirical Evaluation of the Effectiveness of JML Assertions as Test Oracles. (Thesis). U of Denver. Retrieved from https://digitalcommons.du.edu/etd/600

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Shrestha, Kavir. “An Empirical Evaluation of the Effectiveness of JML Assertions as Test Oracles.” 2010. Thesis, U of Denver. Accessed September 16, 2019. https://digitalcommons.du.edu/etd/600.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Shrestha, Kavir. “An Empirical Evaluation of the Effectiveness of JML Assertions as Test Oracles.” 2010. Web. 16 Sep 2019.

Vancouver:

Shrestha K. An Empirical Evaluation of the Effectiveness of JML Assertions as Test Oracles. [Internet] [Thesis]. U of Denver; 2010. [cited 2019 Sep 16]. Available from: https://digitalcommons.du.edu/etd/600.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Shrestha K. An Empirical Evaluation of the Effectiveness of JML Assertions as Test Oracles. [Thesis]. U of Denver; 2010. Available from: https://digitalcommons.du.edu/etd/600

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

26. Lyberis, Spyros. Myrmics: A scalable runtime system for global address spaces.

Degree: 2013, University of Crete (UOC); Πανεπιστήμιο Κρήτης

The end of the processor performance race in the start of the current century signaled the beginning of the multicore era. To harness the benefits… (more)

Subjects/Keywords: Myrmics; Formic; Runtime; Task-based; FPGA; Distributed; Parallel; Scalable

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lyberis, S. (2013). Myrmics: A scalable runtime system for global address spaces. (Thesis). University of Crete (UOC); Πανεπιστήμιο Κρήτης. Retrieved from http://hdl.handle.net/10442/hedi/29906

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lyberis, Spyros. “Myrmics: A scalable runtime system for global address spaces.” 2013. Thesis, University of Crete (UOC); Πανεπιστήμιο Κρήτης. Accessed September 16, 2019. http://hdl.handle.net/10442/hedi/29906.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lyberis, Spyros. “Myrmics: A scalable runtime system for global address spaces.” 2013. Web. 16 Sep 2019.

Vancouver:

Lyberis S. Myrmics: A scalable runtime system for global address spaces. [Internet] [Thesis]. University of Crete (UOC); Πανεπιστήμιο Κρήτης; 2013. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/10442/hedi/29906.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lyberis S. Myrmics: A scalable runtime system for global address spaces. [Thesis]. University of Crete (UOC); Πανεπιστήμιο Κρήτης; 2013. Available from: http://hdl.handle.net/10442/hedi/29906

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


The Ohio State University

27. Dinan, James S. Scalable Task Parallel Programming in the Partitioned Global Address Space.

Degree: PhD, Computer Science and Engineering, 2010, The Ohio State University

  Applications that exhibit irregular, dynamic, and unbalanced parallelism are growing in number and importance in the computational science and engineering communities. These applications span… (more)

Subjects/Keywords: Computer Science; High performance computing; Parallel programming models; Scalable runtime systems

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Dinan, J. S. (2010). Scalable Task Parallel Programming in the Partitioned Global Address Space. (Doctoral Dissertation). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1275418061

Chicago Manual of Style (16th Edition):

Dinan, James S. “Scalable Task Parallel Programming in the Partitioned Global Address Space.” 2010. Doctoral Dissertation, The Ohio State University. Accessed September 16, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=osu1275418061.

MLA Handbook (7th Edition):

Dinan, James S. “Scalable Task Parallel Programming in the Partitioned Global Address Space.” 2010. Web. 16 Sep 2019.

Vancouver:

Dinan JS. Scalable Task Parallel Programming in the Partitioned Global Address Space. [Internet] [Doctoral dissertation]. The Ohio State University; 2010. [cited 2019 Sep 16]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1275418061.

Council of Science Editors:

Dinan JS. Scalable Task Parallel Programming in the Partitioned Global Address Space. [Doctoral Dissertation]. The Ohio State University; 2010. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1275418061


De Montfort University

28. Alghamdi, Turki Mohammed K. Policy-based runtime tracking for e-learning environments.

Degree: PhD, 2013, De Montfort University

 The Virtual Learning Environment (VLE) is a form of e-learning environment that is becoming widely adopted in higher educational institutions and universities. The term “Tracking”… (more)

Subjects/Keywords: 005.1; Policy-based; Runtime; Tracking; E-learning; VLE; Monitoring; Tempura

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Alghamdi, T. M. K. (2013). Policy-based runtime tracking for e-learning environments. (Doctoral Dissertation). De Montfort University. Retrieved from http://hdl.handle.net/2086/8237

Chicago Manual of Style (16th Edition):

Alghamdi, Turki Mohammed K. “Policy-based runtime tracking for e-learning environments.” 2013. Doctoral Dissertation, De Montfort University. Accessed September 16, 2019. http://hdl.handle.net/2086/8237.

MLA Handbook (7th Edition):

Alghamdi, Turki Mohammed K. “Policy-based runtime tracking for e-learning environments.” 2013. Web. 16 Sep 2019.

Vancouver:

Alghamdi TMK. Policy-based runtime tracking for e-learning environments. [Internet] [Doctoral dissertation]. De Montfort University; 2013. [cited 2019 Sep 16]. Available from: http://hdl.handle.net/2086/8237.

Council of Science Editors:

Alghamdi TMK. Policy-based runtime tracking for e-learning environments. [Doctoral Dissertation]. De Montfort University; 2013. Available from: http://hdl.handle.net/2086/8237


Penn State University

29. Son, Seung Woo. Software-Based Disk Power Management for Scientific Applications.

Degree: PhD, Computer Science and Engineering, 2008, Penn State University

 Power consumption by high-performance systems is becoming an increasing concern for system designers and software writers a like. Disk subsystem is known to be a… (more)

Subjects/Keywords: Low power; compiler; disk subsystem; parallel file system; runtime

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Son, S. W. (2008). Software-Based Disk Power Management for Scientific Applications. (Doctoral Dissertation). Penn State University. Retrieved from https://etda.libraries.psu.edu/catalog/8847

Chicago Manual of Style (16th Edition):

Son, Seung Woo. “Software-Based Disk Power Management for Scientific Applications.” 2008. Doctoral Dissertation, Penn State University. Accessed September 16, 2019. https://etda.libraries.psu.edu/catalog/8847.

MLA Handbook (7th Edition):

Son, Seung Woo. “Software-Based Disk Power Management for Scientific Applications.” 2008. Web. 16 Sep 2019.

Vancouver:

Son SW. Software-Based Disk Power Management for Scientific Applications. [Internet] [Doctoral dissertation]. Penn State University; 2008. [cited 2019 Sep 16]. Available from: https://etda.libraries.psu.edu/catalog/8847.

Council of Science Editors:

Son SW. Software-Based Disk Power Management for Scientific Applications. [Doctoral Dissertation]. Penn State University; 2008. Available from: https://etda.libraries.psu.edu/catalog/8847


Penn State University

30. Ding, Yang. Dynamic Resource Management for Energy-efficiency and Quality-of-Service in Chip Multiprocessors.

Degree: PhD, Computer Science and Engineering, 2010, Penn State University

 Chip multiprocessors (CMPs) are becoming increasingly popular as performance improvements brought by increasing clock frequency alone are approaching their limits. Other factors, such as ease… (more)

Subjects/Keywords: dynamic resource management; runtime system; Chip Multiprocessors; energy-efficiency; QoS

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ding, Y. (2010). Dynamic Resource Management for Energy-efficiency and Quality-of-Service in Chip Multiprocessors. (Doctoral Dissertation). Penn State University. Retrieved from https://etda.libraries.psu.edu/catalog/11311

Chicago Manual of Style (16th Edition):

Ding, Yang. “Dynamic Resource Management for Energy-efficiency and Quality-of-Service in Chip Multiprocessors.” 2010. Doctoral Dissertation, Penn State University. Accessed September 16, 2019. https://etda.libraries.psu.edu/catalog/11311.

MLA Handbook (7th Edition):

Ding, Yang. “Dynamic Resource Management for Energy-efficiency and Quality-of-Service in Chip Multiprocessors.” 2010. Web. 16 Sep 2019.

Vancouver:

Ding Y. Dynamic Resource Management for Energy-efficiency and Quality-of-Service in Chip Multiprocessors. [Internet] [Doctoral dissertation]. Penn State University; 2010. [cited 2019 Sep 16]. Available from: https://etda.libraries.psu.edu/catalog/11311.

Council of Science Editors:

Ding Y. Dynamic Resource Management for Energy-efficiency and Quality-of-Service in Chip Multiprocessors. [Doctoral Dissertation]. Penn State University; 2010. Available from: https://etda.libraries.psu.edu/catalog/11311

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