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You searched for subject:(multi many core). Showing records 1 – 16 of 16 total matches.

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University of Southern California

1. Peng, Liu. Parallelization framework for scientific application kernels on multi-core/many-core platforms.

Degree: PhD, Computer Science, 2011, University of Southern California

 The advent of multi-core/many-core paradigm has provided unprecedented computing power, and it is of great significance to develop a parallelization framework for various scientific applications… (more)

Subjects/Keywords: multi/many core; parallel computing; scientific simulation

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APA (6th Edition):

Peng, L. (2011). Parallelization framework for scientific application kernels on multi-core/many-core platforms. (Doctoral Dissertation). University of Southern California. Retrieved from http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/624895/rec/4910

Chicago Manual of Style (16th Edition):

Peng, Liu. “Parallelization framework for scientific application kernels on multi-core/many-core platforms.” 2011. Doctoral Dissertation, University of Southern California. Accessed October 19, 2019. http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/624895/rec/4910.

MLA Handbook (7th Edition):

Peng, Liu. “Parallelization framework for scientific application kernels on multi-core/many-core platforms.” 2011. Web. 19 Oct 2019.

Vancouver:

Peng L. Parallelization framework for scientific application kernels on multi-core/many-core platforms. [Internet] [Doctoral dissertation]. University of Southern California; 2011. [cited 2019 Oct 19]. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/624895/rec/4910.

Council of Science Editors:

Peng L. Parallelization framework for scientific application kernels on multi-core/many-core platforms. [Doctoral Dissertation]. University of Southern California; 2011. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/624895/rec/4910


Virginia Tech

2. Zhang, Jing. Transforming and Optimizing Irregular Applications for Parallel Architectures.

Degree: PhD, Computer Science, 2018, Virginia Tech

 Parallel architectures, including multi-core processors, many-core processors, and multi-node systems, have become commonplace, as it is no longer feasible to improve single-core performance through increasing… (more)

Subjects/Keywords: Irregular Applications; Parallel Architectures; Multi-core; Many-core; Multi-node; Bioinformatics

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APA (6th Edition):

Zhang, J. (2018). Transforming and Optimizing Irregular Applications for Parallel Architectures. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/82069

Chicago Manual of Style (16th Edition):

Zhang, Jing. “Transforming and Optimizing Irregular Applications for Parallel Architectures.” 2018. Doctoral Dissertation, Virginia Tech. Accessed October 19, 2019. http://hdl.handle.net/10919/82069.

MLA Handbook (7th Edition):

Zhang, Jing. “Transforming and Optimizing Irregular Applications for Parallel Architectures.” 2018. Web. 19 Oct 2019.

Vancouver:

Zhang J. Transforming and Optimizing Irregular Applications for Parallel Architectures. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/10919/82069.

Council of Science Editors:

Zhang J. Transforming and Optimizing Irregular Applications for Parallel Architectures. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/82069

3. Méndez Real, Maria. Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core.

Degree: Docteur es, Stic, 2017, Lorient

L’évolution technologique ainsi que l’augmentation incessante de la puissance de calcul requise par les applications font des architectures ”many-core” la nouvelle tendance dans la conception… (more)

Subjects/Keywords: Architectures many-core; Multi-core architectures; Open Virtual Platforms; 005.8

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APA (6th Edition):

Méndez Real, M. (2017). Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core. (Doctoral Dissertation). Lorient. Retrieved from http://www.theses.fr/2017LORIS454

Chicago Manual of Style (16th Edition):

Méndez Real, Maria. “Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core.” 2017. Doctoral Dissertation, Lorient. Accessed October 19, 2019. http://www.theses.fr/2017LORIS454.

MLA Handbook (7th Edition):

Méndez Real, Maria. “Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core.” 2017. Web. 19 Oct 2019.

Vancouver:

Méndez Real M. Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core. [Internet] [Doctoral dissertation]. Lorient; 2017. [cited 2019 Oct 19]. Available from: http://www.theses.fr/2017LORIS454.

Council of Science Editors:

Méndez Real M. Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core. [Doctoral Dissertation]. Lorient; 2017. Available from: http://www.theses.fr/2017LORIS454


University of New Mexico

4. Bezerra, George. Energy consumption in networks on chip : efficiency and scaling.

Degree: Department of Computer Science, 2012, University of New Mexico

 Computer architecture design is in a new era where performance is increased by replicating processing cores on a chip rather than making CPUs larger and… (more)

Subjects/Keywords: multi-core; many-core; energy consumption; communicaiton locality; scaling

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APA (6th Edition):

Bezerra, G. (2012). Energy consumption in networks on chip : efficiency and scaling. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/21020

Chicago Manual of Style (16th Edition):

Bezerra, George. “Energy consumption in networks on chip : efficiency and scaling.” 2012. Doctoral Dissertation, University of New Mexico. Accessed October 19, 2019. http://hdl.handle.net/1928/21020.

MLA Handbook (7th Edition):

Bezerra, George. “Energy consumption in networks on chip : efficiency and scaling.” 2012. Web. 19 Oct 2019.

Vancouver:

Bezerra G. Energy consumption in networks on chip : efficiency and scaling. [Internet] [Doctoral dissertation]. University of New Mexico; 2012. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1928/21020.

Council of Science Editors:

Bezerra G. Energy consumption in networks on chip : efficiency and scaling. [Doctoral Dissertation]. University of New Mexico; 2012. Available from: http://hdl.handle.net/1928/21020

5. Lo, Moustapha. Application des architectures many core dans les systèmes embarqués temps réel : Implementing a Real-time Avionic application on a Many-core Processor.

Degree: Docteur es, Informatique, 2019, Grenoble Alpes

Les processeurs mono-coeurs traditionnels ne sont plus suffisants pour répondre aux besoins croissants en performance des fonctions avioniques. Les processeurs multi/many-coeurs ont emergé ces dernières… (more)

Subjects/Keywords: Many-Core; Temps-Réel; Determinisme; Multi-Core; Algorithmes globaux; Algorithmes incrémentaux; Many-Core; Real-Time; Determinism; Multi-Core; Global algorithms; Incremental Algorithms; 004

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APA (6th Edition):

Lo, M. (2019). Application des architectures many core dans les systèmes embarqués temps réel : Implementing a Real-time Avionic application on a Many-core Processor. (Doctoral Dissertation). Grenoble Alpes. Retrieved from http://www.theses.fr/2019GREAM002

Chicago Manual of Style (16th Edition):

Lo, Moustapha. “Application des architectures many core dans les systèmes embarqués temps réel : Implementing a Real-time Avionic application on a Many-core Processor.” 2019. Doctoral Dissertation, Grenoble Alpes. Accessed October 19, 2019. http://www.theses.fr/2019GREAM002.

MLA Handbook (7th Edition):

Lo, Moustapha. “Application des architectures many core dans les systèmes embarqués temps réel : Implementing a Real-time Avionic application on a Many-core Processor.” 2019. Web. 19 Oct 2019.

Vancouver:

Lo M. Application des architectures many core dans les systèmes embarqués temps réel : Implementing a Real-time Avionic application on a Many-core Processor. [Internet] [Doctoral dissertation]. Grenoble Alpes; 2019. [cited 2019 Oct 19]. Available from: http://www.theses.fr/2019GREAM002.

Council of Science Editors:

Lo M. Application des architectures many core dans les systèmes embarqués temps réel : Implementing a Real-time Avionic application on a Many-core Processor. [Doctoral Dissertation]. Grenoble Alpes; 2019. Available from: http://www.theses.fr/2019GREAM002


University of Tennessee – Knoxville

6. Ma, Teng. Kernel-assisted and Topology-aware MPI Collective Communication among Multicore or Many-core Clusters.

Degree: 2012, University of Tennessee – Knoxville

 Multicore or many-core clusters have become the most prominent form of High Performance Computing (HPC) systems. Hardware complexity and hierarchies not only exist in the… (more)

Subjects/Keywords: MPI; kernel; hierarchical; collective; multi-core; many-core; Computational Engineering; Computer and Systems Architecture

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APA (6th Edition):

Ma, T. (2012). Kernel-assisted and Topology-aware MPI Collective Communication among Multicore or Many-core Clusters. (Doctoral Dissertation). University of Tennessee – Knoxville. Retrieved from https://trace.tennessee.edu/utk_graddiss/1541

Chicago Manual of Style (16th Edition):

Ma, Teng. “Kernel-assisted and Topology-aware MPI Collective Communication among Multicore or Many-core Clusters.” 2012. Doctoral Dissertation, University of Tennessee – Knoxville. Accessed October 19, 2019. https://trace.tennessee.edu/utk_graddiss/1541.

MLA Handbook (7th Edition):

Ma, Teng. “Kernel-assisted and Topology-aware MPI Collective Communication among Multicore or Many-core Clusters.” 2012. Web. 19 Oct 2019.

Vancouver:

Ma T. Kernel-assisted and Topology-aware MPI Collective Communication among Multicore or Many-core Clusters. [Internet] [Doctoral dissertation]. University of Tennessee – Knoxville; 2012. [cited 2019 Oct 19]. Available from: https://trace.tennessee.edu/utk_graddiss/1541.

Council of Science Editors:

Ma T. Kernel-assisted and Topology-aware MPI Collective Communication among Multicore or Many-core Clusters. [Doctoral Dissertation]. University of Tennessee – Knoxville; 2012. Available from: https://trace.tennessee.edu/utk_graddiss/1541


The Ohio State University

7. Singh, Kunal. High-Performance Sparse Matrix-Multi Vector Multiplication on Multi-Core Architecture.

Degree: MS, Computer Science and Engineering, 2018, The Ohio State University

 SpMM is a widely used primitive in many domains like Fluid Dynamics, DataAnalytics, Economic Modelling and Machine Learning. In Machine Learning and ArtificialNeural Network domain… (more)

Subjects/Keywords: Computer Science; SpMM; SpMDM; Sparse Dense Matrix Multiplication; Multi-core; Many-Core

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APA (6th Edition):

Singh, K. (2018). High-Performance Sparse Matrix-Multi Vector Multiplication on Multi-Core Architecture. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1524089757826551

Chicago Manual of Style (16th Edition):

Singh, Kunal. “High-Performance Sparse Matrix-Multi Vector Multiplication on Multi-Core Architecture.” 2018. Masters Thesis, The Ohio State University. Accessed October 19, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=osu1524089757826551.

MLA Handbook (7th Edition):

Singh, Kunal. “High-Performance Sparse Matrix-Multi Vector Multiplication on Multi-Core Architecture.” 2018. Web. 19 Oct 2019.

Vancouver:

Singh K. High-Performance Sparse Matrix-Multi Vector Multiplication on Multi-Core Architecture. [Internet] [Masters thesis]. The Ohio State University; 2018. [cited 2019 Oct 19]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1524089757826551.

Council of Science Editors:

Singh K. High-Performance Sparse Matrix-Multi Vector Multiplication on Multi-Core Architecture. [Masters Thesis]. The Ohio State University; 2018. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1524089757826551

8. Vargas Vallejo, Vanessa Carolina. Approche logicielle pour améliorer la fiabilité d’applications parallèles implémentées dans des processeurs multi-cœur et many-cœur : Software approach to improve the reliability of parallel applications implemented on multi-core and many-core processors.

Degree: Docteur es, Nano electronique et nano technologies, 2017, Grenoble Alpes

La grande capacité de calcul, flexibilité, faible consommation d'énergie, redondance intrinsèque et la haute performance fournie par les processeurs multi/many-cœur les rendent idéaux pour surmonter… (more)

Subjects/Keywords: Architectures parallèles; Multi-Cœur et many-Cœur; Fiabilité; Redondance; Multi-Processing mode; Injection de fautes; Parallel Architectures; Multi-Core and many-Core; Reliability; Redundancy; Multi-Processing mode; Fault injection; 620

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APA (6th Edition):

Vargas Vallejo, V. C. (2017). Approche logicielle pour améliorer la fiabilité d’applications parallèles implémentées dans des processeurs multi-cœur et many-cœur : Software approach to improve the reliability of parallel applications implemented on multi-core and many-core processors. (Doctoral Dissertation). Grenoble Alpes. Retrieved from http://www.theses.fr/2017GREAT042

Chicago Manual of Style (16th Edition):

Vargas Vallejo, Vanessa Carolina. “Approche logicielle pour améliorer la fiabilité d’applications parallèles implémentées dans des processeurs multi-cœur et many-cœur : Software approach to improve the reliability of parallel applications implemented on multi-core and many-core processors.” 2017. Doctoral Dissertation, Grenoble Alpes. Accessed October 19, 2019. http://www.theses.fr/2017GREAT042.

MLA Handbook (7th Edition):

Vargas Vallejo, Vanessa Carolina. “Approche logicielle pour améliorer la fiabilité d’applications parallèles implémentées dans des processeurs multi-cœur et many-cœur : Software approach to improve the reliability of parallel applications implemented on multi-core and many-core processors.” 2017. Web. 19 Oct 2019.

Vancouver:

Vargas Vallejo VC. Approche logicielle pour améliorer la fiabilité d’applications parallèles implémentées dans des processeurs multi-cœur et many-cœur : Software approach to improve the reliability of parallel applications implemented on multi-core and many-core processors. [Internet] [Doctoral dissertation]. Grenoble Alpes; 2017. [cited 2019 Oct 19]. Available from: http://www.theses.fr/2017GREAT042.

Council of Science Editors:

Vargas Vallejo VC. Approche logicielle pour améliorer la fiabilité d’applications parallèles implémentées dans des processeurs multi-cœur et many-cœur : Software approach to improve the reliability of parallel applications implemented on multi-core and many-core processors. [Doctoral Dissertation]. Grenoble Alpes; 2017. Available from: http://www.theses.fr/2017GREAT042

9. Laville, Guillaume. Exécution efficace de systèmes Multi-Agents sur GPU : Efficient execution of multi-agent systems on GPU.

Degree: Docteur es, Informatique, 2014, Besançon

Ces dernières années ont consacré l’émergence du parallélisme dans la plupart des branches de l’informatique.Au niveau matériel, tout d’abord, du fait de la stagnation des… (more)

Subjects/Keywords: Framework de simulation; Système multi-agents; Many-core; GPU; Calcul haute performance; Simulation framework; Multi-agents system; Many-core; GPU; High-performance computing; 006

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APA (6th Edition):

Laville, G. (2014). Exécution efficace de systèmes Multi-Agents sur GPU : Efficient execution of multi-agent systems on GPU. (Doctoral Dissertation). Besançon. Retrieved from http://www.theses.fr/2014BESA2016

Chicago Manual of Style (16th Edition):

Laville, Guillaume. “Exécution efficace de systèmes Multi-Agents sur GPU : Efficient execution of multi-agent systems on GPU.” 2014. Doctoral Dissertation, Besançon. Accessed October 19, 2019. http://www.theses.fr/2014BESA2016.

MLA Handbook (7th Edition):

Laville, Guillaume. “Exécution efficace de systèmes Multi-Agents sur GPU : Efficient execution of multi-agent systems on GPU.” 2014. Web. 19 Oct 2019.

Vancouver:

Laville G. Exécution efficace de systèmes Multi-Agents sur GPU : Efficient execution of multi-agent systems on GPU. [Internet] [Doctoral dissertation]. Besançon; 2014. [cited 2019 Oct 19]. Available from: http://www.theses.fr/2014BESA2016.

Council of Science Editors:

Laville G. Exécution efficace de systèmes Multi-Agents sur GPU : Efficient execution of multi-agent systems on GPU. [Doctoral Dissertation]. Besançon; 2014. Available from: http://www.theses.fr/2014BESA2016

10. Roussel, Adrien. Parallélisation sur un moteur exécutif à base de tâches des méthodes itératives pour la résolution de systèmes linéaires creux sur architecture multi et many coeurs : application aux méthodes de types décomposition de domaines multi-niveaux : Parallelization of iterative methods to solve sparse linear systems using task based runtime systems on multi and many-core architectures : application to Multi-Level Domain Decomposition methods.

Degree: Docteur es, Informatique, 2018, Grenoble Alpes

Les méthodes en simulation numérique dans le domaine de l’ingénierie pétrolière nécessitent la résolution de systèmes linéaires creux de grande taille et non structurés. La… (more)

Subjects/Keywords: Calcul parallèle; Décomposition de domaine; Moteur exécutif; Multi and Many-Core; Parallel computing; Domain decomposition methods; Runtime system; Multi and many-Core architecture; 004

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APA (6th Edition):

Roussel, A. (2018). Parallélisation sur un moteur exécutif à base de tâches des méthodes itératives pour la résolution de systèmes linéaires creux sur architecture multi et many coeurs : application aux méthodes de types décomposition de domaines multi-niveaux : Parallelization of iterative methods to solve sparse linear systems using task based runtime systems on multi and many-core architectures : application to Multi-Level Domain Decomposition methods. (Doctoral Dissertation). Grenoble Alpes. Retrieved from http://www.theses.fr/2018GREAM010

Chicago Manual of Style (16th Edition):

Roussel, Adrien. “Parallélisation sur un moteur exécutif à base de tâches des méthodes itératives pour la résolution de systèmes linéaires creux sur architecture multi et many coeurs : application aux méthodes de types décomposition de domaines multi-niveaux : Parallelization of iterative methods to solve sparse linear systems using task based runtime systems on multi and many-core architectures : application to Multi-Level Domain Decomposition methods.” 2018. Doctoral Dissertation, Grenoble Alpes. Accessed October 19, 2019. http://www.theses.fr/2018GREAM010.

MLA Handbook (7th Edition):

Roussel, Adrien. “Parallélisation sur un moteur exécutif à base de tâches des méthodes itératives pour la résolution de systèmes linéaires creux sur architecture multi et many coeurs : application aux méthodes de types décomposition de domaines multi-niveaux : Parallelization of iterative methods to solve sparse linear systems using task based runtime systems on multi and many-core architectures : application to Multi-Level Domain Decomposition methods.” 2018. Web. 19 Oct 2019.

Vancouver:

Roussel A. Parallélisation sur un moteur exécutif à base de tâches des méthodes itératives pour la résolution de systèmes linéaires creux sur architecture multi et many coeurs : application aux méthodes de types décomposition de domaines multi-niveaux : Parallelization of iterative methods to solve sparse linear systems using task based runtime systems on multi and many-core architectures : application to Multi-Level Domain Decomposition methods. [Internet] [Doctoral dissertation]. Grenoble Alpes; 2018. [cited 2019 Oct 19]. Available from: http://www.theses.fr/2018GREAM010.

Council of Science Editors:

Roussel A. Parallélisation sur un moteur exécutif à base de tâches des méthodes itératives pour la résolution de systèmes linéaires creux sur architecture multi et many coeurs : application aux méthodes de types décomposition de domaines multi-niveaux : Parallelization of iterative methods to solve sparse linear systems using task based runtime systems on multi and many-core architectures : application to Multi-Level Domain Decomposition methods. [Doctoral Dissertation]. Grenoble Alpes; 2018. Available from: http://www.theses.fr/2018GREAM010


University of Illinois – Chicago

11. Panerati, Jacopo. Enhancing Self-Adaptive Computing Systems via Artificial Intelligence Techniques and Active Learning.

Degree: 2012, University of Illinois – Chicago

 Autonomic computing (AC) has been proposed as a solution to the increasing complexity of computer systems, threatening to make systems impossible to be managed by… (more)

Subjects/Keywords: multi-core; many-core; artificial intelligence; operating systems; reinforcement learning; active learning; learning; markov decision process; mdp

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APA (6th Edition):

Panerati, J. (2012). Enhancing Self-Adaptive Computing Systems via Artificial Intelligence Techniques and Active Learning. (Thesis). University of Illinois – Chicago. Retrieved from http://hdl.handle.net/10027/9179

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Panerati, Jacopo. “Enhancing Self-Adaptive Computing Systems via Artificial Intelligence Techniques and Active Learning.” 2012. Thesis, University of Illinois – Chicago. Accessed October 19, 2019. http://hdl.handle.net/10027/9179.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Panerati, Jacopo. “Enhancing Self-Adaptive Computing Systems via Artificial Intelligence Techniques and Active Learning.” 2012. Web. 19 Oct 2019.

Vancouver:

Panerati J. Enhancing Self-Adaptive Computing Systems via Artificial Intelligence Techniques and Active Learning. [Internet] [Thesis]. University of Illinois – Chicago; 2012. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/10027/9179.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Panerati J. Enhancing Self-Adaptive Computing Systems via Artificial Intelligence Techniques and Active Learning. [Thesis]. University of Illinois – Chicago; 2012. Available from: http://hdl.handle.net/10027/9179

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Virginia Tech

12. Singh, Ajeet. GePSeA: A General-Purpose Software Acceleration Framework for Lightweight Task Offloading.

Degree: MS, Computer Science, 2009, Virginia Tech

 Hardware-acceleration techniques continue to be used to boost the performance of scientific codes. To do so, software developers identify portions of these codes that are… (more)

Subjects/Keywords: Many-Core; UDP; Accelerators; Multi-Core; Task Offloading

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APA (6th Edition):

Singh, A. (2009). GePSeA: A General-Purpose Software Acceleration Framework for Lightweight Task Offloading. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/34264

Chicago Manual of Style (16th Edition):

Singh, Ajeet. “GePSeA: A General-Purpose Software Acceleration Framework for Lightweight Task Offloading.” 2009. Masters Thesis, Virginia Tech. Accessed October 19, 2019. http://hdl.handle.net/10919/34264.

MLA Handbook (7th Edition):

Singh, Ajeet. “GePSeA: A General-Purpose Software Acceleration Framework for Lightweight Task Offloading.” 2009. Web. 19 Oct 2019.

Vancouver:

Singh A. GePSeA: A General-Purpose Software Acceleration Framework for Lightweight Task Offloading. [Internet] [Masters thesis]. Virginia Tech; 2009. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/10919/34264.

Council of Science Editors:

Singh A. GePSeA: A General-Purpose Software Acceleration Framework for Lightweight Task Offloading. [Masters Thesis]. Virginia Tech; 2009. Available from: http://hdl.handle.net/10919/34264


University of California – Irvine

13. Kim, Myoungseo. I/O Design and Core Power Management Issues in Heterogeneous Multi/Many-Core System-on-Chip.

Degree: Computer Science, 2016, University of California – Irvine

 Since dark silicon and the end of multicore scaling, multi/many-core system-on-a-chip (SoC) platform designs nowadays are facing some conflicting issues regarding product development. One is… (more)

Subjects/Keywords: Computer science; Computer engineering; Electrical engineering; Design Automation; Design Efficiency and Power Saving; Extended Amdahl's Law; Heterogeneous System Architecture; Multi/Many-Core System-on-a-Chip; Overhead of Data Preparation

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APA (6th Edition):

Kim, M. (2016). I/O Design and Core Power Management Issues in Heterogeneous Multi/Many-Core System-on-Chip. (Thesis). University of California – Irvine. Retrieved from http://www.escholarship.org/uc/item/9g80m9bd

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kim, Myoungseo. “I/O Design and Core Power Management Issues in Heterogeneous Multi/Many-Core System-on-Chip.” 2016. Thesis, University of California – Irvine. Accessed October 19, 2019. http://www.escholarship.org/uc/item/9g80m9bd.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kim, Myoungseo. “I/O Design and Core Power Management Issues in Heterogeneous Multi/Many-Core System-on-Chip.” 2016. Web. 19 Oct 2019.

Vancouver:

Kim M. I/O Design and Core Power Management Issues in Heterogeneous Multi/Many-Core System-on-Chip. [Internet] [Thesis]. University of California – Irvine; 2016. [cited 2019 Oct 19]. Available from: http://www.escholarship.org/uc/item/9g80m9bd.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kim M. I/O Design and Core Power Management Issues in Heterogeneous Multi/Many-Core System-on-Chip. [Thesis]. University of California – Irvine; 2016. Available from: http://www.escholarship.org/uc/item/9g80m9bd

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Delft University of Technology

14. Fang, J. Towards a Systematic Exploration of the Optimization Space for Many-Core Processors.

Degree: 2014, Delft University of Technology

 The architecture diversity of many-core processors - with their different types of cores, and memory hierarchies - makes the old model of reprogramming every application… (more)

Subjects/Keywords: Multi-/Many-core Processors; Performance; Portability; Vectorization; Memory Hierarchy; Local Memory; OpenCL

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APA (6th Edition):

Fang, J. (2014). Towards a Systematic Exploration of the Optimization Space for Many-Core Processors. (Doctoral Dissertation). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; urn:NBN:nl:ui:24-uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; urn:NBN:nl:ui:24-uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; http://resolver.tudelft.nl/uuid:0b5408a7-933c-4369-8d48-1db5d3269d72

Chicago Manual of Style (16th Edition):

Fang, J. “Towards a Systematic Exploration of the Optimization Space for Many-Core Processors.” 2014. Doctoral Dissertation, Delft University of Technology. Accessed October 19, 2019. http://resolver.tudelft.nl/uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; urn:NBN:nl:ui:24-uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; urn:NBN:nl:ui:24-uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; http://resolver.tudelft.nl/uuid:0b5408a7-933c-4369-8d48-1db5d3269d72.

MLA Handbook (7th Edition):

Fang, J. “Towards a Systematic Exploration of the Optimization Space for Many-Core Processors.” 2014. Web. 19 Oct 2019.

Vancouver:

Fang J. Towards a Systematic Exploration of the Optimization Space for Many-Core Processors. [Internet] [Doctoral dissertation]. Delft University of Technology; 2014. [cited 2019 Oct 19]. Available from: http://resolver.tudelft.nl/uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; urn:NBN:nl:ui:24-uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; urn:NBN:nl:ui:24-uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; http://resolver.tudelft.nl/uuid:0b5408a7-933c-4369-8d48-1db5d3269d72.

Council of Science Editors:

Fang J. Towards a Systematic Exploration of the Optimization Space for Many-Core Processors. [Doctoral Dissertation]. Delft University of Technology; 2014. Available from: http://resolver.tudelft.nl/uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; urn:NBN:nl:ui:24-uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; urn:NBN:nl:ui:24-uuid:0b5408a7-933c-4369-8d48-1db5d3269d72 ; http://resolver.tudelft.nl/uuid:0b5408a7-933c-4369-8d48-1db5d3269d72

15. Mancuso, Renato. Next-generation safety-critical systems on multi-core platforms.

Degree: PhD, Computer Science, 2017, University of Illinois – Urbana-Champaign

Multi-core platforms represent the answer of the industry to the increasing demand for computational capabilities. In fact, multi-core platforms can deliver large computational power together… (more)

Subjects/Keywords: Real-time systems; Multi-core systems; Commercial-off-the-shelf (COTS); Single-core equivalence; Single-core equivalent; Hardware resource management; Operating system (OS); Real-time operating system (RTOS); Worst case execution time (WCET); Scheduling; Schedulability analysis; Multi-core real-time operating system (RTOS); Profiling; Avionics; Safety-critical; Cyber-physical systems (CPS); Memguard; Colored lockdown; Palloc; Kernel verification; Scratchpad-centric operating system (OS); Scratchpad memories operating system (SPM-OS); Scratchpad scheduling; Direct memory access (DMA) scheduling; Flow-shop task; Flow-shop scheduling; Hardware scheduler; Field-programmable gate array (FPGA) scheduler; Real-time Linux; Automotive; Smart manufacturing; Real-time networking; Embedded systems; Multi-core avionics; Multi-core automotive; Self-driving cars; Multi-core safety-critical; Many-core; Reconfigurable computing; Internet of things; Real-time cloud computing; Provably safe cyber-physical systems (CPS); Multi-core scheduling; Performance isolation; Real-time resource management; Real-time cache; Real-time dynamic random access memory (DRAM); P4080; MPC5777M; Inter-core interference; Interference channels; CAST32; CAST32A; Federal Aviation Administration (FAA); Minimal multicore avionics certification guidance; Multi-core automotive open system architecture (AUTOSAR); DO-178C; DO-178B; Resource partitioning; Multi-core resource partitioning; Predictable execution model (PREM); Multi-core predictable execution model (PREM)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mancuso, R. (2017). Next-generation safety-critical systems on multi-core platforms. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/97399

Chicago Manual of Style (16th Edition):

Mancuso, Renato. “Next-generation safety-critical systems on multi-core platforms.” 2017. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed October 19, 2019. http://hdl.handle.net/2142/97399.

MLA Handbook (7th Edition):

Mancuso, Renato. “Next-generation safety-critical systems on multi-core platforms.” 2017. Web. 19 Oct 2019.

Vancouver:

Mancuso R. Next-generation safety-critical systems on multi-core platforms. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2017. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/2142/97399.

Council of Science Editors:

Mancuso R. Next-generation safety-critical systems on multi-core platforms. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2017. Available from: http://hdl.handle.net/2142/97399

16. Gupta, Vishakha. Coordinated system level resource management for heterogeneous many-core platforms.

Degree: PhD, Computing, 2011, Georgia Tech

 A challenge posed by future computer architectures is the efficient exploitation of their many and sometimes heterogeneous computational cores. This challenge is exacerbated by the… (more)

Subjects/Keywords: Coordinated scheduling; Heterogeneous many-core systems; Asymmetric multi-cores; Virtualization; Kinship model; Performance points; Virtual computer systems; Computing platforms; Computer architecture; Heterogeneous computing; High performance computing

…KINSHIP SCHEDULING FOR EFFICIENT EXECUTION OF VIRTUAL MACHINES ON ASYMMETRIC MULTI-CORE… …MANY-CORE SYSTEMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 6.1 Revisiting… …34 Heterogeneous Many-core System with Performance Points . . . . . . . . 121 xv… …heterogeneous pool of resources to a manageable many-core platform. The hardware heterogeneities… …heterogeneous many-core platform. We present the implementation and evaluation of VM personalities on… 

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gupta, V. (2011). Coordinated system level resource management for heterogeneous many-core platforms. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/42750

Chicago Manual of Style (16th Edition):

Gupta, Vishakha. “Coordinated system level resource management for heterogeneous many-core platforms.” 2011. Doctoral Dissertation, Georgia Tech. Accessed October 19, 2019. http://hdl.handle.net/1853/42750.

MLA Handbook (7th Edition):

Gupta, Vishakha. “Coordinated system level resource management for heterogeneous many-core platforms.” 2011. Web. 19 Oct 2019.

Vancouver:

Gupta V. Coordinated system level resource management for heterogeneous many-core platforms. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1853/42750.

Council of Science Editors:

Gupta V. Coordinated system level resource management for heterogeneous many-core platforms. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/42750

.