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You searched for subject:(metal oxide semiconductor field effect transistor). Showing records 1 – 30 of 50341 total matches.

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Anna University

1. Jamuna V. Artificial neural network Controlled energy saver for Induction motor drive;.

Degree: Artificial neural network Controlled energy saver for Induction motor drive, 2014, Anna University

Voltage controllers are applied as motor soft starters and sometimes newlineas energy savers reducing the flux level in induction motors in accordance newlinewith the load… (more)

Subjects/Keywords: Metal oxide semiconductor field effect transistor; Pulse width modulation

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APA (6th Edition):

V, J. (2014). Artificial neural network Controlled energy saver for Induction motor drive;. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/28431

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

V, Jamuna. “Artificial neural network Controlled energy saver for Induction motor drive;.” 2014. Thesis, Anna University. Accessed August 15, 2020. http://shodhganga.inflibnet.ac.in/handle/10603/28431.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

V, Jamuna. “Artificial neural network Controlled energy saver for Induction motor drive;.” 2014. Web. 15 Aug 2020.

Vancouver:

V J. Artificial neural network Controlled energy saver for Induction motor drive;. [Internet] [Thesis]. Anna University; 2014. [cited 2020 Aug 15]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/28431.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

V J. Artificial neural network Controlled energy saver for Induction motor drive;. [Thesis]. Anna University; 2014. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/28431

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of KwaZulu-Natal

2. Oyedeji, Okikioluwa Ezekiel. Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET.

Degree: 2018, University of KwaZulu-Natal

 Transistors are major components in designing and fabricating high-speed switching devices and micro-electronics. The Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is popular and highly… (more)

Subjects/Keywords: Transistors.; Switches.; Metal Oxide Semiconductor Field Effect Transistor.; MOSFET.; Thermal effects.

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APA (6th Edition):

Oyedeji, O. E. (2018). Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET. (Thesis). University of KwaZulu-Natal. Retrieved from https://researchspace.ukzn.ac.za/handle/10413/17474

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Oyedeji, Okikioluwa Ezekiel. “Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET.” 2018. Thesis, University of KwaZulu-Natal. Accessed August 15, 2020. https://researchspace.ukzn.ac.za/handle/10413/17474.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Oyedeji, Okikioluwa Ezekiel. “Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET.” 2018. Web. 15 Aug 2020.

Vancouver:

Oyedeji OE. Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET. [Internet] [Thesis]. University of KwaZulu-Natal; 2018. [cited 2020 Aug 15]. Available from: https://researchspace.ukzn.ac.za/handle/10413/17474.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Oyedeji OE. Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET. [Thesis]. University of KwaZulu-Natal; 2018. Available from: https://researchspace.ukzn.ac.za/handle/10413/17474

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

3. Yang, Chia-Ching. Fabrication of AlxGa1-xN/GaN nanowires for metal oxide semiconductor field effect transistor by focus ion beam.

Degree: Master, Physics, 2008, NSYSU

 We have grown the high quality AlGaN/GaN heterostructure by plasma-assisted molecular beam epitaxy. We obtained the mobility of two-dimensional electron gas of the AlGaN/GaN is… (more)

Subjects/Keywords: focus ion beam; nanowire; metal oxide semiconductor field effect transistor

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APA (6th Edition):

Yang, C. (2008). Fabrication of AlxGa1-xN/GaN nanowires for metal oxide semiconductor field effect transistor by focus ion beam. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716108-181305

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Chia-Ching. “Fabrication of AlxGa1-xN/GaN nanowires for metal oxide semiconductor field effect transistor by focus ion beam.” 2008. Thesis, NSYSU. Accessed August 15, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716108-181305.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Chia-Ching. “Fabrication of AlxGa1-xN/GaN nanowires for metal oxide semiconductor field effect transistor by focus ion beam.” 2008. Web. 15 Aug 2020.

Vancouver:

Yang C. Fabrication of AlxGa1-xN/GaN nanowires for metal oxide semiconductor field effect transistor by focus ion beam. [Internet] [Thesis]. NSYSU; 2008. [cited 2020 Aug 15]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716108-181305.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang C. Fabrication of AlxGa1-xN/GaN nanowires for metal oxide semiconductor field effect transistor by focus ion beam. [Thesis]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716108-181305

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas Tech University

4. Lawson, Kevin J. Pulsed evaluation of silicon carbide majority carrier devices.

Degree: Electrical Engineering, 2011, Texas Tech University

 In the power electronics industry power converters are reaching their physical limits for efficiency, power density, and output power. This is due to the fact… (more)

Subjects/Keywords: Metal–oxide–semiconductor field-effect transistor (MOSFET); Junction gate field-effect transistor (JFET); Silicon carbide; Pulsed power

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APA (6th Edition):

Lawson, K. J. (2011). Pulsed evaluation of silicon carbide majority carrier devices. (Thesis). Texas Tech University. Retrieved from http://hdl.handle.net/2346/ETD-TTU-2011-08-1720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lawson, Kevin J. “Pulsed evaluation of silicon carbide majority carrier devices.” 2011. Thesis, Texas Tech University. Accessed August 15, 2020. http://hdl.handle.net/2346/ETD-TTU-2011-08-1720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lawson, Kevin J. “Pulsed evaluation of silicon carbide majority carrier devices.” 2011. Web. 15 Aug 2020.

Vancouver:

Lawson KJ. Pulsed evaluation of silicon carbide majority carrier devices. [Internet] [Thesis]. Texas Tech University; 2011. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/2346/ETD-TTU-2011-08-1720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lawson KJ. Pulsed evaluation of silicon carbide majority carrier devices. [Thesis]. Texas Tech University; 2011. Available from: http://hdl.handle.net/2346/ETD-TTU-2011-08-1720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

5. Chabak, Kelson D. Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels.

Degree: PhD, Electrical & Computer Engr, 2016, University of Illinois – Urbana-Champaign

 This dissertation research effort explores new transistor topologies using three-dimensional nanowire (NW)-array channels formed by both bottom-up and top-down synthesis. The bottom-up NW research centers… (more)

Subjects/Keywords: nanowire transistor; High-electron-mobility transistor (HEMT); Fin field effect transistor (finFET); vapor-liquid-solid; gallium oxide; Metal–oxide–semiconductor field-effect transistor (MOSFET); wrap-gate

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APA (6th Edition):

Chabak, K. D. (2016). Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/95466

Chicago Manual of Style (16th Edition):

Chabak, Kelson D. “Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels.” 2016. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed August 15, 2020. http://hdl.handle.net/2142/95466.

MLA Handbook (7th Edition):

Chabak, Kelson D. “Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels.” 2016. Web. 15 Aug 2020.

Vancouver:

Chabak KD. Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2016. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/2142/95466.

Council of Science Editors:

Chabak KD. Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2016. Available from: http://hdl.handle.net/2142/95466


NSYSU

6. CHEN, JIN-HUI. Large Signal Model Establishment for different gate length Mental-Oxide Semiconductor Field-Effect Transistor and its Characterization.

Degree: Master, Communications Engineering, 2013, NSYSU

 Due to the fast development of the microwave circuits, the circuit design relies on good and accurate model. The research focused on the nonlinear characteristics… (more)

Subjects/Keywords: Breakdown region; Metal-Oxide Semiconductor Field-Effect Transistor; Large signal model; Gate length; Nonlinear characteristics

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APA (6th Edition):

CHEN, J. (2013). Large Signal Model Establishment for different gate length Mental-Oxide Semiconductor Field-Effect Transistor and its Characterization. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0812113-091801

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

CHEN, JIN-HUI. “Large Signal Model Establishment for different gate length Mental-Oxide Semiconductor Field-Effect Transistor and its Characterization.” 2013. Thesis, NSYSU. Accessed August 15, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0812113-091801.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

CHEN, JIN-HUI. “Large Signal Model Establishment for different gate length Mental-Oxide Semiconductor Field-Effect Transistor and its Characterization.” 2013. Web. 15 Aug 2020.

Vancouver:

CHEN J. Large Signal Model Establishment for different gate length Mental-Oxide Semiconductor Field-Effect Transistor and its Characterization. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Aug 15]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0812113-091801.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

CHEN J. Large Signal Model Establishment for different gate length Mental-Oxide Semiconductor Field-Effect Transistor and its Characterization. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0812113-091801

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Virginia Tech

7. Ndoye, Coumba. Characterization of Dopant Diffusion in Bulk and lower dimensional Silicon Structures.

Degree: MS, Electrical and Computer Engineering, 2010, Virginia Tech

 The semiconductor industry scaling has mainly been driven by Mooreâ s law, which states that the number of transistors on a single chip should double… (more)

Subjects/Keywords: Silicon; diffusion; Silicon on Insulator (SOI); Metal Oxide Semiconductor Field Effect Transistor; Nanowire

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APA (6th Edition):

Ndoye, C. (2010). Characterization of Dopant Diffusion in Bulk and lower dimensional Silicon Structures. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/46321

Chicago Manual of Style (16th Edition):

Ndoye, Coumba. “Characterization of Dopant Diffusion in Bulk and lower dimensional Silicon Structures.” 2010. Masters Thesis, Virginia Tech. Accessed August 15, 2020. http://hdl.handle.net/10919/46321.

MLA Handbook (7th Edition):

Ndoye, Coumba. “Characterization of Dopant Diffusion in Bulk and lower dimensional Silicon Structures.” 2010. Web. 15 Aug 2020.

Vancouver:

Ndoye C. Characterization of Dopant Diffusion in Bulk and lower dimensional Silicon Structures. [Internet] [Masters thesis]. Virginia Tech; 2010. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/10919/46321.

Council of Science Editors:

Ndoye C. Characterization of Dopant Diffusion in Bulk and lower dimensional Silicon Structures. [Masters Thesis]. Virginia Tech; 2010. Available from: http://hdl.handle.net/10919/46321


University of Illinois – Urbana-Champaign

8. Jo, Michael. Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET.

Degree: MS, 1200, 2013, University of Illinois – Urbana-Champaign

 This thesis introduces a Monte Carlo simulation of intrinsic electronic noise in MOSFETs. Brief reviews of the important aspects of carrier transport, band structure, and… (more)

Subjects/Keywords: Monte Carlo simulation; intrinsic noise; metal–oxide–semiconductor field-effect transistor (MOSFET)

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APA (6th Edition):

Jo, M. (2013). Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/45626

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jo, Michael. “Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET.” 2013. Thesis, University of Illinois – Urbana-Champaign. Accessed August 15, 2020. http://hdl.handle.net/2142/45626.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jo, Michael. “Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET.” 2013. Web. 15 Aug 2020.

Vancouver:

Jo M. Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2013. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/2142/45626.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jo M. Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET. [Thesis]. University of Illinois – Urbana-Champaign; 2013. Available from: http://hdl.handle.net/2142/45626

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of KwaZulu-Natal

9. Maduagwu, Uchechukwu Anthony. Design and analytical performance of subthreshold characteristics of CSDG MOSFET.

Degree: 2019, University of KwaZulu-Natal

 The downscaling of the Metal-Oxide-Semiconductor Field Effect Transistors (MOSFET) devices have been the driving force for Nanotechnology and Very Large-Scale Integration (VLSI) systems. This is… (more)

Subjects/Keywords: Metal-Oxide-Semiconductor Field Effect Transistors (MOSFET) devices.; Nanotechnology.; Transistor scaling.; Solid state electronics.; Semiconductor.; Complementary Metal-Oxide-Semiconductor (CMOS) technology.; Integrated circuit.

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APA (6th Edition):

Maduagwu, U. A. (2019). Design and analytical performance of subthreshold characteristics of CSDG MOSFET. (Thesis). University of KwaZulu-Natal. Retrieved from https://researchspace.ukzn.ac.za/handle/10413/17975

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Maduagwu, Uchechukwu Anthony. “Design and analytical performance of subthreshold characteristics of CSDG MOSFET.” 2019. Thesis, University of KwaZulu-Natal. Accessed August 15, 2020. https://researchspace.ukzn.ac.za/handle/10413/17975.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Maduagwu, Uchechukwu Anthony. “Design and analytical performance of subthreshold characteristics of CSDG MOSFET.” 2019. Web. 15 Aug 2020.

Vancouver:

Maduagwu UA. Design and analytical performance of subthreshold characteristics of CSDG MOSFET. [Internet] [Thesis]. University of KwaZulu-Natal; 2019. [cited 2020 Aug 15]. Available from: https://researchspace.ukzn.ac.za/handle/10413/17975.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Maduagwu UA. Design and analytical performance of subthreshold characteristics of CSDG MOSFET. [Thesis]. University of KwaZulu-Natal; 2019. Available from: https://researchspace.ukzn.ac.za/handle/10413/17975

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Johannesburg

10. Vorster, Adriaan. Die ontwikkeling van 'n hoëdrywing skakelaar met 'n matriks van mosfet skakelelemente.

Degree: 2014, University of Johannesburg

M.Ing. (Electrical and Electronic Engineering)

This thesis covers the development of the Mosmatrix, a high speed, high power switch which is implemented with an array… (more)

Subjects/Keywords: Metal oxide semiconductor field-effect transistors

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APA (6th Edition):

Vorster, A. (2014). Die ontwikkeling van 'n hoëdrywing skakelaar met 'n matriks van mosfet skakelelemente. (Thesis). University of Johannesburg. Retrieved from http://hdl.handle.net/10210/9539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vorster, Adriaan. “Die ontwikkeling van 'n hoëdrywing skakelaar met 'n matriks van mosfet skakelelemente.” 2014. Thesis, University of Johannesburg. Accessed August 15, 2020. http://hdl.handle.net/10210/9539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vorster, Adriaan. “Die ontwikkeling van 'n hoëdrywing skakelaar met 'n matriks van mosfet skakelelemente.” 2014. Web. 15 Aug 2020.

Vancouver:

Vorster A. Die ontwikkeling van 'n hoëdrywing skakelaar met 'n matriks van mosfet skakelelemente. [Internet] [Thesis]. University of Johannesburg; 2014. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/10210/9539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vorster A. Die ontwikkeling van 'n hoëdrywing skakelaar met 'n matriks van mosfet skakelelemente. [Thesis]. University of Johannesburg; 2014. Available from: http://hdl.handle.net/10210/9539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Chicago

11. Zhang, Nanzhu. Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System.

Degree: 2014, University of Illinois – Chicago

 In the first part of the thesis, some basic knowledge related to my research is introduced, such as what is MOSFET, polymer and QDs. In… (more)

Subjects/Keywords: Dual-gate Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET); Wurtzite Quantum Heterostructures; Photodetector; Quantum Dots; Interface phonon modes

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APA (6th Edition):

Zhang, N. (2014). Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System. (Thesis). University of Illinois – Chicago. Retrieved from http://hdl.handle.net/10027/18882

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhang, Nanzhu. “Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System.” 2014. Thesis, University of Illinois – Chicago. Accessed August 15, 2020. http://hdl.handle.net/10027/18882.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhang, Nanzhu. “Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System.” 2014. Web. 15 Aug 2020.

Vancouver:

Zhang N. Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System. [Internet] [Thesis]. University of Illinois – Chicago; 2014. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/10027/18882.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhang N. Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System. [Thesis]. University of Illinois – Chicago; 2014. Available from: http://hdl.handle.net/10027/18882

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Lund

12. Persson, Karl-Magnus. Nanowire Transistors and RF Circuits for Low-Power Applications.

Degree: 2014, University of Lund

 The background of this thesis is related to the steadily increasing demand of higher bandwidth and lower power consumption for transmitting data. The work aims… (more)

Subjects/Keywords: Engineering and Technology; InAs; Nanowire; Metal-oxide-semiconductor field-effect transistor; MOSFET; RF; Mixer; Circuit; 1/f-noise; Simulation; Modelling

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APA (6th Edition):

Persson, K. (2014). Nanowire Transistors and RF Circuits for Low-Power Applications. (Doctoral Dissertation). University of Lund. Retrieved from https://lup.lub.lu.se/record/4316603 ; https://portal.research.lu.se/ws/files/3814965/4316604.pdf

Chicago Manual of Style (16th Edition):

Persson, Karl-Magnus. “Nanowire Transistors and RF Circuits for Low-Power Applications.” 2014. Doctoral Dissertation, University of Lund. Accessed August 15, 2020. https://lup.lub.lu.se/record/4316603 ; https://portal.research.lu.se/ws/files/3814965/4316604.pdf.

MLA Handbook (7th Edition):

Persson, Karl-Magnus. “Nanowire Transistors and RF Circuits for Low-Power Applications.” 2014. Web. 15 Aug 2020.

Vancouver:

Persson K. Nanowire Transistors and RF Circuits for Low-Power Applications. [Internet] [Doctoral dissertation]. University of Lund; 2014. [cited 2020 Aug 15]. Available from: https://lup.lub.lu.se/record/4316603 ; https://portal.research.lu.se/ws/files/3814965/4316604.pdf.

Council of Science Editors:

Persson K. Nanowire Transistors and RF Circuits for Low-Power Applications. [Doctoral Dissertation]. University of Lund; 2014. Available from: https://lup.lub.lu.se/record/4316603 ; https://portal.research.lu.se/ws/files/3814965/4316604.pdf


University of Illinois – Urbana-Champaign

13. Wang, Ning. Toward high-performance, low-power, carbon-based interconnects and transistors.

Degree: MS, 1200, 2013, University of Illinois – Urbana-Champaign

 As the physical limits of Moore’s law scaling are immediately apparent, industry has explored new ways of pushing technological progress. For integrated circuit applications, major… (more)

Subjects/Keywords: graphene; carbon nanotube; graphene nanoribbon (GNR); interconnect; metal-oxide-semiconductor field-effect transistor (MOSFET); avalanche multiplication; impact ionization

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APA (6th Edition):

Wang, N. (2013). Toward high-performance, low-power, carbon-based interconnects and transistors. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/45604

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Ning. “Toward high-performance, low-power, carbon-based interconnects and transistors.” 2013. Thesis, University of Illinois – Urbana-Champaign. Accessed August 15, 2020. http://hdl.handle.net/2142/45604.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Ning. “Toward high-performance, low-power, carbon-based interconnects and transistors.” 2013. Web. 15 Aug 2020.

Vancouver:

Wang N. Toward high-performance, low-power, carbon-based interconnects and transistors. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2013. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/2142/45604.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang N. Toward high-performance, low-power, carbon-based interconnects and transistors. [Thesis]. University of Illinois – Urbana-Champaign; 2013. Available from: http://hdl.handle.net/2142/45604

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Lund

14. Berg, Martin. Vertical InAs Nanowire Devices and RF Circuits.

Degree: 2015, University of Lund

 Recent decades have seen an exponential increase in the functionality of electronic circuits, allowing for continuous innovation, which benefits society. This increase in functionality has… (more)

Subjects/Keywords: Electrical Engineering, Electronic Engineering, Information Engineering; Nano Technology; MOSFET; Metal-oxide-semiconductor field-effect transistor; Transistor; Vertical; InAs; III-V semiconductor; Nanowire; Fabrication; DC; Resistor; TLM; RF; Mixer; Circuit.

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Berg, M. (2015). Vertical InAs Nanowire Devices and RF Circuits. (Doctoral Dissertation). University of Lund. Retrieved from https://lup.lub.lu.se/record/7852217 ; https://portal.research.lu.se/ws/files/3095181/7852390.pdf

Chicago Manual of Style (16th Edition):

Berg, Martin. “Vertical InAs Nanowire Devices and RF Circuits.” 2015. Doctoral Dissertation, University of Lund. Accessed August 15, 2020. https://lup.lub.lu.se/record/7852217 ; https://portal.research.lu.se/ws/files/3095181/7852390.pdf.

MLA Handbook (7th Edition):

Berg, Martin. “Vertical InAs Nanowire Devices and RF Circuits.” 2015. Web. 15 Aug 2020.

Vancouver:

Berg M. Vertical InAs Nanowire Devices and RF Circuits. [Internet] [Doctoral dissertation]. University of Lund; 2015. [cited 2020 Aug 15]. Available from: https://lup.lub.lu.se/record/7852217 ; https://portal.research.lu.se/ws/files/3095181/7852390.pdf.

Council of Science Editors:

Berg M. Vertical InAs Nanowire Devices and RF Circuits. [Doctoral Dissertation]. University of Lund; 2015. Available from: https://lup.lub.lu.se/record/7852217 ; https://portal.research.lu.se/ws/files/3095181/7852390.pdf


University of Lund

15. Jansson, Kristofer. InAs Nanowire Devices and Circuits.

Degree: 2015, University of Lund

 Since the introduction of the transistor and the integrated circuit, the semiconductor industry has developed at a remarkable pace. By continuously fabricating smaller and faster… (more)

Subjects/Keywords: Electrical Engineering, Electronic Engineering, Information Engineering; Nano Technology; Modelling; Circuit; Simulation; Ballistic; Capacitor; Transistor; RF; Band structure; III-V semiconductor; InAs; MOSFET; Metal-oxide-semiconductor field-effect transistor; Nanowire; Amplifier

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APA (6th Edition):

Jansson, K. (2015). InAs Nanowire Devices and Circuits. (Doctoral Dissertation). University of Lund. Retrieved from https://lup.lub.lu.se/record/7760959 ; https://portal.research.lu.se/ws/files/3930350/7760969.pdf

Chicago Manual of Style (16th Edition):

Jansson, Kristofer. “InAs Nanowire Devices and Circuits.” 2015. Doctoral Dissertation, University of Lund. Accessed August 15, 2020. https://lup.lub.lu.se/record/7760959 ; https://portal.research.lu.se/ws/files/3930350/7760969.pdf.

MLA Handbook (7th Edition):

Jansson, Kristofer. “InAs Nanowire Devices and Circuits.” 2015. Web. 15 Aug 2020.

Vancouver:

Jansson K. InAs Nanowire Devices and Circuits. [Internet] [Doctoral dissertation]. University of Lund; 2015. [cited 2020 Aug 15]. Available from: https://lup.lub.lu.se/record/7760959 ; https://portal.research.lu.se/ws/files/3930350/7760969.pdf.

Council of Science Editors:

Jansson K. InAs Nanowire Devices and Circuits. [Doctoral Dissertation]. University of Lund; 2015. Available from: https://lup.lub.lu.se/record/7760959 ; https://portal.research.lu.se/ws/files/3930350/7760969.pdf


North Carolina State University

16. Wang, Jun. Design, Characterization, Modeling and Analysis of High Voltage Silicon Carbide Power Devices.

Degree: PhD, Electrical Engineering, 2010, North Carolina State University

 This research focuses on the design, characterization, modeling and analysis of high voltage Silicon Carbide (SiC) metal-oxide-semiconductor field effect transistors (MOSFET), insulated gate bipolar transistors… (more)

Subjects/Keywords: Emitter Turn-off Thyristor (ETO); Insulated Gate Bipolar Transistor (IGBT); Silicon Carbide (SiC); Metal-Oxide-Semiconductor Field Effect Transistor; Solid-State Transformer (SST)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, J. (2010). Design, Characterization, Modeling and Analysis of High Voltage Silicon Carbide Power Devices. (Doctoral Dissertation). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/4823

Chicago Manual of Style (16th Edition):

Wang, Jun. “Design, Characterization, Modeling and Analysis of High Voltage Silicon Carbide Power Devices.” 2010. Doctoral Dissertation, North Carolina State University. Accessed August 15, 2020. http://www.lib.ncsu.edu/resolver/1840.16/4823.

MLA Handbook (7th Edition):

Wang, Jun. “Design, Characterization, Modeling and Analysis of High Voltage Silicon Carbide Power Devices.” 2010. Web. 15 Aug 2020.

Vancouver:

Wang J. Design, Characterization, Modeling and Analysis of High Voltage Silicon Carbide Power Devices. [Internet] [Doctoral dissertation]. North Carolina State University; 2010. [cited 2020 Aug 15]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/4823.

Council of Science Editors:

Wang J. Design, Characterization, Modeling and Analysis of High Voltage Silicon Carbide Power Devices. [Doctoral Dissertation]. North Carolina State University; 2010. Available from: http://www.lib.ncsu.edu/resolver/1840.16/4823


Indian Institute of Science

17. Ajayan, K R. Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology.

Degree: PhD, Faculty of Engineering, 2018, Indian Institute of Science

 Process variability is a major challenge for the design of nano scale MOSFETs due to fundamental physical limits as well as process control limitations. As… (more)

Subjects/Keywords: Metal Oxide Semiconductors (MOS); Digital Integrated Circuits; Complementary Metal Oxide Semiconductors (CMOS); N-type Metal-Oxide Semiconductors (NMOS); P-type Metal-Oxide Semiconductors (PMOS); Metal Oxode Semiconductor Device Modeling; Look Up Table Model (LUT); Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET); MOSFET Models; BSIM Models; Variability Aware Device Modeling; Integrated Circuit Modeling; Circuit Design; 45nm Analog CMOS Technology; Electrical Communication Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ajayan, K. R. (2018). Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology. (Doctoral Dissertation). Indian Institute of Science. Retrieved from http://etd.iisc.ac.in/handle/2005/3516

Chicago Manual of Style (16th Edition):

Ajayan, K R. “Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology.” 2018. Doctoral Dissertation, Indian Institute of Science. Accessed August 15, 2020. http://etd.iisc.ac.in/handle/2005/3516.

MLA Handbook (7th Edition):

Ajayan, K R. “Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology.” 2018. Web. 15 Aug 2020.

Vancouver:

Ajayan KR. Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology. [Internet] [Doctoral dissertation]. Indian Institute of Science; 2018. [cited 2020 Aug 15]. Available from: http://etd.iisc.ac.in/handle/2005/3516.

Council of Science Editors:

Ajayan KR. Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology. [Doctoral Dissertation]. Indian Institute of Science; 2018. Available from: http://etd.iisc.ac.in/handle/2005/3516


Texas A&M University

18. Jung, Yunbum. High-performance Organic Thin-film Transistor.

Degree: PhD, Electrical Engineering, 2014, Texas A&M University

 Organic compounds have been regarded as insulators for a long time. However, a semi-conductive organic material was discovered in the late 1940s. Since then, many… (more)

Subjects/Keywords: organic semiconductor; organic thin-film transistor (OTFT); organic metal semiconductor field-effect transistor (OMESFET); dual-layer thermal nanoimprint; self-aligned metallization

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jung, Y. (2014). High-performance Organic Thin-film Transistor. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/152553

Chicago Manual of Style (16th Edition):

Jung, Yunbum. “High-performance Organic Thin-film Transistor.” 2014. Doctoral Dissertation, Texas A&M University. Accessed August 15, 2020. http://hdl.handle.net/1969.1/152553.

MLA Handbook (7th Edition):

Jung, Yunbum. “High-performance Organic Thin-film Transistor.” 2014. Web. 15 Aug 2020.

Vancouver:

Jung Y. High-performance Organic Thin-film Transistor. [Internet] [Doctoral dissertation]. Texas A&M University; 2014. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/1969.1/152553.

Council of Science Editors:

Jung Y. High-performance Organic Thin-film Transistor. [Doctoral Dissertation]. Texas A&M University; 2014. Available from: http://hdl.handle.net/1969.1/152553

19. Djezzar, Boualem. Etude des effets NBTI et PBTI sur la fiabilite des dispositifs MOS.

Degree: 2014, Université M'Hamed Bougara Boumerdès

196 p. : ill. ; 30 cm

La miniaturisation des composants électroniques a entraîné une réduction accélérée de l'épaisseur du diélectrique de la grille des… (more)

Subjects/Keywords: MOS (électronique); Transistors MOSFET; Metal oxide semiconductors; Metal oxide semiconductor field-effect transistors

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Djezzar, B. (2014). Etude des effets NBTI et PBTI sur la fiabilite des dispositifs MOS. (Thesis). Université M'Hamed Bougara Boumerdès. Retrieved from http://dlibrary.univ-boumerdes.dz:8080123456789/1437

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Djezzar, Boualem. “Etude des effets NBTI et PBTI sur la fiabilite des dispositifs MOS.” 2014. Thesis, Université M'Hamed Bougara Boumerdès. Accessed August 15, 2020. http://dlibrary.univ-boumerdes.dz:8080123456789/1437.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Djezzar, Boualem. “Etude des effets NBTI et PBTI sur la fiabilite des dispositifs MOS.” 2014. Web. 15 Aug 2020.

Vancouver:

Djezzar B. Etude des effets NBTI et PBTI sur la fiabilite des dispositifs MOS. [Internet] [Thesis]. Université M'Hamed Bougara Boumerdès; 2014. [cited 2020 Aug 15]. Available from: http://dlibrary.univ-boumerdes.dz:8080123456789/1437.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Djezzar B. Etude des effets NBTI et PBTI sur la fiabilite des dispositifs MOS. [Thesis]. Université M'Hamed Bougara Boumerdès; 2014. Available from: http://dlibrary.univ-boumerdes.dz:8080123456789/1437

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

20. Zhou, Xiuju. InGaAs buried channel metal-oxide-semiconductor field-effect transistors for low-power logic applications.

Degree: 2012, Hong Kong University of Science and Technology

 As Silicon complementary-oxide-semiconductor (CMOS) devices scale into the sub-22nm regime, severe short channel effects and power-dissipation constraints lead to huge challenges. To maintain high switching… (more)

Subjects/Keywords: Metal oxide semiconductor field-effect transistors ; Gallium arsenide semiconductors ; Metal oxide semiconductors

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhou, X. (2012). InGaAs buried channel metal-oxide-semiconductor field-effect transistors for low-power logic applications. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-7797 ; https://doi.org/10.14711/thesis-b1198657 ; http://repository.ust.hk/ir/bitstream/1783.1-7797/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhou, Xiuju. “InGaAs buried channel metal-oxide-semiconductor field-effect transistors for low-power logic applications.” 2012. Thesis, Hong Kong University of Science and Technology. Accessed August 15, 2020. http://repository.ust.hk/ir/Record/1783.1-7797 ; https://doi.org/10.14711/thesis-b1198657 ; http://repository.ust.hk/ir/bitstream/1783.1-7797/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhou, Xiuju. “InGaAs buried channel metal-oxide-semiconductor field-effect transistors for low-power logic applications.” 2012. Web. 15 Aug 2020.

Vancouver:

Zhou X. InGaAs buried channel metal-oxide-semiconductor field-effect transistors for low-power logic applications. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2012. [cited 2020 Aug 15]. Available from: http://repository.ust.hk/ir/Record/1783.1-7797 ; https://doi.org/10.14711/thesis-b1198657 ; http://repository.ust.hk/ir/bitstream/1783.1-7797/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhou X. InGaAs buried channel metal-oxide-semiconductor field-effect transistors for low-power logic applications. [Thesis]. Hong Kong University of Science and Technology; 2012. Available from: http://repository.ust.hk/ir/Record/1783.1-7797 ; https://doi.org/10.14711/thesis-b1198657 ; http://repository.ust.hk/ir/bitstream/1783.1-7797/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

21. Jouvet, Nicolas. Intégration hybride de transistors à un électron sur un noeud technologique CMOS : Hybrid integration of single electron transistor on a CMOS technology node.

Degree: Docteur es, Electronique, 2012, INSA Lyon

Cette étude porte sur l’intégration hybride de transistors à un électron (single-electron transistor, SET) dans un noeud technologique CMOS. Les SETs présentent de forts potentiels,… (more)

Subjects/Keywords: Electronique; Circuit intégré Complementary Metal Oxide SemiConductor - CMOS; Transistor MOSFET - Composant à effet de champ à grille isolée; Composant à un électron; Transistor à un électron - SET; Nanotechnologie; Nanodamascène; Caractérisation électrique; Electronics; MOSFET - Metal Oxide SemiConductor Field Effect - Transistor; Single Electron Device; Single-electron Transistor - SET; Nanotechnology; Nanodamascene; Electrical characterisation; 621.381 520 72

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jouvet, N. (2012). Intégration hybride de transistors à un électron sur un noeud technologique CMOS : Hybrid integration of single electron transistor on a CMOS technology node. (Doctoral Dissertation). INSA Lyon. Retrieved from http://www.theses.fr/2012ISAL0114

Chicago Manual of Style (16th Edition):

Jouvet, Nicolas. “Intégration hybride de transistors à un électron sur un noeud technologique CMOS : Hybrid integration of single electron transistor on a CMOS technology node.” 2012. Doctoral Dissertation, INSA Lyon. Accessed August 15, 2020. http://www.theses.fr/2012ISAL0114.

MLA Handbook (7th Edition):

Jouvet, Nicolas. “Intégration hybride de transistors à un électron sur un noeud technologique CMOS : Hybrid integration of single electron transistor on a CMOS technology node.” 2012. Web. 15 Aug 2020.

Vancouver:

Jouvet N. Intégration hybride de transistors à un électron sur un noeud technologique CMOS : Hybrid integration of single electron transistor on a CMOS technology node. [Internet] [Doctoral dissertation]. INSA Lyon; 2012. [cited 2020 Aug 15]. Available from: http://www.theses.fr/2012ISAL0114.

Council of Science Editors:

Jouvet N. Intégration hybride de transistors à un électron sur un noeud technologique CMOS : Hybrid integration of single electron transistor on a CMOS technology node. [Doctoral Dissertation]. INSA Lyon; 2012. Available from: http://www.theses.fr/2012ISAL0114

22. Mellati, Meftah. Negative bias temperature instability modeling for pure-SiO2.

Degree: 2012, Université M'Hamed Bougara Boumerdès

103 p. : ill. ; 30 cm

Negative Bias Temperature Instability (NBTI) is a serious degradation mechanism in nanoscale devices and circuits. It impacts mainly… (more)

Subjects/Keywords: Thermique; Transistors MOSFET; Metal oxide semiconductor field-effect transistors; Heat engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mellati, M. (2012). Negative bias temperature instability modeling for pure-SiO2. (Thesis). Université M'Hamed Bougara Boumerdès. Retrieved from http://dlibrary.univ-boumerdes.dz:8080123456789/1613

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mellati, Meftah. “Negative bias temperature instability modeling for pure-SiO2.” 2012. Thesis, Université M'Hamed Bougara Boumerdès. Accessed August 15, 2020. http://dlibrary.univ-boumerdes.dz:8080123456789/1613.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mellati, Meftah. “Negative bias temperature instability modeling for pure-SiO2.” 2012. Web. 15 Aug 2020.

Vancouver:

Mellati M. Negative bias temperature instability modeling for pure-SiO2. [Internet] [Thesis]. Université M'Hamed Bougara Boumerdès; 2012. [cited 2020 Aug 15]. Available from: http://dlibrary.univ-boumerdes.dz:8080123456789/1613.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mellati M. Negative bias temperature instability modeling for pure-SiO2. [Thesis]. Université M'Hamed Bougara Boumerdès; 2012. Available from: http://dlibrary.univ-boumerdes.dz:8080123456789/1613

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

23. Mellati, Meftah. Negative bias temperature instability modeling for pure-SiO2.

Degree: 2012, Université M'Hamed Bougara Boumerdès

103 p. ; ill. ; 30 cm

Negative Bias Temperature Instability (NBTI) is a serious degradation mechanism in nanoscale devices and circuits. It impacts mainly… (more)

Subjects/Keywords: Thermique; Transistors MOSFET; Metal oxide semiconductor field-effect transistors; Heat engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mellati, M. (2012). Negative bias temperature instability modeling for pure-SiO2. (Thesis). Université M'Hamed Bougara Boumerdès. Retrieved from http://dlibrary.univ-boumerdes.dz:8080/jspui/handle/123456789/1094

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mellati, Meftah. “Negative bias temperature instability modeling for pure-SiO2.” 2012. Thesis, Université M'Hamed Bougara Boumerdès. Accessed August 15, 2020. http://dlibrary.univ-boumerdes.dz:8080/jspui/handle/123456789/1094.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mellati, Meftah. “Negative bias temperature instability modeling for pure-SiO2.” 2012. Web. 15 Aug 2020.

Vancouver:

Mellati M. Negative bias temperature instability modeling for pure-SiO2. [Internet] [Thesis]. Université M'Hamed Bougara Boumerdès; 2012. [cited 2020 Aug 15]. Available from: http://dlibrary.univ-boumerdes.dz:8080/jspui/handle/123456789/1094.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mellati M. Negative bias temperature instability modeling for pure-SiO2. [Thesis]. Université M'Hamed Bougara Boumerdès; 2012. Available from: http://dlibrary.univ-boumerdes.dz:8080/jspui/handle/123456789/1094

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

24. Zhou, Xianda. Novel silicon nitride-based charge trapping gate power semiconductor devices.

Degree: 2013, Hong Kong University of Science and Technology

 Electric energy is essential in industrial and consumer applications. In order to generate, distribute and use electric energy efficiently, power electronic systems are widely used.… (more)

Subjects/Keywords: Power semiconductors ; Metal oxide semiconductor field-effect transistors ; Silicon nitride

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APA (6th Edition):

Zhou, X. (2013). Novel silicon nitride-based charge trapping gate power semiconductor devices. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-92026 ; https://doi.org/10.14711/thesis-b1251117 ; http://repository.ust.hk/ir/bitstream/1783.1-92026/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhou, Xianda. “Novel silicon nitride-based charge trapping gate power semiconductor devices.” 2013. Thesis, Hong Kong University of Science and Technology. Accessed August 15, 2020. http://repository.ust.hk/ir/Record/1783.1-92026 ; https://doi.org/10.14711/thesis-b1251117 ; http://repository.ust.hk/ir/bitstream/1783.1-92026/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhou, Xianda. “Novel silicon nitride-based charge trapping gate power semiconductor devices.” 2013. Web. 15 Aug 2020.

Vancouver:

Zhou X. Novel silicon nitride-based charge trapping gate power semiconductor devices. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2013. [cited 2020 Aug 15]. Available from: http://repository.ust.hk/ir/Record/1783.1-92026 ; https://doi.org/10.14711/thesis-b1251117 ; http://repository.ust.hk/ir/bitstream/1783.1-92026/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhou X. Novel silicon nitride-based charge trapping gate power semiconductor devices. [Thesis]. Hong Kong University of Science and Technology; 2013. Available from: http://repository.ust.hk/ir/Record/1783.1-92026 ; https://doi.org/10.14711/thesis-b1251117 ; http://repository.ust.hk/ir/bitstream/1783.1-92026/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

25. Liu, Xiwen ECE. Dielectric and contact engineering for high-performance two-dimensional molybdenum disulfide MOSFETs.

Degree: 2018, Hong Kong University of Science and Technology

 Molybdenum disulfide (MoS2), among many other atomically thin two-dimensional (2D) materials, has attracted considerable attention over the past years, holding great promise for future applications… (more)

Subjects/Keywords: Molybdenum disulfide ; Metal oxide semiconductor field-effect transistors

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APA (6th Edition):

Liu, X. E. (2018). Dielectric and contact engineering for high-performance two-dimensional molybdenum disulfide MOSFETs. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-95903 ; https://doi.org/10.14711/thesis-991012636968103412 ; http://repository.ust.hk/ir/bitstream/1783.1-95903/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Xiwen ECE. “Dielectric and contact engineering for high-performance two-dimensional molybdenum disulfide MOSFETs.” 2018. Thesis, Hong Kong University of Science and Technology. Accessed August 15, 2020. http://repository.ust.hk/ir/Record/1783.1-95903 ; https://doi.org/10.14711/thesis-991012636968103412 ; http://repository.ust.hk/ir/bitstream/1783.1-95903/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Xiwen ECE. “Dielectric and contact engineering for high-performance two-dimensional molybdenum disulfide MOSFETs.” 2018. Web. 15 Aug 2020.

Vancouver:

Liu XE. Dielectric and contact engineering for high-performance two-dimensional molybdenum disulfide MOSFETs. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2018. [cited 2020 Aug 15]. Available from: http://repository.ust.hk/ir/Record/1783.1-95903 ; https://doi.org/10.14711/thesis-991012636968103412 ; http://repository.ust.hk/ir/bitstream/1783.1-95903/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu XE. Dielectric and contact engineering for high-performance two-dimensional molybdenum disulfide MOSFETs. [Thesis]. Hong Kong University of Science and Technology; 2018. Available from: http://repository.ust.hk/ir/Record/1783.1-95903 ; https://doi.org/10.14711/thesis-991012636968103412 ; http://repository.ust.hk/ir/bitstream/1783.1-95903/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

26. Hu, Yaoqiao. MoS₂/dielectric stack optimization for high performance metal-oxide-semiconductor field-effect transistor.

Degree: 2018, Hong Kong University of Science and Technology

 With a sizable bandgap and a high degree of electrostatic gate control, ultrathin two-dimensional (2D) molybdenum disulfide (MoS2) have recently gained tremendous interest for flexible… (more)

Subjects/Keywords: Molybdenum disulfide ; Metal oxide semiconductor field-effect transistors

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APA (6th Edition):

Hu, Y. (2018). MoS₂/dielectric stack optimization for high performance metal-oxide-semiconductor field-effect transistor. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-95899 ; https://doi.org/10.14711/thesis-991012637367703412 ; http://repository.ust.hk/ir/bitstream/1783.1-95899/2/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hu, Yaoqiao. “MoS₂/dielectric stack optimization for high performance metal-oxide-semiconductor field-effect transistor.” 2018. Thesis, Hong Kong University of Science and Technology. Accessed August 15, 2020. http://repository.ust.hk/ir/Record/1783.1-95899 ; https://doi.org/10.14711/thesis-991012637367703412 ; http://repository.ust.hk/ir/bitstream/1783.1-95899/2/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hu, Yaoqiao. “MoS₂/dielectric stack optimization for high performance metal-oxide-semiconductor field-effect transistor.” 2018. Web. 15 Aug 2020.

Vancouver:

Hu Y. MoS₂/dielectric stack optimization for high performance metal-oxide-semiconductor field-effect transistor. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2018. [cited 2020 Aug 15]. Available from: http://repository.ust.hk/ir/Record/1783.1-95899 ; https://doi.org/10.14711/thesis-991012637367703412 ; http://repository.ust.hk/ir/bitstream/1783.1-95899/2/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hu Y. MoS₂/dielectric stack optimization for high performance metal-oxide-semiconductor field-effect transistor. [Thesis]. Hong Kong University of Science and Technology; 2018. Available from: http://repository.ust.hk/ir/Record/1783.1-95899 ; https://doi.org/10.14711/thesis-991012637367703412 ; http://repository.ust.hk/ir/bitstream/1783.1-95899/2/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Virginia Tech

27. Raszmann, Emma Barbara. Series-Connection of Silicon Carbide MOSFET Modules using Active Gate-Drivers with dv/dt Control.

Degree: MS, Electrical Engineering, 2019, Virginia Tech

 According to ABB, 40% of the world's power demand is supplied by electrical energy. Specifically, in 2018, the world's electrical demand has grown by 4%… (more)

Subjects/Keywords: series-connected devices; silicon carbide (SiC); metal-oxide-semiconductor field-effect transistor (MOSFET); gate-driver design; active gate control; active dv/dt control; medium-voltage; voltage balancing

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Raszmann, E. B. (2019). Series-Connection of Silicon Carbide MOSFET Modules using Active Gate-Drivers with dv/dt Control. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/95938

Chicago Manual of Style (16th Edition):

Raszmann, Emma Barbara. “Series-Connection of Silicon Carbide MOSFET Modules using Active Gate-Drivers with dv/dt Control.” 2019. Masters Thesis, Virginia Tech. Accessed August 15, 2020. http://hdl.handle.net/10919/95938.

MLA Handbook (7th Edition):

Raszmann, Emma Barbara. “Series-Connection of Silicon Carbide MOSFET Modules using Active Gate-Drivers with dv/dt Control.” 2019. Web. 15 Aug 2020.

Vancouver:

Raszmann EB. Series-Connection of Silicon Carbide MOSFET Modules using Active Gate-Drivers with dv/dt Control. [Internet] [Masters thesis]. Virginia Tech; 2019. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/10919/95938.

Council of Science Editors:

Raszmann EB. Series-Connection of Silicon Carbide MOSFET Modules using Active Gate-Drivers with dv/dt Control. [Masters Thesis]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/95938


Columbia University

28. Warren, Steven Benjamin. CMOS Integration of Single-Molecule Field-Effect Transistors.

Degree: 2016, Columbia University

 Point functionalized carbon nanotubes have recently demonstrated the ability to serve as single-molecule biosensors. Operating as single-molecule Field-Effect Transistors (smFET), the sensors have been used… (more)

Subjects/Keywords: Field-effect transistors; Metal oxide semiconductor field-effect transistors; Carbon nanotubes; Biosensors; Metal oxide semiconductors, Complementary; Electrical engineering

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APA (6th Edition):

Warren, S. B. (2016). CMOS Integration of Single-Molecule Field-Effect Transistors. (Doctoral Dissertation). Columbia University. Retrieved from https://doi.org/10.7916/D8K937R9

Chicago Manual of Style (16th Edition):

Warren, Steven Benjamin. “CMOS Integration of Single-Molecule Field-Effect Transistors.” 2016. Doctoral Dissertation, Columbia University. Accessed August 15, 2020. https://doi.org/10.7916/D8K937R9.

MLA Handbook (7th Edition):

Warren, Steven Benjamin. “CMOS Integration of Single-Molecule Field-Effect Transistors.” 2016. Web. 15 Aug 2020.

Vancouver:

Warren SB. CMOS Integration of Single-Molecule Field-Effect Transistors. [Internet] [Doctoral dissertation]. Columbia University; 2016. [cited 2020 Aug 15]. Available from: https://doi.org/10.7916/D8K937R9.

Council of Science Editors:

Warren SB. CMOS Integration of Single-Molecule Field-Effect Transistors. [Doctoral Dissertation]. Columbia University; 2016. Available from: https://doi.org/10.7916/D8K937R9


Virginia Tech

29. Nguyen, Peter Dinh. Heteroepitaxial Ge on Si via High-Bandgap III-V Buffers for Low-Power Electronic Applications.

Degree: MS, Electrical and Computer Engineering, 2016, Virginia Tech

 Over the past four decades, aggressive scaling of silicon (Si) based complementary metal-oxide-semiconductor (CMOS) transistors has resulted in an exponential increase in device density, and… (more)

Subjects/Keywords: Germanium; III-V; Metal-Oxide-Semiconductor Devices; Metal-Oxide-Semiconductor Field-Effect Transistors; Heterogeneous Integration; Silicon

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APA (6th Edition):

Nguyen, P. D. (2016). Heteroepitaxial Ge on Si via High-Bandgap III-V Buffers for Low-Power Electronic Applications. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/71422

Chicago Manual of Style (16th Edition):

Nguyen, Peter Dinh. “Heteroepitaxial Ge on Si via High-Bandgap III-V Buffers for Low-Power Electronic Applications.” 2016. Masters Thesis, Virginia Tech. Accessed August 15, 2020. http://hdl.handle.net/10919/71422.

MLA Handbook (7th Edition):

Nguyen, Peter Dinh. “Heteroepitaxial Ge on Si via High-Bandgap III-V Buffers for Low-Power Electronic Applications.” 2016. Web. 15 Aug 2020.

Vancouver:

Nguyen PD. Heteroepitaxial Ge on Si via High-Bandgap III-V Buffers for Low-Power Electronic Applications. [Internet] [Masters thesis]. Virginia Tech; 2016. [cited 2020 Aug 15]. Available from: http://hdl.handle.net/10919/71422.

Council of Science Editors:

Nguyen PD. Heteroepitaxial Ge on Si via High-Bandgap III-V Buffers for Low-Power Electronic Applications. [Masters Thesis]. Virginia Tech; 2016. Available from: http://hdl.handle.net/10919/71422


Hong Kong University of Science and Technology

30. Li, Qiang. Heteroepitaxy optimization of InP on planar and nanopatterned Si substrates for transistors by MOCVD.

Degree: 2014, Hong Kong University of Science and Technology

 After more than 40 years’ transistor scaling, Si CMOS technology has enabled state-of-the-art microprocessors with large-volume, low-cost production and high-level integration. Meanwhile, InP based transistor(more)

Subjects/Keywords: Indium phosphide ; Inhomogeneous materials ; Metal organic chemical vapor deposition ; Metal oxide semiconductor field-effect transistors

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, Q. (2014). Heteroepitaxy optimization of InP on planar and nanopatterned Si substrates for transistors by MOCVD. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-92029 ; https://doi.org/10.14711/thesis-b1301489 ; http://repository.ust.hk/ir/bitstream/1783.1-92029/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Qiang. “Heteroepitaxy optimization of InP on planar and nanopatterned Si substrates for transistors by MOCVD.” 2014. Thesis, Hong Kong University of Science and Technology. Accessed August 15, 2020. http://repository.ust.hk/ir/Record/1783.1-92029 ; https://doi.org/10.14711/thesis-b1301489 ; http://repository.ust.hk/ir/bitstream/1783.1-92029/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Qiang. “Heteroepitaxy optimization of InP on planar and nanopatterned Si substrates for transistors by MOCVD.” 2014. Web. 15 Aug 2020.

Vancouver:

Li Q. Heteroepitaxy optimization of InP on planar and nanopatterned Si substrates for transistors by MOCVD. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2014. [cited 2020 Aug 15]. Available from: http://repository.ust.hk/ir/Record/1783.1-92029 ; https://doi.org/10.14711/thesis-b1301489 ; http://repository.ust.hk/ir/bitstream/1783.1-92029/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li Q. Heteroepitaxy optimization of InP on planar and nanopatterned Si substrates for transistors by MOCVD. [Thesis]. Hong Kong University of Science and Technology; 2014. Available from: http://repository.ust.hk/ir/Record/1783.1-92029 ; https://doi.org/10.14711/thesis-b1301489 ; http://repository.ust.hk/ir/bitstream/1783.1-92029/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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