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You searched for subject:(leakage current). Showing records 1 – 30 of 116 total matches.

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Dalhousie University

1. Rastmanesh, Maziar. HIGH EFFICIENCY RF TO DC CONVERTER WITH REDUCED LEAKAGE CURRENT FOR RFID APPLICATIONS.

Degree: Master of Applied Science, Department of Electrical & Computer Engineering, 2013, Dalhousie University

 This thesis presents a high efficiency RF to DC converter for RFID applications. The proposed circuit has been designed in 90 nm CMOS technology using… (more)

Subjects/Keywords: RF POWER HARVEST; EFFICIENCY; LEAKAGE CURRENT

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rastmanesh, M. (2013). HIGH EFFICIENCY RF TO DC CONVERTER WITH REDUCED LEAKAGE CURRENT FOR RFID APPLICATIONS. (Masters Thesis). Dalhousie University. Retrieved from http://hdl.handle.net/10222/21831

Chicago Manual of Style (16th Edition):

Rastmanesh, Maziar. “HIGH EFFICIENCY RF TO DC CONVERTER WITH REDUCED LEAKAGE CURRENT FOR RFID APPLICATIONS.” 2013. Masters Thesis, Dalhousie University. Accessed August 12, 2020. http://hdl.handle.net/10222/21831.

MLA Handbook (7th Edition):

Rastmanesh, Maziar. “HIGH EFFICIENCY RF TO DC CONVERTER WITH REDUCED LEAKAGE CURRENT FOR RFID APPLICATIONS.” 2013. Web. 12 Aug 2020.

Vancouver:

Rastmanesh M. HIGH EFFICIENCY RF TO DC CONVERTER WITH REDUCED LEAKAGE CURRENT FOR RFID APPLICATIONS. [Internet] [Masters thesis]. Dalhousie University; 2013. [cited 2020 Aug 12]. Available from: http://hdl.handle.net/10222/21831.

Council of Science Editors:

Rastmanesh M. HIGH EFFICIENCY RF TO DC CONVERTER WITH REDUCED LEAKAGE CURRENT FOR RFID APPLICATIONS. [Masters Thesis]. Dalhousie University; 2013. Available from: http://hdl.handle.net/10222/21831


University of Minnesota

2. Dalal, Hussain Firoz. Implementation of on-chip thermal sensor using off-leakage current of a transistor.

Degree: MS, Electrical Engineering, 2010, University of Minnesota

University of Minnesota M.S. thesis. January 2010. Major: Electrical Engineering. Advisor: Chris H. Kim. 1 computer file (PDF); ii, 38 pages. Ill. (some col.)

Abstract summary not available

Advisors/Committee Members: Chris H. Kim.

Subjects/Keywords: VLSI; CMOS; Leakage Current; Electrical Engineering

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APA (6th Edition):

Dalal, H. F. (2010). Implementation of on-chip thermal sensor using off-leakage current of a transistor. (Masters Thesis). University of Minnesota. Retrieved from http://purl.umn.edu/59772

Chicago Manual of Style (16th Edition):

Dalal, Hussain Firoz. “Implementation of on-chip thermal sensor using off-leakage current of a transistor.” 2010. Masters Thesis, University of Minnesota. Accessed August 12, 2020. http://purl.umn.edu/59772.

MLA Handbook (7th Edition):

Dalal, Hussain Firoz. “Implementation of on-chip thermal sensor using off-leakage current of a transistor.” 2010. Web. 12 Aug 2020.

Vancouver:

Dalal HF. Implementation of on-chip thermal sensor using off-leakage current of a transistor. [Internet] [Masters thesis]. University of Minnesota; 2010. [cited 2020 Aug 12]. Available from: http://purl.umn.edu/59772.

Council of Science Editors:

Dalal HF. Implementation of on-chip thermal sensor using off-leakage current of a transistor. [Masters Thesis]. University of Minnesota; 2010. Available from: http://purl.umn.edu/59772


NSYSU

3. Liao, Chiang-Hsiang. Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation.

Degree: Master, Electrical Engineering, 2014, NSYSU

 This thesis is composed of a biomedical sensing system design and a novel circuit design of 5T SRAM (static random access memory, SRAM). The first… (more)

Subjects/Keywords: leakage current sensor; SRAM; readout circuit

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APA (6th Edition):

Liao, C. (2014). Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135024

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liao, Chiang-Hsiang. “Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation.” 2014. Thesis, NSYSU. Accessed August 12, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135024.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liao, Chiang-Hsiang. “Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation.” 2014. Web. 12 Aug 2020.

Vancouver:

Liao C. Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation. [Internet] [Thesis]. NSYSU; 2014. [cited 2020 Aug 12]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135024.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liao C. Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation. [Thesis]. NSYSU; 2014. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135024

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Addis Ababa University

4. Tsegu, Worku. Analysis of Electromagnetic Emission from Contact lines of Light Rail Transit System .

Degree: 2014, Addis Ababa University

 The implementation of Light Rail Transit System (LRTS) as an integrated form of public transportation, with the rail corridor running through city centers and connecting… (more)

Subjects/Keywords: Electromagnetic field; Electromagnetic compatibility; Pantograph arcing; leakage current; feeder current

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APA (6th Edition):

Tsegu, W. (2014). Analysis of Electromagnetic Emission from Contact lines of Light Rail Transit System . (Thesis). Addis Ababa University. Retrieved from http://etd.aau.edu.et/dspace/handle/123456789/6427

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tsegu, Worku. “Analysis of Electromagnetic Emission from Contact lines of Light Rail Transit System .” 2014. Thesis, Addis Ababa University. Accessed August 12, 2020. http://etd.aau.edu.et/dspace/handle/123456789/6427.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tsegu, Worku. “Analysis of Electromagnetic Emission from Contact lines of Light Rail Transit System .” 2014. Web. 12 Aug 2020.

Vancouver:

Tsegu W. Analysis of Electromagnetic Emission from Contact lines of Light Rail Transit System . [Internet] [Thesis]. Addis Ababa University; 2014. [cited 2020 Aug 12]. Available from: http://etd.aau.edu.et/dspace/handle/123456789/6427.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tsegu W. Analysis of Electromagnetic Emission from Contact lines of Light Rail Transit System . [Thesis]. Addis Ababa University; 2014. Available from: http://etd.aau.edu.et/dspace/handle/123456789/6427

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Univerzitet u Beogradu

5. Dobrić, Goran J., 1986-. Мониторинг и дијагностика стања металоксидних одводника пренапона на бази анализе струје одвођења при радном напону мреже.

Degree: Elektrotehnički fakultet, 2016, Univerzitet u Beogradu

Техничке науке – Електротехника - Електроенергетски системи / Technical science – Electrical engineering - Power systems

Сигурно и поуздано снабдевање електричном енергијом је један од… (more)

Subjects/Keywords: MOSA monitoring and diagnostics; leakage current; genetic algorithm; voltage-current characteristic

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APA (6th Edition):

Dobrić, Goran J., 1. (2016). Мониторинг и дијагностика стања металоксидних одводника пренапона на бази анализе струје одвођења при радном напону мреже. (Thesis). Univerzitet u Beogradu. Retrieved from https://fedorabg.bg.ac.rs/fedora/get/o:14199/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Dobrić, Goran J., 1986-. “Мониторинг и дијагностика стања металоксидних одводника пренапона на бази анализе струје одвођења при радном напону мреже.” 2016. Thesis, Univerzitet u Beogradu. Accessed August 12, 2020. https://fedorabg.bg.ac.rs/fedora/get/o:14199/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Dobrić, Goran J., 1986-. “Мониторинг и дијагностика стања металоксидних одводника пренапона на бази анализе струје одвођења при радном напону мреже.” 2016. Web. 12 Aug 2020.

Vancouver:

Dobrić, Goran J. 1. Мониторинг и дијагностика стања металоксидних одводника пренапона на бази анализе струје одвођења при радном напону мреже. [Internet] [Thesis]. Univerzitet u Beogradu; 2016. [cited 2020 Aug 12]. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:14199/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Dobrić, Goran J. 1. Мониторинг и дијагностика стања металоксидних одводника пренапона на бази анализе струје одвођења при радном напону мреже. [Thesis]. Univerzitet u Beogradu; 2016. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:14199/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Cincinnati

6. Ravi, Ajaay. Run-Time Active Leakage Control Mechanism based on a Light Threshold Voltage Hopping Technique (LITHE).

Degree: MS, Engineering and Applied Science: Computer Engineering, 2011, University of Cincinnati

Leakage aware designs are an indispensable part of the design and manufacturing process in today’s deep sub-micron technologies. Technology scaling continues to be a… (more)

Subjects/Keywords: Computer Engineering; Leakage Power Reduction; Run-Time Active Leakage Control; Threshold Voltage Hopping; Substrate Biasing; LITHE; Steady state leakage current reduction

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APA (6th Edition):

Ravi, A. (2011). Run-Time Active Leakage Control Mechanism based on a Light Threshold Voltage Hopping Technique (LITHE). (Masters Thesis). University of Cincinnati. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=ucin1302550444

Chicago Manual of Style (16th Edition):

Ravi, Ajaay. “Run-Time Active Leakage Control Mechanism based on a Light Threshold Voltage Hopping Technique (LITHE).” 2011. Masters Thesis, University of Cincinnati. Accessed August 12, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1302550444.

MLA Handbook (7th Edition):

Ravi, Ajaay. “Run-Time Active Leakage Control Mechanism based on a Light Threshold Voltage Hopping Technique (LITHE).” 2011. Web. 12 Aug 2020.

Vancouver:

Ravi A. Run-Time Active Leakage Control Mechanism based on a Light Threshold Voltage Hopping Technique (LITHE). [Internet] [Masters thesis]. University of Cincinnati; 2011. [cited 2020 Aug 12]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=ucin1302550444.

Council of Science Editors:

Ravi A. Run-Time Active Leakage Control Mechanism based on a Light Threshold Voltage Hopping Technique (LITHE). [Masters Thesis]. University of Cincinnati; 2011. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=ucin1302550444


University of Kentucky

7. Wang, Yichun. LEAKAGE CURRENT REDUCTION OF MOS CAPACITOR INDUCED BY RAPID THERMAL PROCESSING.

Degree: 2010, University of Kentucky

 With the MOSFET scaling practice, the performance of IC devices is improved tremendously as we experienced in the last decades. However, the small semiconductor devices… (more)

Subjects/Keywords: Rapid Thermal Processing|MOS capacitors|gate leakage current|Phonon Energy Coupling Enhancement effect|leakage current reduction; Electrical and Computer Engineering

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APA (6th Edition):

Wang, Y. (2010). LEAKAGE CURRENT REDUCTION OF MOS CAPACITOR INDUCED BY RAPID THERMAL PROCESSING. (Masters Thesis). University of Kentucky. Retrieved from http://uknowledge.uky.edu/gradschool_theses/640

Chicago Manual of Style (16th Edition):

Wang, Yichun. “LEAKAGE CURRENT REDUCTION OF MOS CAPACITOR INDUCED BY RAPID THERMAL PROCESSING.” 2010. Masters Thesis, University of Kentucky. Accessed August 12, 2020. http://uknowledge.uky.edu/gradschool_theses/640.

MLA Handbook (7th Edition):

Wang, Yichun. “LEAKAGE CURRENT REDUCTION OF MOS CAPACITOR INDUCED BY RAPID THERMAL PROCESSING.” 2010. Web. 12 Aug 2020.

Vancouver:

Wang Y. LEAKAGE CURRENT REDUCTION OF MOS CAPACITOR INDUCED BY RAPID THERMAL PROCESSING. [Internet] [Masters thesis]. University of Kentucky; 2010. [cited 2020 Aug 12]. Available from: http://uknowledge.uky.edu/gradschool_theses/640.

Council of Science Editors:

Wang Y. LEAKAGE CURRENT REDUCTION OF MOS CAPACITOR INDUCED BY RAPID THERMAL PROCESSING. [Masters Thesis]. University of Kentucky; 2010. Available from: http://uknowledge.uky.edu/gradschool_theses/640


NSYSU

8. Chen, Sih-Yu. Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit.

Degree: Master, Electrical Engineering, 2013, NSYSU

 This thesis consists of two topics, including a single-ended disturb-free 5T load-less 4Kb SRAM, and the leakage current sensor and compensation circuit mainly designed for… (more)

Subjects/Keywords: single-ended; leakage current sensor; power-delay product; load-less; disturb-free; leakage current compensation circuit

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APA (6th Edition):

Chen, S. (2013). Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Sih-Yu. “Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit.” 2013. Thesis, NSYSU. Accessed August 12, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Sih-Yu. “Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit.” 2013. Web. 12 Aug 2020.

Vancouver:

Chen S. Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Aug 12]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen S. Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of California – Berkeley

9. Alarcon, Louis Poblete. Sense Amplifier-Based Pass Transistor Logic.

Degree: Electrical Engineering & Computer Sciences, 2010, University of California – Berkeley

 Reducing the energy required per operation is the key to building ultra-low energy systems, and the most effective way of achieving this is to reduce… (more)

Subjects/Keywords: Electrical Engineering; leakage current; low energy; pass transistor; SAPTL

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APA (6th Edition):

Alarcon, L. P. (2010). Sense Amplifier-Based Pass Transistor Logic. (Thesis). University of California – Berkeley. Retrieved from http://www.escholarship.org/uc/item/56j514mt

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Alarcon, Louis Poblete. “Sense Amplifier-Based Pass Transistor Logic.” 2010. Thesis, University of California – Berkeley. Accessed August 12, 2020. http://www.escholarship.org/uc/item/56j514mt.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Alarcon, Louis Poblete. “Sense Amplifier-Based Pass Transistor Logic.” 2010. Web. 12 Aug 2020.

Vancouver:

Alarcon LP. Sense Amplifier-Based Pass Transistor Logic. [Internet] [Thesis]. University of California – Berkeley; 2010. [cited 2020 Aug 12]. Available from: http://www.escholarship.org/uc/item/56j514mt.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Alarcon LP. Sense Amplifier-Based Pass Transistor Logic. [Thesis]. University of California – Berkeley; 2010. Available from: http://www.escholarship.org/uc/item/56j514mt

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Pinheiro, Walter. A corrente de fuga como parâmetro indicativo do estado de degradação de materiais poliméricos de rede compacta de média tensão, instalados em ambientes agressivos.

Degree: PhD, Sistemas de Potência, 2008, University of São Paulo

Este trabalho apresenta os resultados obtidos em uma pesquisa, visando utilizar a corrente de fuga como parâmetro indicativo do estado de degradação de materiais poliméricos… (more)

Subjects/Keywords: Erosion; Leakage current; Pollution; Redes de distribuição de energia elétrica

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APA (6th Edition):

Pinheiro, W. (2008). A corrente de fuga como parâmetro indicativo do estado de degradação de materiais poliméricos de rede compacta de média tensão, instalados em ambientes agressivos. (Doctoral Dissertation). University of São Paulo. Retrieved from http://www.teses.usp.br/teses/disponiveis/3/3143/tde-15082008-174328/ ;

Chicago Manual of Style (16th Edition):

Pinheiro, Walter. “A corrente de fuga como parâmetro indicativo do estado de degradação de materiais poliméricos de rede compacta de média tensão, instalados em ambientes agressivos.” 2008. Doctoral Dissertation, University of São Paulo. Accessed August 12, 2020. http://www.teses.usp.br/teses/disponiveis/3/3143/tde-15082008-174328/ ;.

MLA Handbook (7th Edition):

Pinheiro, Walter. “A corrente de fuga como parâmetro indicativo do estado de degradação de materiais poliméricos de rede compacta de média tensão, instalados em ambientes agressivos.” 2008. Web. 12 Aug 2020.

Vancouver:

Pinheiro W. A corrente de fuga como parâmetro indicativo do estado de degradação de materiais poliméricos de rede compacta de média tensão, instalados em ambientes agressivos. [Internet] [Doctoral dissertation]. University of São Paulo; 2008. [cited 2020 Aug 12]. Available from: http://www.teses.usp.br/teses/disponiveis/3/3143/tde-15082008-174328/ ;.

Council of Science Editors:

Pinheiro W. A corrente de fuga como parâmetro indicativo do estado de degradação de materiais poliméricos de rede compacta de média tensão, instalados em ambientes agressivos. [Doctoral Dissertation]. University of São Paulo; 2008. Available from: http://www.teses.usp.br/teses/disponiveis/3/3143/tde-15082008-174328/ ;


University of Rochester

11. Pedrazzani, Janet Renee (1970 - ). Characteristics of InAs-based nBn photodetectors grown by molecular beam epitaxy.

Degree: PhD, 2010, University of Rochester

 The nBn photodetector design specifies an n-type absorption layer, a Barrier layer to majority carrier electrons, and an n-type contact layer. The absence of a… (more)

Subjects/Keywords: InAs; AIAsSb; MWIR; nBn; Photodetector; Diffusion length; Surface leakage current

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Pedrazzani, J. R. (. -. ). (2010). Characteristics of InAs-based nBn photodetectors grown by molecular beam epitaxy. (Doctoral Dissertation). University of Rochester. Retrieved from http://hdl.handle.net/1802/12773

Chicago Manual of Style (16th Edition):

Pedrazzani, Janet Renee (1970 - ). “Characteristics of InAs-based nBn photodetectors grown by molecular beam epitaxy.” 2010. Doctoral Dissertation, University of Rochester. Accessed August 12, 2020. http://hdl.handle.net/1802/12773.

MLA Handbook (7th Edition):

Pedrazzani, Janet Renee (1970 - ). “Characteristics of InAs-based nBn photodetectors grown by molecular beam epitaxy.” 2010. Web. 12 Aug 2020.

Vancouver:

Pedrazzani JR(-). Characteristics of InAs-based nBn photodetectors grown by molecular beam epitaxy. [Internet] [Doctoral dissertation]. University of Rochester; 2010. [cited 2020 Aug 12]. Available from: http://hdl.handle.net/1802/12773.

Council of Science Editors:

Pedrazzani JR(-). Characteristics of InAs-based nBn photodetectors grown by molecular beam epitaxy. [Doctoral Dissertation]. University of Rochester; 2010. Available from: http://hdl.handle.net/1802/12773


NSYSU

12. Teng, Yu-Lin. A 2xVDD I/O Buffer with Slew Rate Compensation.

Degree: Master, Electrical Engineering, 2016, NSYSU

 Output buffer is the interface between one chip and another. With advancement of semiconductor manufacturing technologies, the quality of data transmission affected by the environmental… (more)

Subjects/Keywords: I/O buffer; PV variation; slew rate; mixed-voltage; leakage current

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APA (6th Edition):

Teng, Y. (2016). A 2xVDD I/O Buffer with Slew Rate Compensation. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0924116-143030

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Teng, Yu-Lin. “A 2xVDD I/O Buffer with Slew Rate Compensation.” 2016. Thesis, NSYSU. Accessed August 12, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0924116-143030.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Teng, Yu-Lin. “A 2xVDD I/O Buffer with Slew Rate Compensation.” 2016. Web. 12 Aug 2020.

Vancouver:

Teng Y. A 2xVDD I/O Buffer with Slew Rate Compensation. [Internet] [Thesis]. NSYSU; 2016. [cited 2020 Aug 12]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0924116-143030.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Teng Y. A 2xVDD I/O Buffer with Slew Rate Compensation. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0924116-143030

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of New South Wales

13. Moghe, Yashodhan. DC Current Measurement Systems for Neurostimulator Implants.

Degree: Electrical Engineering & Telecommunications, 2014, University of New South Wales

 This research explores methods of accurately measuring DC current flowing in a circuit sub-block or an entire chip. The major application demonstrated is a novel… (more)

Subjects/Keywords: Level shifter high voltage; DC current leakage detection; Implant neurostimulator biomedical

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APA (6th Edition):

Moghe, Y. (2014). DC Current Measurement Systems for Neurostimulator Implants. (Doctoral Dissertation). University of New South Wales. Retrieved from http://handle.unsw.edu.au/1959.4/53603 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:12298/SOURCE02?view=true

Chicago Manual of Style (16th Edition):

Moghe, Yashodhan. “DC Current Measurement Systems for Neurostimulator Implants.” 2014. Doctoral Dissertation, University of New South Wales. Accessed August 12, 2020. http://handle.unsw.edu.au/1959.4/53603 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:12298/SOURCE02?view=true.

MLA Handbook (7th Edition):

Moghe, Yashodhan. “DC Current Measurement Systems for Neurostimulator Implants.” 2014. Web. 12 Aug 2020.

Vancouver:

Moghe Y. DC Current Measurement Systems for Neurostimulator Implants. [Internet] [Doctoral dissertation]. University of New South Wales; 2014. [cited 2020 Aug 12]. Available from: http://handle.unsw.edu.au/1959.4/53603 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:12298/SOURCE02?view=true.

Council of Science Editors:

Moghe Y. DC Current Measurement Systems for Neurostimulator Implants. [Doctoral Dissertation]. University of New South Wales; 2014. Available from: http://handle.unsw.edu.au/1959.4/53603 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:12298/SOURCE02?view=true


King Abdullah University of Science and Technology

14. Li, Yangyang. Characterization, Microstructure, and Dielectric properties of cubic pyrochlore structural ceramics.

Degree: 2013, King Abdullah University of Science and Technology

 The (BMN) bulk materials were sintered at 1050°C, 1100°C, 1150°C, 1200°C by the conventional ceramic process, and their microstructure and dielectric properties were investigated by… (more)

Subjects/Keywords: cubic pyrochlore; dielectric constant; loss tangent; leakage current

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APA (6th Edition):

Li, Y. (2013). Characterization, Microstructure, and Dielectric properties of cubic pyrochlore structural ceramics. (Thesis). King Abdullah University of Science and Technology. Retrieved from http://hdl.handle.net/10754/293689

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Yangyang. “Characterization, Microstructure, and Dielectric properties of cubic pyrochlore structural ceramics.” 2013. Thesis, King Abdullah University of Science and Technology. Accessed August 12, 2020. http://hdl.handle.net/10754/293689.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Yangyang. “Characterization, Microstructure, and Dielectric properties of cubic pyrochlore structural ceramics.” 2013. Web. 12 Aug 2020.

Vancouver:

Li Y. Characterization, Microstructure, and Dielectric properties of cubic pyrochlore structural ceramics. [Internet] [Thesis]. King Abdullah University of Science and Technology; 2013. [cited 2020 Aug 12]. Available from: http://hdl.handle.net/10754/293689.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li Y. Characterization, Microstructure, and Dielectric properties of cubic pyrochlore structural ceramics. [Thesis]. King Abdullah University of Science and Technology; 2013. Available from: http://hdl.handle.net/10754/293689

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

15. Wagné, Carl. Electric conductivity measurements including the semiconductor-insulator interface from HVDC cables .

Degree: Chalmers tekniska högskola / Institutionen för elektroteknik, 2019, Chalmers University of Technology

 As global power consumption increases along with increased demands for renewable energy, additional expansions of the existing power grids are required. Extruded HVDC cable systems… (more)

Subjects/Keywords: HVDC; XLPE; cable peeling; press-moulded; leakage current; conductivity

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APA (6th Edition):

Wagné, C. (2019). Electric conductivity measurements including the semiconductor-insulator interface from HVDC cables . (Thesis). Chalmers University of Technology. Retrieved from http://hdl.handle.net/20.500.12380/300409

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wagné, Carl. “Electric conductivity measurements including the semiconductor-insulator interface from HVDC cables .” 2019. Thesis, Chalmers University of Technology. Accessed August 12, 2020. http://hdl.handle.net/20.500.12380/300409.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wagné, Carl. “Electric conductivity measurements including the semiconductor-insulator interface from HVDC cables .” 2019. Web. 12 Aug 2020.

Vancouver:

Wagné C. Electric conductivity measurements including the semiconductor-insulator interface from HVDC cables . [Internet] [Thesis]. Chalmers University of Technology; 2019. [cited 2020 Aug 12]. Available from: http://hdl.handle.net/20.500.12380/300409.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wagné C. Electric conductivity measurements including the semiconductor-insulator interface from HVDC cables . [Thesis]. Chalmers University of Technology; 2019. Available from: http://hdl.handle.net/20.500.12380/300409

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


IUPUI

16. Gopinath, Anoop. Low-power hybrid TFET-CMOS memory.

Degree: 2018, IUPUI

Indiana University-Purdue University Indianapolis (IUPUI)

Gopinath, Anoop. M.S.E.C.E., Purdue University, May 2018. Low-Power Hybrid TFET-CMOS Memory. Major Professor: Maher E. Rizkalla. The power consumption and… (more)

Subjects/Keywords: TFET; SRAM; Leakage Current; Static Power; GaN TFET

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APA (6th Edition):

Gopinath, A. (2018). Low-power hybrid TFET-CMOS memory. (Thesis). IUPUI. Retrieved from http://hdl.handle.net/1805/15926

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gopinath, Anoop. “Low-power hybrid TFET-CMOS memory.” 2018. Thesis, IUPUI. Accessed August 12, 2020. http://hdl.handle.net/1805/15926.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gopinath, Anoop. “Low-power hybrid TFET-CMOS memory.” 2018. Web. 12 Aug 2020.

Vancouver:

Gopinath A. Low-power hybrid TFET-CMOS memory. [Internet] [Thesis]. IUPUI; 2018. [cited 2020 Aug 12]. Available from: http://hdl.handle.net/1805/15926.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gopinath A. Low-power hybrid TFET-CMOS memory. [Thesis]. IUPUI; 2018. Available from: http://hdl.handle.net/1805/15926

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Tennessee – Knoxville

17. Womac, Austin James. The Characterization of a CMOS Radiation Hardened-by-Design Circuit Technique.

Degree: MS, Electrical Engineering, 2013, University of Tennessee – Knoxville

  This thesis presents the analysis, implementation and testing of a circuit-level radiation hardened-by-design (RHBD) technique first presented in [1]. Radiation effects heavily influence the… (more)

Subjects/Keywords: RHBD; TID; digital; radiation testing; leakage current; Electrical and Electronics

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APA (6th Edition):

Womac, A. J. (2013). The Characterization of a CMOS Radiation Hardened-by-Design Circuit Technique. (Thesis). University of Tennessee – Knoxville. Retrieved from https://trace.tennessee.edu/utk_gradthes/2479

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Womac, Austin James. “The Characterization of a CMOS Radiation Hardened-by-Design Circuit Technique.” 2013. Thesis, University of Tennessee – Knoxville. Accessed August 12, 2020. https://trace.tennessee.edu/utk_gradthes/2479.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Womac, Austin James. “The Characterization of a CMOS Radiation Hardened-by-Design Circuit Technique.” 2013. Web. 12 Aug 2020.

Vancouver:

Womac AJ. The Characterization of a CMOS Radiation Hardened-by-Design Circuit Technique. [Internet] [Thesis]. University of Tennessee – Knoxville; 2013. [cited 2020 Aug 12]. Available from: https://trace.tennessee.edu/utk_gradthes/2479.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Womac AJ. The Characterization of a CMOS Radiation Hardened-by-Design Circuit Technique. [Thesis]. University of Tennessee – Knoxville; 2013. Available from: https://trace.tennessee.edu/utk_gradthes/2479

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

18. Yang, Po-Cheng. Investigation on Photo Leakage Current and Electrical Mechanism of a-Si Thin Film Transistor.

Degree: Master, Physics, 2006, NSYSU

 The hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) have been widely used as switching device for large-area electronics such as active matrix liquid crystal displays… (more)

Subjects/Keywords: photo leakage current; thin film transistor

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APA (6th Edition):

Yang, P. (2006). Investigation on Photo Leakage Current and Electrical Mechanism of a-Si Thin Film Transistor. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0801106-145749

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Po-Cheng. “Investigation on Photo Leakage Current and Electrical Mechanism of a-Si Thin Film Transistor.” 2006. Thesis, NSYSU. Accessed August 12, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0801106-145749.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Po-Cheng. “Investigation on Photo Leakage Current and Electrical Mechanism of a-Si Thin Film Transistor.” 2006. Web. 12 Aug 2020.

Vancouver:

Yang P. Investigation on Photo Leakage Current and Electrical Mechanism of a-Si Thin Film Transistor. [Internet] [Thesis]. NSYSU; 2006. [cited 2020 Aug 12]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0801106-145749.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang P. Investigation on Photo Leakage Current and Electrical Mechanism of a-Si Thin Film Transistor. [Thesis]. NSYSU; 2006. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0801106-145749

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

19. Chou, Yen-Yu. A Leakage Reduction 2ÃVDD Output Buffer with Compensation to Process and Voltage Variation and a Low Noise Current-Balancing Instrumentation Amplifier.

Degree: Master, Communications Engineering, 2017, NSYSU

 A leakage reduction 2ÃVDD output buffer with compensation to process and voltage variation is firstly proposed in this thesis. The proposed circuit architecture consists of… (more)

Subjects/Keywords: Instrumentation amplifier; Leakage current; Process detector; Low noise; Slew rate; Output buffer

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APA (6th Edition):

Chou, Y. (2017). A Leakage Reduction 2ÃVDD Output Buffer with Compensation to Process and Voltage Variation and a Low Noise Current-Balancing Instrumentation Amplifier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0603117-171138

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chou, Yen-Yu. “A Leakage Reduction 2ÃVDD Output Buffer with Compensation to Process and Voltage Variation and a Low Noise Current-Balancing Instrumentation Amplifier.” 2017. Thesis, NSYSU. Accessed August 12, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0603117-171138.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chou, Yen-Yu. “A Leakage Reduction 2ÃVDD Output Buffer with Compensation to Process and Voltage Variation and a Low Noise Current-Balancing Instrumentation Amplifier.” 2017. Web. 12 Aug 2020.

Vancouver:

Chou Y. A Leakage Reduction 2ÃVDD Output Buffer with Compensation to Process and Voltage Variation and a Low Noise Current-Balancing Instrumentation Amplifier. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Aug 12]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0603117-171138.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chou Y. A Leakage Reduction 2ÃVDD Output Buffer with Compensation to Process and Voltage Variation and a Low Noise Current-Balancing Instrumentation Amplifier. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0603117-171138

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

20. Hsieh, Chia-Lung. A Single-ended 5T and 6T Load-less SRAM with Low Energy Access.

Degree: Master, Electrical Engineering, 2017, NSYSU

 This thesis covers two topics, including single-ended 5T and 6T load-less SRAMs with low energy access. Prototypes of the two designs are realized using TSMC… (more)

Subjects/Keywords: energy per access; load-less; single-ended; leakage current; static random access memory

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APA (6th Edition):

Hsieh, C. (2017). A Single-ended 5T and 6T Load-less SRAM with Low Energy Access. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0606117-164916

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsieh, Chia-Lung. “A Single-ended 5T and 6T Load-less SRAM with Low Energy Access.” 2017. Thesis, NSYSU. Accessed August 12, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0606117-164916.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsieh, Chia-Lung. “A Single-ended 5T and 6T Load-less SRAM with Low Energy Access.” 2017. Web. 12 Aug 2020.

Vancouver:

Hsieh C. A Single-ended 5T and 6T Load-less SRAM with Low Energy Access. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Aug 12]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0606117-164916.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsieh C. A Single-ended 5T and 6T Load-less SRAM with Low Energy Access. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0606117-164916

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

21. Huang, Cheng-Ying. III-V Ultra-Thin-Body InGaAs/InAs MOSFETs for Low Standby Power Logic Applications.

Degree: 2015, University of California – eScholarship, University of California

 As device scaling continues to sub-10-nm regime, III-V InGaAs/InAs metal-oxide-semiconductor field-effect transistors (MOSFETs) are promising candidatesfor replacing Si-based MOSFETs for future very-large-scale integration (VLSI)logic applications.… (more)

Subjects/Keywords: Electrical engineering; Materials Science; band-to-band tunneling; III-V; InGaAs; leakage current; logic; MOSFET

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APA (6th Edition):

Huang, C. (2015). III-V Ultra-Thin-Body InGaAs/InAs MOSFETs for Low Standby Power Logic Applications. (Thesis). University of California – eScholarship, University of California. Retrieved from http://www.escholarship.org/uc/item/5079g3mg

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Cheng-Ying. “III-V Ultra-Thin-Body InGaAs/InAs MOSFETs for Low Standby Power Logic Applications.” 2015. Thesis, University of California – eScholarship, University of California. Accessed August 12, 2020. http://www.escholarship.org/uc/item/5079g3mg.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Cheng-Ying. “III-V Ultra-Thin-Body InGaAs/InAs MOSFETs for Low Standby Power Logic Applications.” 2015. Web. 12 Aug 2020.

Vancouver:

Huang C. III-V Ultra-Thin-Body InGaAs/InAs MOSFETs for Low Standby Power Logic Applications. [Internet] [Thesis]. University of California – eScholarship, University of California; 2015. [cited 2020 Aug 12]. Available from: http://www.escholarship.org/uc/item/5079g3mg.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang C. III-V Ultra-Thin-Body InGaAs/InAs MOSFETs for Low Standby Power Logic Applications. [Thesis]. University of California – eScholarship, University of California; 2015. Available from: http://www.escholarship.org/uc/item/5079g3mg

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Manchester

22. Dann, Nicholas. Measuring radiation damage in the ATLAS IBL, including comparisons between 3D and planar silicon sensors.

Degree: PhD, 2019, University of Manchester

 Silicon pixel detectors are a fundamental part of high energy physics experiments, providing high-precision tracking of ionising radiation. The Insertable B-Layer (IBL) is a recent… (more)

Subjects/Keywords: 500; Silicon Detector; Radiation damage; Planar; 3D; LHC; IBL; Leakage current ratios; ATLAS

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APA (6th Edition):

Dann, N. (2019). Measuring radiation damage in the ATLAS IBL, including comparisons between 3D and planar silicon sensors. (Doctoral Dissertation). University of Manchester. Retrieved from https://www.research.manchester.ac.uk/portal/en/theses/measuring-radiation-damage-in-the-atlas-ibl-including-comparisons-between-3d-and-planar-silicon-sensors(5cb9ed08-09ba-4669-b5e2-fb2409a06490).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.785678

Chicago Manual of Style (16th Edition):

Dann, Nicholas. “Measuring radiation damage in the ATLAS IBL, including comparisons between 3D and planar silicon sensors.” 2019. Doctoral Dissertation, University of Manchester. Accessed August 12, 2020. https://www.research.manchester.ac.uk/portal/en/theses/measuring-radiation-damage-in-the-atlas-ibl-including-comparisons-between-3d-and-planar-silicon-sensors(5cb9ed08-09ba-4669-b5e2-fb2409a06490).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.785678.

MLA Handbook (7th Edition):

Dann, Nicholas. “Measuring radiation damage in the ATLAS IBL, including comparisons between 3D and planar silicon sensors.” 2019. Web. 12 Aug 2020.

Vancouver:

Dann N. Measuring radiation damage in the ATLAS IBL, including comparisons between 3D and planar silicon sensors. [Internet] [Doctoral dissertation]. University of Manchester; 2019. [cited 2020 Aug 12]. Available from: https://www.research.manchester.ac.uk/portal/en/theses/measuring-radiation-damage-in-the-atlas-ibl-including-comparisons-between-3d-and-planar-silicon-sensors(5cb9ed08-09ba-4669-b5e2-fb2409a06490).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.785678.

Council of Science Editors:

Dann N. Measuring radiation damage in the ATLAS IBL, including comparisons between 3D and planar silicon sensors. [Doctoral Dissertation]. University of Manchester; 2019. Available from: https://www.research.manchester.ac.uk/portal/en/theses/measuring-radiation-damage-in-the-atlas-ibl-including-comparisons-between-3d-and-planar-silicon-sensors(5cb9ed08-09ba-4669-b5e2-fb2409a06490).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.785678


University of Minnesota

23. Dalal, Hussain Firoz. Implementation of on-chip thermal sensor using off-leakage current of a transistor.

Degree: MS, Electrical Engineering, 2010, University of Minnesota

Abstract summary not available

Subjects/Keywords: VLSI; CMOS; Leakage Current; Electrical Engineering

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APA (6th Edition):

Dalal, H. F. (2010). Implementation of on-chip thermal sensor using off-leakage current of a transistor. (Masters Thesis). University of Minnesota. Retrieved from http://purl.umn.edu/59772

Chicago Manual of Style (16th Edition):

Dalal, Hussain Firoz. “Implementation of on-chip thermal sensor using off-leakage current of a transistor.” 2010. Masters Thesis, University of Minnesota. Accessed August 12, 2020. http://purl.umn.edu/59772.

MLA Handbook (7th Edition):

Dalal, Hussain Firoz. “Implementation of on-chip thermal sensor using off-leakage current of a transistor.” 2010. Web. 12 Aug 2020.

Vancouver:

Dalal HF. Implementation of on-chip thermal sensor using off-leakage current of a transistor. [Internet] [Masters thesis]. University of Minnesota; 2010. [cited 2020 Aug 12]. Available from: http://purl.umn.edu/59772.

Council of Science Editors:

Dalal HF. Implementation of on-chip thermal sensor using off-leakage current of a transistor. [Masters Thesis]. University of Minnesota; 2010. Available from: http://purl.umn.edu/59772


University of Tennessee – Knoxville

24. Trento, Bradford Christopher. Modeling and Control of Single Phase Grid-Tie Converters.

Degree: MS, Electrical Engineering, 2012, University of Tennessee – Knoxville

  The penetration of renewable energy into the electric utility grid is growing worldwide. At the heart of these renewable sources is the power electronic… (more)

Subjects/Keywords: pulse width modulation; leakage current; emissions; inverter; converter; single phase; Electrical and Computer Engineering

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APA (6th Edition):

Trento, B. C. (2012). Modeling and Control of Single Phase Grid-Tie Converters. (Thesis). University of Tennessee – Knoxville. Retrieved from https://trace.tennessee.edu/utk_gradthes/1290

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Trento, Bradford Christopher. “Modeling and Control of Single Phase Grid-Tie Converters.” 2012. Thesis, University of Tennessee – Knoxville. Accessed August 12, 2020. https://trace.tennessee.edu/utk_gradthes/1290.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Trento, Bradford Christopher. “Modeling and Control of Single Phase Grid-Tie Converters.” 2012. Web. 12 Aug 2020.

Vancouver:

Trento BC. Modeling and Control of Single Phase Grid-Tie Converters. [Internet] [Thesis]. University of Tennessee – Knoxville; 2012. [cited 2020 Aug 12]. Available from: https://trace.tennessee.edu/utk_gradthes/1290.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Trento BC. Modeling and Control of Single Phase Grid-Tie Converters. [Thesis]. University of Tennessee – Knoxville; 2012. Available from: https://trace.tennessee.edu/utk_gradthes/1290

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Vanderbilt University

25. Ni, Kai. A fully embedded Silicon On Insulator Total Ionizing Dose monitor.

Degree: MS, Electrical Engineering, 2013, Vanderbilt University

 Total ionizing dose (TID) effect is a kind of radiation effects. Itâs related with the charge build up in the insulator caused by the radiation.… (more)

Subjects/Keywords: silicon on insulator; buried oxide; threshold voltage shift; leakage current; current controlled oscillator; total ionizing dose

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ni, K. (2013). A fully embedded Silicon On Insulator Total Ionizing Dose monitor. (Masters Thesis). Vanderbilt University. Retrieved from http://etd.library.vanderbilt.edu/available/etd-07302013-093909/ ;

Chicago Manual of Style (16th Edition):

Ni, Kai. “A fully embedded Silicon On Insulator Total Ionizing Dose monitor.” 2013. Masters Thesis, Vanderbilt University. Accessed August 12, 2020. http://etd.library.vanderbilt.edu/available/etd-07302013-093909/ ;.

MLA Handbook (7th Edition):

Ni, Kai. “A fully embedded Silicon On Insulator Total Ionizing Dose monitor.” 2013. Web. 12 Aug 2020.

Vancouver:

Ni K. A fully embedded Silicon On Insulator Total Ionizing Dose monitor. [Internet] [Masters thesis]. Vanderbilt University; 2013. [cited 2020 Aug 12]. Available from: http://etd.library.vanderbilt.edu/available/etd-07302013-093909/ ;.

Council of Science Editors:

Ni K. A fully embedded Silicon On Insulator Total Ionizing Dose monitor. [Masters Thesis]. Vanderbilt University; 2013. Available from: http://etd.library.vanderbilt.edu/available/etd-07302013-093909/ ;

26. Rastogi, Ashesh. Comprehensive Analysis of Leakage Current in Ultra Deep Sub-micron (udsm) Cmos Circuits.

Degree: MS, Electrical & Computer Engineering, 2007, University of Massachusetts

 Aggressive scaling of CMOS circuits in recent times has lead to dramatic increase in leakage currents. Previously, sub-threshold leakage current was the only leakage current(more)

Subjects/Keywords: leakage; loading effect; leakage current maximization; dyamic power; sub-threshold leakage; gate leakage band-to-band tunneling leakage

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rastogi, A. (2007). Comprehensive Analysis of Leakage Current in Ultra Deep Sub-micron (udsm) Cmos Circuits. (Masters Thesis). University of Massachusetts. Retrieved from https://scholarworks.umass.edu/theses/46

Chicago Manual of Style (16th Edition):

Rastogi, Ashesh. “Comprehensive Analysis of Leakage Current in Ultra Deep Sub-micron (udsm) Cmos Circuits.” 2007. Masters Thesis, University of Massachusetts. Accessed August 12, 2020. https://scholarworks.umass.edu/theses/46.

MLA Handbook (7th Edition):

Rastogi, Ashesh. “Comprehensive Analysis of Leakage Current in Ultra Deep Sub-micron (udsm) Cmos Circuits.” 2007. Web. 12 Aug 2020.

Vancouver:

Rastogi A. Comprehensive Analysis of Leakage Current in Ultra Deep Sub-micron (udsm) Cmos Circuits. [Internet] [Masters thesis]. University of Massachusetts; 2007. [cited 2020 Aug 12]. Available from: https://scholarworks.umass.edu/theses/46.

Council of Science Editors:

Rastogi A. Comprehensive Analysis of Leakage Current in Ultra Deep Sub-micron (udsm) Cmos Circuits. [Masters Thesis]. University of Massachusetts; 2007. Available from: https://scholarworks.umass.edu/theses/46

27. CHANDRASEKAR VENKATARAMANI. EXPERIMENTAL STUDY OF HIGH GATE TO DRAIN LEAKAGE CURRENT IN 0.18μm CMOS TECHNOLOGY.

Degree: 2003, National University of Singapore

Subjects/Keywords: Salicide Bridging; gate to drain leakage; gate oxide defects; Leakage current

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

VENKATARAMANI, C. (2003). EXPERIMENTAL STUDY OF HIGH GATE TO DRAIN LEAKAGE CURRENT IN 0.18μm CMOS TECHNOLOGY. (Thesis). National University of Singapore. Retrieved from https://scholarbank.nus.edu.sg/handle/10635/154027

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

VENKATARAMANI, CHANDRASEKAR. “EXPERIMENTAL STUDY OF HIGH GATE TO DRAIN LEAKAGE CURRENT IN 0.18μm CMOS TECHNOLOGY.” 2003. Thesis, National University of Singapore. Accessed August 12, 2020. https://scholarbank.nus.edu.sg/handle/10635/154027.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

VENKATARAMANI, CHANDRASEKAR. “EXPERIMENTAL STUDY OF HIGH GATE TO DRAIN LEAKAGE CURRENT IN 0.18μm CMOS TECHNOLOGY.” 2003. Web. 12 Aug 2020.

Vancouver:

VENKATARAMANI C. EXPERIMENTAL STUDY OF HIGH GATE TO DRAIN LEAKAGE CURRENT IN 0.18μm CMOS TECHNOLOGY. [Internet] [Thesis]. National University of Singapore; 2003. [cited 2020 Aug 12]. Available from: https://scholarbank.nus.edu.sg/handle/10635/154027.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

VENKATARAMANI C. EXPERIMENTAL STUDY OF HIGH GATE TO DRAIN LEAKAGE CURRENT IN 0.18μm CMOS TECHNOLOGY. [Thesis]. National University of Singapore; 2003. Available from: https://scholarbank.nus.edu.sg/handle/10635/154027

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Kentucky

28. Han, Lei. IMPROVEMENT OF SILICON OXIDE QUALITY USING HEAT TREATMENT.

Degree: 2012, University of Kentucky

 In decades, the tremendous development of integrated circuits industry could be mostly attributed to SiO2, since its satisfactory properties as a gate dielectric candidate. The… (more)

Subjects/Keywords: Gate Leakage Current; Silicon Oxide; Leatral Heating Process; Silicon Structure Change; Wet Etching; Electrical and Computer Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Han, L. (2012). IMPROVEMENT OF SILICON OXIDE QUALITY USING HEAT TREATMENT. (Masters Thesis). University of Kentucky. Retrieved from http://uknowledge.uky.edu/ece_etds/5

Chicago Manual of Style (16th Edition):

Han, Lei. “IMPROVEMENT OF SILICON OXIDE QUALITY USING HEAT TREATMENT.” 2012. Masters Thesis, University of Kentucky. Accessed August 12, 2020. http://uknowledge.uky.edu/ece_etds/5.

MLA Handbook (7th Edition):

Han, Lei. “IMPROVEMENT OF SILICON OXIDE QUALITY USING HEAT TREATMENT.” 2012. Web. 12 Aug 2020.

Vancouver:

Han L. IMPROVEMENT OF SILICON OXIDE QUALITY USING HEAT TREATMENT. [Internet] [Masters thesis]. University of Kentucky; 2012. [cited 2020 Aug 12]. Available from: http://uknowledge.uky.edu/ece_etds/5.

Council of Science Editors:

Han L. IMPROVEMENT OF SILICON OXIDE QUALITY USING HEAT TREATMENT. [Masters Thesis]. University of Kentucky; 2012. Available from: http://uknowledge.uky.edu/ece_etds/5


Universidade do Rio Grande do Sul

29. Paniz, Vitor. Simulação elétrica do efeito de dose total em células de memória estática (SRAM).

Degree: 2010, Universidade do Rio Grande do Sul

Nesta dissertação é apresentado o estudo da célula SRAM estática de 6 transistores, com tecnologia CMOS, sendo utilizada em ambiente exposto à radiação. Foi verificado,… (more)

Subjects/Keywords: Transistores; SRAM; CMOS; Circuitos eletrônicos; Dose effect; Simulação numérica; Total ionization dose; Read noise margin; Threshold voltage; Leakage current

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Paniz, V. (2010). Simulação elétrica do efeito de dose total em células de memória estática (SRAM). (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/27264

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Paniz, Vitor. “Simulação elétrica do efeito de dose total em células de memória estática (SRAM).” 2010. Thesis, Universidade do Rio Grande do Sul. Accessed August 12, 2020. http://hdl.handle.net/10183/27264.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Paniz, Vitor. “Simulação elétrica do efeito de dose total em células de memória estática (SRAM).” 2010. Web. 12 Aug 2020.

Vancouver:

Paniz V. Simulação elétrica do efeito de dose total em células de memória estática (SRAM). [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2010. [cited 2020 Aug 12]. Available from: http://hdl.handle.net/10183/27264.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Paniz V. Simulação elétrica do efeito de dose total em células de memória estática (SRAM). [Thesis]. Universidade do Rio Grande do Sul; 2010. Available from: http://hdl.handle.net/10183/27264

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Akron

30. Mulpuri, Vamsi. Failure Analysis and High Temperature Characterization of Silicon Carbide Power MOSFETs.

Degree: MSin Engineering, Electrical Engineering, 2017, University of Akron

 The reliability of power semiconductor switches is important when considering their vital role in power electronic converters for aerospace, railway, hybrid electric vehicle, and power… (more)

Subjects/Keywords: Engineering; Silicon Carbide, Threshold Voltage, On state Resistance, Gate leakage Current, Gate Oxide, Metallization, Bond wire

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mulpuri, V. (2017). Failure Analysis and High Temperature Characterization of Silicon Carbide Power MOSFETs. (Masters Thesis). University of Akron. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=akron151076214366849

Chicago Manual of Style (16th Edition):

Mulpuri, Vamsi. “Failure Analysis and High Temperature Characterization of Silicon Carbide Power MOSFETs.” 2017. Masters Thesis, University of Akron. Accessed August 12, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=akron151076214366849.

MLA Handbook (7th Edition):

Mulpuri, Vamsi. “Failure Analysis and High Temperature Characterization of Silicon Carbide Power MOSFETs.” 2017. Web. 12 Aug 2020.

Vancouver:

Mulpuri V. Failure Analysis and High Temperature Characterization of Silicon Carbide Power MOSFETs. [Internet] [Masters thesis]. University of Akron; 2017. [cited 2020 Aug 12]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron151076214366849.

Council of Science Editors:

Mulpuri V. Failure Analysis and High Temperature Characterization of Silicon Carbide Power MOSFETs. [Masters Thesis]. University of Akron; 2017. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron151076214366849

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