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Dept: Electrical Engineering

You searched for subject:(interface homem m quina). Showing records 1 – 30 of 77 total matches.

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1. Gaire, Sunil Kumar. Multilevel Orthogonal Coded Modulation.

Degree: MS, Electrical Engineering, 2017, University of North Dakota

  Multilevel orthogonal coded modulation technique is a combination of orthogonal channel coding and M-ary modulation, where two or more codes are used simultaneously to… (more)

Subjects/Keywords: Coded modulation; Error control coding; M-ary PSK; M-ary QAM; Multilevel coding; Orthogonal codes

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APA (6th Edition):

Gaire, S. K. (2017). Multilevel Orthogonal Coded Modulation. (Masters Thesis). University of North Dakota. Retrieved from https://commons.und.edu/theses/2216

Chicago Manual of Style (16th Edition):

Gaire, Sunil Kumar. “Multilevel Orthogonal Coded Modulation.” 2017. Masters Thesis, University of North Dakota. Accessed August 19, 2019. https://commons.und.edu/theses/2216.

MLA Handbook (7th Edition):

Gaire, Sunil Kumar. “Multilevel Orthogonal Coded Modulation.” 2017. Web. 19 Aug 2019.

Vancouver:

Gaire SK. Multilevel Orthogonal Coded Modulation. [Internet] [Masters thesis]. University of North Dakota; 2017. [cited 2019 Aug 19]. Available from: https://commons.und.edu/theses/2216.

Council of Science Editors:

Gaire SK. Multilevel Orthogonal Coded Modulation. [Masters Thesis]. University of North Dakota; 2017. Available from: https://commons.und.edu/theses/2216


NSYSU

2. Yang, Sheng-Fa. Develop a Real-time Supervisory Human-machine Interface with Grid-Connected Excited Synchronous Wind Power system.

Degree: Master, Electrical Engineering, 2015, NSYSU

 This thesis designs and implements a human-machine interface that can monitor the excited synchronous wind power system by Universal Asynchronous Receiver/ Transmitter(UART). The human-machine interface(more)

Subjects/Keywords: Serial Communication; UART; Human-machine Interface

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APA (6th Edition):

Yang, S. (2015). Develop a Real-time Supervisory Human-machine Interface with Grid-Connected Excited Synchronous Wind Power system. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0624115-161435

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Sheng-Fa. “Develop a Real-time Supervisory Human-machine Interface with Grid-Connected Excited Synchronous Wind Power system.” 2015. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0624115-161435.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Sheng-Fa. “Develop a Real-time Supervisory Human-machine Interface with Grid-Connected Excited Synchronous Wind Power system.” 2015. Web. 19 Aug 2019.

Vancouver:

Yang S. Develop a Real-time Supervisory Human-machine Interface with Grid-Connected Excited Synchronous Wind Power system. [Internet] [Thesis]. NSYSU; 2015. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0624115-161435.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang S. Develop a Real-time Supervisory Human-machine Interface with Grid-Connected Excited Synchronous Wind Power system. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0624115-161435

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

3. Kao, Wei-Chieh. IMPACT OF INTERFACE STATES ON.

Degree: MS, Electrical Engineering, 2010, Penn State University

 In the past four decades, logic transistor scaling following Moore’s Law has resulted in unprecedented increase in logic performance. However, the exponentially rising transistor count… (more)

Subjects/Keywords: Interface states; HEMT; Tunnel FET; InGaAs; MOSFET

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APA (6th Edition):

Kao, W. (2010). IMPACT OF INTERFACE STATES ON. (Masters Thesis). Penn State University. Retrieved from https://etda.libraries.psu.edu/catalog/10880

Chicago Manual of Style (16th Edition):

Kao, Wei-Chieh. “IMPACT OF INTERFACE STATES ON.” 2010. Masters Thesis, Penn State University. Accessed August 19, 2019. https://etda.libraries.psu.edu/catalog/10880.

MLA Handbook (7th Edition):

Kao, Wei-Chieh. “IMPACT OF INTERFACE STATES ON.” 2010. Web. 19 Aug 2019.

Vancouver:

Kao W. IMPACT OF INTERFACE STATES ON. [Internet] [Masters thesis]. Penn State University; 2010. [cited 2019 Aug 19]. Available from: https://etda.libraries.psu.edu/catalog/10880.

Council of Science Editors:

Kao W. IMPACT OF INTERFACE STATES ON. [Masters Thesis]. Penn State University; 2010. Available from: https://etda.libraries.psu.edu/catalog/10880


Cal Poly

4. Lenz, Anthony M. COFFEE: Context Observer For Fast Enthralling Entertainment.

Degree: MS, Electrical Engineering, 2014, Cal Poly

  Desktops, laptops, smartphones, tablets, and the Kinect, oh my! With so many devices available to the average consumer, the limitations and pitfalls of each… (more)

Subjects/Keywords: HCI; Context Aware; Hybrid Interface; Natural User Interface; Usability; User Interactions; Computer Engineering; Graphics and Human Computer Interfaces; Systems Architecture

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APA (6th Edition):

Lenz, A. M. (2014). COFFEE: Context Observer For Fast Enthralling Entertainment. (Masters Thesis). Cal Poly. Retrieved from https://digitalcommons.calpoly.edu/theses/1244 ; 10.15368/theses.2014.89

Chicago Manual of Style (16th Edition):

Lenz, Anthony M. “COFFEE: Context Observer For Fast Enthralling Entertainment.” 2014. Masters Thesis, Cal Poly. Accessed August 19, 2019. https://digitalcommons.calpoly.edu/theses/1244 ; 10.15368/theses.2014.89.

MLA Handbook (7th Edition):

Lenz, Anthony M. “COFFEE: Context Observer For Fast Enthralling Entertainment.” 2014. Web. 19 Aug 2019.

Vancouver:

Lenz AM. COFFEE: Context Observer For Fast Enthralling Entertainment. [Internet] [Masters thesis]. Cal Poly; 2014. [cited 2019 Aug 19]. Available from: https://digitalcommons.calpoly.edu/theses/1244 ; 10.15368/theses.2014.89.

Council of Science Editors:

Lenz AM. COFFEE: Context Observer For Fast Enthralling Entertainment. [Masters Thesis]. Cal Poly; 2014. Available from: https://digitalcommons.calpoly.edu/theses/1244 ; 10.15368/theses.2014.89


NSYSU

5. Wu, Tzung-Han. Study on Ramsay Fuzzy Neural Networks.

Degree: Master, Electrical Engineering, 2008, NSYSU

 In this thesis, M-estimators with Ramsayâs function used in robust regression theory for linear parametric regression problems will be generalized to nonparametric Ramsay fuzzy neural… (more)

Subjects/Keywords: M-estimators; Fuzzy Neural Networks; robust regression; Ramsay

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APA (6th Edition):

Wu, T. (2008). Study on Ramsay Fuzzy Neural Networks. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623108-234132

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wu, Tzung-Han. “Study on Ramsay Fuzzy Neural Networks.” 2008. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623108-234132.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wu, Tzung-Han. “Study on Ramsay Fuzzy Neural Networks.” 2008. Web. 19 Aug 2019.

Vancouver:

Wu T. Study on Ramsay Fuzzy Neural Networks. [Internet] [Thesis]. NSYSU; 2008. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623108-234132.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wu T. Study on Ramsay Fuzzy Neural Networks. [Thesis]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623108-234132

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

6. Yang, Shang-da. Implementation of Hierarchical Architecture of Basic Memory Modules.

Degree: Master, Electrical Engineering, 2008, NSYSU

 In system-on-chip designs, memory designs store data to be accessed by processing modules. Memory access time can affect overall system performance significantly. In this research,… (more)

Subjects/Keywords: system-on-chip; memory; memory interface; memory controller

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yang, S. (2008). Implementation of Hierarchical Architecture of Basic Memory Modules. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911108-201039

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Shang-da. “Implementation of Hierarchical Architecture of Basic Memory Modules.” 2008. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911108-201039.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Shang-da. “Implementation of Hierarchical Architecture of Basic Memory Modules.” 2008. Web. 19 Aug 2019.

Vancouver:

Yang S. Implementation of Hierarchical Architecture of Basic Memory Modules. [Internet] [Thesis]. NSYSU; 2008. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911108-201039.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang S. Implementation of Hierarchical Architecture of Basic Memory Modules. [Thesis]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911108-201039

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

7. Chen, Ting-Wei. Develop a Multithreading Human-machine Interface with USB Communication for Motor Drivers.

Degree: Master, Electrical Engineering, 2013, NSYSU

 The human-machine interface is always an important software application which developers of motor drivers must provide for users, because users only can set variables of… (more)

Subjects/Keywords: Multithread; Speed Control; USB; Motor Drivers; Human-machine Interface

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APA (6th Edition):

Chen, T. (2013). Develop a Multithreading Human-machine Interface with USB Communication for Motor Drivers. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704113-145310

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Ting-Wei. “Develop a Multithreading Human-machine Interface with USB Communication for Motor Drivers.” 2013. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704113-145310.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Ting-Wei. “Develop a Multithreading Human-machine Interface with USB Communication for Motor Drivers.” 2013. Web. 19 Aug 2019.

Vancouver:

Chen T. Develop a Multithreading Human-machine Interface with USB Communication for Motor Drivers. [Internet] [Thesis]. NSYSU; 2013. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704113-145310.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen T. Develop a Multithreading Human-machine Interface with USB Communication for Motor Drivers. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704113-145310

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

8. Siao, Jhih-Jhong. The Graphic Authoring Platform of Screenplays for Robotic Puppet Shows.

Degree: Master, Electrical Engineering, 2012, NSYSU

 With the development of the network, people are increasingly used to exchanging information on the Internet. Therefore, the capability of robot controller should not be… (more)

Subjects/Keywords: DARwIn-OP; user interface; XML; robot controller; puppet show

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APA (6th Edition):

Siao, J. (2012). The Graphic Authoring Platform of Screenplays for Robotic Puppet Shows. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-163213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Siao, Jhih-Jhong. “The Graphic Authoring Platform of Screenplays for Robotic Puppet Shows.” 2012. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-163213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Siao, Jhih-Jhong. “The Graphic Authoring Platform of Screenplays for Robotic Puppet Shows.” 2012. Web. 19 Aug 2019.

Vancouver:

Siao J. The Graphic Authoring Platform of Screenplays for Robotic Puppet Shows. [Internet] [Thesis]. NSYSU; 2012. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-163213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Siao J. The Graphic Authoring Platform of Screenplays for Robotic Puppet Shows. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-163213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

9. Chang, Wen-Chi. A Visual Programming Editor for Industrial Robots.

Degree: Master, Electrical Engineering, 2017, NSYSU

 A graphical programming language can significantly relax the effort in learning programming languages for the beginners, compared with the normal programming language. Blockly is a… (more)

Subjects/Keywords: Block-oriented; Graphical user interface; Script language; Lua; Blcokly

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APA (6th Edition):

Chang, W. (2017). A Visual Programming Editor for Industrial Robots. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0619117-153441

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Wen-Chi. “A Visual Programming Editor for Industrial Robots.” 2017. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0619117-153441.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Wen-Chi. “A Visual Programming Editor for Industrial Robots.” 2017. Web. 19 Aug 2019.

Vancouver:

Chang W. A Visual Programming Editor for Industrial Robots. [Internet] [Thesis]. NSYSU; 2017. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0619117-153441.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang W. A Visual Programming Editor for Industrial Robots. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0619117-153441

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oklahoma State University

10. Liao, Ran. Low Power Digital Baseband Core for Wireless Micro-neural-interface Using Cmos Sub/near-threshold Circuit.

Degree: Electrical Engineering, 2013, Oklahoma State University

 This thesis presents the work on designing and implementing a low power digital baseband core with custom-tailored protocol for wirelessly powered Micro-Neural-Interface (MNI) System-on-Chip (SoC)… (more)

Subjects/Keywords: cmos; low power; neural interface; protocol; sub/near-threshold

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APA (6th Edition):

Liao, R. (2013). Low Power Digital Baseband Core for Wireless Micro-neural-interface Using Cmos Sub/near-threshold Circuit. (Thesis). Oklahoma State University. Retrieved from http://hdl.handle.net/11244/14967

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liao, Ran. “Low Power Digital Baseband Core for Wireless Micro-neural-interface Using Cmos Sub/near-threshold Circuit.” 2013. Thesis, Oklahoma State University. Accessed August 19, 2019. http://hdl.handle.net/11244/14967.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liao, Ran. “Low Power Digital Baseband Core for Wireless Micro-neural-interface Using Cmos Sub/near-threshold Circuit.” 2013. Web. 19 Aug 2019.

Vancouver:

Liao R. Low Power Digital Baseband Core for Wireless Micro-neural-interface Using Cmos Sub/near-threshold Circuit. [Internet] [Thesis]. Oklahoma State University; 2013. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/11244/14967.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liao R. Low Power Digital Baseband Core for Wireless Micro-neural-interface Using Cmos Sub/near-threshold Circuit. [Thesis]. Oklahoma State University; 2013. Available from: http://hdl.handle.net/11244/14967

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Rochester Institute of Technology

11. Parthipan, Deepak Siddharth. UVM Verification of an SPI Master Core.

Degree: MS, Electrical Engineering, 2018, Rochester Institute of Technology

  In today’s world, more and more functionalities in the form of IP cores are integrated into a single chip or SOC. System-level verification of… (more)

Subjects/Keywords: UVM; SystemVerilog; Reusability; Protocols; Peripheral interfaces; Serial peripheral interface

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APA (6th Edition):

Parthipan, D. S. (2018). UVM Verification of an SPI Master Core. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/9793

Chicago Manual of Style (16th Edition):

Parthipan, Deepak Siddharth. “UVM Verification of an SPI Master Core.” 2018. Masters Thesis, Rochester Institute of Technology. Accessed August 19, 2019. https://scholarworks.rit.edu/theses/9793.

MLA Handbook (7th Edition):

Parthipan, Deepak Siddharth. “UVM Verification of an SPI Master Core.” 2018. Web. 19 Aug 2019.

Vancouver:

Parthipan DS. UVM Verification of an SPI Master Core. [Internet] [Masters thesis]. Rochester Institute of Technology; 2018. [cited 2019 Aug 19]. Available from: https://scholarworks.rit.edu/theses/9793.

Council of Science Editors:

Parthipan DS. UVM Verification of an SPI Master Core. [Masters Thesis]. Rochester Institute of Technology; 2018. Available from: https://scholarworks.rit.edu/theses/9793


University of Michigan

12. Mendrela, Adam. Bidirectional Neural Interface Circuits with On-Chip Stimulation Artifact Reduction Schemes.

Degree: PhD, Electrical Engineering, 2018, University of Michigan

 Bidirectional neural interfaces are tools designed to “communicate” with the brain via recording and modulation of neuronal activity. The bidirectional interface systems have been adopted… (more)

Subjects/Keywords: neural interface; optogenetics; mixed-signal IC; electrophysiology; Electrical Engineering; Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mendrela, A. (2018). Bidirectional Neural Interface Circuits with On-Chip Stimulation Artifact Reduction Schemes. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/147674

Chicago Manual of Style (16th Edition):

Mendrela, Adam. “Bidirectional Neural Interface Circuits with On-Chip Stimulation Artifact Reduction Schemes.” 2018. Doctoral Dissertation, University of Michigan. Accessed August 19, 2019. http://hdl.handle.net/2027.42/147674.

MLA Handbook (7th Edition):

Mendrela, Adam. “Bidirectional Neural Interface Circuits with On-Chip Stimulation Artifact Reduction Schemes.” 2018. Web. 19 Aug 2019.

Vancouver:

Mendrela A. Bidirectional Neural Interface Circuits with On-Chip Stimulation Artifact Reduction Schemes. [Internet] [Doctoral dissertation]. University of Michigan; 2018. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/2027.42/147674.

Council of Science Editors:

Mendrela A. Bidirectional Neural Interface Circuits with On-Chip Stimulation Artifact Reduction Schemes. [Doctoral Dissertation]. University of Michigan; 2018. Available from: http://hdl.handle.net/2027.42/147674

13. Gavett, Scott. Evaluation Of Paradigms For A P300 Based Brain Computer Interface Speller.

Degree: MS, Electrical Engineering, 2012, University of North Dakota

  This thesis was written to compare a few different paradigms for the brain computer interface (BCI) virtual speller using the P300 signal. The paradigms… (more)

Subjects/Keywords: BCI; Brain-computer Interface; Electroencephalography; P300-based Speller; Paradigm Design

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gavett, S. (2012). Evaluation Of Paradigms For A P300 Based Brain Computer Interface Speller. (Masters Thesis). University of North Dakota. Retrieved from https://commons.und.edu/theses/1239

Chicago Manual of Style (16th Edition):

Gavett, Scott. “Evaluation Of Paradigms For A P300 Based Brain Computer Interface Speller.” 2012. Masters Thesis, University of North Dakota. Accessed August 19, 2019. https://commons.und.edu/theses/1239.

MLA Handbook (7th Edition):

Gavett, Scott. “Evaluation Of Paradigms For A P300 Based Brain Computer Interface Speller.” 2012. Web. 19 Aug 2019.

Vancouver:

Gavett S. Evaluation Of Paradigms For A P300 Based Brain Computer Interface Speller. [Internet] [Masters thesis]. University of North Dakota; 2012. [cited 2019 Aug 19]. Available from: https://commons.und.edu/theses/1239.

Council of Science Editors:

Gavett S. Evaluation Of Paradigms For A P300 Based Brain Computer Interface Speller. [Masters Thesis]. University of North Dakota; 2012. Available from: https://commons.und.edu/theses/1239


Arizona State University

14. Kao, Wei-Chieh. Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors.

Degree: Electrical Engineering, 2015, Arizona State University

 Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor… (more)

Subjects/Keywords: Electrical engineering; Characterization; Interface State; Metal Oxide Semiconductor Capacitors; Silicon Carbide

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kao, W. (2015). Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors. (Doctoral Dissertation). Arizona State University. Retrieved from http://repository.asu.edu/items/34772

Chicago Manual of Style (16th Edition):

Kao, Wei-Chieh. “Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors.” 2015. Doctoral Dissertation, Arizona State University. Accessed August 19, 2019. http://repository.asu.edu/items/34772.

MLA Handbook (7th Edition):

Kao, Wei-Chieh. “Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors.” 2015. Web. 19 Aug 2019.

Vancouver:

Kao W. Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors. [Internet] [Doctoral dissertation]. Arizona State University; 2015. [cited 2019 Aug 19]. Available from: http://repository.asu.edu/items/34772.

Council of Science Editors:

Kao W. Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors. [Doctoral Dissertation]. Arizona State University; 2015. Available from: http://repository.asu.edu/items/34772


University of Southern California

15. Sheng, Lingyan. Novel algorithms for large scale supervised and one class learning.

Degree: PhD, Electrical Engineering, 2013, University of Southern California

 Supervised learning is the machine learning task of inferring a function from labeled training data. There have been numerous algorithms proposed for supervised learning, such… (more)

Subjects/Keywords: supervised learning; one class learning; linear discriminant analysis; graph; Nyströ; m approximation

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sheng, L. (2013). Novel algorithms for large scale supervised and one class learning. (Doctoral Dissertation). University of Southern California. Retrieved from http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/225861/rec/4459

Chicago Manual of Style (16th Edition):

Sheng, Lingyan. “Novel algorithms for large scale supervised and one class learning.” 2013. Doctoral Dissertation, University of Southern California. Accessed August 19, 2019. http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/225861/rec/4459.

MLA Handbook (7th Edition):

Sheng, Lingyan. “Novel algorithms for large scale supervised and one class learning.” 2013. Web. 19 Aug 2019.

Vancouver:

Sheng L. Novel algorithms for large scale supervised and one class learning. [Internet] [Doctoral dissertation]. University of Southern California; 2013. [cited 2019 Aug 19]. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/225861/rec/4459.

Council of Science Editors:

Sheng L. Novel algorithms for large scale supervised and one class learning. [Doctoral Dissertation]. University of Southern California; 2013. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/225861/rec/4459


UCLA

16. Li, Xiang. Interface Engineering of Voltage-Controlled Embedded Magnetic Random Access Memory.

Degree: Electrical Engineering, 2018, UCLA

 Magnetic memory that utilizes spin to store information has become one of the most promising candidates for next-generation non-volatile memory. Electric-field-assisted writing of magnetic tunnel… (more)

Subjects/Keywords: Electrical engineering; Computer engineering; Nanotechnology; Embedded; Interface; Magnetism; MRAM; Random access memory; Voltage control

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, X. (2018). Interface Engineering of Voltage-Controlled Embedded Magnetic Random Access Memory. (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/2t0089x7

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Xiang. “Interface Engineering of Voltage-Controlled Embedded Magnetic Random Access Memory.” 2018. Thesis, UCLA. Accessed August 19, 2019. http://www.escholarship.org/uc/item/2t0089x7.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Xiang. “Interface Engineering of Voltage-Controlled Embedded Magnetic Random Access Memory.” 2018. Web. 19 Aug 2019.

Vancouver:

Li X. Interface Engineering of Voltage-Controlled Embedded Magnetic Random Access Memory. [Internet] [Thesis]. UCLA; 2018. [cited 2019 Aug 19]. Available from: http://www.escholarship.org/uc/item/2t0089x7.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li X. Interface Engineering of Voltage-Controlled Embedded Magnetic Random Access Memory. [Thesis]. UCLA; 2018. Available from: http://www.escholarship.org/uc/item/2t0089x7

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

17. Tung, Tao-Ting. Power System Short-term Load Forecast.

Degree: Master, Electrical Engineering, 2017, NSYSU

 Accurate Short-Term Load Forecast (STLF) is important in the security constrained unit commitment and economic dispatch to achieve reliable, stable and efficient power system operations.… (more)

Subjects/Keywords: user interface; apparent temperature; semiparametric additive model; neural networks; short-term load forecasting

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tung, T. (2017). Power System Short-term Load Forecast. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0808117-144320

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tung, Tao-Ting. “Power System Short-term Load Forecast.” 2017. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0808117-144320.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tung, Tao-Ting. “Power System Short-term Load Forecast.” 2017. Web. 19 Aug 2019.

Vancouver:

Tung T. Power System Short-term Load Forecast. [Internet] [Thesis]. NSYSU; 2017. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0808117-144320.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tung T. Power System Short-term Load Forecast. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0808117-144320

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

18. Weng, Ruey-Shing. Injection Mechanisms at the Interface between Metal and Organic Layer in OLEDs.

Degree: Master, Electrical Engineering, 2002, NSYSU

 In this dissertation, the electrical characteristics of the interface between the metal cathode and organic layer in OLEDs are detailed investigated. Currently, surveying on the… (more)

Subjects/Keywords: interface; organic; injection; LiF; OLED; transport

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Weng, R. (2002). Injection Mechanisms at the Interface between Metal and Organic Layer in OLEDs. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701102-150116

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Weng, Ruey-Shing. “Injection Mechanisms at the Interface between Metal and Organic Layer in OLEDs.” 2002. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701102-150116.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Weng, Ruey-Shing. “Injection Mechanisms at the Interface between Metal and Organic Layer in OLEDs.” 2002. Web. 19 Aug 2019.

Vancouver:

Weng R. Injection Mechanisms at the Interface between Metal and Organic Layer in OLEDs. [Internet] [Thesis]. NSYSU; 2002. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701102-150116.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Weng R. Injection Mechanisms at the Interface between Metal and Organic Layer in OLEDs. [Thesis]. NSYSU; 2002. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701102-150116

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

19. Jain, Ankit. Low Cost Instrumentation and Interface for Neural Recordings.

Degree: MS, Electrical Engineering, 2011, Penn State University

 According to the World Health Organization (WHO), more than one billion people around the globe are affected by neurological disorders. Neurological disorders include epilepsy, migraine,… (more)

Subjects/Keywords: low cost; EEG; instrumentation; brain computer interface; biomedical; medical device; ADS1298; MSP430.

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jain, A. (2011). Low Cost Instrumentation and Interface for Neural Recordings. (Masters Thesis). Penn State University. Retrieved from https://etda.libraries.psu.edu/catalog/13321

Chicago Manual of Style (16th Edition):

Jain, Ankit. “Low Cost Instrumentation and Interface for Neural Recordings.” 2011. Masters Thesis, Penn State University. Accessed August 19, 2019. https://etda.libraries.psu.edu/catalog/13321.

MLA Handbook (7th Edition):

Jain, Ankit. “Low Cost Instrumentation and Interface for Neural Recordings.” 2011. Web. 19 Aug 2019.

Vancouver:

Jain A. Low Cost Instrumentation and Interface for Neural Recordings. [Internet] [Masters thesis]. Penn State University; 2011. [cited 2019 Aug 19]. Available from: https://etda.libraries.psu.edu/catalog/13321.

Council of Science Editors:

Jain A. Low Cost Instrumentation and Interface for Neural Recordings. [Masters Thesis]. Penn State University; 2011. Available from: https://etda.libraries.psu.edu/catalog/13321


NSYSU

20. Su, Bo-Yin. Signal Integrity Analysis of a Hybrid Advanced Packaging Technology for 100Gbps Serdes Applications.

Degree: Master, Electrical Engineering, 2017, NSYSU

 The rapid development of high-speed digital circuits leads to high complexity of layout design and the accompanying signal integrity problems, and presents a very serious… (more)

Subjects/Keywords: Differential Signal; Discontinuity; Fan-Out Wafer Level Package; SERDES Interface; Signal Integrity

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APA (6th Edition):

Su, B. (2017). Signal Integrity Analysis of a Hybrid Advanced Packaging Technology for 100Gbps Serdes Applications. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615117-230950

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Su, Bo-Yin. “Signal Integrity Analysis of a Hybrid Advanced Packaging Technology for 100Gbps Serdes Applications.” 2017. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615117-230950.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Su, Bo-Yin. “Signal Integrity Analysis of a Hybrid Advanced Packaging Technology for 100Gbps Serdes Applications.” 2017. Web. 19 Aug 2019.

Vancouver:

Su B. Signal Integrity Analysis of a Hybrid Advanced Packaging Technology for 100Gbps Serdes Applications. [Internet] [Thesis]. NSYSU; 2017. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615117-230950.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Su B. Signal Integrity Analysis of a Hybrid Advanced Packaging Technology for 100Gbps Serdes Applications. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615117-230950

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


UCLA

21. Cho, Wei-Han. Energy-Efficient Multi-Band Signaling for High-Speed Memory Interface.

Degree: Electrical Engineering, 2016, UCLA

 The scaling of CMOS technology continues to improve the processor capability and memory capacity, requiring memory interface with higher bandwidth and better energy efficiency to… (more)

Subjects/Keywords: Electrical engineering; memory interface; multi-band signaling; RF interconnect; serial link; transceiver

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APA (6th Edition):

Cho, W. (2016). Energy-Efficient Multi-Band Signaling for High-Speed Memory Interface. (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/3tq3k9f9

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Cho, Wei-Han. “Energy-Efficient Multi-Band Signaling for High-Speed Memory Interface.” 2016. Thesis, UCLA. Accessed August 19, 2019. http://www.escholarship.org/uc/item/3tq3k9f9.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Cho, Wei-Han. “Energy-Efficient Multi-Band Signaling for High-Speed Memory Interface.” 2016. Web. 19 Aug 2019.

Vancouver:

Cho W. Energy-Efficient Multi-Band Signaling for High-Speed Memory Interface. [Internet] [Thesis]. UCLA; 2016. [cited 2019 Aug 19]. Available from: http://www.escholarship.org/uc/item/3tq3k9f9.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Cho W. Energy-Efficient Multi-Band Signaling for High-Speed Memory Interface. [Thesis]. UCLA; 2016. Available from: http://www.escholarship.org/uc/item/3tq3k9f9

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

22. Haider, Md. Ali. Electroencephalogram Signal Processing For Hybrid Brain Computer Interface Systems.

Degree: PhD, Electrical Engineering, 2018, University of North Dakota

  The goal of this research was to evaluate and compare three types of brain computer interface (BCI) systems, P300, steady state visually evoked potentials… (more)

Subjects/Keywords: BCI Paradigm; Brain Computer Interface; Hybrid BCI; Region Based; Signal Processing; SSVEP

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APA (6th Edition):

Haider, M. A. (2018). Electroencephalogram Signal Processing For Hybrid Brain Computer Interface Systems. (Doctoral Dissertation). University of North Dakota. Retrieved from https://commons.und.edu/theses/2225

Chicago Manual of Style (16th Edition):

Haider, Md Ali. “Electroencephalogram Signal Processing For Hybrid Brain Computer Interface Systems.” 2018. Doctoral Dissertation, University of North Dakota. Accessed August 19, 2019. https://commons.und.edu/theses/2225.

MLA Handbook (7th Edition):

Haider, Md Ali. “Electroencephalogram Signal Processing For Hybrid Brain Computer Interface Systems.” 2018. Web. 19 Aug 2019.

Vancouver:

Haider MA. Electroencephalogram Signal Processing For Hybrid Brain Computer Interface Systems. [Internet] [Doctoral dissertation]. University of North Dakota; 2018. [cited 2019 Aug 19]. Available from: https://commons.und.edu/theses/2225.

Council of Science Editors:

Haider MA. Electroencephalogram Signal Processing For Hybrid Brain Computer Interface Systems. [Doctoral Dissertation]. University of North Dakota; 2018. Available from: https://commons.und.edu/theses/2225


University of South Carolina

23. Omar, Sabih Uddin. The Role of Interface Effects and Minority Carriers in the Metal-Semiconductor Schottky Junction.

Degree: PhD, Electrical Engineering, 2014, University of South Carolina

  The metal-semiconductor (MS) Schottky barrier junction, formed by putting a metal in contact with a semiconductor crystal, is the simplest form of electronic rectifier.… (more)

Subjects/Keywords: Electrical and Computer Engineering; Engineering; Interface Effects; Minority Carriers; Metal-Semiconductor; Schottky Junction

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APA (6th Edition):

Omar, S. U. (2014). The Role of Interface Effects and Minority Carriers in the Metal-Semiconductor Schottky Junction. (Doctoral Dissertation). University of South Carolina. Retrieved from https://scholarcommons.sc.edu/etd/3582

Chicago Manual of Style (16th Edition):

Omar, Sabih Uddin. “The Role of Interface Effects and Minority Carriers in the Metal-Semiconductor Schottky Junction.” 2014. Doctoral Dissertation, University of South Carolina. Accessed August 19, 2019. https://scholarcommons.sc.edu/etd/3582.

MLA Handbook (7th Edition):

Omar, Sabih Uddin. “The Role of Interface Effects and Minority Carriers in the Metal-Semiconductor Schottky Junction.” 2014. Web. 19 Aug 2019.

Vancouver:

Omar SU. The Role of Interface Effects and Minority Carriers in the Metal-Semiconductor Schottky Junction. [Internet] [Doctoral dissertation]. University of South Carolina; 2014. [cited 2019 Aug 19]. Available from: https://scholarcommons.sc.edu/etd/3582.

Council of Science Editors:

Omar SU. The Role of Interface Effects and Minority Carriers in the Metal-Semiconductor Schottky Junction. [Doctoral Dissertation]. University of South Carolina; 2014. Available from: https://scholarcommons.sc.edu/etd/3582


University of Notre Dame

24. Xiang Li. Electrical properties and device applications of InAlP native oxide/GaAs MOS structures</h1>.

Degree: PhD, Electrical Engineering, 2005, University of Notre Dame

  The native oxide of InAlP has been investigated for its electrical properties and usefulness in high-performance electronic devices. InAlP native oxide/GaAs MOS capacitors have… (more)

Subjects/Keywords: GaAs MOSFET; interface state; thermal oxidation

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APA (6th Edition):

Li, X. (2005). Electrical properties and device applications of InAlP native oxide/GaAs MOS structures</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/6969z031n1r

Chicago Manual of Style (16th Edition):

Li, Xiang. “Electrical properties and device applications of InAlP native oxide/GaAs MOS structures</h1>.” 2005. Doctoral Dissertation, University of Notre Dame. Accessed August 19, 2019. https://curate.nd.edu/show/6969z031n1r.

MLA Handbook (7th Edition):

Li, Xiang. “Electrical properties and device applications of InAlP native oxide/GaAs MOS structures</h1>.” 2005. Web. 19 Aug 2019.

Vancouver:

Li X. Electrical properties and device applications of InAlP native oxide/GaAs MOS structures</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2005. [cited 2019 Aug 19]. Available from: https://curate.nd.edu/show/6969z031n1r.

Council of Science Editors:

Li X. Electrical properties and device applications of InAlP native oxide/GaAs MOS structures</h1>. [Doctoral Dissertation]. University of Notre Dame; 2005. Available from: https://curate.nd.edu/show/6969z031n1r


Texas A&M University

25. Benitez, Laura Elena. Electron Transport and Ion Diffusivity through the Solid Electrolyte Interphase in Lithium Ion Batteries with Silicon Anodes.

Degree: PhD, Electrical Engineering, 2017, Texas A&M University

 Lithium-ion batteries (LIB) are the best option among batteries for portable electronic, power tools, and electric vehicles due to their higher energy storage, higher power,… (more)

Subjects/Keywords: solid electrolyte interface; lithium-ion batteries; silicon anode; ion diffusion; electron transport'

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APA (6th Edition):

Benitez, L. E. (2017). Electron Transport and Ion Diffusivity through the Solid Electrolyte Interphase in Lithium Ion Batteries with Silicon Anodes. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/165722

Chicago Manual of Style (16th Edition):

Benitez, Laura Elena. “Electron Transport and Ion Diffusivity through the Solid Electrolyte Interphase in Lithium Ion Batteries with Silicon Anodes.” 2017. Doctoral Dissertation, Texas A&M University. Accessed August 19, 2019. http://hdl.handle.net/1969.1/165722.

MLA Handbook (7th Edition):

Benitez, Laura Elena. “Electron Transport and Ion Diffusivity through the Solid Electrolyte Interphase in Lithium Ion Batteries with Silicon Anodes.” 2017. Web. 19 Aug 2019.

Vancouver:

Benitez LE. Electron Transport and Ion Diffusivity through the Solid Electrolyte Interphase in Lithium Ion Batteries with Silicon Anodes. [Internet] [Doctoral dissertation]. Texas A&M University; 2017. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/1969.1/165722.

Council of Science Editors:

Benitez LE. Electron Transport and Ion Diffusivity through the Solid Electrolyte Interphase in Lithium Ion Batteries with Silicon Anodes. [Doctoral Dissertation]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/165722


Linköping University

26. Nilsson, Andreas. Debug Interface for 56000 DSP.

Degree: Electrical Engineering, 2007, Linköping University

  The scope for this thesis was to design a debug interface for a DSP (digital signal processor). The DSP is a research version of… (more)

Subjects/Keywords: Hardware testing; Debug interface; DSP; FPGA; ASIC; Electronics; Elektronik

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APA (6th Edition):

Nilsson, A. (2007). Debug Interface for 56000 DSP. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9196

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Nilsson, Andreas. “Debug Interface for 56000 DSP.” 2007. Thesis, Linköping University. Accessed August 19, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9196.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Nilsson, Andreas. “Debug Interface for 56000 DSP.” 2007. Web. 19 Aug 2019.

Vancouver:

Nilsson A. Debug Interface for 56000 DSP. [Internet] [Thesis]. Linköping University; 2007. [cited 2019 Aug 19]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9196.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Nilsson A. Debug Interface for 56000 DSP. [Thesis]. Linköping University; 2007. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9196

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

27. Chen, Ying-Pei. A Area-Saving ROM Decoder and Design of Network Interface Controller.

Degree: Master, Electrical Engineering, 2000, NSYSU

 The thesis is composed of two different IC design projects, which are briefly introduced as follows. The first topic is an area-saving decoder structure for… (more)

Subjects/Keywords: Network Interface Controller; A Area-Saving ROM Decoder

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, Y. (2000). A Area-Saving ROM Decoder and Design of Network Interface Controller. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626100-134230

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Ying-Pei. “A Area-Saving ROM Decoder and Design of Network Interface Controller.” 2000. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626100-134230.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Ying-Pei. “A Area-Saving ROM Decoder and Design of Network Interface Controller.” 2000. Web. 19 Aug 2019.

Vancouver:

Chen Y. A Area-Saving ROM Decoder and Design of Network Interface Controller. [Internet] [Thesis]. NSYSU; 2000. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626100-134230.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen Y. A Area-Saving ROM Decoder and Design of Network Interface Controller. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626100-134230

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

28. Wang, Long-Cheng. Distributed Power Control and Monitoring System with Internet Integration.

Degree: Master, Electrical Engineering, 2002, NSYSU

 With the rapid development of Internet and computer technology, users can already have many applications with remote Control and Monitoring ï¼CMï¼capability, including the CM on… (more)

Subjects/Keywords: Dynamic HTML; Man-Machine Interface; Web Server

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APA (6th Edition):

Wang, L. (2002). Distributed Power Control and Monitoring System with Internet Integration. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0628102-091007

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Long-Cheng. “Distributed Power Control and Monitoring System with Internet Integration.” 2002. Thesis, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0628102-091007.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Long-Cheng. “Distributed Power Control and Monitoring System with Internet Integration.” 2002. Web. 19 Aug 2019.

Vancouver:

Wang L. Distributed Power Control and Monitoring System with Internet Integration. [Internet] [Thesis]. NSYSU; 2002. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0628102-091007.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang L. Distributed Power Control and Monitoring System with Internet Integration. [Thesis]. NSYSU; 2002. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0628102-091007

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

29. Huang, Tsung-Mou. Advanced Power Factor Correction Circuits for Sensor-less Brushless DC Motor Driver.

Degree: PhD, Electrical Engineering, 2014, NSYSU

 This dissertation proposed an advanced power factor correction circuit for sensor-less brush-less dc motor driver. At first, the comparison of permanent magnet synchronous motor and… (more)

Subjects/Keywords: Brushless dc motor; Human machine interface; Permanent magnet synchronous motor; Power factor correction; Sensor-less; Wind turbine generator

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, T. (2014). Advanced Power Factor Correction Circuits for Sensor-less Brushless DC Motor Driver. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0920114-191149

Chicago Manual of Style (16th Edition):

Huang, Tsung-Mou. “Advanced Power Factor Correction Circuits for Sensor-less Brushless DC Motor Driver.” 2014. Doctoral Dissertation, NSYSU. Accessed August 19, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0920114-191149.

MLA Handbook (7th Edition):

Huang, Tsung-Mou. “Advanced Power Factor Correction Circuits for Sensor-less Brushless DC Motor Driver.” 2014. Web. 19 Aug 2019.

Vancouver:

Huang T. Advanced Power Factor Correction Circuits for Sensor-less Brushless DC Motor Driver. [Internet] [Doctoral dissertation]. NSYSU; 2014. [cited 2019 Aug 19]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0920114-191149.

Council of Science Editors:

Huang T. Advanced Power Factor Correction Circuits for Sensor-less Brushless DC Motor Driver. [Doctoral Dissertation]. NSYSU; 2014. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0920114-191149


UCLA

30. Gottscho, Mark William. Opportunistic Memory Systems in Presence of Hardware Variability.

Degree: Electrical Engineering, 2017, UCLA

 The memory system presents many problems in computer architecture and system design. An important challenge is worsening hardware variability that is caused by nanometer-scale manufacturing… (more)

Subjects/Keywords: Computer engineering; Electrical engineering; Computer science; computer architecture; error-correcting codes; hardware/software interface; memory systems; reliability; variation-aware

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gottscho, M. W. (2017). Opportunistic Memory Systems in Presence of Hardware Variability. (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/85c1r1q9

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gottscho, Mark William. “Opportunistic Memory Systems in Presence of Hardware Variability.” 2017. Thesis, UCLA. Accessed August 19, 2019. http://www.escholarship.org/uc/item/85c1r1q9.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gottscho, Mark William. “Opportunistic Memory Systems in Presence of Hardware Variability.” 2017. Web. 19 Aug 2019.

Vancouver:

Gottscho MW. Opportunistic Memory Systems in Presence of Hardware Variability. [Internet] [Thesis]. UCLA; 2017. [cited 2019 Aug 19]. Available from: http://www.escholarship.org/uc/item/85c1r1q9.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gottscho MW. Opportunistic Memory Systems in Presence of Hardware Variability. [Thesis]. UCLA; 2017. Available from: http://www.escholarship.org/uc/item/85c1r1q9

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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