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You searched for subject:(incremental Sigma Delta). Showing records 1 – 7 of 7 total matches.

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Universidade do Rio Grande do Norte

1. Soares, Antonio Wallace Antunes. Análise e projeto de um Conversor A/D Sigma Delta Incremental Multicanal de 4º Ordem .

Degree: 2018, Universidade do Rio Grande do Norte

 Several applications in the instrumentation field require signal acquisition systems with medium conversion rate and medium to high resolution, among them are the Multielectrode Matrices… (more)

Subjects/Keywords: Conversores analógicos digitais; Sigma delta incremental; Sigma delta; Quarta ordem; Aplicações biomédicas; Matrizes multieletrodos; Modelagem; Capacitores chaveados

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Soares, A. W. A. (2018). Análise e projeto de um Conversor A/D Sigma Delta Incremental Multicanal de 4º Ordem . (Doctoral Dissertation). Universidade do Rio Grande do Norte. Retrieved from http://repositorio.ufrn.br/handle/123456789/26770

Chicago Manual of Style (16th Edition):

Soares, Antonio Wallace Antunes. “Análise e projeto de um Conversor A/D Sigma Delta Incremental Multicanal de 4º Ordem .” 2018. Doctoral Dissertation, Universidade do Rio Grande do Norte. Accessed October 26, 2020. http://repositorio.ufrn.br/handle/123456789/26770.

MLA Handbook (7th Edition):

Soares, Antonio Wallace Antunes. “Análise e projeto de um Conversor A/D Sigma Delta Incremental Multicanal de 4º Ordem .” 2018. Web. 26 Oct 2020.

Vancouver:

Soares AWA. Análise e projeto de um Conversor A/D Sigma Delta Incremental Multicanal de 4º Ordem . [Internet] [Doctoral dissertation]. Universidade do Rio Grande do Norte; 2018. [cited 2020 Oct 26]. Available from: http://repositorio.ufrn.br/handle/123456789/26770.

Council of Science Editors:

Soares AWA. Análise e projeto de um Conversor A/D Sigma Delta Incremental Multicanal de 4º Ordem . [Doctoral Dissertation]. Universidade do Rio Grande do Norte; 2018. Available from: http://repositorio.ufrn.br/handle/123456789/26770

2. Bisiaux, Pierre. Etude et conception de CAN haute résolution pour le domaine de l’imagerie : Design of high resolution analog-to-digital converters for CMOS image sensors.

Degree: Docteur es, Electronique et Optoélectronique, Nano- et Microtechnologies, 2018, Université Paris-Saclay (ComUE)

Cette thèse porte sur la conception et la réalisation de convertisseurs analogique/numérique (ADC) haute résolution dans le domaine de l’imagerie spatiale en technologie 0.18 μm.Un… (more)

Subjects/Keywords: Can; Imagerie; Sigma delta incrémental; Inverter-based; ADC; Image sensor; Incremental sigma delta; Inverter-based

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APA (6th Edition):

Bisiaux, P. (2018). Etude et conception de CAN haute résolution pour le domaine de l’imagerie : Design of high resolution analog-to-digital converters for CMOS image sensors. (Doctoral Dissertation). Université Paris-Saclay (ComUE). Retrieved from http://www.theses.fr/2018SACLC030

Chicago Manual of Style (16th Edition):

Bisiaux, Pierre. “Etude et conception de CAN haute résolution pour le domaine de l’imagerie : Design of high resolution analog-to-digital converters for CMOS image sensors.” 2018. Doctoral Dissertation, Université Paris-Saclay (ComUE). Accessed October 26, 2020. http://www.theses.fr/2018SACLC030.

MLA Handbook (7th Edition):

Bisiaux, Pierre. “Etude et conception de CAN haute résolution pour le domaine de l’imagerie : Design of high resolution analog-to-digital converters for CMOS image sensors.” 2018. Web. 26 Oct 2020.

Vancouver:

Bisiaux P. Etude et conception de CAN haute résolution pour le domaine de l’imagerie : Design of high resolution analog-to-digital converters for CMOS image sensors. [Internet] [Doctoral dissertation]. Université Paris-Saclay (ComUE); 2018. [cited 2020 Oct 26]. Available from: http://www.theses.fr/2018SACLC030.

Council of Science Editors:

Bisiaux P. Etude et conception de CAN haute résolution pour le domaine de l’imagerie : Design of high resolution analog-to-digital converters for CMOS image sensors. [Doctoral Dissertation]. Université Paris-Saclay (ComUE); 2018. Available from: http://www.theses.fr/2018SACLC030


Delft University of Technology

3. Chen, C. (author). Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.

Degree: 2012, Delft University of Technology

Microelectronics

Microelectronics & Computer Engineering

Electrical Engineering, Mathematics and Computer Science

Advisors/Committee Members: Pertijs, M.A.P. (mentor).

Subjects/Keywords: Incremental Delta-sigma ADC; self-timed; zero-crossing-based circuits; energy-efficient; low-power

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APA (6th Edition):

Chen, C. (. (2012). Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef

Chicago Manual of Style (16th Edition):

Chen, C (author). “Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.” 2012. Masters Thesis, Delft University of Technology. Accessed October 26, 2020. http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef.

MLA Handbook (7th Edition):

Chen, C (author). “Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.” 2012. Web. 26 Oct 2020.

Vancouver:

Chen C(. Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. [Internet] [Masters thesis]. Delft University of Technology; 2012. [cited 2020 Oct 26]. Available from: http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef.

Council of Science Editors:

Chen C(. Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. [Masters Thesis]. Delft University of Technology; 2012. Available from: http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef


Delft University of Technology

4. Kamath, U.R. (author). Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip.

Degree: 2012, Delft University of Technology

Glucose sensors are useful for monitoring and control of blood-sugar concentration for diabetic patients. There are many challenges in their wide-spread use and effectiveness in… (more)

Subjects/Keywords: glucose sensor; incremental Sigma-Delta; current input ADC; dynamic reference; wide-dynamic range; sensor adaptable ADC

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APA (6th Edition):

Kamath, U. R. (. (2012). Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:ea9d2e1c-5b03-44e9-b916-587fd737313f

Chicago Manual of Style (16th Edition):

Kamath, U R (author). “Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip.” 2012. Masters Thesis, Delft University of Technology. Accessed October 26, 2020. http://resolver.tudelft.nl/uuid:ea9d2e1c-5b03-44e9-b916-587fd737313f.

MLA Handbook (7th Edition):

Kamath, U R (author). “Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip.” 2012. Web. 26 Oct 2020.

Vancouver:

Kamath UR(. Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip. [Internet] [Masters thesis]. Delft University of Technology; 2012. [cited 2020 Oct 26]. Available from: http://resolver.tudelft.nl/uuid:ea9d2e1c-5b03-44e9-b916-587fd737313f.

Council of Science Editors:

Kamath UR(. Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip. [Masters Thesis]. Delft University of Technology; 2012. Available from: http://resolver.tudelft.nl/uuid:ea9d2e1c-5b03-44e9-b916-587fd737313f

5. Kook, Se Hun. Low-cost testing of high-precision analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 The advent of deep submicron technology has resulted in a new generation of highly integrated mixed-signal system-on-chips (SoCs) and system-on-packages (SoPs). As a result, the… (more)

Subjects/Keywords: Sigma Delta ADC; Incremental ADC; High-resolution ADC testing; Analog-to-digital converters; Test; Data converters; Analog-to-digital converters; Testing

…TESTING OF SIGMA-DELTA INCREMENTAL A/D CONVERTERS USING RESTRICTED CODE MEASUREMENTS 156 5.1… …ALTERNATE-BASED DYNAMIC TESTING OF HIGHRESOLUTION SIGMA-DELTA A/D CONVERTERS 31 2.1. 31… …PREVIOUS WORK 2.2. PROPOSED METHODOLOGY 2.2.1 Overview of Sigma-Delta A/D Converters 2.2.2 Core… …Behavioral Modeling of Sigma-Delta A/D Converters 2.3.1.1 Clock Jitter 2.3.1.2 Thermal Noise… …DYNAMIC TESTING OF HIGHRESOLUTION SIGMA-DELTA A/D CONVERTERS 83 3.1. 86 PREVIOUS WORK 3.2… 

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kook, S. H. (2011). Low-cost testing of high-precision analog-to-digital converters. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/41170

Chicago Manual of Style (16th Edition):

Kook, Se Hun. “Low-cost testing of high-precision analog-to-digital converters.” 2011. Doctoral Dissertation, Georgia Tech. Accessed October 26, 2020. http://hdl.handle.net/1853/41170.

MLA Handbook (7th Edition):

Kook, Se Hun. “Low-cost testing of high-precision analog-to-digital converters.” 2011. Web. 26 Oct 2020.

Vancouver:

Kook SH. Low-cost testing of high-precision analog-to-digital converters. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2020 Oct 26]. Available from: http://hdl.handle.net/1853/41170.

Council of Science Editors:

Kook SH. Low-cost testing of high-precision analog-to-digital converters. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/41170


University of Toronto

6. Caldwell, Trevor. Delta-Sigma Modulators with Low Oversampling Ratios.

Degree: 2010, University of Toronto

This dissertation explores methods of reducing the oversampling ratio (OSR) of both delta-sigma modulators and incremental data converters. The first reduced-OSR architecture is the high-order… (more)

Subjects/Keywords: delta-sigma modulator; incremental data converter; low oversampling ratio; 0544

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APA (6th Edition):

Caldwell, T. (2010). Delta-Sigma Modulators with Low Oversampling Ratios. (Doctoral Dissertation). University of Toronto. Retrieved from http://hdl.handle.net/1807/26352

Chicago Manual of Style (16th Edition):

Caldwell, Trevor. “Delta-Sigma Modulators with Low Oversampling Ratios.” 2010. Doctoral Dissertation, University of Toronto. Accessed October 26, 2020. http://hdl.handle.net/1807/26352.

MLA Handbook (7th Edition):

Caldwell, Trevor. “Delta-Sigma Modulators with Low Oversampling Ratios.” 2010. Web. 26 Oct 2020.

Vancouver:

Caldwell T. Delta-Sigma Modulators with Low Oversampling Ratios. [Internet] [Doctoral dissertation]. University of Toronto; 2010. [cited 2020 Oct 26]. Available from: http://hdl.handle.net/1807/26352.

Council of Science Editors:

Caldwell T. Delta-Sigma Modulators with Low Oversampling Ratios. [Doctoral Dissertation]. University of Toronto; 2010. Available from: http://hdl.handle.net/1807/26352


University of Toronto

7. Liang, Joshua. A Frequency-scalable 14-bit ADC for Low Power Sensor Applications.

Degree: 2009, University of Toronto

In this thesis, a 14-bit low-power Analog-to-Digital Converter (ADC) is designed for sensor applications. Following on previous work, the ADC is designed to be frequency… (more)

Subjects/Keywords: ADC; scalable; delta-sigma; incremental converter; 0544

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APA (6th Edition):

Liang, J. (2009). A Frequency-scalable 14-bit ADC for Low Power Sensor Applications. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/18802

Chicago Manual of Style (16th Edition):

Liang, Joshua. “A Frequency-scalable 14-bit ADC for Low Power Sensor Applications.” 2009. Masters Thesis, University of Toronto. Accessed October 26, 2020. http://hdl.handle.net/1807/18802.

MLA Handbook (7th Edition):

Liang, Joshua. “A Frequency-scalable 14-bit ADC for Low Power Sensor Applications.” 2009. Web. 26 Oct 2020.

Vancouver:

Liang J. A Frequency-scalable 14-bit ADC for Low Power Sensor Applications. [Internet] [Masters thesis]. University of Toronto; 2009. [cited 2020 Oct 26]. Available from: http://hdl.handle.net/1807/18802.

Council of Science Editors:

Liang J. A Frequency-scalable 14-bit ADC for Low Power Sensor Applications. [Masters Thesis]. University of Toronto; 2009. Available from: http://hdl.handle.net/1807/18802

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