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1.
Bowman, Clark Michael Riordan.
Data-Calibrated Modeling of Biological Soft Matter with
Dissipative Particle Dynamics and High-Performance Bayesian
Uncertainty Quantification.
Degree: Department of Applied Mathematics, 2018, Brown University
URL: https://repository.library.brown.edu/studio/item/bdr:792771/ 
► Fluids play a key role in the mechanics of cells and the soft-matter structures composing them; from the movement of molecules such as amino acids…
(more)
▼ Fluids play a key role in the mechanics of cells and
the soft-matter structures composing them; from the movement of
molecules such as amino acids via diffusion to the viscous forces
propelling flagellating organisms, accounting for the role of the
fluid environment is critical to understanding the mechanisms at
play. One of the major challenges in mathematical modeling of such
systems is developing an accurate, yet computationally feasible
representation of the fluid. Continuum approaches such as
Navier-Stokes neglect the thermal fluctuations and boundary effects
than can dominate flow behavior at the nanoscale, while explicit
models of the fluid via, e.g., molecular dynamics become
computationally infeasible for systems on the order of biological
cells which may have millions or billions of molecules. In this
thesis, we use dissipative particle dynamics, a particle method
which uses coarse-grained particles interacting with artificial
forces chosen to generate accurate fluid behavior, to model a
number of biofluidic systems of experimental interest, including
the diffusion of DNA in constrained environments, the mechanics of
poration in phospholipid membranes, and the mechanical force
profile of polymerizing actin networks in the cytoskeleton. The
simulation results are used to examine at the nanoscale the
dynamics underlying macroscopic behaviors observed in experiment,
answering a number of questions about the forces, energies,
motions, and mechanisms of biological soft matter with measurements
from the explicitly modeled fluid environment. We also introduce a
framework for
high-
performance Bayesian uncertainty quantification
and demonstrate an application to inferring structural properties
of lipids in a bilayer membrane, illustrating the feasibility of
data-driven model calibration for our complex dissipative particle
simulations using parallel
computing. Together, these methods allow
for a uniquely fine-scale look at the mechanics underpinning a
number of biologically relevant phenomena.
Advisors/Committee Members: Matzavinos, Anastasios (Advisor), Stein, Derek (Reader), Chaplain, Mark (Reader).
Subjects/Keywords: High performance computing
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APA (6th Edition):
Bowman, C. M. R. (2018). Data-Calibrated Modeling of Biological Soft Matter with
Dissipative Particle Dynamics and High-Performance Bayesian
Uncertainty Quantification. (Thesis). Brown University. Retrieved from https://repository.library.brown.edu/studio/item/bdr:792771/
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Bowman, Clark Michael Riordan. “Data-Calibrated Modeling of Biological Soft Matter with
Dissipative Particle Dynamics and High-Performance Bayesian
Uncertainty Quantification.” 2018. Thesis, Brown University. Accessed October 18, 2019.
https://repository.library.brown.edu/studio/item/bdr:792771/.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Bowman, Clark Michael Riordan. “Data-Calibrated Modeling of Biological Soft Matter with
Dissipative Particle Dynamics and High-Performance Bayesian
Uncertainty Quantification.” 2018. Web. 18 Oct 2019.
Vancouver:
Bowman CMR. Data-Calibrated Modeling of Biological Soft Matter with
Dissipative Particle Dynamics and High-Performance Bayesian
Uncertainty Quantification. [Internet] [Thesis]. Brown University; 2018. [cited 2019 Oct 18].
Available from: https://repository.library.brown.edu/studio/item/bdr:792771/.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Bowman CMR. Data-Calibrated Modeling of Biological Soft Matter with
Dissipative Particle Dynamics and High-Performance Bayesian
Uncertainty Quantification. [Thesis]. Brown University; 2018. Available from: https://repository.library.brown.edu/studio/item/bdr:792771/
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
2.
Rietmann, Max.
Local time stepping on high performance computing
architectures: mitigating CFL bottlenecks for large-scale wave
propagation.
Degree: 2015, Università della Svizzera italiana
URL: http://doc.rero.ch/record/255915
► Modeling problems that require the simulation of hyperbolic PDEs (wave equations) on large heterogeneous domains have potentially many bottlenecks. We attack this problem through two…
(more)
▼ Modeling problems that require the simulation of
hyperbolic PDEs (wave equations) on large heterogeneous domains
have potentially many bottlenecks. We attack this problem through
two techniques: the massively parallel capabilities of graphics
processors (GPUs) and local time stepping (LTS) to mitigate any CFL
bottlenecks on a multiscale mesh. Many modern supercomputing
centers are installing GPUs due to their
high performance, and
extending existing seismic wave-propagation software to use GPUs is
vitally important to give application scientists the highest
possible
performance. In addition to this architectural
optimization, LTS schemes avoid
performance losses in meshes with
localized areas of refinement. Coupled with the GPU
performance
optimizations, the derivation and implementation of an Newmark LTS
scheme enables next-generation
performance for real-world
applications. Included in this implementation is work addressing
the load-balancing problem inherent to multi-level LTS schemes,
enabling scalability to hundreds and thousands of CPUs and GPUs.
These GPU, LTS, and scaling optimizations accelerate the
performance of existing applications by a factor of 30 or more, and
enable future modeling scenarios previously made unfeasible by the
cost of standard explicit time-stepping schemes.
Advisors/Committee Members: Olaf (Dir.).
Subjects/Keywords: High performance computing
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APA (6th Edition):
Rietmann, M. (2015). Local time stepping on high performance computing
architectures: mitigating CFL bottlenecks for large-scale wave
propagation. (Thesis). Università della Svizzera italiana. Retrieved from http://doc.rero.ch/record/255915
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Rietmann, Max. “Local time stepping on high performance computing
architectures: mitigating CFL bottlenecks for large-scale wave
propagation.” 2015. Thesis, Università della Svizzera italiana. Accessed October 18, 2019.
http://doc.rero.ch/record/255915.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Rietmann, Max. “Local time stepping on high performance computing
architectures: mitigating CFL bottlenecks for large-scale wave
propagation.” 2015. Web. 18 Oct 2019.
Vancouver:
Rietmann M. Local time stepping on high performance computing
architectures: mitigating CFL bottlenecks for large-scale wave
propagation. [Internet] [Thesis]. Università della Svizzera italiana; 2015. [cited 2019 Oct 18].
Available from: http://doc.rero.ch/record/255915.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Rietmann M. Local time stepping on high performance computing
architectures: mitigating CFL bottlenecks for large-scale wave
propagation. [Thesis]. Università della Svizzera italiana; 2015. Available from: http://doc.rero.ch/record/255915
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Rutgers University
3.
Dufour, Bruno, 1981-.
Practical analysis of framework-intensive applications:.
Degree: PhD, Computer Science, 2010, Rutgers University
URL: http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000052105
► Many modern applications (e.g. web applications) are composed of a relatively small amount of application code that calls a large number of third-party libraries and…
(more)
▼ Many modern applications (e.g. web applications) are composed of a relatively small amount of application code that calls a large number of third-party libraries and frameworks. Such framework-intensive systems typically exhibit different
characteristics from traditional applications. Current tools and techniques
are often inadequate in analyzing applications of such scale and complexity. Approaches based on static analysis suffer problems of insufficient scalability and/or insufficient precision. Purely dynamic analyses,
introduce too much execution overhead, especially for production systems, or are too limited in the information gathered.
The main contribution of this thesis is a new analysis paradigm, blended analysis, combines elements of static and dynamic analyses in order to enable analyses of framework-intensive applications that achieve good precision at a practical cost. This is accomplished by narrowing the focus of a static analysis to a set of executions of interest identified using a lightweight dynamic analysis. We also present an optimization technique that further reduces the amount of code to be analyzed by removing infeasible basic blocks, and leads to significant increases in scalability and precision of the analysis. We contribute Elude, a publicly available framework for blended analysis of Java programs.
We demonstrate the usefuless of blended analysis in practice by applying it to object churn, a common problem in framework-intensive applications caused by the excessive usage of temporary objects. We present a set of new metrics to characterize the usage and complexity of temporaries. We use an instantiation of the blended analysis paradigm, blended escape analysis, to compute these metrics for a set of real framework-intensive applications. Using these results we perform a detailed analysis of temporaries in these
applications. We also use our technique to identify a set of problematic scenarios in a commercial application.
Advisors/Committee Members: Dufour, Bruno, 1981- (author), Ryder, Barbara (chair), Borgida, Alex (internal member), Ganapathy, Vinod (internal member), Podgurski, Andy (outside member).
Subjects/Keywords: High performance computing
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APA (6th Edition):
Dufour, Bruno, 1. (2010). Practical analysis of framework-intensive applications:. (Doctoral Dissertation). Rutgers University. Retrieved from http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000052105
Chicago Manual of Style (16th Edition):
Dufour, Bruno, 1981-. “Practical analysis of framework-intensive applications:.” 2010. Doctoral Dissertation, Rutgers University. Accessed October 18, 2019.
http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000052105.
MLA Handbook (7th Edition):
Dufour, Bruno, 1981-. “Practical analysis of framework-intensive applications:.” 2010. Web. 18 Oct 2019.
Vancouver:
Dufour, Bruno 1. Practical analysis of framework-intensive applications:. [Internet] [Doctoral dissertation]. Rutgers University; 2010. [cited 2019 Oct 18].
Available from: http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000052105.
Council of Science Editors:
Dufour, Bruno 1. Practical analysis of framework-intensive applications:. [Doctoral Dissertation]. Rutgers University; 2010. Available from: http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000052105
Virginia Tech
4.
Linford, John Christian.
Accelerating Atmospheric Modeling Through Emerging Multi-core Technologies.
Degree: PhD, Computer Science, 2010, Virginia Tech
URL: http://hdl.handle.net/10919/27599
► The new generations of multi-core chipset architectures achieve unprecedented levels of computational power while respecting physical and economical constraints. The cost of this power is…
(more)
▼ The new generations of multi-core chipset architectures achieve unprecedented levels of computational power while respecting physical and economical constraints. The cost of this power is bewildering program complexity. Atmospheric modeling is a grand-challenge problem that could make good use of these architectures if they were more accessible to the average programmer. To that end, software tools and programming methodologies that greatly simplify the acceleration of atmospheric modeling and simulation with emerging multi-core technologies are developed. A general model is developed to simulate atmospheric chemical transport and atmospheric chemical kinetics. The Cell Broadband Engine Architecture (CBEA), General Purpose Graphics Processing Units (GPGPUs), and homogeneous multi-core processors (e.g. Intel Quad-core Xeon) are introduced. These architectures are used in case studies of transport modeling and kinetics modeling and demonstrate per-kernel speedups as
high as 40x. A general analysis and code generation tool for chemical kinetics called "KPPA" is developed. KPPA generates highly tuned C, Fortran, or Matlab code that uses every layer of heterogeneous parallelism in the CBEA, GPGPU, and homogeneous multi-core architectures. A scalable method for simulating chemical transport is also developed. The Weather Research and Forecasting Model with Chemistry (WRF-Chem) is accelerated with these methods with good results: real forecasts of air quality are generated for the Eastern United States 65% faster than the state-of-the-art models.
Advisors/Committee Members: Sandu, Adrian (committeechair), Ribbens, Calvin J. (committee member), Marr, Linsey C. (committee member), Plassmann, Paul E. (committee member), Nikolopoulos, Dimitrios S. (committee member).
Subjects/Keywords: hardware; high performance computing; software
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Manager
APA (6th Edition):
Linford, J. C. (2010). Accelerating Atmospheric Modeling Through Emerging Multi-core Technologies. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/27599
Chicago Manual of Style (16th Edition):
Linford, John Christian. “Accelerating Atmospheric Modeling Through Emerging Multi-core Technologies.” 2010. Doctoral Dissertation, Virginia Tech. Accessed October 18, 2019.
http://hdl.handle.net/10919/27599.
MLA Handbook (7th Edition):
Linford, John Christian. “Accelerating Atmospheric Modeling Through Emerging Multi-core Technologies.” 2010. Web. 18 Oct 2019.
Vancouver:
Linford JC. Accelerating Atmospheric Modeling Through Emerging Multi-core Technologies. [Internet] [Doctoral dissertation]. Virginia Tech; 2010. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/10919/27599.
Council of Science Editors:
Linford JC. Accelerating Atmospheric Modeling Through Emerging Multi-core Technologies. [Doctoral Dissertation]. Virginia Tech; 2010. Available from: http://hdl.handle.net/10919/27599
Georgia Tech
5.
Clay, Matthew Paul.
Strained turbulence and low-diffusivity turbulent mixing using high performance computing.
Degree: PhD, Aerospace Engineering, 2017, Georgia Tech
URL: http://hdl.handle.net/1853/60184
► In this thesis, turbulent flows are studied using the method of direct numerical simulation (DNS), whereby exact governing equations are computed without modeling. Beginning with…
(more)
▼ In this thesis, turbulent flows are studied using the method of direct numerical simulation (DNS), whereby exact governing equations are computed without modeling. Beginning with isotropic turbulence and turbulent mixing under axisymmetric contraction, comparisons with experiments are made by directly modeling strain rates from wind tunnel facilities in the DNS. The simulations reproduce key findings from the experiments for the evolution of the one-dimensional component velocity spectra, which are strongly influenced by spectral transfer and pressure-strain mechanisms following the contraction. For simulations of low-diffusivity (i.e.,
high Schmidt number) turbulent mixing in isotropic turbulence, the increased resolution requirements of the Batchelor scales are addressed by adopting a dual-grid dual-scheme numerical approach. The one-way coupling of the velocity and passive scalar fields, along with their disparate resolution requirements at
high Schmidt number, are exploited in the design of the parallel code by
computing each field separately in disjoint message passing communicators. Good scalability of the code up to O(10
5) cores on machines at multiple national supercomputer centers is maintained by overlapping communication and computation through extensive use of shared-memory programming, both in homogeneous and heterogeneous (i.e., GPU-accelerated)
computing environments. Simulations of passive scalars maintained under a uniform mean gradient in forced isotropic turbulence are conducted. The highest grid resolution employed is 8192
3 (0.5 trillion) for a scalar of Schmidt number 512, which is comparable to salinity mixing in the ocean. The results give strong support to the emergence of Batchelor scaling in the scalar spectrum and an approach toward local isotropy with increasing Schmidt number.
Advisors/Committee Members: Yeung, P. K. (advisor), Aidun, Cyrus K. (committee member), Ranjan, Devesh (committee member), Smith, Marilyn J. (committee member), Chow, Edmond (committee member).
Subjects/Keywords: Turbulence; DNS; High performance computing
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Manager
APA (6th Edition):
Clay, M. P. (2017). Strained turbulence and low-diffusivity turbulent mixing using high performance computing. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/60184
Chicago Manual of Style (16th Edition):
Clay, Matthew Paul. “Strained turbulence and low-diffusivity turbulent mixing using high performance computing.” 2017. Doctoral Dissertation, Georgia Tech. Accessed October 18, 2019.
http://hdl.handle.net/1853/60184.
MLA Handbook (7th Edition):
Clay, Matthew Paul. “Strained turbulence and low-diffusivity turbulent mixing using high performance computing.” 2017. Web. 18 Oct 2019.
Vancouver:
Clay MP. Strained turbulence and low-diffusivity turbulent mixing using high performance computing. [Internet] [Doctoral dissertation]. Georgia Tech; 2017. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1853/60184.
Council of Science Editors:
Clay MP. Strained turbulence and low-diffusivity turbulent mixing using high performance computing. [Doctoral Dissertation]. Georgia Tech; 2017. Available from: http://hdl.handle.net/1853/60184
Georgia Tech
6.
Nihalani, Rahul.
Techniques to Improve Genome Assembly Quality.
Degree: PhD, Computational Science and Engineering, 2019, Georgia Tech
URL: http://hdl.handle.net/1853/61272
► De-novo genome assembly is an important problem in the field of genomics. Discovering and analysing genomes of different species has numerous applications. For humans, it…
(more)
▼ De-novo genome assembly is an important problem in the field of genomics. Discovering and analysing genomes of different species has numerous applications. For humans, it can lead to early detection of disease traits and timely prevention of diseases like cancer. In addition, it is useful in discovering genomes of unknown species. Even though it has received enormous attention in the last couple of decades, the problem remains unsolved to a satisfactory level, as shown in various scientific
studies. Paired-end sequencing is a technology that sequences pairs of short strands from a genome, called reads. The pairs of reads originate from nearby genomic locations, and are commonly used to help more accurately determine the genomic
location of individual reads and resolve repeats in genome assembly. In this thesis, we describe the genome assembly problem, and the key challenges involved in solving it.
We discuss related work where we describe the two most popular models to approach the problem: de-Bruijn graphs and overlap graphs, along with their pros and cons. We describe our proposed techniques to improve the quality of genome assembly. Our main contribution in this work is designing a de-Bruijn graph based assembly
algorithm to effectively utilize paired reads to improve genome assembly quality. We also discuss how our algorithm tackles some of the key challenges involved in genome
assembly. We adapt this algorithm to design a parallel strategy to obtain
high quality assembly for large datasets such as rice within reasonable time-frame. In addition, we describe our work on probabilistically estimating overlap graphs for large short reads datasets. We discuss the results obtained for our work, and conclude with some future work.
Advisors/Committee Members: Aluru, Srinivas (advisor), Vuduc, Richard (committee member), Jordan, King (committee member), Wang, May Dongmei (committee member), Catalyurek, Umit V. (committee member).
Subjects/Keywords: Genome assembly; High performance computing
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APA (6th Edition):
Nihalani, R. (2019). Techniques to Improve Genome Assembly Quality. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/61272
Chicago Manual of Style (16th Edition):
Nihalani, Rahul. “Techniques to Improve Genome Assembly Quality.” 2019. Doctoral Dissertation, Georgia Tech. Accessed October 18, 2019.
http://hdl.handle.net/1853/61272.
MLA Handbook (7th Edition):
Nihalani, Rahul. “Techniques to Improve Genome Assembly Quality.” 2019. Web. 18 Oct 2019.
Vancouver:
Nihalani R. Techniques to Improve Genome Assembly Quality. [Internet] [Doctoral dissertation]. Georgia Tech; 2019. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1853/61272.
Council of Science Editors:
Nihalani R. Techniques to Improve Genome Assembly Quality. [Doctoral Dissertation]. Georgia Tech; 2019. Available from: http://hdl.handle.net/1853/61272
University of New Mexico
7.
Leon Borja, Edgar.
Improving the performance of parallel scientific applications using cache injection.
Degree: Department of Computer Science, 2009, University of New Mexico
URL: http://hdl.handle.net/1928/9348
► Cache injection is a viable technique to improve the performance of data-intensive parallel applications. This dissertation characterizes cache injection of incoming network data in terms…
(more)
▼ Cache injection is a viable technique to improve the
performance of data-intensive parallel applications. This dissertation characterizes cache injection of incoming network data in terms of parallel application
performance. My results show that the benefit of this technique is dependent on: the ratio of processor speed to memory speed, the cache injection policy, and the application's communication characteristics. Cache injection addresses the memory wall for I/O by writing data into a processor's cache directly from the I/O bus. This technique, unlike data prefetching, reduces the number of reads served by the memory unit. This reduction is significant for data-intensive applications whose
performance is dominated by compulsory cache misses and cannot be alleviated by traditional caching systems. Unlike previous work on cache injection which focused on reducing host network stack overhead incurred by memory copies, I show that applications can directly benefit from this technique based on their temporal and spatial locality in accessing incoming network data. I also show that the
performance of cache injection is directly proportional to the ratio of processor speed to memory speed. In other words, systems with a memory wall can provide significantly better
performance with cache injection and an appropriate injection policy. This result implies that multi-core and many-core architectures would benefit from this technique. Finally, my results show that the application's communication characteristics are key to cache injection
performance. For example, cache injection can improve the
performance of certain collective communication operations by up to 20% as a function of message size.
Advisors/Committee Members: Maccabe, Arthur, Riesen, Rolf, Bridges, Patrick, da Silva, Dilma, Teller, Patricia.
Subjects/Keywords: cache injection; high-performance computing
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APA ·
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Manager
APA (6th Edition):
Leon Borja, E. (2009). Improving the performance of parallel scientific applications using cache injection. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/9348
Chicago Manual of Style (16th Edition):
Leon Borja, Edgar. “Improving the performance of parallel scientific applications using cache injection.” 2009. Doctoral Dissertation, University of New Mexico. Accessed October 18, 2019.
http://hdl.handle.net/1928/9348.
MLA Handbook (7th Edition):
Leon Borja, Edgar. “Improving the performance of parallel scientific applications using cache injection.” 2009. Web. 18 Oct 2019.
Vancouver:
Leon Borja E. Improving the performance of parallel scientific applications using cache injection. [Internet] [Doctoral dissertation]. University of New Mexico; 2009. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1928/9348.
Council of Science Editors:
Leon Borja E. Improving the performance of parallel scientific applications using cache injection. [Doctoral Dissertation]. University of New Mexico; 2009. Available from: http://hdl.handle.net/1928/9348
Rutgers University
8.
Qin, Yubo.
Exploring power-performance-quality tradeoffs for exascale combustion simulation.
Degree: MS, Electrical and Computer Engineering, 2016, Rutgers University
URL: https://rucore.libraries.rutgers.edu/rutgers-lib/50136/
► The computational demand of high-performance computing (HPC) applications has brought major changes to the HPC system architecture. As a result, it is now possible to…
(more)
▼ The computational demand of
high-
performance computing (HPC) applications has brought major changes to the HPC system architecture. As a result, it is now possible to run simulations faster and get more accurate results. But behind this, power and energy are becoming critical concerns for HPC systems, e.g. Titan’s electric cost is about $9 million per year. Energy efficiency has become a critical challenge for the exascale research challenges, and U.S. Department of Energy’s (DOE) gives the goal to achieve exascale
performance with a power budget of 20MW. Current research efforts have studied power and
performance tradeoffs, and how to balance these, e.g., using DVFS to meet power constraints, which significantly impacts
performance. However, scientific applications may not tolerate degradation in
performance and other tradeoffs need to be explored to meet power budgets, e.g., involving the application in making energy-
performance tradeoff decisions. In this research, we focus on studying the properties and exploring the
performance and power/energy tradeoffs of Low-Mach-Number Combustion (LMC) application which is an Adaptive Mesh Refinement (AMR) algorithm. Our experimental evaluation provides an empirical evaluation of different application configurations that gives insights into the power-
performance tradeoffs space for this LMC or AMR-based application workflows. The key contribution of this work is a better understanding of the running behavior of this AMR-based application and proposed a power-
performance tradeoff for this application, which can be used to better schedule power budgets across HPC systems.
Advisors/Committee Members: Rodero, Ivan (chair).
Subjects/Keywords: Combustion; High performance computing
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APA (6th Edition):
Qin, Y. (2016). Exploring power-performance-quality tradeoffs for exascale combustion simulation. (Masters Thesis). Rutgers University. Retrieved from https://rucore.libraries.rutgers.edu/rutgers-lib/50136/
Chicago Manual of Style (16th Edition):
Qin, Yubo. “Exploring power-performance-quality tradeoffs for exascale combustion simulation.” 2016. Masters Thesis, Rutgers University. Accessed October 18, 2019.
https://rucore.libraries.rutgers.edu/rutgers-lib/50136/.
MLA Handbook (7th Edition):
Qin, Yubo. “Exploring power-performance-quality tradeoffs for exascale combustion simulation.” 2016. Web. 18 Oct 2019.
Vancouver:
Qin Y. Exploring power-performance-quality tradeoffs for exascale combustion simulation. [Internet] [Masters thesis]. Rutgers University; 2016. [cited 2019 Oct 18].
Available from: https://rucore.libraries.rutgers.edu/rutgers-lib/50136/.
Council of Science Editors:
Qin Y. Exploring power-performance-quality tradeoffs for exascale combustion simulation. [Masters Thesis]. Rutgers University; 2016. Available from: https://rucore.libraries.rutgers.edu/rutgers-lib/50136/
Georgia Tech
9.
Schieber, Matthew Cole.
Optimizing computational kernels in quantum chemistry.
Degree: MS, Computational Science and Engineering, 2018, Georgia Tech
URL: http://hdl.handle.net/1853/59949
► Density fitting is a rank reduction technique popularly used in quantum chemistry in order to reduce the computational cost of evaluating, transforming, and processing the…
(more)
▼ Density fitting is a rank reduction technique popularly used in quantum chemistry in
order to reduce the computational cost of evaluating, transforming, and processing the
4-center electron repulsion integrals (ERIs). By utilizing the resolution of the identity technique, density fitting reduces the 4-center ERIs into a 3-center form. Doing so not only alleviates the
high storage cost of the ERIs, but it also reduces the computational cost of operations involving them. Still, these operations can remain as computational bottlenecks which commonly plague quantum chemistry procedures. The goal of this thesis is to investigate various optimizations for density-fitted version of computational kernels used ubiquitously throughout quantum chemistry. First, we detail the spatial sparsity available to the 3-center integrals and the application of such sparsity to various operations, including integral computation, metric contractions, and integral transformations. Next, we investigate sparse memory layouts and their implication on the
performance of the integral transformation kernel. Next, we analyze two transformation algorithms and how their
performance will vary depending on the context in which they are used. Then, we propose two sparse memory layouts and the resulting
performance of Coulomb and exchange evaluations. Since the memory required for these tensors grows rapidly, we frame these discussions in the context of their in-core and disk
performance. We implement these methods in the P SI 4 electronic structure package and reveal the optimal algorithm for the kernel should vary depending on whether a disk-based implementation must be used.
Advisors/Committee Members: Sherrill, Charles D. (advisor), Chow, Edmond (committee member), McDaniel, Jesse (committee member).
Subjects/Keywords: Quantum chemistry; Parallel computing; High performance computing
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APA (6th Edition):
Schieber, M. C. (2018). Optimizing computational kernels in quantum chemistry. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/59949
Chicago Manual of Style (16th Edition):
Schieber, Matthew Cole. “Optimizing computational kernels in quantum chemistry.” 2018. Masters Thesis, Georgia Tech. Accessed October 18, 2019.
http://hdl.handle.net/1853/59949.
MLA Handbook (7th Edition):
Schieber, Matthew Cole. “Optimizing computational kernels in quantum chemistry.” 2018. Web. 18 Oct 2019.
Vancouver:
Schieber MC. Optimizing computational kernels in quantum chemistry. [Internet] [Masters thesis]. Georgia Tech; 2018. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1853/59949.
Council of Science Editors:
Schieber MC. Optimizing computational kernels in quantum chemistry. [Masters Thesis]. Georgia Tech; 2018. Available from: http://hdl.handle.net/1853/59949
Texas State University – San Marcos
10.
Saha, Biplab Kumar.
Towards a Framework for Automating the Workflow for Building Machine Learning Based Performance Tuning.
Degree: MS, Computer Science, 2016, Texas State University – San Marcos
URL: https://digital.library.txstate.edu/handle/10877/6343
► Recent interest in machine learning-based methods have produced many sophisticated models for performance modeling and optimi:,ation. These models tend to be sensitive to architectural parameters…
(more)
▼ Recent interest in machine learning-based methods have produced many sophisticated models for
performance modeling and optimi:,ation. These models tend to be sensitive to architectural parameters and are most effective when trained on the target platform. Training of these models; however; is a fairly involved process and requires knowledge of statistics and machine learning that the end-users of such models may not possess. This paper presents a framework for automatically generating machine learning-based
performance models. Leveraging existing open-source software; we provide a tool-chain that provides automated mechanisms for sample generation; dynamic feature extraction; feature selection; data labeling; validation and model selection. We describe the design of the framework and demonstrate its effectiveness by developing a learning heuristic for register allocation of GPU kernels. The results show the newly created models are accurate and can predict register caps that lead to substantial improvements in execution time without incurring a penalty in power consumption.
Advisors/Committee Members: Qasem, Apan (advisor), Ekstrand, Michael (committee member), Metsis, Vangelis (committee member).
Subjects/Keywords: High performance computing; Machine learning; High performance computing; Machine learning
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APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
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to Zotero / EndNote / Reference
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APA (6th Edition):
Saha, B. K. (2016). Towards a Framework for Automating the Workflow for Building Machine Learning Based Performance Tuning. (Masters Thesis). Texas State University – San Marcos. Retrieved from https://digital.library.txstate.edu/handle/10877/6343
Chicago Manual of Style (16th Edition):
Saha, Biplab Kumar. “Towards a Framework for Automating the Workflow for Building Machine Learning Based Performance Tuning.” 2016. Masters Thesis, Texas State University – San Marcos. Accessed October 18, 2019.
https://digital.library.txstate.edu/handle/10877/6343.
MLA Handbook (7th Edition):
Saha, Biplab Kumar. “Towards a Framework for Automating the Workflow for Building Machine Learning Based Performance Tuning.” 2016. Web. 18 Oct 2019.
Vancouver:
Saha BK. Towards a Framework for Automating the Workflow for Building Machine Learning Based Performance Tuning. [Internet] [Masters thesis]. Texas State University – San Marcos; 2016. [cited 2019 Oct 18].
Available from: https://digital.library.txstate.edu/handle/10877/6343.
Council of Science Editors:
Saha BK. Towards a Framework for Automating the Workflow for Building Machine Learning Based Performance Tuning. [Masters Thesis]. Texas State University – San Marcos; 2016. Available from: https://digital.library.txstate.edu/handle/10877/6343
University of Tasmania
11.
Atkinson, AK.
Tupleware: a distributed tuple space for the development and execution of array-based applications in a cluster computing environment.
Degree: 2010, University of Tasmania
URL: https://eprints.utas.edu.au/9996/1/Alistair_Atkinson_PhD_Thesis.pdf
► This thesis describes Tupleware, an implementation of a distributed tuple space which acts as a scalable and efficient cluster middleware for computationally intensive numerical and…
(more)
▼ This thesis describes Tupleware, an implementation of a distributed tuple space which acts as a scalable and efficient cluster middleware for computationally intensive numerical and scientific applications. Tupleware is based on the Linda coordination language (Gelernter 1985), and incorporates additional techniques such as peer-to-peer communications and exploitation of data locality in order to address problems such as scalability and performance, which are commonly encountered by traditional centralised tuple space implementations.
Tupleware is implemented in such as way that, whilepr ocessing is taking place, all communication between cluster nodes is decentralised in a peer-to-peer fashion. Communication events are initiated by a node requesting a tuple which is located on a remote node, and in order to make tuple retrieval as efficient as possible, a tuple
search algorithm is used to minimise the number of communication instances required to retrieve a remote tuple. This algorithm is based on the locality of a remote
tuple and the success of previous remote tuple requests. As Tupleware is targetted at numerical applications which generally involve the partitioning and processing of 1-D or 2-D arrays, the locality of a remote tuple can generally be determined as being located on one of a small number nodes which are processing neighbouring partitions of the array.
Furthermore, unlike some other distributed tuple space implementations, Tupleware does not burden the programmer with any additional complexity due to this distribution. At the application level, the Tupleware middleware behaves exactly like a centralised tuple space, and provides much greater flexibility with regards to where components of a system are executed.
The design and implementation of Tupleware is described, and placed in the context of other distributed tuple space implementations, along with the specific requirements of the applications that the system caters for. Finally, Tupleware is evaluated using several numerical and/or scientific applications, which show it to provide a sufficient level of scalability for a broad range tasks.
The main contribution of this work is the identification of techniques which enable a tuple space to be efficiently and transparently distributed across the nodes in a cluster. Central to this is the use of an algorithm for tuple retrieval which minimises the number of communication instances which occur during system execution. Distribution transparency is ensured by the provision of a simple interface to the underlying system, so that the distributed tuple space appears to the programmer as a single unified resource.
It is hoped that this research in some way furthers the adoption of the tuple space programming model for distributed computing, by enhancing its ability to
provide improved performance, scalability, flexibility and simplicity for a range of applications not traditionally suited to tuple space based systems.
Subjects/Keywords: Distributed computing; parallel computing; concurrency; high-performance computing; tuple space.
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APA ·
Chicago ·
MLA ·
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CSE |
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APA (6th Edition):
Atkinson, A. (2010). Tupleware: a distributed tuple space for the development and execution of array-based applications in a cluster computing environment. (Thesis). University of Tasmania. Retrieved from https://eprints.utas.edu.au/9996/1/Alistair_Atkinson_PhD_Thesis.pdf
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Atkinson, AK. “Tupleware: a distributed tuple space for the development and execution of array-based applications in a cluster computing environment.” 2010. Thesis, University of Tasmania. Accessed October 18, 2019.
https://eprints.utas.edu.au/9996/1/Alistair_Atkinson_PhD_Thesis.pdf.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Atkinson, AK. “Tupleware: a distributed tuple space for the development and execution of array-based applications in a cluster computing environment.” 2010. Web. 18 Oct 2019.
Vancouver:
Atkinson A. Tupleware: a distributed tuple space for the development and execution of array-based applications in a cluster computing environment. [Internet] [Thesis]. University of Tasmania; 2010. [cited 2019 Oct 18].
Available from: https://eprints.utas.edu.au/9996/1/Alistair_Atkinson_PhD_Thesis.pdf.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Atkinson A. Tupleware: a distributed tuple space for the development and execution of array-based applications in a cluster computing environment. [Thesis]. University of Tasmania; 2010. Available from: https://eprints.utas.edu.au/9996/1/Alistair_Atkinson_PhD_Thesis.pdf
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Cape Peninsula University of Technology
12.
Killian, Rudi.
Dynamic superscalar grid for technical debt reduction
.
Degree: 2018, Cape Peninsula University of Technology
URL: http://etd.cput.ac.za/handle/20.500.11838/2726
► Organizations and the private individual, look to technology advancements to increase their ability to make informed decisions. The motivation for technology adoption by entities sprouting…
(more)
▼ Organizations and the private individual, look to technology advancements to increase their ability to make informed decisions. The motivation for technology adoption by entities sprouting from an innate need for value generation. The technology currently heralded as the future platform to facilitate value addition, is popularly termed cloud computing. The move to cloud computing however, may conceivably increase the obsolescence cycle for currently retained Information Technology (IT) assets. The term obsolescence, applied as the inability to repurpose or scale an information system resource for needed functionality. The incapacity to reconfigure, grow or shrink an IT asset, be it hardware or software is a well-known narrative of technical debt. The notion of emergent technical debt realities is professed to be all but inevitable when informed by Moore’s Law, as technology must inexorably advance. Of more imminent concern however are that major accelerating factors of technical debt are deemed as non-holistic conceptualization and design conventions. Should management of IT assets fail to address technical debt continually, the technology platform would predictably require replacement. The unrealized value, functional and fiscal loss, together with the resultant e-waste generated by technical debt is meaningfully unattractive. Historically, the cloud milieu had evolved from the grid and clustering paradigms which allowed for information sourcing across multiple and often dispersed computing platforms. The parallel operations in distributed computing environments are inherently value adding, as enhanced effective use of resources and efficiency in data handling may be achieved. The predominant information processing solutions that implement parallel operations in distributed environments are abstracted constructs, styled as High Performance Computing (HPC) or High Throughput Computing (HTC). Regardless of the underlying distributed environment, the archetypes of HPC and HTC differ radically in standard implementation. The foremost contrasting factors of parallelism granularity, failover and locality in data handling have recently been the subject of greater academic discourse towards possible fusion of the two technologies. In this research paper, we uncover probable platforms of future technical debt and subsequently recommend redeployment alternatives. The suggested alternatives take the form of scalable grids, which should provide alignment with the contemporary nature of individual information processing needs. The potential of grids, as efficient and effective information sourcing solutions across geographically dispersed heterogeneous systems are envisioned to reduce or delay aspects of technical debt. As part of an experimental investigation to test plausibility of concepts, artefacts are designed to generically implement HPC and HTC. The design features exposed by the experimental artefacts, could provide insights towards amalgamation of HPC and HTC.
Subjects/Keywords: Computational grids (Computer systems);
Cloud computing;
High performance computing;
Heterogeneous computing
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APA (6th Edition):
Killian, R. (2018). Dynamic superscalar grid for technical debt reduction
. (Thesis). Cape Peninsula University of Technology. Retrieved from http://etd.cput.ac.za/handle/20.500.11838/2726
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Killian, Rudi. “Dynamic superscalar grid for technical debt reduction
.” 2018. Thesis, Cape Peninsula University of Technology. Accessed October 18, 2019.
http://etd.cput.ac.za/handle/20.500.11838/2726.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Killian, Rudi. “Dynamic superscalar grid for technical debt reduction
.” 2018. Web. 18 Oct 2019.
Vancouver:
Killian R. Dynamic superscalar grid for technical debt reduction
. [Internet] [Thesis]. Cape Peninsula University of Technology; 2018. [cited 2019 Oct 18].
Available from: http://etd.cput.ac.za/handle/20.500.11838/2726.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Killian R. Dynamic superscalar grid for technical debt reduction
. [Thesis]. Cape Peninsula University of Technology; 2018. Available from: http://etd.cput.ac.za/handle/20.500.11838/2726
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Vanderbilt University
13.
Varshneya, Pooja.
Distributed and Adaptive Parallel Computing for Computational Finance Applications.
Degree: MS, Computer Science, 2010, Vanderbilt University
URL: http://etd.library.vanderbilt.edu/available/etd-06082010-053600/
;
► Analysts, scientist, engineers, and multimedia professionals require massive processing power to analyze financial trends, create test simulations, model climate, compile code, render video, decode genomes…
(more)
▼ Analysts, scientist, engineers, and multimedia professionals require massive processing power to analyze financial trends, create test simulations, model climate, compile code, render video, decode genomes and other complex tasks. These group of applications can greatly benefit from the use of adaptive, parallel
computing middleware that can enable quick parallelization of existing applications and improve application
performance by porting these applications on parallel
computing platforms like HPC clusters, clouds and multi-core machines.
This work focuses on benchmarking the
performance of currently available parallel
computing frameworks: OpenMPI and Zircon middleware software, using computation-intensive financial computation applications like binomial option pricing and heston calibrations for option pricing and also compares and contrasts the pros and cons of the two frameworks.
Advisors/Committee Members: Dr. Aniruddha Gokhale (committee member), Dr. Douglas C. Schmidt (chair).
Subjects/Keywords: distributed adaptive computing; MPI; parallel computing; high performance computing
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APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
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APA (6th Edition):
Varshneya, P. (2010). Distributed and Adaptive Parallel Computing for Computational Finance Applications. (Masters Thesis). Vanderbilt University. Retrieved from http://etd.library.vanderbilt.edu/available/etd-06082010-053600/ ;
Chicago Manual of Style (16th Edition):
Varshneya, Pooja. “Distributed and Adaptive Parallel Computing for Computational Finance Applications.” 2010. Masters Thesis, Vanderbilt University. Accessed October 18, 2019.
http://etd.library.vanderbilt.edu/available/etd-06082010-053600/ ;.
MLA Handbook (7th Edition):
Varshneya, Pooja. “Distributed and Adaptive Parallel Computing for Computational Finance Applications.” 2010. Web. 18 Oct 2019.
Vancouver:
Varshneya P. Distributed and Adaptive Parallel Computing for Computational Finance Applications. [Internet] [Masters thesis]. Vanderbilt University; 2010. [cited 2019 Oct 18].
Available from: http://etd.library.vanderbilt.edu/available/etd-06082010-053600/ ;.
Council of Science Editors:
Varshneya P. Distributed and Adaptive Parallel Computing for Computational Finance Applications. [Masters Thesis]. Vanderbilt University; 2010. Available from: http://etd.library.vanderbilt.edu/available/etd-06082010-053600/ ;
Utah State University
14.
Steven Monteiro, Steena Dominica.
Statistical Techniques to Model and Optimize Performance of Scientific, Numerically Intensive Workloads.
Degree: PhD, Computer Science, 2016, Utah State University
URL: https://digitalcommons.usu.edu/etd/5228
► Projecting performance of applications and hardware is important to several market segments—hardware designers, software developers, supercomputing centers, and end users. Hardware designers estimate performance…
(more)
▼ Projecting
performance of applications and hardware is important to several market segments—hardware designers, software developers, supercomputing centers, and end users. Hardware designers estimate
performance of current applications on future systems when designing new hardware. Software developers make
performance estimates to evaluate
performance of their code on different architectures and input datasets. Supercomputing centers try to optimize the process of matching
computing resources to
computing needs. End users requesting time on supercomputers must provide estimates of their application’s run time, and incorrect estimates can lead to wasted supercomputing resources and time. However, application
performance is challenging to predict because it is affected by several factors in application code, specifications of system hardware, choice of compilers, compiler flags, and libraries.
This dissertation uses statistical techniques to model and optimize
performance of scientific applications across different computer processors. The first study in this research offers statistical models that predict
performance of an application across different input datasets prior to application execution. These models guide end users to select parameters that produce optimal application
performance during execution. The second study offers a suite of statistical models that predict
performance of a new application on a new processor. Both studies present statistical techniques that can be generalized to analyze, optimize, and predict
performance of diverse computation- and data-intensive applications on different hardware.
Advisors/Committee Members: Amanda Lee Hughes, ;.
Subjects/Keywords: performance prediction; performance analysis; performance modeling; high performance computing; Computer Sciences
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Manager
APA (6th Edition):
Steven Monteiro, S. D. (2016). Statistical Techniques to Model and Optimize Performance of Scientific, Numerically Intensive Workloads. (Doctoral Dissertation). Utah State University. Retrieved from https://digitalcommons.usu.edu/etd/5228
Chicago Manual of Style (16th Edition):
Steven Monteiro, Steena Dominica. “Statistical Techniques to Model and Optimize Performance of Scientific, Numerically Intensive Workloads.” 2016. Doctoral Dissertation, Utah State University. Accessed October 18, 2019.
https://digitalcommons.usu.edu/etd/5228.
MLA Handbook (7th Edition):
Steven Monteiro, Steena Dominica. “Statistical Techniques to Model and Optimize Performance of Scientific, Numerically Intensive Workloads.” 2016. Web. 18 Oct 2019.
Vancouver:
Steven Monteiro SD. Statistical Techniques to Model and Optimize Performance of Scientific, Numerically Intensive Workloads. [Internet] [Doctoral dissertation]. Utah State University; 2016. [cited 2019 Oct 18].
Available from: https://digitalcommons.usu.edu/etd/5228.
Council of Science Editors:
Steven Monteiro SD. Statistical Techniques to Model and Optimize Performance of Scientific, Numerically Intensive Workloads. [Doctoral Dissertation]. Utah State University; 2016. Available from: https://digitalcommons.usu.edu/etd/5228
Penn State University
15.
Shantharam, Manu.
Algorithmic Approaches for Enhancing Speedup, Energy and
Resiliency Measures of Sparse Scientific Computations.
Degree: PhD, Computer Science and Engineering, 2012, Penn State University
URL: https://etda.libraries.psu.edu/catalog/15740
► High performance computing systems have increasingly complex node and network architectures including non-uniform memory subsystems, heterogeneous processors and hierarchical interconnects. The performance of scientific applications…
(more)
▼ High performance computing systems have increasingly
complex node and network architectures including non-uniform memory
subsystems, heterogeneous processors and hierarchical
interconnects. The performance of scientific applications that run
on such systems depends on several factors including memory access
pattern, memory bandwidth, load balancing and resiliency.
Consequently, optimizing the performance of scientific applications
for high performance computing systems is challenging. We seek to
address this challenge for applications involving sparse scientific
computations because such computations form the basis for solving
many large-scale models of physical phenomena. In this thesis, we
seek to understand the interplay between sparse scientific
applications and hardware, and develop algorithmic approaches to
improve performance measures and resiliency for sparse scientific
computations. We organize the thesis into two parts. The first part
concerns developing algorithmic approaches to enhance the
performance of sparse scientific computations and has two main
contributions: (i) a new sparse matrix representation and a
corresponding sparse matrix vector multiplication (SpMV) algorithm
that enhances performance of the SpMV operation and (ii)
speedup-aware processor partitioning algorithms to manage sparse
scientific workloads efficiently. The second part concerns
analyzing the impact of transient errors on sparse scientific
computing and developing a fault tolerant algorithm, and has two
main results: (i) characterizing the impact of a single transient
error on iterative methods and (ii) a new sparse checksum encoded
algorithm-based fault tolerance technique for the preconditioned
conjugate gradients method. In Chapter 2, we focus on SpMV, which
is at the heart of many scientific applications involving sparse
linear system solution. We develop a new sparse matrix
representation and a corresponding SpMV algorithm that exploits the
dense substructures that are inherently present in many sparse
matrices derived from partial differential equation models. We show
that our SpMV algorithm reduces the total number of load operations
and enhances locality in accesses to the vector, consequently,
improving the SpMV performance on average by a third compared to
the traditional compressed sparse row scheme on the Intel Nehalem
processor. In Chapter 3, we consider improving the performance
sparse scientific workloads that are commonly executed on high
performance computing systems. We observe many applications in such
workloads do not scale linearly with the number of cores, providing
diminishing gains in execution time for larger numbers of cores.
For a workload comprising multiple such applications, it is
beneficial from system perspective to reduce system energy
consumption and decrease workload completion time. We develop
speedup-aware processor partitioning algorithms that exploit
individual application scaling features and optimize processor
allocations per application. Our results indicate that the
speedup-aware…
Subjects/Keywords: Sparse scientific computing; high performance computing;
performance analysis and modeling
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APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Shantharam, M. (2012). Algorithmic Approaches for Enhancing Speedup, Energy and
Resiliency Measures of Sparse Scientific Computations. (Doctoral Dissertation). Penn State University. Retrieved from https://etda.libraries.psu.edu/catalog/15740
Chicago Manual of Style (16th Edition):
Shantharam, Manu. “Algorithmic Approaches for Enhancing Speedup, Energy and
Resiliency Measures of Sparse Scientific Computations.” 2012. Doctoral Dissertation, Penn State University. Accessed October 18, 2019.
https://etda.libraries.psu.edu/catalog/15740.
MLA Handbook (7th Edition):
Shantharam, Manu. “Algorithmic Approaches for Enhancing Speedup, Energy and
Resiliency Measures of Sparse Scientific Computations.” 2012. Web. 18 Oct 2019.
Vancouver:
Shantharam M. Algorithmic Approaches for Enhancing Speedup, Energy and
Resiliency Measures of Sparse Scientific Computations. [Internet] [Doctoral dissertation]. Penn State University; 2012. [cited 2019 Oct 18].
Available from: https://etda.libraries.psu.edu/catalog/15740.
Council of Science Editors:
Shantharam M. Algorithmic Approaches for Enhancing Speedup, Energy and
Resiliency Measures of Sparse Scientific Computations. [Doctoral Dissertation]. Penn State University; 2012. Available from: https://etda.libraries.psu.edu/catalog/15740
University of Hong Kong
16.
蔡育明; Choi, Yuk-ming.
A run-time hardware task execution framework for
FPGA-accelerated heterogeneous cluster.
Degree: M. Phil., 2013, University of Hong Kong
URL: Choi,
Y.
[蔡育明].
(2013).
A
run-time
hardware
task
execution
framework
for
FPGA-accelerated
heterogeneous
cluster.
(Thesis).
University
of
Hong
Kong,
Pokfulam,
Hong
Kong
SAR.
Retrieved
from
http://dx.doi.org/10.5353/th_b5270558
;
http://dx.doi.org/10.5353/th_b5270558
;
http://hdl.handle.net/10722/206679
► The era of big data has led to problems of unprecedented scale and complexity that are challenging the computing capability of conventional computer systems. One…
(more)
▼ The era of big data has led to problems of
unprecedented scale and complexity that are challenging the
computing capability of conventional computer systems. One way to
address the computational and communication challenges of such
demanding applications is to incorporate the use of
non-conventional hardware accelerators such as FPGAs into existing
systems. By providing a mix of FPGAs and conventional CPUs as
computing resources in a heterogeneous cluster, a distributed
computing environment can be achieved to address the need of both
compute-intensive and data-intensive applications. However,
utilizing heterogeneous clusters requires application developers’
comprehensive knowledge on both hardware and software. In order to
assist programmers to take advantage of the synergy between
hardware and software easily, an easy-to-use framework for
virtualizing the underlying FPGA computing resources of the
heterogeneous cluster is motivated.
In this work, a
heterogeneous cluster consisting of both FPGAs and CPUs was built
and a framework for managing multiple FPGAs across the cluster was
designed. The major contribution of the framework is to provide an
abstraction layer between the application developer and the
underlying FPGA computing resources, so as to improve the overall
design productivity. An inter-FPGA communication system was
implemented such that gateware executing on FPGAs can communicate
with each other autonomously to the CPU. Furthermore, to
demonstrate a real-life application on the heterogeneous cluster, a
generic k-means clustering application was implemented, using the
MapReduce programming model.
The implementation of the k-means
application on multiple FPGAs was compared with a software-only
version that was run on a Hadoop multi-core computer cluster. The
performance results show that the FPGA version outperforms the
Hadoop version across various parameters. An in-depth study on the
communication bottleneck presented in the system was also carried
out. A number of experiments were specifically designed to
benchmark the performance of each I/O channel. The study shows that
the major source of I/O bottleneck lies at the communication
between the host system and the FPGA. This gives insight into
programming considerations of potential applications on the cluster
as well as improvement to the framework. Moreover, the benefit of
multiple FPGAs was investigated through a series of experiments.
Compared with putting all mappers on a single FPGA, it was found
that distributing the same amount of mappers across more FPGAs can
provide a tradeoff between FPGA resources and I/O
performance.
published_or_final_version
Electrical and Electronic
Engineering
Master
Master of Philosophy
Advisors/Committee Members: Lam, EYM, So, HKH.
Subjects/Keywords: Field programmable gate arrays; High performance computing
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APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
蔡育明; Choi, Y. (2013). A run-time hardware task execution framework for
FPGA-accelerated heterogeneous cluster. (Masters Thesis). University of Hong Kong. Retrieved from Choi, Y. [蔡育明]. (2013). A run-time hardware task execution framework for FPGA-accelerated heterogeneous cluster. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5270558 ; http://dx.doi.org/10.5353/th_b5270558 ; http://hdl.handle.net/10722/206679
Chicago Manual of Style (16th Edition):
蔡育明; Choi, Yuk-ming. “A run-time hardware task execution framework for
FPGA-accelerated heterogeneous cluster.” 2013. Masters Thesis, University of Hong Kong. Accessed October 18, 2019.
Choi, Y. [蔡育明]. (2013). A run-time hardware task execution framework for FPGA-accelerated heterogeneous cluster. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5270558 ; http://dx.doi.org/10.5353/th_b5270558 ; http://hdl.handle.net/10722/206679.
MLA Handbook (7th Edition):
蔡育明; Choi, Yuk-ming. “A run-time hardware task execution framework for
FPGA-accelerated heterogeneous cluster.” 2013. Web. 18 Oct 2019.
Vancouver:
蔡育明; Choi Y. A run-time hardware task execution framework for
FPGA-accelerated heterogeneous cluster. [Internet] [Masters thesis]. University of Hong Kong; 2013. [cited 2019 Oct 18].
Available from: Choi, Y. [蔡育明]. (2013). A run-time hardware task execution framework for FPGA-accelerated heterogeneous cluster. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5270558 ; http://dx.doi.org/10.5353/th_b5270558 ; http://hdl.handle.net/10722/206679.
Council of Science Editors:
蔡育明; Choi Y. A run-time hardware task execution framework for
FPGA-accelerated heterogeneous cluster. [Masters Thesis]. University of Hong Kong; 2013. Available from: Choi, Y. [蔡育明]. (2013). A run-time hardware task execution framework for FPGA-accelerated heterogeneous cluster. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5270558 ; http://dx.doi.org/10.5353/th_b5270558 ; http://hdl.handle.net/10722/206679
Indiana University
17.
Gilmanov, Timur.
Lower bound resource requirements for machine intelligence
.
Degree: 2018, Indiana University
URL: http://hdl.handle.net/2022/22595
► Recent advancements in technology and the field of artificial intelligence provide a platform for new applications in a wide range of areas, including healthcare, engineering,…
(more)
▼ Recent advancements in technology and the field of artificial intelligence provide a platform for new applications in a wide range of areas, including healthcare, engineering, vision, and natural language processing, that would be considered unattainable one or two decades ago. With the expected compound annual growth rate of 50% during the years of 2017–2021, the field of global artificial intelligence is set to observe increases in computational complexities and amounts of sensor data processed. In spite of the advancements in the field, truly intelligent machine behavior operating in real time is yet an unachieved milestone. First, in order to quantify such behavior, a definition of machine intelligence would be required, which has not been agreed upon by the community at large. Second, delivering full machine intelligence, as defined in this work, is beyond the scope of today’s cutting-edge
high-
performance computing machines. One important aspect of machine intelligent systems is resource requirements and the limitations that today’s and future machines could impose on such systems. The goal of this research effort is to provide an estimate on the lower bound resource requirements for machine intelligence. A working definition of machine intelligence for purposes of this research is provided, along with definitions of an abstract architecture, workflow, and
performance model. Combined together, these tools allow an estimate on resource requirements for problems of machine intelligence, and provide an estimate of such requirements in the future.
Advisors/Committee Members: Sterling, Thomas (advisor).
Subjects/Keywords: machine intelligence;
artificial intelligence;
high performance computing
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APA (6th Edition):
Gilmanov, T. (2018). Lower bound resource requirements for machine intelligence
. (Thesis). Indiana University. Retrieved from http://hdl.handle.net/2022/22595
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Gilmanov, Timur. “Lower bound resource requirements for machine intelligence
.” 2018. Thesis, Indiana University. Accessed October 18, 2019.
http://hdl.handle.net/2022/22595.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Gilmanov, Timur. “Lower bound resource requirements for machine intelligence
.” 2018. Web. 18 Oct 2019.
Vancouver:
Gilmanov T. Lower bound resource requirements for machine intelligence
. [Internet] [Thesis]. Indiana University; 2018. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/2022/22595.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Gilmanov T. Lower bound resource requirements for machine intelligence
. [Thesis]. Indiana University; 2018. Available from: http://hdl.handle.net/2022/22595
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Oregon State University
18.
Bae, Myung Mun.
Resource placement, data rearrangement, and Hamiltonian cycles in torus networks.
Degree: PhD, Computer Science, 1996, Oregon State University
URL: http://hdl.handle.net/1957/34129
► Many parallel machines, both commercial and experimental, have been/are being designed with toroidal interconnection networks. For a given number of nodes, the torus has a…
(more)
▼ Many parallel machines, both commercial and experimental, have been/are being designed with toroidal interconnection networks. For a given number of nodes, the torus has a relatively larger diameter, but better cost/
performance tradeoffs, such as higher channel bandwidth, and lower node degree, when compared to the hypercube. Thus, the torus is becoming a popular topology for the interconnection network of a
high performance parallel computers.
In a multicomputer, the resources, such as I/O devices or software packages, are distributed over the networks. The first part of the thesis investigates efficient methods of distributing resources in a torus network. Three classes of placement methods are studied. They are (1) distant-t placement problem: in this case, any non-resource node is at a distance of at most t from some resource nodes, (2) j-adjacency problem: here, a non-resource node is adjacent to at least j resource nodes, and (3) generalized placement problem: a non-resource node must be a distance of at most t from at least j resource nodes.
This resource placement technique can be applied to allocating spare processors to provide fault-tolerance in the case of the processor failures. Some efficient
spare processor placement methods and reconfiguration schemes in the case of processor failures are also described.
In a torus based parallel system, some algorithms give best
performance if the data are distributed to processors numbered in Cartesian order; in some other cases, it is better to distribute the data to processors numbered in Gray code order. Since the placement patterns may be changed dynamically, it is essential to find efficient methods of rearranging the data from Gray code order to Cartesian order and vice versa. In the second part of the thesis, some efficient methods for data transfer from Cartesian order to radix order and vice versa are developed.
The last part of the thesis gives results on generating edge disjoint Hamiltonian cycles in k-ary n-cubes, hypercubes, and 2D tori. These edge disjoint cycles are quite useful for many communication algorithms.
Advisors/Committee Members: Bose, Bella (advisor), Cook, Curtis (committee member).
Subjects/Keywords: High performance computing
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APA (6th Edition):
Bae, M. M. (1996). Resource placement, data rearrangement, and Hamiltonian cycles in torus networks. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/34129
Chicago Manual of Style (16th Edition):
Bae, Myung Mun. “Resource placement, data rearrangement, and Hamiltonian cycles in torus networks.” 1996. Doctoral Dissertation, Oregon State University. Accessed October 18, 2019.
http://hdl.handle.net/1957/34129.
MLA Handbook (7th Edition):
Bae, Myung Mun. “Resource placement, data rearrangement, and Hamiltonian cycles in torus networks.” 1996. Web. 18 Oct 2019.
Vancouver:
Bae MM. Resource placement, data rearrangement, and Hamiltonian cycles in torus networks. [Internet] [Doctoral dissertation]. Oregon State University; 1996. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1957/34129.
Council of Science Editors:
Bae MM. Resource placement, data rearrangement, and Hamiltonian cycles in torus networks. [Doctoral Dissertation]. Oregon State University; 1996. Available from: http://hdl.handle.net/1957/34129
Oregon State University
19.
Moore, Jason Andrew.
High-performance data-parallel input/output.
Degree: PhD, Computer Science, 1996, Oregon State University
URL: http://hdl.handle.net/1957/34460
► Existing parallel file systems are proving inadequate in two important arenas: programmability and performance. Both of these inadequacies can largely be traced to the fact…
(more)
▼ Existing parallel file systems are proving inadequate in two important arenas:
programmability and
performance. Both of these inadequacies can largely be traced
to the fact that nearly all parallel file systems evolved from Unix and rely on a Unix-oriented,
single-stream, block-at-a-time approach to file I/O. This one-size-fits-all
approach to parallel file systems is inadequate for supporting applications running
on distributed-memory parallel computers.
This research provides a migration path away from the traditional approaches
to parallel I/O at two levels. At the level seen by the programmer, we show how
file operations can be closely integrated with the semantics of a parallel language.
Principles for this integration are illustrated in their application to C*, a virtual-processor-
oriented language. The result is that traditional C file operations with
familiar semantics can be used in C* where the programmer works – at the virtual
processor level. To facilitate
high performance within this framework, machine-independent
modes are used. Modes change the
performance of file operations,
not their semantics, so programmers need not use ambiguous operations found in
many parallel file systems. An automatic mode detection technique is presented
that saves the programmer from extra syntax and low-level file system details. This
mode detection system ensures that the most commonly encountered file operations
are performed using
high-
performance modes.
While the
high-
performance modes allow fast collective movement of file data,
they must include optimizations for redistribution of file data, a common operation
in production scientific code. This need is addressed at the file system level, where
we provide enhancements to Disk-Directed I/O for redistributing file data. Two
enhancements are geared to speeding fine-grained redistributions. One uses a two-phase,
or indirect, approach to redistributing data among compute nodes. The
other relies on I/O nodes to guide the redistribution by building packets bound for
compute nodes. We model the
performance of these enhancements and determine
the key parameters determining when each approach should be used. Finally, we
introduce the notion of collective prefetching and identify its
performance benefits
and implementation tradeoffs.
Advisors/Committee Members: Quinn, Michael J. (advisor).
Subjects/Keywords: High performance computing
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Manager
APA (6th Edition):
Moore, J. A. (1996). High-performance data-parallel input/output. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/34460
Chicago Manual of Style (16th Edition):
Moore, Jason Andrew. “High-performance data-parallel input/output.” 1996. Doctoral Dissertation, Oregon State University. Accessed October 18, 2019.
http://hdl.handle.net/1957/34460.
MLA Handbook (7th Edition):
Moore, Jason Andrew. “High-performance data-parallel input/output.” 1996. Web. 18 Oct 2019.
Vancouver:
Moore JA. High-performance data-parallel input/output. [Internet] [Doctoral dissertation]. Oregon State University; 1996. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1957/34460.
Council of Science Editors:
Moore JA. High-performance data-parallel input/output. [Doctoral Dissertation]. Oregon State University; 1996. Available from: http://hdl.handle.net/1957/34460
20.
Chapuis, Guillaume.
Exploiting parallel features of modern computer architectures in bioinformatics : applications to genetics, structure comparison and large graph analysis : Exploiter les capacités de calcul parallèle des architectures modernes en bioinformatique.
Degree: Docteur es, Informatique, 2013, Cachan, Ecole normale supérieure
URL: http://www.theses.fr/2013DENS0068
► La croissance exponentielle de la génération de données pour la bioinformatique couplée à une stagnation des fréquences d’horloge des processeurs modernes accentuent la nécessité de…
(more)
▼ La croissance exponentielle de la génération de données pour la bioinformatique couplée à une stagnation des fréquences d’horloge des processeurs modernes accentuent la nécessité de fournir des implémentation tirant bénéfice des capacités parallèles des ordinateurs modernes. Cette thèse se concentre sur des algorithmes et implementations pour des problèmes de bioinformatique. Plusieurs types de parallélisme sont décrits et exploités. Cette thèse présente des applications en génétique, avec un outil de détection de QTL paralllisé sur GPU, en comparaison de structures de protéines, avec un outil permettant de trouver des régions similaires entre protéines parallélisé sur CPU, ainsi qu’à l’analyse de larges graphes avec une implémentation multi-GPUs d’un nouvel algorithme pour le problème du «All-Pairs Shortest Path».
The exponential growth in bioinformatics data generation and the stagnation of processor frequencies in modern processors stress the need for efficient implementations that fully exploit the parallel capabilities offered by modern computers. This thesis focuses on parallel algorithms and implementations for bioinformatics problems. Various types of parallelism are described and exploited. This thesis presents applications in genetics with a GPU parallel tool for QTL detection, in protein structure comparison with a multicore parallel tool for finding similar regions between proteins, and large graph analysis with a multi-GPU parallel implementation for a novel algorithm for the All-Pairs Shortest Path problem.
Advisors/Committee Members: Lavenier, Dominique (thesis director).
Subjects/Keywords: Bioinformatique; Calcul parallèle; Bioinformatics; High performance computing
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Export
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APA (6th Edition):
Chapuis, G. (2013). Exploiting parallel features of modern computer architectures in bioinformatics : applications to genetics, structure comparison and large graph analysis : Exploiter les capacités de calcul parallèle des architectures modernes en bioinformatique. (Doctoral Dissertation). Cachan, Ecole normale supérieure. Retrieved from http://www.theses.fr/2013DENS0068
Chicago Manual of Style (16th Edition):
Chapuis, Guillaume. “Exploiting parallel features of modern computer architectures in bioinformatics : applications to genetics, structure comparison and large graph analysis : Exploiter les capacités de calcul parallèle des architectures modernes en bioinformatique.” 2013. Doctoral Dissertation, Cachan, Ecole normale supérieure. Accessed October 18, 2019.
http://www.theses.fr/2013DENS0068.
MLA Handbook (7th Edition):
Chapuis, Guillaume. “Exploiting parallel features of modern computer architectures in bioinformatics : applications to genetics, structure comparison and large graph analysis : Exploiter les capacités de calcul parallèle des architectures modernes en bioinformatique.” 2013. Web. 18 Oct 2019.
Vancouver:
Chapuis G. Exploiting parallel features of modern computer architectures in bioinformatics : applications to genetics, structure comparison and large graph analysis : Exploiter les capacités de calcul parallèle des architectures modernes en bioinformatique. [Internet] [Doctoral dissertation]. Cachan, Ecole normale supérieure; 2013. [cited 2019 Oct 18].
Available from: http://www.theses.fr/2013DENS0068.
Council of Science Editors:
Chapuis G. Exploiting parallel features of modern computer architectures in bioinformatics : applications to genetics, structure comparison and large graph analysis : Exploiter les capacités de calcul parallèle des architectures modernes en bioinformatique. [Doctoral Dissertation]. Cachan, Ecole normale supérieure; 2013. Available from: http://www.theses.fr/2013DENS0068
University of California – Santa Cruz
21.
Ionkov, Latchesar.
Optimizing Access to Scientific Data for Storage, Analysis and Visualization.
Degree: Computer Science, 2018, University of California – Santa Cruz
URL: http://www.escholarship.org/uc/item/4vs7g3pk
► Scientific workflows contain an increasing number of interactingapplications, often with big disparity between the formats of databeing produced and consumed by different applications. This mismatchcan…
(more)
▼ Scientific workflows contain an increasing number of interactingapplications, often with big disparity between the formats of databeing produced and consumed by different applications. This mismatchcan result in performance degradation as data retrieval causesmultiple read operations (often to a remote storage system) in orderto convert the data. In recent years, with the large increase in theamount of data and computational power available there is demand forapplications to support data access in-situ, or close-to simulation toprovide application steering, analytics and visualization.Although some parallel filesystems and middlewarelibraries attempt to identify access patterns and optimize dataretrieval, they frequently fail if the patterns are complex. It isevident that more knowledge of the structure of the datasets at thestorage systems level will provide many opportunities for furtherperformance improvements.For most developers of scientific applications, storing theapplication data, and its particular format on disk, is not anessential part of the application. Although they acknowledge theimportance of the I/O performance, their expertise lies mostly innumerical simulations and the particular models their applicationsimulates. Most of their efforts are spent of ensuring that theit produces correct numerical results. Ideally, they would like to beable to have a library call that reads a subset of the data from storage (nomatter what its format is), and place it in the data structures thesimulation defines in the computer memory. Since the data needs to beanalyzed and visualized, and the data has to be accessible fromthird-party tools, the scientists are forced to know more about thedata formats.In this dissertation we investigate multiple techniques for utilizingdataset description for improving performance and overall dataavailability for HPC applications. We introduce a declarative datadescription language that can be used to define the complete datasetas well as parts of it. These descriptions are used to generatetransformation rules that allow data to be converted between differentphysical layouts on storage and in memory.First, we define the DRepl dataset description language and use it toimplement divergent data views and replicas as POSIX files. Weevaluate the performance for this approach and demonstrate itsadvantages both because of the transparent application use, andcombined performance when the application is combined with analyticsand/or visualization code that reads the data in different format.DRepl decouples the data producers and consumers and the data layoutsthey use from the way the data is stored on the storage system.DRepl has shown up to 2x for cumulative performance when data isaccessed using optimized replicas.Second, we extend the previous approach to the parallel environmentused in HPC. Instead of using POSIX files, the new method allows datato be accessed in larger chunks (fragments) in the way it will be laidout in memory. The developers can define what data structures theyhave in the…
Subjects/Keywords: Computer science; high performance computing; storage
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Manager
APA (6th Edition):
Ionkov, L. (2018). Optimizing Access to Scientific Data for Storage, Analysis and Visualization. (Thesis). University of California – Santa Cruz. Retrieved from http://www.escholarship.org/uc/item/4vs7g3pk
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Ionkov, Latchesar. “Optimizing Access to Scientific Data for Storage, Analysis and Visualization.” 2018. Thesis, University of California – Santa Cruz. Accessed October 18, 2019.
http://www.escholarship.org/uc/item/4vs7g3pk.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Ionkov, Latchesar. “Optimizing Access to Scientific Data for Storage, Analysis and Visualization.” 2018. Web. 18 Oct 2019.
Vancouver:
Ionkov L. Optimizing Access to Scientific Data for Storage, Analysis and Visualization. [Internet] [Thesis]. University of California – Santa Cruz; 2018. [cited 2019 Oct 18].
Available from: http://www.escholarship.org/uc/item/4vs7g3pk.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Ionkov L. Optimizing Access to Scientific Data for Storage, Analysis and Visualization. [Thesis]. University of California – Santa Cruz; 2018. Available from: http://www.escholarship.org/uc/item/4vs7g3pk
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of New Mexico
22.
Levy, Scott.
Using Rollback Avoidance to Mitigate Failures in Next-Generation Extreme-Scale Systems.
Degree: Department of Computer Science, 2016, University of New Mexico
URL: http://hdl.handle.net/1928/32314
► High-performance computing (HPC) systems enable scientists to numerically model complex phenomena in many important physical systems. The next major milestone in the development of HPC…
(more)
▼ High-
performance computing (HPC) systems enable scientists to numerically model complex phenomena in many important physical systems. The next major milestone in the development of HPC systems is the construction of the first supercomputer capable executing more than an exaflop, 10
18 floating point operations per second. On systems of this scale, failures will occur much more frequently than on current systems. As a result, resilience is a key obstacle to building next-generation extreme-scale systems. Coordinated checkpointing is currently the most widely-used mechanism for handling failures on HPC systems. Although coordinated checkpointing remains effective on current systems, increasing the scale of today's systems to build next-generation systems will increase the cost of fault tolerance as more and more time is taken away from the application to protect against or recover from failure. Rollback avoidance techniques seek to mitigate the cost of checkpoint/restart by allowing an application to continue its execution rather than rolling back to an earlier checkpoint when failures occur. These techniques include failure prediction and preventive migration, replicated computation, fault-tolerant algorithms, and software-based memory fault correction. In this thesis, I examine how rollback avoidance techniques can be used to address failures on extreme-scale systems. Using a combination of analytic modeling and simulation, I evaluate the potential impact of rollback avoidance on these systems. I then present a novel rollback avoidance technique that exploits similarities in application memory. Finally, I examine the feasibility of using this technique to protect against memory faults in kernel memory.
Advisors/Committee Members: Bridges, Patrick G., Ferreira, Kurt B., Arnold, Dorian, Lowenthal, David.
Subjects/Keywords: High-performance computing; Fault tolerance; Simulation; Modeling
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APA (6th Edition):
Levy, S. (2016). Using Rollback Avoidance to Mitigate Failures in Next-Generation Extreme-Scale Systems. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/32314
Chicago Manual of Style (16th Edition):
Levy, Scott. “Using Rollback Avoidance to Mitigate Failures in Next-Generation Extreme-Scale Systems.” 2016. Doctoral Dissertation, University of New Mexico. Accessed October 18, 2019.
http://hdl.handle.net/1928/32314.
MLA Handbook (7th Edition):
Levy, Scott. “Using Rollback Avoidance to Mitigate Failures in Next-Generation Extreme-Scale Systems.” 2016. Web. 18 Oct 2019.
Vancouver:
Levy S. Using Rollback Avoidance to Mitigate Failures in Next-Generation Extreme-Scale Systems. [Internet] [Doctoral dissertation]. University of New Mexico; 2016. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1928/32314.
Council of Science Editors:
Levy S. Using Rollback Avoidance to Mitigate Failures in Next-Generation Extreme-Scale Systems. [Doctoral Dissertation]. University of New Mexico; 2016. Available from: http://hdl.handle.net/1928/32314
Virginia Tech
23.
Gabriel, Matthew Frederick.
An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design.
Degree: MS, Electrical and Computer Engineering, 2013, Virginia Tech
URL: http://hdl.handle.net/10919/22053
► The size and complexity of many scientific and enterprise-level applications require a high degree of parallelization in order to produce outputs within an acceptable period…
(more)
▼ The size and complexity of many scientific and enterprise-level applications require a
high degree of parallelization in order to produce outputs within an acceptable period of time. This often necessitates the uses of
high performance computing clusters (HPCCs) and parallelized applications which are carefully designed and optimized. A myriad of papers study the various factors which influence
performance and then attempt to quantify the maximum theoretical speedup that can be achieved by a cluster relative to a sequential processor. The studies tend to only investigate the influences in isolation, but in practice these factors tend to be interdependent. It is the interaction rather than any solitary influence which normally creates the bounds of the design trade space. In the attempt to address this disconnect, this thesis blends the studies into an expanded speedup model which captures the interplay. The model is intended to help the cluster engineer make initial estimates during the early phases of design while the system is not mature enough for refinement using timing studies. The model pulls together factors such as problem scaling, resource allocation, critical sections, and the problem\'s inherent parallelizability. The derivation was examined theoretically and then validated by timing studies on a physical HPCC. The validation studies found that the model was an adequate generic first approximation. However, it was also found that customizations may be needed in order to account for application-specific influences such as bandwidth limitations and communication delays which are not readily incorporated into a generic model.
Advisors/Committee Members: Hsiao, Michael S. (committeechair), Pratt, Timothy (committee member), Silva, Luiz A. (committee member).
Subjects/Keywords: High Performance Computing; Speedup; Amdahl; Gustafson
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APA (6th Edition):
Gabriel, M. F. (2013). An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/22053
Chicago Manual of Style (16th Edition):
Gabriel, Matthew Frederick. “An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design.” 2013. Masters Thesis, Virginia Tech. Accessed October 18, 2019.
http://hdl.handle.net/10919/22053.
MLA Handbook (7th Edition):
Gabriel, Matthew Frederick. “An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design.” 2013. Web. 18 Oct 2019.
Vancouver:
Gabriel MF. An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design. [Internet] [Masters thesis]. Virginia Tech; 2013. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/10919/22053.
Council of Science Editors:
Gabriel MF. An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design. [Masters Thesis]. Virginia Tech; 2013. Available from: http://hdl.handle.net/10919/22053
University of Illinois – Urbana-Champaign
24.
Jha, Saurabh.
Analysis of Gemini interconnect recovery mechanisms: methods and observations.
Degree: MS, Computer Science, 2016, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/95450
► This thesis focuses on the resilience of network components, and recovery capabilities of extreme-scale high-performance computing (HPC) systems, specifically petaflop-level supercomputers, aimed at solving complex…
(more)
▼ This thesis focuses on the resilience of network components, and recovery capabilities of extreme-scale
high-
performance computing (HPC) systems, specifically petaflop-level supercomputers, aimed at solving complex science, engineering, and business problems that require
high bandwidth, enhanced networking, and
high compute capabilities. The resilience of the network is critical for ensuring successful execution of the applications and overall system availability. Failure of interconnect components such as links, routers, power supply, etc. pose a threat to the resilience of the interconnect network, causing application failures and, in the worst case, system-wide failure. An extreme-scale system is designed to manage these failures and automatically recover from such failures to ensure successful application execution and avoid system-wide failure. Thus, in this thesis, we characterize the success probability of the recovery procedures as well as the impact of the recovery procedures on the applications.
We developed an interconnect recovery mechanisms analysis tool (I-RAT), a plugin built on top of LogDiver to characterize and assess the impact of recovery mechanisms. The tool was used to analyze more than two years of network/system logs from Blue Waters, a supercomputer operated by the NCSA at the University of Illinois. Our analyses show that recovery mechanisms are frequently triggered (in as little as 36 hours for link failovers) that can fail with relatively
high probability (as much as 0.25 for link failover). Furthermore, the analyses show that system resilience does not equate to application resilience since executing applications can fail with non-negligible probability during (or just after) a successful recovery.
Our analyses show that interconnect recovery mechanisms are frequently triggered (the mean time between triggers is as short as 36 hours for link failovers), and the initiated recovery fails with relatively
high probability (as much as 0.25 for link failover). We also show that as many as 20% of the executing applications fail during the recovery phase.
Advisors/Committee Members: Iyer, Ravishankar K. (advisor).
Subjects/Keywords: High Performance Computing; Fault Tolerance; Interconnects
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Manager
APA (6th Edition):
Jha, S. (2016). Analysis of Gemini interconnect recovery mechanisms: methods and observations. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/95450
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Jha, Saurabh. “Analysis of Gemini interconnect recovery mechanisms: methods and observations.” 2016. Thesis, University of Illinois – Urbana-Champaign. Accessed October 18, 2019.
http://hdl.handle.net/2142/95450.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Jha, Saurabh. “Analysis of Gemini interconnect recovery mechanisms: methods and observations.” 2016. Web. 18 Oct 2019.
Vancouver:
Jha S. Analysis of Gemini interconnect recovery mechanisms: methods and observations. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2016. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/2142/95450.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Jha S. Analysis of Gemini interconnect recovery mechanisms: methods and observations. [Thesis]. University of Illinois – Urbana-Champaign; 2016. Available from: http://hdl.handle.net/2142/95450
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Rutgers University
25.
Ragothaman, Anjanibhargavi, 1986-.
Using pilot-jobs for developing eThread, a meta-threading pipeline.
Degree: MS, Electrical and Computer Engineering, 2014, Rutgers University
URL: https://rucore.libraries.rutgers.edu/rutgers-lib/45415/
► The genome revolution has produced vast amount of sequence information, but the functional annotation of most of the gene products are yet to be explored…
(more)
▼ The genome revolution has produced vast amount of sequence information, but the functional annotation of most of the gene products are yet to be explored in depth. Functional inference of low sequence identity is brought about by the structure based template methods. To model and understand these proteome scale functions, state of-the-art algorithms like eThread is used. They are compute intensive and demand effe cient and optimal use of the underlying resources. Combination of large scale data and complex workload raises the need for pilot based approaches. eThread is a metathreading protein structure modeling algorithm which is supported by ten independent single-threading algorithms whose computational complexity also depends on the number and size of the input sequences. In this thesis, eThread pipeline is developed on an extensible, scalable and interoperable pilot-job based framework and it supports concurrent tasks execution and data-parallelization on heterogeneous resources deployed on Amazon EC2 with S3 as data repository. This study aims to understand the dominant factors which influence the
performance of eThread on EC2. This analysis suggests an optimized solution based on execution time and cost of implementation. It primarily achieves better utilization of resources by scaling workload on multiple resources. Further ideas on increasing resource capacity and discussions on the importance of dynamic execution of tasks are also laid out.
Advisors/Committee Members: Jha, Shantenu (chair), Najafizadeh, Laleh (internal member), Zonouz, Saman (internal member).
Subjects/Keywords: Algorithms; High performance computing; Proteins – Structure
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APA ·
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MLA ·
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CSE |
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APA (6th Edition):
Ragothaman, Anjanibhargavi, 1. (2014). Using pilot-jobs for developing eThread, a meta-threading pipeline. (Masters Thesis). Rutgers University. Retrieved from https://rucore.libraries.rutgers.edu/rutgers-lib/45415/
Chicago Manual of Style (16th Edition):
Ragothaman, Anjanibhargavi, 1986-. “Using pilot-jobs for developing eThread, a meta-threading pipeline.” 2014. Masters Thesis, Rutgers University. Accessed October 18, 2019.
https://rucore.libraries.rutgers.edu/rutgers-lib/45415/.
MLA Handbook (7th Edition):
Ragothaman, Anjanibhargavi, 1986-. “Using pilot-jobs for developing eThread, a meta-threading pipeline.” 2014. Web. 18 Oct 2019.
Vancouver:
Ragothaman, Anjanibhargavi 1. Using pilot-jobs for developing eThread, a meta-threading pipeline. [Internet] [Masters thesis]. Rutgers University; 2014. [cited 2019 Oct 18].
Available from: https://rucore.libraries.rutgers.edu/rutgers-lib/45415/.
Council of Science Editors:
Ragothaman, Anjanibhargavi 1. Using pilot-jobs for developing eThread, a meta-threading pipeline. [Masters Thesis]. Rutgers University; 2014. Available from: https://rucore.libraries.rutgers.edu/rutgers-lib/45415/
Queens University
26.
Grant, Ryan Eric.
Improving High Performance Networking Technologies for Data Center Clusters
.
Degree: Electrical and Computer Engineering, 2012, Queens University
URL: http://hdl.handle.net/1974/7502
► This dissertation demonstrates new methods for increasing the performance and scalability of high performance networking technologies for use in clustered computing systems, concentrating on Ethernet/High-Speed…
(more)
▼ This dissertation demonstrates new methods for increasing the performance and scalability of high performance networking technologies for use in clustered computing systems, concentrating on Ethernet/High-Speed networking convergence. The motivation behind the improvement of high performance networking technologies and their importance to the viability of modern data centers is discussed first. It then introduces the concepts of high performance networking in a commercial data center context as well as high performance computing (HPC) and describes some of the most important challenges facing such networks in the future. It reviews current relevant literature and discusses problems that are not yet solved.
Through a study of existing high performance networks, the most promising features for future networks are identified. Sockets Direct Protocol (SDP) is shown to have unexpected performance issues for commercial applications, due to inefficiencies in handling large numbers of simultaneous connections. The first SDP over eXtended Reliable Connections implementation is developed to reduce connection management overhead, demonstrating that performance issues are related to protocol overhead at the SDP level. Datagram offloading for IP over InfiniBand (IPoIB) is found to work well.
In the first work of its kind, hybrid high-speed/Ethernet networks are shown to resolve the issues of SDP underperformance and demonstrate the potential for hybrid high-speed networking local area Remote Direct Memory Access (RDMA) technologies and Ethernet wide area networking for data centers.
Given the promising results from these studies, a set of solutions to enhance performance at the local and wide area network level for Ethernet is introduced, providing a scalable, connectionless, socket-compatible, fully RDMA-capable networking technology, datagram-iWARP. A novel method of performing RDMA Write operations (called RDMA Write-Record) and RDMA Read over unreliable datagrams over Ethernet is designed, implemented and tested. It shows its applicability in scientific and commercial application spaces and is applicable to other verbs-based networking interfaces such as InfiniBand.
The newly proposed RDMA methods, both for send/recv and RDMA Write-Record, are supplemented with interfaces for both socket-based applications and Message Passing Interface (MPI) applications. An MPI implementation is adapted to support datagram-iWARP. Both scalability and performance improvements are demonstrated for HPC and commercial applications.
Subjects/Keywords: Data centers;
Cluster Computing;
High Performance Networks
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APA ·
Chicago ·
MLA ·
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CSE |
Export
to Zotero / EndNote / Reference
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APA (6th Edition):
Grant, R. E. (2012). Improving High Performance Networking Technologies for Data Center Clusters
. (Thesis). Queens University. Retrieved from http://hdl.handle.net/1974/7502
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Grant, Ryan Eric. “Improving High Performance Networking Technologies for Data Center Clusters
.” 2012. Thesis, Queens University. Accessed October 18, 2019.
http://hdl.handle.net/1974/7502.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Grant, Ryan Eric. “Improving High Performance Networking Technologies for Data Center Clusters
.” 2012. Web. 18 Oct 2019.
Vancouver:
Grant RE. Improving High Performance Networking Technologies for Data Center Clusters
. [Internet] [Thesis]. Queens University; 2012. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1974/7502.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Grant RE. Improving High Performance Networking Technologies for Data Center Clusters
. [Thesis]. Queens University; 2012. Available from: http://hdl.handle.net/1974/7502
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Rutgers University
27.
Gamell Balmana, Marc, 1989-.
Application-aware on-line failure recovery for extreme-scale HPC environments.
Degree: PhD, Electrical and Computer Engineering, 2017, Rutgers University
URL: https://rucore.libraries.rutgers.edu/rutgers-lib/53618/
► High Performance Computing (HPC) brings with it the promise of deeper insight into complex phenomena through the execution of various extreme-scale applications, especially those in…
(more)
▼ High Performance Computing (HPC) brings with it the promise of deeper insight into complex phenomena through the execution of various extreme-scale applications, especially those in the fields of science and engineering. The increasing computational demands of these applications continue to push the limits of current extreme scale HPC systems. As a result, the community is working toward achieving exascale systems able to compute 1018 floating point operations per second (FLOPS). Since these systems are expected to contain a large number of components, reliability is one of the key anticipated challenges. Due to the extensive periods of time that complex applications require, future systems will likely see an increase in process and node failures during application execution. These failures, also known as hard failures, are currently handled by terminating the execution and restarting it from the last stored checkpoint. This checkpoint-restart methodology requires the application to periodically save its distributed state into a centralized, stable storage – an approach that is not expected to scale to future extreme-scale systems. While the illusion of a failure-free machine – implemented either via hardware or system software strategies – is adequate for current HPC systems, they may prove too costly in future extreme-scale machines. Resilience is, therefore, a key challenge that must be addressed in order to realize the exascale vision. This dissertation explores new models that leverage application-awareness to enable on-line failure recovery. On-line recovery, which does not require the interruption of surviving processes in order to collectively restart the entire application, offers better cost/performance tradeoffs by reducing recovery overheads. Recovering processes on-line enables application-specific data recovery strategies and optimized in-memory checkpointing while avoiding the repetition of initialization procedures – the least optimized part of most production-level applications – on all processes. This dissertation addresses three areas of research in on-line failure recovery. First, it explores a generic global on-line recovery model, involving all processes in the recovery process. Second, it explores optimized local recovery in which communication characteristics of certain application classes are leveraged to reduce overheads due to failure. In particular, finite difference partial differential equation solvers using stencil operators are used as the driving application class. Third, this dissertation demonstrates how the overhead of multiple, independent failures can be masked to effectively reduce the impact on total execution time. The models presented in this dissertation are implemented and evaluated in Fenix and FenixLR, a pair of generic and extensible frameworks used to demonstrate the concepts.
Advisors/Committee Members: Parashar, Manish (chair), Marsic, Ivan (internal member), Silver, Deborah (internal member), Teranishi, Keita (outside member).
Subjects/Keywords: Fault tolerance (Engineering); High performance computing
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APA ·
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MLA ·
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Export
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APA (6th Edition):
Gamell Balmana, Marc, 1. (2017). Application-aware on-line failure recovery for extreme-scale HPC environments. (Doctoral Dissertation). Rutgers University. Retrieved from https://rucore.libraries.rutgers.edu/rutgers-lib/53618/
Chicago Manual of Style (16th Edition):
Gamell Balmana, Marc, 1989-. “Application-aware on-line failure recovery for extreme-scale HPC environments.” 2017. Doctoral Dissertation, Rutgers University. Accessed October 18, 2019.
https://rucore.libraries.rutgers.edu/rutgers-lib/53618/.
MLA Handbook (7th Edition):
Gamell Balmana, Marc, 1989-. “Application-aware on-line failure recovery for extreme-scale HPC environments.” 2017. Web. 18 Oct 2019.
Vancouver:
Gamell Balmana, Marc 1. Application-aware on-line failure recovery for extreme-scale HPC environments. [Internet] [Doctoral dissertation]. Rutgers University; 2017. [cited 2019 Oct 18].
Available from: https://rucore.libraries.rutgers.edu/rutgers-lib/53618/.
Council of Science Editors:
Gamell Balmana, Marc 1. Application-aware on-line failure recovery for extreme-scale HPC environments. [Doctoral Dissertation]. Rutgers University; 2017. Available from: https://rucore.libraries.rutgers.edu/rutgers-lib/53618/
Australian National University
28.
Atif, Muhammad.
Adaptive Resource Relocation in Virtualized Heterogeneous Clusters
.
Degree: 2011, Australian National University
URL: http://hdl.handle.net/1885/8234
► Cluster computing has recently gone through an evolution from single processor systems to multicore/multi-socket systems. This has resulted in lowering the cost/performance ratio of the…
(more)
▼ Cluster computing has recently gone through an evolution from single processor systems to multicore/multi-socket systems. This has resulted in lowering the cost/performance ratio of the compute machines. Compute farms that host these machines tend to become heterogeneous over time due to incremental extensions, hardware upgrades and/or nodes being purchased for users with particular needs. This heterogeneity is not surprising given the wide range of processor, memory and network technologies that become available and the relatively small price difference between these various options. Different CPU architectures, memory capacities, communication and I/O interfaces of the participating compute nodes present many challenges to job scheduling and often result in under or over utilization of the compute resources. In general, it is not feasible for the application programmers to specifically optimize their programs for such a set of differing compute n
odes, due to the difficulty and time-intensiveness of such a task.
The trend of heterogeneous compute farms has coincided with resurgence in the virtualization technology. Virtualization technology is receiving widespread adoption, mainly due to the benefits of server consolidation and isolation, load balancing, security and fault tolerance. Virtualization has also generated considerable interest in the High Performance Computing (HPC) community, due to the resulting high availability, fault tolerance, cluster partitioning and accommodation of conflicting user requirements. However, the HPC community is still wary of the potential overheads associated with‘ virtualization, as it results in slower network communications and disk I/O, which need to be addressed.
The live migration feature, available to most virtualization technologies, can be leveraged to improve the throughput of a heterogeneous compute farm (HC) used for HPC applications. For this we mitigated the slow network communication in Xen; an open source virtual machine monitor. We present a detailed analysis of the communication framework of Xen and propose communication configurations that give 50% improvement over the conventional Xen network configuration. From a detailed study of the migration facility in Xen, we propose an improvement in the live migration facility specifically targeting HPC applications. This optimization gives around 50% improvement over the default migration facility of Xen.
In this thesis, we also investigate resource scheduling in heterogeneous compute farm with the perspective of dynamic resource re-mapping. Our approach is to profile each job in the compute farm at runtime, and propose a better resource mapping compared to the initial allocation. We then migrate the job(s) to the best-suited homogeneous sub-cluster to improve overall throughput of the HC. For this, we develop a novel heterogeneity and virtualization-aware profiling framework, which is able to predict the CPU and communication characteristics of high performance scientific applications.
The…
Subjects/Keywords: Virtualization; Scheduling; Heterogeneous Clusters; High Performance Computing
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APA ·
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MLA ·
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CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Atif, M. (2011). Adaptive Resource Relocation in Virtualized Heterogeneous Clusters
. (Thesis). Australian National University. Retrieved from http://hdl.handle.net/1885/8234
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Atif, Muhammad. “Adaptive Resource Relocation in Virtualized Heterogeneous Clusters
.” 2011. Thesis, Australian National University. Accessed October 18, 2019.
http://hdl.handle.net/1885/8234.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Atif, Muhammad. “Adaptive Resource Relocation in Virtualized Heterogeneous Clusters
.” 2011. Web. 18 Oct 2019.
Vancouver:
Atif M. Adaptive Resource Relocation in Virtualized Heterogeneous Clusters
. [Internet] [Thesis]. Australian National University; 2011. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/1885/8234.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Atif M. Adaptive Resource Relocation in Virtualized Heterogeneous Clusters
. [Thesis]. Australian National University; 2011. Available from: http://hdl.handle.net/1885/8234
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of North Texas
29.
Zhang, Ziming.
Adaptive Power Management for Autonomic Resource Configuration in Large-scale Computer Systems.
Degree: 2015, University of North Texas
URL: https://digital.library.unt.edu/ark:/67531/metadc804939/
► In order to run and manage resource-intensive high-performance applications, large-scale computing and storage platforms have been evolving rapidly in various domains in both academia and…
(more)
▼ In order to run and manage resource-intensive
high-
performance applications, large-scale
computing and storage platforms have been evolving rapidly in various domains in both academia and industry. The energy expenditure consumed to operate and maintain these cloud
computing infrastructures is a major factor to influence the overall profit and efficiency for most cloud service providers. Moreover, considering the mitigation of environmental damage from excessive carbon dioxide emission, the amount of power consumed by enterprise-scale data centers should be constrained for protection of the environment.Generally speaking, there exists a trade-off between power consumption and application
performance in large-scale
computing systems and how to balance these two factors has become an important topic for researchers and engineers in cloud and HPC communities. Therefore, minimizing the power usage while satisfying the Service Level Agreements have become one of the most desirable objectives in cloud
computing research and implementation. Since the fundamental feature of the cloud
computing platform is hosting workloads with a variety of characteristics in a consolidated and on-demand manner, it is demanding to explore the inherent relationship between power usage and machine configurations. Subsequently, with an understanding of these inherent relationships, researchers are able to develop effective power management policies to optimize productivity by balancing power usage and system
performance. In this dissertation, we develop an autonomic power-aware system management framework for large-scale computer systems. We propose a series of techniques including coarse-grain power profiling, VM power modelling, power-aware resource auto-configuration and full-system power usage simulator. These techniques help us to understand the characteristics of power consumption of various system components. Based on these techniques, we are able to test various job scheduling strategies and develop resource management approaches to enhance the systems' power efficiency.
Advisors/Committee Members: Fu, Song, Huang, Yan, Kavi, Krishna M., Mohanty, Saraju P..
Subjects/Keywords: cloud computing; high performance computing; power management; Computer systems – Power supply.; Cloud computing.; Electronic data processing – Distributed processing.; High performance computing.
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University of Illinois – Urbana-Champaign
30.
Lee, Chee Wai.
Techniques in scalable and effective parallel performance analysis.
Degree: PhD, 0112, 2010, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/14568
► Performance analysis tools are essential to the maintenance of efficient parallel execution of scientific applications. As scientific applications are executed on larger and larger parallel…
(more)
▼ Performance analysis tools are essential to the maintenance of
efficient parallel execution of scientific applications. As scientific applications are executed on larger and larger parallel supercomputers, it is clear that
performance tools must employ more advanced techniques to keep up with the increasing data volume and complexity of the
performance information generated by these applications as a result of scaling.
In this thesis, we investigate the useful techniques in four main
thrusts to address various aspects of this problem. First, we study
how some traditional
performance analysis idioms can break down in the face of data from large processor counts and demonstrate techniques and tools that restore scalability. Second, we investigate how the volume of
performance data generated can be reduced while keeping the
captured information relevant for analysis and
performance problem
detection. Third, we investigate the powerful new
performance analysis idioms enabled by live access to
performance information streams from a running parallel application. Fourth, we demonstrate how repeated
performance hypothesis testing can be conducted, via simulation
techniques, scalably and with significantly reduced resource
consumption. In addition, we explore the benefits of
performance tool integration to the propagation and synergy of scalable
performance
analysis techniques in different tools.
Advisors/Committee Members: Kale, Laxmikant V. (advisor), Kale, Laxmikant V. (Committee Chair), Snir, Marc (committee member), Heath, Michael T. (committee member), DeRose, Luiz (committee member).
Subjects/Keywords: Parallel Performance Tools; Scalability; Performance Analysis; High Performance Computing (HPC)
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APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Lee, C. W. (2010). Techniques in scalable and effective parallel performance analysis. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/14568
Chicago Manual of Style (16th Edition):
Lee, Chee Wai. “Techniques in scalable and effective parallel performance analysis.” 2010. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed October 18, 2019.
http://hdl.handle.net/2142/14568.
MLA Handbook (7th Edition):
Lee, Chee Wai. “Techniques in scalable and effective parallel performance analysis.” 2010. Web. 18 Oct 2019.
Vancouver:
Lee CW. Techniques in scalable and effective parallel performance analysis. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2010. [cited 2019 Oct 18].
Available from: http://hdl.handle.net/2142/14568.
Council of Science Editors:
Lee CW. Techniques in scalable and effective parallel performance analysis. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2010. Available from: http://hdl.handle.net/2142/14568
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. 
Open Access Theses and Dissertations
