Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for subject:(circuit simulator). Showing records 1 – 12 of 12 total matches.

Search Limiters

Last 2 Years | English Only

No search limiters apply to these results.

▼ Search Limiters


NSYSU

1. Tseng, Run-June. Circuit simulator program development of semiconductor physical and electrical behavior.

Degree: Master, Electrical Engineering, 2001, NSYSU

 ABSTRACT This thesis presents the equivalent circuit of basic semicondonductor equations, which are implemented as the device elements of circuit simulator: spice3. We use a… (more)

Subjects/Keywords: circuit simulator

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tseng, R. (2001). Circuit simulator program development of semiconductor physical and electrical behavior. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tseng, Run-June. “Circuit simulator program development of semiconductor physical and electrical behavior.” 2001. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tseng, Run-June. “Circuit simulator program development of semiconductor physical and electrical behavior.” 2001. Web. 02 Dec 2020.

Vancouver:

Tseng R. Circuit simulator program development of semiconductor physical and electrical behavior. [Internet] [Thesis]. NSYSU; 2001. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tseng R. Circuit simulator program development of semiconductor physical and electrical behavior. [Thesis]. NSYSU; 2001. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

2. Víctor Augusto Nascimento Magalhães. Simulação física por retificação da soldagem de dutos com processo GMAW.

Degree: 2012, Federal University of Uberlândia

A crescente demanda pela expansão das malhas dutoviárias para o escoamento dos mais diferentes tipos de fluidos, exige processos de união de dutos com maiores… (more)

Subjects/Keywords: Simulador de soldagem de dutos por retificação; Soldagem de tubulações; Transferência metálica por curto-circuito; Soldagem; ENGENHARIA MECANICA; Pipeline welding simulator by rectification; Pipe welding; Short-circuit metal transfer

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Magalhães, V. A. N. (2012). Simulação física por retificação da soldagem de dutos com processo GMAW. (Thesis). Federal University of Uberlândia. Retrieved from http://www.bdtd.ufu.br//tde_busca/arquivo.php?codArquivo=5092

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Magalhães, Víctor Augusto Nascimento. “Simulação física por retificação da soldagem de dutos com processo GMAW.” 2012. Thesis, Federal University of Uberlândia. Accessed December 02, 2020. http://www.bdtd.ufu.br//tde_busca/arquivo.php?codArquivo=5092.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Magalhães, Víctor Augusto Nascimento. “Simulação física por retificação da soldagem de dutos com processo GMAW.” 2012. Web. 02 Dec 2020.

Vancouver:

Magalhães VAN. Simulação física por retificação da soldagem de dutos com processo GMAW. [Internet] [Thesis]. Federal University of Uberlândia; 2012. [cited 2020 Dec 02]. Available from: http://www.bdtd.ufu.br//tde_busca/arquivo.php?codArquivo=5092.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Magalhães VAN. Simulação física por retificação da soldagem de dutos com processo GMAW. [Thesis]. Federal University of Uberlândia; 2012. Available from: http://www.bdtd.ufu.br//tde_busca/arquivo.php?codArquivo=5092

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

3. Stelzer, Michael. SPICE-Based Heat Transport Model for Non-Intrusive Thermal Diagnostic Applications.

Degree: MS, Electrical/Computer Engineering, 2001, Old Dominion University

  Nondestructive material testing and diagnostics play an important role in reliability analysis, component wear-out testing, life-cycle estimates, and safety inspections. Of the several techniques… (more)

Subjects/Keywords: SPICE-based model; Heat transport; Circuit simulator; Circuit theory; Electrical and Computer Engineering; Mechanical Engineering

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Stelzer, M. (2001). SPICE-Based Heat Transport Model for Non-Intrusive Thermal Diagnostic Applications. (Thesis). Old Dominion University. Retrieved from https://digitalcommons.odu.edu/ece_etds/165

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Stelzer, Michael. “SPICE-Based Heat Transport Model for Non-Intrusive Thermal Diagnostic Applications.” 2001. Thesis, Old Dominion University. Accessed December 02, 2020. https://digitalcommons.odu.edu/ece_etds/165.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Stelzer, Michael. “SPICE-Based Heat Transport Model for Non-Intrusive Thermal Diagnostic Applications.” 2001. Web. 02 Dec 2020.

Vancouver:

Stelzer M. SPICE-Based Heat Transport Model for Non-Intrusive Thermal Diagnostic Applications. [Internet] [Thesis]. Old Dominion University; 2001. [cited 2020 Dec 02]. Available from: https://digitalcommons.odu.edu/ece_etds/165.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Stelzer M. SPICE-Based Heat Transport Model for Non-Intrusive Thermal Diagnostic Applications. [Thesis]. Old Dominion University; 2001. Available from: https://digitalcommons.odu.edu/ece_etds/165

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

4. Ma, Yue. Modèles compacts électro-thermiques du premier ordre et considération de bruit pour les circuits 3D : First order Electro-thermal compact models and noise considerations for three-dimensional integration circuits.

Degree: Docteur es, Micro/nano electronic, 2018, Lyon

L'intégration tridimensionnels (3D) ont été couronnés de succès dans les dispositifs traditionnels pour augmenter la densité logique et réduire les distances de mouvement des données.… (more)

Subjects/Keywords: Electronique; Microélectronique; Circuit intégré; Circuit intégré 3D; Vertical through silicon - TSV; RDL – Re-Distribution Layer; Keep-Out-Of-Zone - KOZ; Caloduc plat; Finite element method - FEM; Simulateur de coeur SPICE; Electronics; Microélectronics; Integrated circuit; 3D Integrated Circuits; Vertical through silicon - TSV; RDL – Re-Distribution Layer; Finite element method - FEM; Spice core simulator; Heatpipe; 621.397 072

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ma, Y. (2018). Modèles compacts électro-thermiques du premier ordre et considération de bruit pour les circuits 3D : First order Electro-thermal compact models and noise considerations for three-dimensional integration circuits. (Doctoral Dissertation). Lyon. Retrieved from http://www.theses.fr/2018LYSEI042

Chicago Manual of Style (16th Edition):

Ma, Yue. “Modèles compacts électro-thermiques du premier ordre et considération de bruit pour les circuits 3D : First order Electro-thermal compact models and noise considerations for three-dimensional integration circuits.” 2018. Doctoral Dissertation, Lyon. Accessed December 02, 2020. http://www.theses.fr/2018LYSEI042.

MLA Handbook (7th Edition):

Ma, Yue. “Modèles compacts électro-thermiques du premier ordre et considération de bruit pour les circuits 3D : First order Electro-thermal compact models and noise considerations for three-dimensional integration circuits.” 2018. Web. 02 Dec 2020.

Vancouver:

Ma Y. Modèles compacts électro-thermiques du premier ordre et considération de bruit pour les circuits 3D : First order Electro-thermal compact models and noise considerations for three-dimensional integration circuits. [Internet] [Doctoral dissertation]. Lyon; 2018. [cited 2020 Dec 02]. Available from: http://www.theses.fr/2018LYSEI042.

Council of Science Editors:

Ma Y. Modèles compacts électro-thermiques du premier ordre et considération de bruit pour les circuits 3D : First order Electro-thermal compact models and noise considerations for three-dimensional integration circuits. [Doctoral Dissertation]. Lyon; 2018. Available from: http://www.theses.fr/2018LYSEI042


Luleå University of Technology

5. Larsson, Johan. Design and Implementation of a DTM Network Simulator.

Degree: 2001, Luleå University of Technology

When developing networking protocols there exists a need to test the reliability and correctness of them. This can be done using ordinary hardware, but… (more)

Subjects/Keywords: Technology; DTM; Dynamic Synchronous Transfer Mode; Computer Communication; Simulator; Emulator; Datorkommunikation; Protocol; Circuit; Switching Channel; Network; Linux; Interface Slot; Teknik

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Larsson, J. (2001). Design and Implementation of a DTM Network Simulator. (Thesis). Luleå University of Technology. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-50248

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Larsson, Johan. “Design and Implementation of a DTM Network Simulator.” 2001. Thesis, Luleå University of Technology. Accessed December 02, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-50248.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Larsson, Johan. “Design and Implementation of a DTM Network Simulator.” 2001. Web. 02 Dec 2020.

Vancouver:

Larsson J. Design and Implementation of a DTM Network Simulator. [Internet] [Thesis]. Luleå University of Technology; 2001. [cited 2020 Dec 02]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-50248.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Larsson J. Design and Implementation of a DTM Network Simulator. [Thesis]. Luleå University of Technology; 2001. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-50248

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Linköping University

6. Andersson, Peter. Design of a channel board used in an electronic warfare target simulator.

Degree: Electrical Engineering, 2006, Linköping University

  A channel board was designed for a DRFM circuit. The DRFM is implemented in a Virtex-4 FPGA from Xilinx. In the future a similar… (more)

Subjects/Keywords: Saab Bofors Dynamics; Electronic Warfare Simulator; Target echo generation; Circuit board; DRFM; FPGA; Microcontroller; Ethernet; Electronics; Elektronik

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Andersson, P. (2006). Design of a channel board used in an electronic warfare target simulator. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7529

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Andersson, Peter. “Design of a channel board used in an electronic warfare target simulator.” 2006. Thesis, Linköping University. Accessed December 02, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7529.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Andersson, Peter. “Design of a channel board used in an electronic warfare target simulator.” 2006. Web. 02 Dec 2020.

Vancouver:

Andersson P. Design of a channel board used in an electronic warfare target simulator. [Internet] [Thesis]. Linköping University; 2006. [cited 2020 Dec 02]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7529.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Andersson P. Design of a channel board used in an electronic warfare target simulator. [Thesis]. Linköping University; 2006. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7529

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

7. Valošek, Josef. Modelování planárních vazebních členů: Modeling of planar coupling circuits.

Degree: 2019, Brno University of Technology

 This master’s thesis deals with modelling of the planar coupling circuits, namely type of the wideband couplers and the ultra-wideband couplers. The purpose of this… (more)

Subjects/Keywords: Ansoft Designer; IE3D; mikropásková mezera; obvodový simulátor; optimalizace; planární EM simulace; širokopásmová odbočnice; velmi širokopásmová odbočnice; vazba; vazební útlum.; Ansoft Designer; IE3D; microstrip gap; circuit simulator; optimization; planar EM simulation; wideband coupler; ultra-wideband coupler; coupling; coupling.

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Valošek, J. (2019). Modelování planárních vazebních členů: Modeling of planar coupling circuits. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/5040

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Valošek, Josef. “Modelování planárních vazebních členů: Modeling of planar coupling circuits.” 2019. Thesis, Brno University of Technology. Accessed December 02, 2020. http://hdl.handle.net/11012/5040.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Valošek, Josef. “Modelování planárních vazebních členů: Modeling of planar coupling circuits.” 2019. Web. 02 Dec 2020.

Vancouver:

Valošek J. Modelování planárních vazebních členů: Modeling of planar coupling circuits. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Dec 02]. Available from: http://hdl.handle.net/11012/5040.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Valošek J. Modelování planárních vazebních členů: Modeling of planar coupling circuits. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/5040

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

8. Meng, Kuo-Hsuan. Modeling and simulation of full-component integrated circuits in transient ESD events.

Degree: PhD, Electrical & Computer Engineering, 2015, University of Illinois – Urbana-Champaign

 This thesis presents a methodology to model and simulate transient electrostatic discharge (ESD) responses of integrated circuits (IC). To obtain valid simulation results, the IC… (more)

Subjects/Keywords: Electrostatic Discharge (ESD); Circuit Simulation; Compact Modeling; Full-component Model; Piecewise-linear Behavior Model; ESD metal–oxide–semiconductor field-effect transistor (MOSFET); ESD Diode; Numerical Circuit Analysis; Simulator

…versatile tools is circuit simulator to simulate the transient ESD responses. Through circuit… …112 6.6.2 Simulator-dependent Run-times… …or field-induced charging [2]. ESD can take place upon an integrated circuit… …operating conditions. To simulate authentic ESD responses, the circuit simulation must incorporate… …ring circuitry as well as deep within the internal circuit of an IC component. Therefore, to… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Meng, K. (2015). Modeling and simulation of full-component integrated circuits in transient ESD events. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/87964

Chicago Manual of Style (16th Edition):

Meng, Kuo-Hsuan. “Modeling and simulation of full-component integrated circuits in transient ESD events.” 2015. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed December 02, 2020. http://hdl.handle.net/2142/87964.

MLA Handbook (7th Edition):

Meng, Kuo-Hsuan. “Modeling and simulation of full-component integrated circuits in transient ESD events.” 2015. Web. 02 Dec 2020.

Vancouver:

Meng K. Modeling and simulation of full-component integrated circuits in transient ESD events. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2015. [cited 2020 Dec 02]. Available from: http://hdl.handle.net/2142/87964.

Council of Science Editors:

Meng K. Modeling and simulation of full-component integrated circuits in transient ESD events. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2015. Available from: http://hdl.handle.net/2142/87964


ITESO – Universidad Jesuita de Guadalajara

9. Cabrera-Gómez, Marisol. Matlab Driver for Design Parameterization and Optimization of Microstrip Circuits in PowerSI .

Degree: 2019, ITESO – Universidad Jesuita de Guadalajara

Subjects/Keywords: ME Driver; Full Wave Simulator; Sigrity PowerSI; GUI; Parameters Sweep; Microstrip Circuit; Antennas; Aggressive Space Mapping; Coarse Model; Fine Model; Optimization; Inductor

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Cabrera-Gómez, M. (2019). Matlab Driver for Design Parameterization and Optimization of Microstrip Circuits in PowerSI . (Thesis). ITESO – Universidad Jesuita de Guadalajara. Retrieved from http://hdl.handle.net/11117/6038

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Cabrera-Gómez, Marisol. “Matlab Driver for Design Parameterization and Optimization of Microstrip Circuits in PowerSI .” 2019. Thesis, ITESO – Universidad Jesuita de Guadalajara. Accessed December 02, 2020. http://hdl.handle.net/11117/6038.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Cabrera-Gómez, Marisol. “Matlab Driver for Design Parameterization and Optimization of Microstrip Circuits in PowerSI .” 2019. Web. 02 Dec 2020.

Vancouver:

Cabrera-Gómez M. Matlab Driver for Design Parameterization and Optimization of Microstrip Circuits in PowerSI . [Internet] [Thesis]. ITESO – Universidad Jesuita de Guadalajara; 2019. [cited 2020 Dec 02]. Available from: http://hdl.handle.net/11117/6038.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Cabrera-Gómez M. Matlab Driver for Design Parameterization and Optimization of Microstrip Circuits in PowerSI . [Thesis]. ITESO – Universidad Jesuita de Guadalajara; 2019. Available from: http://hdl.handle.net/11117/6038

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Khan, Umar. Modeling and Protection of Phase Shifting Transformers.

Degree: 2013, University of Western Ontario

 This thesis is mainly focused on the development of (i) phase shifting transformers (PSTs) mathematical and simulation models that can be used for the short-circuit(more)

Subjects/Keywords: Current Differential Protection; Phase Shifting Transformer; Power System Protection; Real-Time Digital Simulator (RTDS); Relaying; Short-circuit Modeling; Transformer Protection.; Electrical and Computer Engineering; Power and Energy

…winding transformer: (a) equivalent circuit, (b) short-circuit test, and… …x28;c) open-circuit test… …coupled circuit, (b) electrically-connected circuit, and (c) compensated two… …source- and load- side circuit breaker and phase-ground fault… …List of Abbreviations (Acronyms) 3 Ph Three Phase CB Circuit Breaker CT… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Khan, U. (2013). Modeling and Protection of Phase Shifting Transformers. (Thesis). University of Western Ontario. Retrieved from https://ir.lib.uwo.ca/etd/1701

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Khan, Umar. “Modeling and Protection of Phase Shifting Transformers.” 2013. Thesis, University of Western Ontario. Accessed December 02, 2020. https://ir.lib.uwo.ca/etd/1701.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Khan, Umar. “Modeling and Protection of Phase Shifting Transformers.” 2013. Web. 02 Dec 2020.

Vancouver:

Khan U. Modeling and Protection of Phase Shifting Transformers. [Internet] [Thesis]. University of Western Ontario; 2013. [cited 2020 Dec 02]. Available from: https://ir.lib.uwo.ca/etd/1701.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Khan U. Modeling and Protection of Phase Shifting Transformers. [Thesis]. University of Western Ontario; 2013. Available from: https://ir.lib.uwo.ca/etd/1701

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

11. Yang, Kexin. Variation-aware and process-sensitive reliability simulator and its application for analog and digital circuits.

Degree: PhD, Electrical and Computer Engineering, 2018, Georgia Tech

 A reliability simulator for traditional gate oxide time dependent dielectric breakdown (TDDB) and the newly emerged middle-of-line (MOL) TDDB in both digital and analog circuits’… (more)

Subjects/Keywords: Time-dependent dielectric breakdown; Lifetime simulator; Wearout; Frontend-of-line dielectric breakdown; Gate oxide breakdown; Middle-of-line breakdown; Digital circuit; Microprocessor; Reliability

…different use scenarios. Moreover, the simulator considers both analog circuit (a receiver… …calculating the lifetimes under different voltages and temperatures for the circuit, the simulator… …the simulator will output the optimal design strategies for the input circuit. xx CHAPTER… …simulator to characterize lifetime of each transistor/vulnerable feature in the circuit. Also, the… …overoptimistic prediction for circuit lifetime, our lifetime simulator needs to incorporate the process… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yang, K. (2018). Variation-aware and process-sensitive reliability simulator and its application for analog and digital circuits. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/60762

Chicago Manual of Style (16th Edition):

Yang, Kexin. “Variation-aware and process-sensitive reliability simulator and its application for analog and digital circuits.” 2018. Doctoral Dissertation, Georgia Tech. Accessed December 02, 2020. http://hdl.handle.net/1853/60762.

MLA Handbook (7th Edition):

Yang, Kexin. “Variation-aware and process-sensitive reliability simulator and its application for analog and digital circuits.” 2018. Web. 02 Dec 2020.

Vancouver:

Yang K. Variation-aware and process-sensitive reliability simulator and its application for analog and digital circuits. [Internet] [Doctoral dissertation]. Georgia Tech; 2018. [cited 2020 Dec 02]. Available from: http://hdl.handle.net/1853/60762.

Council of Science Editors:

Yang K. Variation-aware and process-sensitive reliability simulator and its application for analog and digital circuits. [Doctoral Dissertation]. Georgia Tech; 2018. Available from: http://hdl.handle.net/1853/60762


University of Florida

12. Garg, Vaibhav. The UF Time Machine a Spike Based Computation Architecture.

Degree: PhD, Electrical and Computer Engineering, 2010, University of Florida

 The purpose of this research is to investigate of a general purpose spike-based computation architecture. The brain consists of atomic units called neurons which communicate… (more)

Subjects/Keywords: Arbitration; Architectural design; Electric potential; Memory; Neural conduction; Neural networks; Neurons; Signals; Simulations; Synapses; analog, circuit, computation, events, fpga, java, neuromorphic, neuron, simulator, spike, spikesim, synapses, usb, verilog, weights

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Garg, V. (2010). The UF Time Machine a Spike Based Computation Architecture. (Doctoral Dissertation). University of Florida. Retrieved from https://ufdc.ufl.edu/UFE0042337

Chicago Manual of Style (16th Edition):

Garg, Vaibhav. “The UF Time Machine a Spike Based Computation Architecture.” 2010. Doctoral Dissertation, University of Florida. Accessed December 02, 2020. https://ufdc.ufl.edu/UFE0042337.

MLA Handbook (7th Edition):

Garg, Vaibhav. “The UF Time Machine a Spike Based Computation Architecture.” 2010. Web. 02 Dec 2020.

Vancouver:

Garg V. The UF Time Machine a Spike Based Computation Architecture. [Internet] [Doctoral dissertation]. University of Florida; 2010. [cited 2020 Dec 02]. Available from: https://ufdc.ufl.edu/UFE0042337.

Council of Science Editors:

Garg V. The UF Time Machine a Spike Based Computation Architecture. [Doctoral Dissertation]. University of Florida; 2010. Available from: https://ufdc.ufl.edu/UFE0042337

.