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You searched for subject:(cascode). Showing records 1 – 30 of 45 total matches.

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Virginia Tech

1. Ahmed, Maruf Newaz. Transimpedance Amplifier (TIA) Design for 400 Gb/s Optical Fiber Communications.

Degree: MS, Electrical and Computer Engineering, 2013, Virginia Tech

 Analogcircuit/IC design for high speed optical fiber communication is a fairly new research area in Dr. Haâ s group. In the first project sponsored by… (more)

Subjects/Keywords: optical fiber communication; regulated cascode

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ahmed, M. N. (2013). Transimpedance Amplifier (TIA) Design for 400 Gb/s Optical Fiber Communications. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/33205

Chicago Manual of Style (16th Edition):

Ahmed, Maruf Newaz. “Transimpedance Amplifier (TIA) Design for 400 Gb/s Optical Fiber Communications.” 2013. Masters Thesis, Virginia Tech. Accessed September 18, 2019. http://hdl.handle.net/10919/33205.

MLA Handbook (7th Edition):

Ahmed, Maruf Newaz. “Transimpedance Amplifier (TIA) Design for 400 Gb/s Optical Fiber Communications.” 2013. Web. 18 Sep 2019.

Vancouver:

Ahmed MN. Transimpedance Amplifier (TIA) Design for 400 Gb/s Optical Fiber Communications. [Internet] [Masters thesis]. Virginia Tech; 2013. [cited 2019 Sep 18]. Available from: http://hdl.handle.net/10919/33205.

Council of Science Editors:

Ahmed MN. Transimpedance Amplifier (TIA) Design for 400 Gb/s Optical Fiber Communications. [Masters Thesis]. Virginia Tech; 2013. Available from: http://hdl.handle.net/10919/33205


University of Manchester

2. Shinghal, Priya. Ultra-broadband GaAs pHEMT MMIC cascode Travelling Wave Amplifier (TWA) design for next generation instrumentation.

Degree: PhD, 2016, University of Manchester

 Ultra-broadband Monolithic Microwave Integrated Circuit (MMIC) amplifiers find applications in multi-gigabit communication systems for 5G and millimeter wave measurement instrumentation systems. The aim of the… (more)

Subjects/Keywords: 621.3815; Ultra-Broadband; pHEMT; Travelling Wave Amplifier; Reverse Isolation; On-Wafer; Cascode; MMIC; Measurement; GaAs; Calibration; Multi-Stacked Cascode

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APA (6th Edition):

Shinghal, P. (2016). Ultra-broadband GaAs pHEMT MMIC cascode Travelling Wave Amplifier (TWA) design for next generation instrumentation. (Doctoral Dissertation). University of Manchester. Retrieved from https://www.research.manchester.ac.uk/portal/en/theses/ultrabroadband-gaas-phemt-mmic-cascode-travelling-wave-amplifier-twa-design-for-next-generation-instrumentation(37fc42a1-d865-4ee9-bd19-35b5699249b2).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.727878

Chicago Manual of Style (16th Edition):

Shinghal, Priya. “Ultra-broadband GaAs pHEMT MMIC cascode Travelling Wave Amplifier (TWA) design for next generation instrumentation.” 2016. Doctoral Dissertation, University of Manchester. Accessed September 18, 2019. https://www.research.manchester.ac.uk/portal/en/theses/ultrabroadband-gaas-phemt-mmic-cascode-travelling-wave-amplifier-twa-design-for-next-generation-instrumentation(37fc42a1-d865-4ee9-bd19-35b5699249b2).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.727878.

MLA Handbook (7th Edition):

Shinghal, Priya. “Ultra-broadband GaAs pHEMT MMIC cascode Travelling Wave Amplifier (TWA) design for next generation instrumentation.” 2016. Web. 18 Sep 2019.

Vancouver:

Shinghal P. Ultra-broadband GaAs pHEMT MMIC cascode Travelling Wave Amplifier (TWA) design for next generation instrumentation. [Internet] [Doctoral dissertation]. University of Manchester; 2016. [cited 2019 Sep 18]. Available from: https://www.research.manchester.ac.uk/portal/en/theses/ultrabroadband-gaas-phemt-mmic-cascode-travelling-wave-amplifier-twa-design-for-next-generation-instrumentation(37fc42a1-d865-4ee9-bd19-35b5699249b2).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.727878.

Council of Science Editors:

Shinghal P. Ultra-broadband GaAs pHEMT MMIC cascode Travelling Wave Amplifier (TWA) design for next generation instrumentation. [Doctoral Dissertation]. University of Manchester; 2016. Available from: https://www.research.manchester.ac.uk/portal/en/theses/ultrabroadband-gaas-phemt-mmic-cascode-travelling-wave-amplifier-twa-design-for-next-generation-instrumentation(37fc42a1-d865-4ee9-bd19-35b5699249b2).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.727878


NSYSU

3. Chung, Yi-Ping. Design of a Class-A Cascode Configured Power Amplifier at 5.8 GHz.

Degree: Master, Electrical Engineering, 2013, NSYSU

 This thesis includes three major parts. The first part (chapter II) describes power amplifier classification, characteristics and design principles. Because class A power amplifier has… (more)

Subjects/Keywords: cascode configuration; power amplifier; class A; IPD(Integrated passive device); CMOS

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APA (6th Edition):

Chung, Y. (2013). Design of a Class-A Cascode Configured Power Amplifier at 5.8 GHz. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0722113-223545

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chung, Yi-Ping. “Design of a Class-A Cascode Configured Power Amplifier at 5.8 GHz.” 2013. Thesis, NSYSU. Accessed September 18, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0722113-223545.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chung, Yi-Ping. “Design of a Class-A Cascode Configured Power Amplifier at 5.8 GHz.” 2013. Web. 18 Sep 2019.

Vancouver:

Chung Y. Design of a Class-A Cascode Configured Power Amplifier at 5.8 GHz. [Internet] [Thesis]. NSYSU; 2013. [cited 2019 Sep 18]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0722113-223545.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chung Y. Design of a Class-A Cascode Configured Power Amplifier at 5.8 GHz. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0722113-223545

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

4. Wang, Shun-Hong. The Design and Simulation of a 24 GHz Class-A Cascode Configured Power Amplifier.

Degree: Master, Communications Engineering, 2012, NSYSU

 Abstract Recently, the proliferating needs of high data rate communication systems are increasing the demand for higher frequency bands with broader bandwidth. The K-band (18~26.5… (more)

Subjects/Keywords: power combination; Class A; CMOS; Cascode configuration; Power Amplifier

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, S. (2012). The Design and Simulation of a 24 GHz Class-A Cascode Configured Power Amplifier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0220112-010449

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Shun-Hong. “The Design and Simulation of a 24 GHz Class-A Cascode Configured Power Amplifier.” 2012. Thesis, NSYSU. Accessed September 18, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0220112-010449.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Shun-Hong. “The Design and Simulation of a 24 GHz Class-A Cascode Configured Power Amplifier.” 2012. Web. 18 Sep 2019.

Vancouver:

Wang S. The Design and Simulation of a 24 GHz Class-A Cascode Configured Power Amplifier. [Internet] [Thesis]. NSYSU; 2012. [cited 2019 Sep 18]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0220112-010449.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang S. The Design and Simulation of a 24 GHz Class-A Cascode Configured Power Amplifier. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0220112-010449

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Queensland University of Technology

5. Broadmeadow, Mark A. Characterisation of the cascode gate drive of power MOSFETs in clamped inductive switching applications.

Degree: 2015, Queensland University of Technology

 This thesis proposes a novel gate drive circuit to improve the switching performance of MOSFET power switches in power electronic converters. The proposed topology exploits… (more)

Subjects/Keywords: MOSFET; cascode; gate drive; power electronics; switching converters

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Broadmeadow, M. A. (2015). Characterisation of the cascode gate drive of power MOSFETs in clamped inductive switching applications. (Thesis). Queensland University of Technology. Retrieved from https://eprints.qut.edu.au/82868/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Broadmeadow, Mark A. “Characterisation of the cascode gate drive of power MOSFETs in clamped inductive switching applications.” 2015. Thesis, Queensland University of Technology. Accessed September 18, 2019. https://eprints.qut.edu.au/82868/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Broadmeadow, Mark A. “Characterisation of the cascode gate drive of power MOSFETs in clamped inductive switching applications.” 2015. Web. 18 Sep 2019.

Vancouver:

Broadmeadow MA. Characterisation of the cascode gate drive of power MOSFETs in clamped inductive switching applications. [Internet] [Thesis]. Queensland University of Technology; 2015. [cited 2019 Sep 18]. Available from: https://eprints.qut.edu.au/82868/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Broadmeadow MA. Characterisation of the cascode gate drive of power MOSFETs in clamped inductive switching applications. [Thesis]. Queensland University of Technology; 2015. Available from: https://eprints.qut.edu.au/82868/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Virginia Tech

6. Liu, Zhengyang. Characterization and Failure Mode Analysis of Cascode GaN HEMT.

Degree: MS, Electrical and Computer Engineering, 2014, Virginia Tech

 Recent emerging gallium nitride (GaN) high electron mobility transistor (HEMT) is expected to be a promising candidate for high frequency power conversion techniques. Due to… (more)

Subjects/Keywords: cascode GaN; simulation model; loss analysis; soft switching; stack-die package

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APA (6th Edition):

Liu, Z. (2014). Characterization and Failure Mode Analysis of Cascode GaN HEMT. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/49580

Chicago Manual of Style (16th Edition):

Liu, Zhengyang. “Characterization and Failure Mode Analysis of Cascode GaN HEMT.” 2014. Masters Thesis, Virginia Tech. Accessed September 18, 2019. http://hdl.handle.net/10919/49580.

MLA Handbook (7th Edition):

Liu, Zhengyang. “Characterization and Failure Mode Analysis of Cascode GaN HEMT.” 2014. Web. 18 Sep 2019.

Vancouver:

Liu Z. Characterization and Failure Mode Analysis of Cascode GaN HEMT. [Internet] [Masters thesis]. Virginia Tech; 2014. [cited 2019 Sep 18]. Available from: http://hdl.handle.net/10919/49580.

Council of Science Editors:

Liu Z. Characterization and Failure Mode Analysis of Cascode GaN HEMT. [Masters Thesis]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/49580

7. Wolf, Randy L. Silicon Germanium (SiGe) Bipolor Dicke Radiometer Front End Receiver Chip.

Degree: MS, Electrical & Computer Engineering, 2008, University of Massachusetts

 Radiometers measures background radiation noise power of a target. The dominant quality factor of the radiometer is determined by how sensitive it is, so the… (more)

Subjects/Keywords: Cascode; LNA; SiGe; Radiometer

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wolf, R. L. (2008). Silicon Germanium (SiGe) Bipolor Dicke Radiometer Front End Receiver Chip. (Masters Thesis). University of Massachusetts. Retrieved from https://scholarworks.umass.edu/theses/76

Chicago Manual of Style (16th Edition):

Wolf, Randy L. “Silicon Germanium (SiGe) Bipolor Dicke Radiometer Front End Receiver Chip.” 2008. Masters Thesis, University of Massachusetts. Accessed September 18, 2019. https://scholarworks.umass.edu/theses/76.

MLA Handbook (7th Edition):

Wolf, Randy L. “Silicon Germanium (SiGe) Bipolor Dicke Radiometer Front End Receiver Chip.” 2008. Web. 18 Sep 2019.

Vancouver:

Wolf RL. Silicon Germanium (SiGe) Bipolor Dicke Radiometer Front End Receiver Chip. [Internet] [Masters thesis]. University of Massachusetts; 2008. [cited 2019 Sep 18]. Available from: https://scholarworks.umass.edu/theses/76.

Council of Science Editors:

Wolf RL. Silicon Germanium (SiGe) Bipolor Dicke Radiometer Front End Receiver Chip. [Masters Thesis]. University of Massachusetts; 2008. Available from: https://scholarworks.umass.edu/theses/76

8. Antônio Rodolpho Carneiro Adami. Um Estudo sobre Amplificadores de RF Faixa Larga.

Degree: 2006, Instituto Nacional de Telecomunicações

The design of wide band RF amplifiers for CATV networks and wide band data networks, which achieve the specifications needed to handle hundreds of analogic… (more)

Subjects/Keywords: alumina; CTB; SCILAB; CSO; TELECOMUNICACOES; Wide band RF amplifier; cascode; alumina; CSO; push-pull cascode; Amplificador de RF faixa larga; CTB; SCILAB

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Adami, A. R. C. (2006). Um Estudo sobre Amplificadores de RF Faixa Larga. (Thesis). Instituto Nacional de Telecomunicações. Retrieved from http://tede.inatel.br/tde_busca/arquivo.php?codArquivo=115

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Adami, Antônio Rodolpho Carneiro. “Um Estudo sobre Amplificadores de RF Faixa Larga.” 2006. Thesis, Instituto Nacional de Telecomunicações. Accessed September 18, 2019. http://tede.inatel.br/tde_busca/arquivo.php?codArquivo=115.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Adami, Antônio Rodolpho Carneiro. “Um Estudo sobre Amplificadores de RF Faixa Larga.” 2006. Web. 18 Sep 2019.

Vancouver:

Adami ARC. Um Estudo sobre Amplificadores de RF Faixa Larga. [Internet] [Thesis]. Instituto Nacional de Telecomunicações; 2006. [cited 2019 Sep 18]. Available from: http://tede.inatel.br/tde_busca/arquivo.php?codArquivo=115.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Adami ARC. Um Estudo sobre Amplificadores de RF Faixa Larga. [Thesis]. Instituto Nacional de Telecomunicações; 2006. Available from: http://tede.inatel.br/tde_busca/arquivo.php?codArquivo=115

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

9. Antônio Rodolpho Carneiro Adami. Um Estudo sobre Amplificadores de RF Faixa Larga.

Degree: 2006, Instituto Nacional de Telecomunicações

The design of wide band RF amplifiers for CATV networks and wide band data networks, which achieve the specifications needed to handle hundreds of analogic… (more)

Subjects/Keywords: push-pull cascode; CTB; CSO; ENGENHARIA ELETRICA; CSO; scilab; alumina; amplificadores de RF faixa larga; scilab; cascode; wide band RF amplifier; alumina; CTB

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Adami, A. R. C. (2006). Um Estudo sobre Amplificadores de RF Faixa Larga. (Thesis). Instituto Nacional de Telecomunicações. Retrieved from http://tede.inatel.br/tde_busca/arquivo.php?codArquivo=148

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Adami, Antônio Rodolpho Carneiro. “Um Estudo sobre Amplificadores de RF Faixa Larga.” 2006. Thesis, Instituto Nacional de Telecomunicações. Accessed September 18, 2019. http://tede.inatel.br/tde_busca/arquivo.php?codArquivo=148.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Adami, Antônio Rodolpho Carneiro. “Um Estudo sobre Amplificadores de RF Faixa Larga.” 2006. Web. 18 Sep 2019.

Vancouver:

Adami ARC. Um Estudo sobre Amplificadores de RF Faixa Larga. [Internet] [Thesis]. Instituto Nacional de Telecomunicações; 2006. [cited 2019 Sep 18]. Available from: http://tede.inatel.br/tde_busca/arquivo.php?codArquivo=148.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Adami ARC. Um Estudo sobre Amplificadores de RF Faixa Larga. [Thesis]. Instituto Nacional de Telecomunicações; 2006. Available from: http://tede.inatel.br/tde_busca/arquivo.php?codArquivo=148

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Akron

10. Kollarits, Matthew David. Design and Simulation of a Temperature-Insensitive Rail-to-Rail Comparator for Analog-to-Digital Converter Application.

Degree: MS, Electrical Engineering, 2010, University of Akron

  A comparator with rail-to-rail input voltage range is presented. The rail-to-rail operation is achieved using two folded-cascode differential amplifiers operating in parallel as an… (more)

Subjects/Keywords: Electrical Engineering; Comparator; ADC; Analog-to-Digital Converter; ZTC; Zero-Temperature Coefficient; Rail-to-Rail; Complementary Folded Cascode; Folded Cascode; Transmission Gate; SOI; Silicon-on-Insulator

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APA (6th Edition):

Kollarits, M. D. (2010). Design and Simulation of a Temperature-Insensitive Rail-to-Rail Comparator for Analog-to-Digital Converter Application. (Masters Thesis). University of Akron. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=akron1279036924

Chicago Manual of Style (16th Edition):

Kollarits, Matthew David. “Design and Simulation of a Temperature-Insensitive Rail-to-Rail Comparator for Analog-to-Digital Converter Application.” 2010. Masters Thesis, University of Akron. Accessed September 18, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=akron1279036924.

MLA Handbook (7th Edition):

Kollarits, Matthew David. “Design and Simulation of a Temperature-Insensitive Rail-to-Rail Comparator for Analog-to-Digital Converter Application.” 2010. Web. 18 Sep 2019.

Vancouver:

Kollarits MD. Design and Simulation of a Temperature-Insensitive Rail-to-Rail Comparator for Analog-to-Digital Converter Application. [Internet] [Masters thesis]. University of Akron; 2010. [cited 2019 Sep 18]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1279036924.

Council of Science Editors:

Kollarits MD. Design and Simulation of a Temperature-Insensitive Rail-to-Rail Comparator for Analog-to-Digital Converter Application. [Masters Thesis]. University of Akron; 2010. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1279036924


University of Ontario Institute of Technology

11. Attia, Yosra. Performance of wide band gap switching devices in DC/DC converters of electric vehicles.

Degree: 2016, University of Ontario Institute of Technology

 Low losses fast switching wide band gap (WBG) semiconductors, such as Gallium Nitride (GaN) and Silicon Carbide (SiC), are becoming viable candidates for DC/DC converters… (more)

Subjects/Keywords: Electric vehicles; WBG semiconductors; GaN on Si cascode; SiC ACCUFET; Hybrid module

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Attia, Y. (2016). Performance of wide band gap switching devices in DC/DC converters of electric vehicles. (Thesis). University of Ontario Institute of Technology. Retrieved from http://hdl.handle.net/10155/727

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Attia, Yosra. “Performance of wide band gap switching devices in DC/DC converters of electric vehicles.” 2016. Thesis, University of Ontario Institute of Technology. Accessed September 18, 2019. http://hdl.handle.net/10155/727.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Attia, Yosra. “Performance of wide band gap switching devices in DC/DC converters of electric vehicles.” 2016. Web. 18 Sep 2019.

Vancouver:

Attia Y. Performance of wide band gap switching devices in DC/DC converters of electric vehicles. [Internet] [Thesis]. University of Ontario Institute of Technology; 2016. [cited 2019 Sep 18]. Available from: http://hdl.handle.net/10155/727.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Attia Y. Performance of wide band gap switching devices in DC/DC converters of electric vehicles. [Thesis]. University of Ontario Institute of Technology; 2016. Available from: http://hdl.handle.net/10155/727

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

12. Lin, Jhen-Hong. Design of CMOS Doherty Power Amplifier.

Degree: Master, Communications Engineering, 2014, NSYSU

 This thesis presents a fully integrated transformer-based Doherty power amplifier in a standard 90 nm CMOS process. Doherty architecture has been proposed to enhancement the… (more)

Subjects/Keywords: power combining; balun; differential cascode amplifier; Doherty power amplifier; series combining transformer

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, J. (2014). Design of CMOS Doherty Power Amplifier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629114-170038

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Jhen-Hong. “Design of CMOS Doherty Power Amplifier.” 2014. Thesis, NSYSU. Accessed September 18, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629114-170038.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Jhen-Hong. “Design of CMOS Doherty Power Amplifier.” 2014. Web. 18 Sep 2019.

Vancouver:

Lin J. Design of CMOS Doherty Power Amplifier. [Internet] [Thesis]. NSYSU; 2014. [cited 2019 Sep 18]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629114-170038.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin J. Design of CMOS Doherty Power Amplifier. [Thesis]. NSYSU; 2014. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629114-170038

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

13. Xi Pond, Jun. Low Voltage Active Inductor Low Noise Amplifier.

Degree: Master, Electrical Engineering, 2012, NSYSU

 This paper is the use of the active inductor instead of passive inductors to save area, enter the match aspects of the use of the… (more)

Subjects/Keywords: Early active inductor; Low voltage active inductor; LNA; Noise; Regulated cascode active inductor

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APA (6th Edition):

Xi Pond, J. (2012). Low Voltage Active Inductor Low Noise Amplifier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0723112-203731

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Xi Pond, Jun. “Low Voltage Active Inductor Low Noise Amplifier.” 2012. Thesis, NSYSU. Accessed September 18, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0723112-203731.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Xi Pond, Jun. “Low Voltage Active Inductor Low Noise Amplifier.” 2012. Web. 18 Sep 2019.

Vancouver:

Xi Pond J. Low Voltage Active Inductor Low Noise Amplifier. [Internet] [Thesis]. NSYSU; 2012. [cited 2019 Sep 18]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0723112-203731.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Xi Pond J. Low Voltage Active Inductor Low Noise Amplifier. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0723112-203731

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of California – Berkeley

14. Duan, Yida. Design Techniques for Ultra-High-Speed Time-Interleaved Analog-to-Digital Converters.

Degree: Electrical Engineering & Computer Sciences, 2015, University of California – Berkeley

 Analog-to-Digital Converters (ADCs) serve as the interfaces between the analog natural world and the binary world of computer data. Due to this essential role, ADC… (more)

Subjects/Keywords: Electrical engineering; ADC; asyncrhonous SAR; cascode sampler; Hiearchical time-interleaving; meta-stability correction

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APA (6th Edition):

Duan, Y. (2015). Design Techniques for Ultra-High-Speed Time-Interleaved Analog-to-Digital Converters. (Thesis). University of California – Berkeley. Retrieved from http://www.escholarship.org/uc/item/2ft3480b

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Duan, Yida. “Design Techniques for Ultra-High-Speed Time-Interleaved Analog-to-Digital Converters.” 2015. Thesis, University of California – Berkeley. Accessed September 18, 2019. http://www.escholarship.org/uc/item/2ft3480b.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Duan, Yida. “Design Techniques for Ultra-High-Speed Time-Interleaved Analog-to-Digital Converters.” 2015. Web. 18 Sep 2019.

Vancouver:

Duan Y. Design Techniques for Ultra-High-Speed Time-Interleaved Analog-to-Digital Converters. [Internet] [Thesis]. University of California – Berkeley; 2015. [cited 2019 Sep 18]. Available from: http://www.escholarship.org/uc/item/2ft3480b.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Duan Y. Design Techniques for Ultra-High-Speed Time-Interleaved Analog-to-Digital Converters. [Thesis]. University of California – Berkeley; 2015. Available from: http://www.escholarship.org/uc/item/2ft3480b

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

15. Puppala, Ajith kumar. Design of a Low Power Cyclic/Algorithmic Analog-to-Digital Converter in a 130nm CMOS Process.

Degree: The Institute of Technology, 2012, Linköping UniversityLinköping University

  Analog-to-digital converters are inevitable in the modern communication systems and there is always a need for the design of low-power converters. There are different… (more)

Subjects/Keywords: Redundant Signed Digit; Correlated level Shifting; Low power; High Speed; Folded cascode

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APA (6th Edition):

Puppala, A. k. (2012). Design of a Low Power Cyclic/Algorithmic Analog-to-Digital Converter in a 130nm CMOS Process. (Thesis). Linköping UniversityLinköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-80132

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Puppala, Ajith kumar. “Design of a Low Power Cyclic/Algorithmic Analog-to-Digital Converter in a 130nm CMOS Process.” 2012. Thesis, Linköping UniversityLinköping University. Accessed September 18, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-80132.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Puppala, Ajith kumar. “Design of a Low Power Cyclic/Algorithmic Analog-to-Digital Converter in a 130nm CMOS Process.” 2012. Web. 18 Sep 2019.

Vancouver:

Puppala Ak. Design of a Low Power Cyclic/Algorithmic Analog-to-Digital Converter in a 130nm CMOS Process. [Internet] [Thesis]. Linköping UniversityLinköping University; 2012. [cited 2019 Sep 18]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-80132.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Puppala Ak. Design of a Low Power Cyclic/Algorithmic Analog-to-Digital Converter in a 130nm CMOS Process. [Thesis]. Linköping UniversityLinköping University; 2012. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-80132

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Cincinnati

16. BHANGAONKAR, AVINASH SUDHAKAR. OPTIMIZATION OF PERFORMANCE AND SIZING OF TWO STAGE AND FOLDED CASCODE OP AMPS.

Degree: MS, Engineering : Electrical Engineering, 2002, University of Cincinnati

 The design of an opamp is a fairly complex task in itself. This thesis deals with the optimization of two-stage and folded cascode opamps. The… (more)

Subjects/Keywords: opamp; optimization; analog circuit; two-stage and folded cascode

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APA (6th Edition):

BHANGAONKAR, A. S. (2002). OPTIMIZATION OF PERFORMANCE AND SIZING OF TWO STAGE AND FOLDED CASCODE OP AMPS. (Masters Thesis). University of Cincinnati. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=ucin1029436410

Chicago Manual of Style (16th Edition):

BHANGAONKAR, AVINASH SUDHAKAR. “OPTIMIZATION OF PERFORMANCE AND SIZING OF TWO STAGE AND FOLDED CASCODE OP AMPS.” 2002. Masters Thesis, University of Cincinnati. Accessed September 18, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1029436410.

MLA Handbook (7th Edition):

BHANGAONKAR, AVINASH SUDHAKAR. “OPTIMIZATION OF PERFORMANCE AND SIZING OF TWO STAGE AND FOLDED CASCODE OP AMPS.” 2002. Web. 18 Sep 2019.

Vancouver:

BHANGAONKAR AS. OPTIMIZATION OF PERFORMANCE AND SIZING OF TWO STAGE AND FOLDED CASCODE OP AMPS. [Internet] [Masters thesis]. University of Cincinnati; 2002. [cited 2019 Sep 18]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=ucin1029436410.

Council of Science Editors:

BHANGAONKAR AS. OPTIMIZATION OF PERFORMANCE AND SIZING OF TWO STAGE AND FOLDED CASCODE OP AMPS. [Masters Thesis]. University of Cincinnati; 2002. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=ucin1029436410


NSYSU

17. Luo, Yi-Syuan. Circuit Design of Quadrature Modulator and CMOS Linear Power Amplifier for 2.4 GHz ISM Band Applications.

Degree: Master, Electrical Engineering, 2015, NSYSU

 This thesis investigates the development and research about the RF front-end circuit designs for 2.4 GHz ISM band transmitter applications. On the quadrature modulator part,… (more)

Subjects/Keywords: RF front-end circuit designs; quadrature modulator; double-balanced mixer; differential cascode amplifier; linear power amplifier

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APA (6th Edition):

Luo, Y. (2015). Circuit Design of Quadrature Modulator and CMOS Linear Power Amplifier for 2.4 GHz ISM Band Applications. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726115-014708

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Luo, Yi-Syuan. “Circuit Design of Quadrature Modulator and CMOS Linear Power Amplifier for 2.4 GHz ISM Band Applications.” 2015. Thesis, NSYSU. Accessed September 18, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726115-014708.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Luo, Yi-Syuan. “Circuit Design of Quadrature Modulator and CMOS Linear Power Amplifier for 2.4 GHz ISM Band Applications.” 2015. Web. 18 Sep 2019.

Vancouver:

Luo Y. Circuit Design of Quadrature Modulator and CMOS Linear Power Amplifier for 2.4 GHz ISM Band Applications. [Internet] [Thesis]. NSYSU; 2015. [cited 2019 Sep 18]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726115-014708.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Luo Y. Circuit Design of Quadrature Modulator and CMOS Linear Power Amplifier for 2.4 GHz ISM Band Applications. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726115-014708

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

18. Andrews, Joel. Design of SiGe HBT power amplifiers for microwave radar applications.

Degree: PhD, Electrical and Computer Engineering, 2009, Georgia Tech

 A novel modification to the standard cascode amplifier architecture is presented in SiGe which allows for an optimal separation of gain and breakdown functions through… (more)

Subjects/Keywords: SiGe; Mutual thermal coupling; Mixed breakdown cascode architecture; Power amplifiers; Microwave antennas; Power amplifiers; Bipolar transistors; Heterojunctions

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APA (6th Edition):

Andrews, J. (2009). Design of SiGe HBT power amplifiers for microwave radar applications. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/28116

Chicago Manual of Style (16th Edition):

Andrews, Joel. “Design of SiGe HBT power amplifiers for microwave radar applications.” 2009. Doctoral Dissertation, Georgia Tech. Accessed September 18, 2019. http://hdl.handle.net/1853/28116.

MLA Handbook (7th Edition):

Andrews, Joel. “Design of SiGe HBT power amplifiers for microwave radar applications.” 2009. Web. 18 Sep 2019.

Vancouver:

Andrews J. Design of SiGe HBT power amplifiers for microwave radar applications. [Internet] [Doctoral dissertation]. Georgia Tech; 2009. [cited 2019 Sep 18]. Available from: http://hdl.handle.net/1853/28116.

Council of Science Editors:

Andrews J. Design of SiGe HBT power amplifiers for microwave radar applications. [Doctoral Dissertation]. Georgia Tech; 2009. Available from: http://hdl.handle.net/1853/28116


Rochester Institute of Technology

19. Vora, Ashish. A 90 dB, 85 MHz operational transconductance amplifier (OTA) using gain boosting technique.

Degree: Electrical Engineering, 2006, Rochester Institute of Technology

 Gain and speed are the two most important parameters of an amplifier. Optimizing an amplifier for both of these parameters leads to contradicting demands. Various… (more)

Subjects/Keywords: Cascode circuits; Circuit design; Operational Transconductance Amplifier (OTA)

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APA (6th Edition):

Vora, A. (2006). A 90 dB, 85 MHz operational transconductance amplifier (OTA) using gain boosting technique. (Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/5582

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vora, Ashish. “A 90 dB, 85 MHz operational transconductance amplifier (OTA) using gain boosting technique.” 2006. Thesis, Rochester Institute of Technology. Accessed September 18, 2019. https://scholarworks.rit.edu/theses/5582.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vora, Ashish. “A 90 dB, 85 MHz operational transconductance amplifier (OTA) using gain boosting technique.” 2006. Web. 18 Sep 2019.

Vancouver:

Vora A. A 90 dB, 85 MHz operational transconductance amplifier (OTA) using gain boosting technique. [Internet] [Thesis]. Rochester Institute of Technology; 2006. [cited 2019 Sep 18]. Available from: https://scholarworks.rit.edu/theses/5582.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vora A. A 90 dB, 85 MHz operational transconductance amplifier (OTA) using gain boosting technique. [Thesis]. Rochester Institute of Technology; 2006. Available from: https://scholarworks.rit.edu/theses/5582

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brigham Young University

20. Waddel, Taylor Matt. A Design Basis for Composite Cascode Stages Operating in the Subthreshold/Weak Inversion Regions.

Degree: MS, 2012, Brigham Young University

 Composite cascode stages have been used in operational amplifier designs to achieve ultra-high gain at very low power. The flexibility and simplicity of the stage… (more)

Subjects/Keywords: composite cascode; weak; moderate; strong; subthreshold; inversion level; low power operation; high gain; low frequency; low noise; Electrical and Computer Engineering

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APA (6th Edition):

Waddel, T. M. (2012). A Design Basis for Composite Cascode Stages Operating in the Subthreshold/Weak Inversion Regions. (Masters Thesis). Brigham Young University. Retrieved from https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=3933&context=etd

Chicago Manual of Style (16th Edition):

Waddel, Taylor Matt. “A Design Basis for Composite Cascode Stages Operating in the Subthreshold/Weak Inversion Regions.” 2012. Masters Thesis, Brigham Young University. Accessed September 18, 2019. https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=3933&context=etd.

MLA Handbook (7th Edition):

Waddel, Taylor Matt. “A Design Basis for Composite Cascode Stages Operating in the Subthreshold/Weak Inversion Regions.” 2012. Web. 18 Sep 2019.

Vancouver:

Waddel TM. A Design Basis for Composite Cascode Stages Operating in the Subthreshold/Weak Inversion Regions. [Internet] [Masters thesis]. Brigham Young University; 2012. [cited 2019 Sep 18]. Available from: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=3933&context=etd.

Council of Science Editors:

Waddel TM. A Design Basis for Composite Cascode Stages Operating in the Subthreshold/Weak Inversion Regions. [Masters Thesis]. Brigham Young University; 2012. Available from: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=3933&context=etd


Université de Grenoble

21. Rahhal, Lama. Analyse et modélisation des phénomènes de mismatch des transistors MOSFET avancées : Analysis and modeling of mismatch phenomena for advanced MOSFET‟s.

Degree: Docteur es, Nanoélectronique et nanotechnologie, 2014, Université de Grenoble

Afin de réaliser correctement leur fonction, certains blocs analogiques ou numériques comme les miroirs de courant ou les SRAM, nécessitent des paires de transistors MOS… (more)

Subjects/Keywords: Désappariement; Transistors MOS; Vt; Β; ID; 28nm Bulk; LDEMOS; Configuration cascode; 20nm Métal-Gate-Last; 28nm FD SOI; 14nm FDSOI; NBTI; Mismatch; Transistors MOS; Vt; Β; ID; 28nm Bulk; 20nm Métal-Gate-Last; LDEMOS; Cascode configuration; 28nm FD SOI; 14nm FDSOI; NBTI; 620

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APA (6th Edition):

Rahhal, L. (2014). Analyse et modélisation des phénomènes de mismatch des transistors MOSFET avancées : Analysis and modeling of mismatch phenomena for advanced MOSFET‟s. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2014GRENT061

Chicago Manual of Style (16th Edition):

Rahhal, Lama. “Analyse et modélisation des phénomènes de mismatch des transistors MOSFET avancées : Analysis and modeling of mismatch phenomena for advanced MOSFET‟s.” 2014. Doctoral Dissertation, Université de Grenoble. Accessed September 18, 2019. http://www.theses.fr/2014GRENT061.

MLA Handbook (7th Edition):

Rahhal, Lama. “Analyse et modélisation des phénomènes de mismatch des transistors MOSFET avancées : Analysis and modeling of mismatch phenomena for advanced MOSFET‟s.” 2014. Web. 18 Sep 2019.

Vancouver:

Rahhal L. Analyse et modélisation des phénomènes de mismatch des transistors MOSFET avancées : Analysis and modeling of mismatch phenomena for advanced MOSFET‟s. [Internet] [Doctoral dissertation]. Université de Grenoble; 2014. [cited 2019 Sep 18]. Available from: http://www.theses.fr/2014GRENT061.

Council of Science Editors:

Rahhal L. Analyse et modélisation des phénomènes de mismatch des transistors MOSFET avancées : Analysis and modeling of mismatch phenomena for advanced MOSFET‟s. [Doctoral Dissertation]. Université de Grenoble; 2014. Available from: http://www.theses.fr/2014GRENT061

22. Johansson, Jimmy. Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS.

Degree: Faculty of Science & Engineering, 2017, Linköping UniversityLinköping University

  Testability is crucial in today’s complex industrial system on chips (SoCs), where sensitive on-chip analog voltages need to be measured. In such cases, an… (more)

Subjects/Keywords: Folded-Cascode; Settling Time; Settling Time Reduction; Slew Rate; Slew Rate Enhancement; Operational Amplifier; Recycling Folded-Cascode; 180 nm CMOS; Test Buffer; Power-Efficient; Single-Stage Amplifier; Linear Settling Period; Slewing Period; Other Electrical Engineering, Electronic Engineering, Information Engineering; Annan elektroteknik och elektronik

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APA (6th Edition):

Johansson, J. (2017). Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS. (Thesis). Linköping UniversityLinköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-138446

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Johansson, Jimmy. “Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS.” 2017. Thesis, Linköping UniversityLinköping University. Accessed September 18, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-138446.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Johansson, Jimmy. “Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS.” 2017. Web. 18 Sep 2019.

Vancouver:

Johansson J. Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS. [Internet] [Thesis]. Linköping UniversityLinköping University; 2017. [cited 2019 Sep 18]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-138446.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Johansson J. Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS. [Thesis]. Linköping UniversityLinköping University; 2017. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-138446

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

23. Barranger, Damien. Développement de transistor AlGaN/GaN E-mode sur substrat silicium 200 mm compatible avec une salle blanche CMOS : Development of AlGaN/GaN E-mode transistors on 200 mm silicon substrate compatible with CMOS clean room.

Degree: Docteur es, Electronique, électrotechnique, automatique, 2017, Lyon

La thèse porte sur le développement de composants à base d’hétérojonction AlGaN/GaN. Cette hétérojonction permet de bénéficier d’une excellente mobilité (2000 cm²/V.s) grâce à l’apparition… (more)

Subjects/Keywords: Electronique; Transistor CMOS; Electronique de puissance; Composants GaN e-Mode; Composants MOSC-HEMT; Cascode; Normally-Off; Transistor à enrichissement; Electronics; CMOS transistor; Power Electronics; E-Mode GaN components; MOSC-HEMT components; Cascode; Normally-Off; Enhancement transistor; 621.317 072

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APA (6th Edition):

Barranger, D. (2017). Développement de transistor AlGaN/GaN E-mode sur substrat silicium 200 mm compatible avec une salle blanche CMOS : Development of AlGaN/GaN E-mode transistors on 200 mm silicon substrate compatible with CMOS clean room. (Doctoral Dissertation). Lyon. Retrieved from http://www.theses.fr/2017LYSEI135

Chicago Manual of Style (16th Edition):

Barranger, Damien. “Développement de transistor AlGaN/GaN E-mode sur substrat silicium 200 mm compatible avec une salle blanche CMOS : Development of AlGaN/GaN E-mode transistors on 200 mm silicon substrate compatible with CMOS clean room.” 2017. Doctoral Dissertation, Lyon. Accessed September 18, 2019. http://www.theses.fr/2017LYSEI135.

MLA Handbook (7th Edition):

Barranger, Damien. “Développement de transistor AlGaN/GaN E-mode sur substrat silicium 200 mm compatible avec une salle blanche CMOS : Development of AlGaN/GaN E-mode transistors on 200 mm silicon substrate compatible with CMOS clean room.” 2017. Web. 18 Sep 2019.

Vancouver:

Barranger D. Développement de transistor AlGaN/GaN E-mode sur substrat silicium 200 mm compatible avec une salle blanche CMOS : Development of AlGaN/GaN E-mode transistors on 200 mm silicon substrate compatible with CMOS clean room. [Internet] [Doctoral dissertation]. Lyon; 2017. [cited 2019 Sep 18]. Available from: http://www.theses.fr/2017LYSEI135.

Council of Science Editors:

Barranger D. Développement de transistor AlGaN/GaN E-mode sur substrat silicium 200 mm compatible avec une salle blanche CMOS : Development of AlGaN/GaN E-mode transistors on 200 mm silicon substrate compatible with CMOS clean room. [Doctoral Dissertation]. Lyon; 2017. Available from: http://www.theses.fr/2017LYSEI135


University of Manchester

24. Murillo Carrasco, Luis Carlos. Modelling, characterisation and application of GaN switching devices.

Degree: 2016, University of Manchester

 The recent application of semiconductor materials, such as GaN, to power electronics has led to the development of a new generation of devices, which promise… (more)

Subjects/Keywords: GaN devices; Wide band-gap; Cascode; Characterisation; Transistor modelling; Power converter; HEMT; Double pulse tester; Super junction MOSFET; Energy losses; Inverter leg; Zero voltage switching; Planar transformer

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APA (6th Edition):

Murillo Carrasco, L. C. (2016). Modelling, characterisation and application of GaN switching devices. (Doctoral Dissertation). University of Manchester. Retrieved from http://www.manchester.ac.uk/escholar/uk-ac-man-scw:301549

Chicago Manual of Style (16th Edition):

Murillo Carrasco, Luis Carlos. “Modelling, characterisation and application of GaN switching devices.” 2016. Doctoral Dissertation, University of Manchester. Accessed September 18, 2019. http://www.manchester.ac.uk/escholar/uk-ac-man-scw:301549.

MLA Handbook (7th Edition):

Murillo Carrasco, Luis Carlos. “Modelling, characterisation and application of GaN switching devices.” 2016. Web. 18 Sep 2019.

Vancouver:

Murillo Carrasco LC. Modelling, characterisation and application of GaN switching devices. [Internet] [Doctoral dissertation]. University of Manchester; 2016. [cited 2019 Sep 18]. Available from: http://www.manchester.ac.uk/escholar/uk-ac-man-scw:301549.

Council of Science Editors:

Murillo Carrasco LC. Modelling, characterisation and application of GaN switching devices. [Doctoral Dissertation]. University of Manchester; 2016. Available from: http://www.manchester.ac.uk/escholar/uk-ac-man-scw:301549


Delft University of Technology

25. Galanos, N. Investigation of the inductor’s parasitic capacitance in the high frequency switching of the high voltage cascode GaN HEMT:.

Degree: 2015, Delft University of Technology

 The concept of the More Electric Aircraft, where the majority of the aircraft’s secondary needs will be supplied by electrical power, is under continuous research… (more)

Subjects/Keywords: Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT); cascode configuration; double-pulse tester (DPT); analytical model; hard switching; inductor's equivalent parasitic capacitance (EPC)

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APA (6th Edition):

Galanos, N. (2015). Investigation of the inductor’s parasitic capacitance in the high frequency switching of the high voltage cascode GaN HEMT:. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:9c196c93-5990-45ca-bf82-001ccde69555

Chicago Manual of Style (16th Edition):

Galanos, N. “Investigation of the inductor’s parasitic capacitance in the high frequency switching of the high voltage cascode GaN HEMT:.” 2015. Masters Thesis, Delft University of Technology. Accessed September 18, 2019. http://resolver.tudelft.nl/uuid:9c196c93-5990-45ca-bf82-001ccde69555.

MLA Handbook (7th Edition):

Galanos, N. “Investigation of the inductor’s parasitic capacitance in the high frequency switching of the high voltage cascode GaN HEMT:.” 2015. Web. 18 Sep 2019.

Vancouver:

Galanos N. Investigation of the inductor’s parasitic capacitance in the high frequency switching of the high voltage cascode GaN HEMT:. [Internet] [Masters thesis]. Delft University of Technology; 2015. [cited 2019 Sep 18]. Available from: http://resolver.tudelft.nl/uuid:9c196c93-5990-45ca-bf82-001ccde69555.

Council of Science Editors:

Galanos N. Investigation of the inductor’s parasitic capacitance in the high frequency switching of the high voltage cascode GaN HEMT:. [Masters Thesis]. Delft University of Technology; 2015. Available from: http://resolver.tudelft.nl/uuid:9c196c93-5990-45ca-bf82-001ccde69555

26. KHOO EE SZE. Design and development of a CMOS power amplifier for digital applications.

Degree: 2004, National University of Singapore

Subjects/Keywords: power amplifier; CMOS; class AB; load-pull; temeperature compensation circuit; cascode structure

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APA (6th Edition):

SZE, K. E. (2004). Design and development of a CMOS power amplifier for digital applications. (Thesis). National University of Singapore. Retrieved from http://scholarbank.nus.edu.sg/handle/10635/13674

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

SZE, KHOO EE. “Design and development of a CMOS power amplifier for digital applications.” 2004. Thesis, National University of Singapore. Accessed September 18, 2019. http://scholarbank.nus.edu.sg/handle/10635/13674.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

SZE, KHOO EE. “Design and development of a CMOS power amplifier for digital applications.” 2004. Web. 18 Sep 2019.

Vancouver:

SZE KE. Design and development of a CMOS power amplifier for digital applications. [Internet] [Thesis]. National University of Singapore; 2004. [cited 2019 Sep 18]. Available from: http://scholarbank.nus.edu.sg/handle/10635/13674.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

SZE KE. Design and development of a CMOS power amplifier for digital applications. [Thesis]. National University of Singapore; 2004. Available from: http://scholarbank.nus.edu.sg/handle/10635/13674

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

27. Mácha, Petr. Návrh plně diferenčního operačního zesilovače ve třídě AB .

Degree: 2015, Brno University of Technology

 Tato bakalářská práce se zabývá návrhem plně diferenčního operačního zesilovače ve třídě AB v technologii I3T25 firmy ON Semiconductor. Práce obsahuje popis unipolárních tranzistorů, struktur… (more)

Subjects/Keywords: Plně diferenční operační zesilovač; struktury operačního zesilovače; složená kaskoda; technologie CMOS; topologie; I3T25.; Fully differential operational amplifier; the structure of the operational amplifier; folded cascode; CMOS technology; layout; I3T25.

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APA (6th Edition):

Mácha, P. (2015). Návrh plně diferenčního operačního zesilovače ve třídě AB . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/41527

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mácha, Petr. “Návrh plně diferenčního operačního zesilovače ve třídě AB .” 2015. Thesis, Brno University of Technology. Accessed September 18, 2019. http://hdl.handle.net/11012/41527.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mácha, Petr. “Návrh plně diferenčního operačního zesilovače ve třídě AB .” 2015. Web. 18 Sep 2019.

Vancouver:

Mácha P. Návrh plně diferenčního operačního zesilovače ve třídě AB . [Internet] [Thesis]. Brno University of Technology; 2015. [cited 2019 Sep 18]. Available from: http://hdl.handle.net/11012/41527.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mácha P. Návrh plně diferenčního operačního zesilovače ve třídě AB . [Thesis]. Brno University of Technology; 2015. Available from: http://hdl.handle.net/11012/41527

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brigham Young University

28. Singh, Rishi Pratap. A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region.

Degree: MS, 2011, Brigham Young University

 This thesis demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high gain (113 dB) and… (more)

Subjects/Keywords: high gain; low power; low noise; low distortion; composite cascode stage; subthreshold operation; strong inversion; moderate inversion; weak inversion operation; amplifier; Electrical and Computer Engineering

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APA (6th Edition):

Singh, R. P. (2011). A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region. (Masters Thesis). Brigham Young University. Retrieved from https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=3509&context=etd

Chicago Manual of Style (16th Edition):

Singh, Rishi Pratap. “A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region.” 2011. Masters Thesis, Brigham Young University. Accessed September 18, 2019. https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=3509&context=etd.

MLA Handbook (7th Edition):

Singh, Rishi Pratap. “A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region.” 2011. Web. 18 Sep 2019.

Vancouver:

Singh RP. A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region. [Internet] [Masters thesis]. Brigham Young University; 2011. [cited 2019 Sep 18]. Available from: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=3509&context=etd.

Council of Science Editors:

Singh RP. A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region. [Masters Thesis]. Brigham Young University; 2011. Available from: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=3509&context=etd


University of Central Florida

29. Kutty, Karan. Class-e Cascode Power Amplifier Analysis And Design For Long Term Reliability.

Degree: 2010, University of Central Florida

 This study investigated the Class-E power amplifier operating at 5.2 GHz. Since the operation of this amplifier applies a lot of stress on the switching… (more)

Subjects/Keywords: power amplifier; class-E; cascode; gate oxide; breakdown; oxide breakdown; model; TSMC; voltage stress; zero voltage switching; Electrical and Computer Engineering; Electrical and Electronics; Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kutty, K. (2010). Class-e Cascode Power Amplifier Analysis And Design For Long Term Reliability. (Masters Thesis). University of Central Florida. Retrieved from https://stars.library.ucf.edu/etd/4445

Chicago Manual of Style (16th Edition):

Kutty, Karan. “Class-e Cascode Power Amplifier Analysis And Design For Long Term Reliability.” 2010. Masters Thesis, University of Central Florida. Accessed September 18, 2019. https://stars.library.ucf.edu/etd/4445.

MLA Handbook (7th Edition):

Kutty, Karan. “Class-e Cascode Power Amplifier Analysis And Design For Long Term Reliability.” 2010. Web. 18 Sep 2019.

Vancouver:

Kutty K. Class-e Cascode Power Amplifier Analysis And Design For Long Term Reliability. [Internet] [Masters thesis]. University of Central Florida; 2010. [cited 2019 Sep 18]. Available from: https://stars.library.ucf.edu/etd/4445.

Council of Science Editors:

Kutty K. Class-e Cascode Power Amplifier Analysis And Design For Long Term Reliability. [Masters Thesis]. University of Central Florida; 2010. Available from: https://stars.library.ucf.edu/etd/4445


University of Manchester

30. Murillo Carrasco, Luis. Modelling, characterisation and application of GaN switching devices.

Degree: PhD, 2016, University of Manchester

 The recent application of semiconductor materials, such as GaN, to power electronics has led to the development of a new generation of devices, which promise… (more)

Subjects/Keywords: 621.3815; Double pulse tester; Zero voltage switching; Inverter leg; Energy losses; Super junction MOSFET; Planar transformer; HEMT; Transistor modelling; Characterisation; Cascode; Wide band-gap; GaN devices; Power converter

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APA (6th Edition):

Murillo Carrasco, L. (2016). Modelling, characterisation and application of GaN switching devices. (Doctoral Dissertation). University of Manchester. Retrieved from https://www.research.manchester.ac.uk/portal/en/theses/modelling-characterisation-and-application-of-gan-switching-devices(a227368d-1029-4005-950c-2a098a5c5633).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.727900

Chicago Manual of Style (16th Edition):

Murillo Carrasco, Luis. “Modelling, characterisation and application of GaN switching devices.” 2016. Doctoral Dissertation, University of Manchester. Accessed September 18, 2019. https://www.research.manchester.ac.uk/portal/en/theses/modelling-characterisation-and-application-of-gan-switching-devices(a227368d-1029-4005-950c-2a098a5c5633).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.727900.

MLA Handbook (7th Edition):

Murillo Carrasco, Luis. “Modelling, characterisation and application of GaN switching devices.” 2016. Web. 18 Sep 2019.

Vancouver:

Murillo Carrasco L. Modelling, characterisation and application of GaN switching devices. [Internet] [Doctoral dissertation]. University of Manchester; 2016. [cited 2019 Sep 18]. Available from: https://www.research.manchester.ac.uk/portal/en/theses/modelling-characterisation-and-application-of-gan-switching-devices(a227368d-1029-4005-950c-2a098a5c5633).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.727900.

Council of Science Editors:

Murillo Carrasco L. Modelling, characterisation and application of GaN switching devices. [Doctoral Dissertation]. University of Manchester; 2016. Available from: https://www.research.manchester.ac.uk/portal/en/theses/modelling-characterisation-and-application-of-gan-switching-devices(a227368d-1029-4005-950c-2a098a5c5633).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.727900

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