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You searched for subject:(Track AND hold Amplifier). Showing records 1 – 20 of 20 total matches.

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1. Hamdi, Oussama. Architecture d’échantillonnage rapide pour l’imagerie RADAR : Sampling architecture for RADAR imaging.

Degree: Docteur es, Electronique des Hautes Fréquences, Photonique et Systèmes, 2019, Limoges

Les systèmes Radar ULB utilisent des signaux dont le spectre dépasse une décade et se situe dans la bande 100MHz-10GHz. L’imagerie Radar ULB s’est beaucoup… (more)

Subjects/Keywords: Radar ULB impulsionnel; SAR; Sous-échantillonnage cohérent CS; Track and hold amplifier T&HA; UWB pulsed radar; SAR; Coherent sampling CS; Track and hold amplifier T&HA; 621.384 8

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APA (6th Edition):

Hamdi, O. (2019). Architecture d’échantillonnage rapide pour l’imagerie RADAR : Sampling architecture for RADAR imaging. (Doctoral Dissertation). Limoges. Retrieved from http://www.theses.fr/2019LIMO0120

Chicago Manual of Style (16th Edition):

Hamdi, Oussama. “Architecture d’échantillonnage rapide pour l’imagerie RADAR : Sampling architecture for RADAR imaging.” 2019. Doctoral Dissertation, Limoges. Accessed May 30, 2020. http://www.theses.fr/2019LIMO0120.

MLA Handbook (7th Edition):

Hamdi, Oussama. “Architecture d’échantillonnage rapide pour l’imagerie RADAR : Sampling architecture for RADAR imaging.” 2019. Web. 30 May 2020.

Vancouver:

Hamdi O. Architecture d’échantillonnage rapide pour l’imagerie RADAR : Sampling architecture for RADAR imaging. [Internet] [Doctoral dissertation]. Limoges; 2019. [cited 2020 May 30]. Available from: http://www.theses.fr/2019LIMO0120.

Council of Science Editors:

Hamdi O. Architecture d’échantillonnage rapide pour l’imagerie RADAR : Sampling architecture for RADAR imaging. [Doctoral Dissertation]. Limoges; 2019. Available from: http://www.theses.fr/2019LIMO0120


University of Toronto

2. Shahramian, Shahriar. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.

Degree: 2011, University of Toronto

While data converters have been around for nearly nighty years, mm-wave data converters are still in their infancy. Only recently the 40-GHz sampling barrier was… (more)

Subjects/Keywords: Analog to Digital Converter; mm-Wave Circuit; Track and Hold Amplifier; SiGe; CMOS; Data Converter; TIALA; Retimer; 0544

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APA (6th Edition):

Shahramian, S. (2011). Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. (Doctoral Dissertation). University of Toronto. Retrieved from http://hdl.handle.net/1807/30039

Chicago Manual of Style (16th Edition):

Shahramian, Shahriar. “Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.” 2011. Doctoral Dissertation, University of Toronto. Accessed May 30, 2020. http://hdl.handle.net/1807/30039.

MLA Handbook (7th Edition):

Shahramian, Shahriar. “Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.” 2011. Web. 30 May 2020.

Vancouver:

Shahramian S. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. [Internet] [Doctoral dissertation]. University of Toronto; 2011. [cited 2020 May 30]. Available from: http://hdl.handle.net/1807/30039.

Council of Science Editors:

Shahramian S. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. [Doctoral Dissertation]. University of Toronto; 2011. Available from: http://hdl.handle.net/1807/30039

3. Ayari, Lotfi. Contribution au développement d’un banc de mesures temporelles 4-canaux pour la caractérisation avancée de composants et de sous-systèmes RF non linéaires : Contribution to the development of a 4-channel time -domain measurement set-up for advanced characterization of RF non-linear components and subsystems.

Degree: Docteur es, Electronique des hautes fréquences, photonique et systèmes, 2016, Limoges

Les communications futures pour les applications civiles et militaires utilisent des signaux modulés complexes large bande qui seront émis à travers des amplificateurs de puissance… (more)

Subjects/Keywords: Système d’échantillonnage; Track and Hold Amplifier; Système de mesure temporelle; Procédure d’étalonnage; Échantillonnage à temps équivalent cohérent; HEMT GaN; Amplificateur de puissance; Doherty; OBO; Stabilité impulsion à impulsion; Sampling system; Track and Hold Amplifier; Time-domain measurement system; Calibration procedure; Coherent interleaving sampling; GaN HEMT; High power amplifier; Doherty; OBO; P2P; 621.381 5

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APA (6th Edition):

Ayari, L. (2016). Contribution au développement d’un banc de mesures temporelles 4-canaux pour la caractérisation avancée de composants et de sous-systèmes RF non linéaires : Contribution to the development of a 4-channel time -domain measurement set-up for advanced characterization of RF non-linear components and subsystems. (Doctoral Dissertation). Limoges. Retrieved from http://www.theses.fr/2016LIMO0117

Chicago Manual of Style (16th Edition):

Ayari, Lotfi. “Contribution au développement d’un banc de mesures temporelles 4-canaux pour la caractérisation avancée de composants et de sous-systèmes RF non linéaires : Contribution to the development of a 4-channel time -domain measurement set-up for advanced characterization of RF non-linear components and subsystems.” 2016. Doctoral Dissertation, Limoges. Accessed May 30, 2020. http://www.theses.fr/2016LIMO0117.

MLA Handbook (7th Edition):

Ayari, Lotfi. “Contribution au développement d’un banc de mesures temporelles 4-canaux pour la caractérisation avancée de composants et de sous-systèmes RF non linéaires : Contribution to the development of a 4-channel time -domain measurement set-up for advanced characterization of RF non-linear components and subsystems.” 2016. Web. 30 May 2020.

Vancouver:

Ayari L. Contribution au développement d’un banc de mesures temporelles 4-canaux pour la caractérisation avancée de composants et de sous-systèmes RF non linéaires : Contribution to the development of a 4-channel time -domain measurement set-up for advanced characterization of RF non-linear components and subsystems. [Internet] [Doctoral dissertation]. Limoges; 2016. [cited 2020 May 30]. Available from: http://www.theses.fr/2016LIMO0117.

Council of Science Editors:

Ayari L. Contribution au développement d’un banc de mesures temporelles 4-canaux pour la caractérisation avancée de composants et de sous-systèmes RF non linéaires : Contribution to the development of a 4-channel time -domain measurement set-up for advanced characterization of RF non-linear components and subsystems. [Doctoral Dissertation]. Limoges; 2016. Available from: http://www.theses.fr/2016LIMO0117


University of Minnesota

4. Orser, Heather. High speed analog-to-digital conversion utilizing time quantization.

Degree: PhD, Electrical Engineering, 2010, University of Minnesota

 As communication speeds have increased, high speed and resolution analog-to-digital converters (ADCs) have become necessary. ADCs have traditionally relied on comparing an input voltage to… (more)

Subjects/Keywords: ADC; Analog to Digital Converter; Track and Hold Amplifier; Electrical Engineering

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APA (6th Edition):

Orser, H. (2010). High speed analog-to-digital conversion utilizing time quantization. (Doctoral Dissertation). University of Minnesota. Retrieved from http://purl.umn.edu/59602

Chicago Manual of Style (16th Edition):

Orser, Heather. “High speed analog-to-digital conversion utilizing time quantization.” 2010. Doctoral Dissertation, University of Minnesota. Accessed May 30, 2020. http://purl.umn.edu/59602.

MLA Handbook (7th Edition):

Orser, Heather. “High speed analog-to-digital conversion utilizing time quantization.” 2010. Web. 30 May 2020.

Vancouver:

Orser H. High speed analog-to-digital conversion utilizing time quantization. [Internet] [Doctoral dissertation]. University of Minnesota; 2010. [cited 2020 May 30]. Available from: http://purl.umn.edu/59602.

Council of Science Editors:

Orser H. High speed analog-to-digital conversion utilizing time quantization. [Doctoral Dissertation]. University of Minnesota; 2010. Available from: http://purl.umn.edu/59602

5. Battikh, Arij. Développement d’une tête de réception numérique innovante pour réception de télécommunications par satellite en Bande X : Development of an innovative digital RF front-end for the reception on ground of satellite in the X-Band.

Degree: Docteur es, Electronique des Hautes Fréquences, Photonique et Systèmes, 2020, Limoges

Cette thèse réexamine l’architecture des récepteurs de station sol de télécommunications par satellites (SATCOM) en mettant en oeuvre des briques technologiques innovantes de sous-échantillonnage /… (more)

Subjects/Keywords: SATCOM; Radio Fréquence (RF); Radio-logicielle; Duplexeur de polarisation numérique (DOMT); Sous-échantillonnage RF; Track and Hold Amplifier (THA); Convertisseur Analogique Numérique; SNR; SFDR; THD; SATCOM; Radio Frequency (RF); Software Radio; Digital Polarization Duplexer (DOMT); RF subsampling; Track and Hold Amplifier (THA); Digital Analog Converter; SNR; SFDR; THD; 621.382 5

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APA (6th Edition):

Battikh, A. (2020). Développement d’une tête de réception numérique innovante pour réception de télécommunications par satellite en Bande X : Development of an innovative digital RF front-end for the reception on ground of satellite in the X-Band. (Doctoral Dissertation). Limoges. Retrieved from http://www.theses.fr/2020LIMO0012

Chicago Manual of Style (16th Edition):

Battikh, Arij. “Développement d’une tête de réception numérique innovante pour réception de télécommunications par satellite en Bande X : Development of an innovative digital RF front-end for the reception on ground of satellite in the X-Band.” 2020. Doctoral Dissertation, Limoges. Accessed May 30, 2020. http://www.theses.fr/2020LIMO0012.

MLA Handbook (7th Edition):

Battikh, Arij. “Développement d’une tête de réception numérique innovante pour réception de télécommunications par satellite en Bande X : Development of an innovative digital RF front-end for the reception on ground of satellite in the X-Band.” 2020. Web. 30 May 2020.

Vancouver:

Battikh A. Développement d’une tête de réception numérique innovante pour réception de télécommunications par satellite en Bande X : Development of an innovative digital RF front-end for the reception on ground of satellite in the X-Band. [Internet] [Doctoral dissertation]. Limoges; 2020. [cited 2020 May 30]. Available from: http://www.theses.fr/2020LIMO0012.

Council of Science Editors:

Battikh A. Développement d’une tête de réception numérique innovante pour réception de télécommunications par satellite en Bande X : Development of an innovative digital RF front-end for the reception on ground of satellite in the X-Band. [Doctoral Dissertation]. Limoges; 2020. Available from: http://www.theses.fr/2020LIMO0012

6. Deza, Julien. Etude, Conception et Caractérisation de circuits pour la Conversion Analogique Numérique à très hautes performances en technologie TBH InP 0.7µm : Study, Design and Characterization of high performances ADC integrated circuits in 0.7 µm-InP-HBT technology.

Degree: Docteur es, Génie électrique et électronique - Cergy, 2013, Cergy-Pontoise

Ce travail de thèse concerne les circuits ultra-rapides pour la conversion analogique numérique performante en technologie bipolaire à hétérojonctions sur substrat Indium Phosphore (TBDH/InP). L'étude… (more)

Subjects/Keywords: Convertisseur analogique numérique (CAN); Échantillonneur bloqueur (E/B); Sef; Amplificateur à gain variable (VGA); InP; Tbh; Analog-to-digital converter (ADC); Track-and-hold amplifier (THA); Variable gain amplifier (VGA); Switched emitter follower (SEF); InP; Hbt

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APA (6th Edition):

Deza, J. (2013). Etude, Conception et Caractérisation de circuits pour la Conversion Analogique Numérique à très hautes performances en technologie TBH InP 0.7µm : Study, Design and Characterization of high performances ADC integrated circuits in 0.7 µm-InP-HBT technology. (Doctoral Dissertation). Cergy-Pontoise. Retrieved from http://www.theses.fr/2013CERG0680

Chicago Manual of Style (16th Edition):

Deza, Julien. “Etude, Conception et Caractérisation de circuits pour la Conversion Analogique Numérique à très hautes performances en technologie TBH InP 0.7µm : Study, Design and Characterization of high performances ADC integrated circuits in 0.7 µm-InP-HBT technology.” 2013. Doctoral Dissertation, Cergy-Pontoise. Accessed May 30, 2020. http://www.theses.fr/2013CERG0680.

MLA Handbook (7th Edition):

Deza, Julien. “Etude, Conception et Caractérisation de circuits pour la Conversion Analogique Numérique à très hautes performances en technologie TBH InP 0.7µm : Study, Design and Characterization of high performances ADC integrated circuits in 0.7 µm-InP-HBT technology.” 2013. Web. 30 May 2020.

Vancouver:

Deza J. Etude, Conception et Caractérisation de circuits pour la Conversion Analogique Numérique à très hautes performances en technologie TBH InP 0.7µm : Study, Design and Characterization of high performances ADC integrated circuits in 0.7 µm-InP-HBT technology. [Internet] [Doctoral dissertation]. Cergy-Pontoise; 2013. [cited 2020 May 30]. Available from: http://www.theses.fr/2013CERG0680.

Council of Science Editors:

Deza J. Etude, Conception et Caractérisation de circuits pour la Conversion Analogique Numérique à très hautes performances en technologie TBH InP 0.7µm : Study, Design and Characterization of high performances ADC integrated circuits in 0.7 µm-InP-HBT technology. [Doctoral Dissertation]. Cergy-Pontoise; 2013. Available from: http://www.theses.fr/2013CERG0680

7. Aggrawal, Himanshu. High-speed Track and Hold Amplifiers in CMOS for Enabling Pulse-based Direct Modulation, Secure Communication and Precision Localization.

Degree: MS, Engineering, 2015, Rice University

 Last few decades have seen a puissant desire for fast communication links that has shaped the evolution of high-speed circuits and silicon- based technology. This… (more)

Subjects/Keywords: Track and hold Amplifier; Sampler; CMOS; 45nm; Directional Modulation; Secure Communication; Localization; Radar; Pulse

…29 30 xi 3.6 3.7 Measured isolation by comparing the track and hold modes… …characterization and performance evaluation is done. Finally, a high-speed, wide-band track-and-hold… …effective number of bits. A new track-and-hold architecture with active cancellation is proposed… …based directional modulation. In Chapter 4, a new architecture for high-speed track-and-hold… …evolved and many different topologies have been adapted from sample and hold to track and hold… 

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APA (6th Edition):

Aggrawal, H. (2015). High-speed Track and Hold Amplifiers in CMOS for Enabling Pulse-based Direct Modulation, Secure Communication and Precision Localization. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/87740

Chicago Manual of Style (16th Edition):

Aggrawal, Himanshu. “High-speed Track and Hold Amplifiers in CMOS for Enabling Pulse-based Direct Modulation, Secure Communication and Precision Localization.” 2015. Masters Thesis, Rice University. Accessed May 30, 2020. http://hdl.handle.net/1911/87740.

MLA Handbook (7th Edition):

Aggrawal, Himanshu. “High-speed Track and Hold Amplifiers in CMOS for Enabling Pulse-based Direct Modulation, Secure Communication and Precision Localization.” 2015. Web. 30 May 2020.

Vancouver:

Aggrawal H. High-speed Track and Hold Amplifiers in CMOS for Enabling Pulse-based Direct Modulation, Secure Communication and Precision Localization. [Internet] [Masters thesis]. Rice University; 2015. [cited 2020 May 30]. Available from: http://hdl.handle.net/1911/87740.

Council of Science Editors:

Aggrawal H. High-speed Track and Hold Amplifiers in CMOS for Enabling Pulse-based Direct Modulation, Secure Communication and Precision Localization. [Masters Thesis]. Rice University; 2015. Available from: http://hdl.handle.net/1911/87740


University of Toronto

8. Vasilakopoulos, Konstantinos. Front-end Building Blocks for 100+ GS/s ADCs.

Degree: 2016, University of Toronto

In this thesis IC building blocks for future 100+Gbaud fiber-optic receivers, employing high-speed ADC converters above 100 GSps, are investigated. A single-ended broadband, low-noise amplifier(more)

Subjects/Keywords: ADC; BiCMOS; fiber-optic; GS/s; TIA; track-and-hold; 0544

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APA (6th Edition):

Vasilakopoulos, K. (2016). Front-end Building Blocks for 100+ GS/s ADCs. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/71709

Chicago Manual of Style (16th Edition):

Vasilakopoulos, Konstantinos. “Front-end Building Blocks for 100+ GS/s ADCs.” 2016. Masters Thesis, University of Toronto. Accessed May 30, 2020. http://hdl.handle.net/1807/71709.

MLA Handbook (7th Edition):

Vasilakopoulos, Konstantinos. “Front-end Building Blocks for 100+ GS/s ADCs.” 2016. Web. 30 May 2020.

Vancouver:

Vasilakopoulos K. Front-end Building Blocks for 100+ GS/s ADCs. [Internet] [Masters thesis]. University of Toronto; 2016. [cited 2020 May 30]. Available from: http://hdl.handle.net/1807/71709.

Council of Science Editors:

Vasilakopoulos K. Front-end Building Blocks for 100+ GS/s ADCs. [Masters Thesis]. University of Toronto; 2016. Available from: http://hdl.handle.net/1807/71709


Brno University of Technology

9. Chocholáč, Jan. Přehled trendů v používání vybraných polovodičových součástek: Future trends of the specific semiconductor components utilization.

Degree: 2019, Brno University of Technology

 The bachelor thesis deals with discrete components such as Multiplexers and Sample-and-Hold. The central objective of this work is to provide a description of how… (more)

Subjects/Keywords: Digitální multiplexer; analogový multiplexer; spínač; přepínač; vzorkovač; Digital multiplexer; analogue multiplexer; switches; sample and hold; track and hold

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APA (6th Edition):

Chocholáč, J. (2019). Přehled trendů v používání vybraných polovodičových součástek: Future trends of the specific semiconductor components utilization. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/692

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chocholáč, Jan. “Přehled trendů v používání vybraných polovodičových součástek: Future trends of the specific semiconductor components utilization.” 2019. Thesis, Brno University of Technology. Accessed May 30, 2020. http://hdl.handle.net/11012/692.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chocholáč, Jan. “Přehled trendů v používání vybraných polovodičových součástek: Future trends of the specific semiconductor components utilization.” 2019. Web. 30 May 2020.

Vancouver:

Chocholáč J. Přehled trendů v používání vybraných polovodičových součástek: Future trends of the specific semiconductor components utilization. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 May 30]. Available from: http://hdl.handle.net/11012/692.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chocholáč J. Přehled trendů v používání vybraných polovodičových součástek: Future trends of the specific semiconductor components utilization. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/692

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Younis, Choudhry Jabbar. Design and Implementation of a high-efficiency low-power analog-to-digital converter for high-speed transceivers.

Degree: The Institute of Technology, 2012, Linköping UniversityLinköping University

  Modern communication systems require higher data rates which have increased thedemand for high speed transceivers. For a system to work efficiently, all blocks ofthat… (more)

Subjects/Keywords: Analog front end; data rates; Analog to digital converter; track and hold; bootstrap; averaging; interpolation

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APA (6th Edition):

Younis, C. J. (2012). Design and Implementation of a high-efficiency low-power analog-to-digital converter for high-speed transceivers. (Thesis). Linköping UniversityLinköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77178

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Younis, Choudhry Jabbar. “Design and Implementation of a high-efficiency low-power analog-to-digital converter for high-speed transceivers.” 2012. Thesis, Linköping UniversityLinköping University. Accessed May 30, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77178.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Younis, Choudhry Jabbar. “Design and Implementation of a high-efficiency low-power analog-to-digital converter for high-speed transceivers.” 2012. Web. 30 May 2020.

Vancouver:

Younis CJ. Design and Implementation of a high-efficiency low-power analog-to-digital converter for high-speed transceivers. [Internet] [Thesis]. Linköping UniversityLinköping University; 2012. [cited 2020 May 30]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77178.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Younis CJ. Design and Implementation of a high-efficiency low-power analog-to-digital converter for high-speed transceivers. [Thesis]. Linköping UniversityLinköping University; 2012. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77178

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

11. Li, Xiangtao. High-speed analog-to-digital conversion in SiGe HBT technology.

Degree: PhD, Electrical and Computer Engineering, 2008, Georgia Tech

 The objective of this research is to explore high-speed analog-to-digital converters (ADCs) using silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) for wireless digital receiver applications. The… (more)

Subjects/Keywords: ADC; Analog-to-digital converter; Track-and-hold amplifier; Sigma-delta modulator; Comparator; SiGe; Analog-to-digital converters; Heterojunctions; Bipolar transistors

…blocks includes the design of two high-speed track-and-hold amplifiers (THA) and two… …x5B;66] [67]). 2. Track-and-Hold Amplifiers(Chapter III, also… …hold amplifier (THA) in the first stage. As a result of stage division, the total… …x5B;77], presents the design of two ultra-high-speed track-and-hold amplifiers (… …latch is switching from the hold-mode to track-mode. The recovery time trec can be roughly… 

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APA (6th Edition):

Li, X. (2008). High-speed analog-to-digital conversion in SiGe HBT technology. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/24652

Chicago Manual of Style (16th Edition):

Li, Xiangtao. “High-speed analog-to-digital conversion in SiGe HBT technology.” 2008. Doctoral Dissertation, Georgia Tech. Accessed May 30, 2020. http://hdl.handle.net/1853/24652.

MLA Handbook (7th Edition):

Li, Xiangtao. “High-speed analog-to-digital conversion in SiGe HBT technology.” 2008. Web. 30 May 2020.

Vancouver:

Li X. High-speed analog-to-digital conversion in SiGe HBT technology. [Internet] [Doctoral dissertation]. Georgia Tech; 2008. [cited 2020 May 30]. Available from: http://hdl.handle.net/1853/24652.

Council of Science Editors:

Li X. High-speed analog-to-digital conversion in SiGe HBT technology. [Doctoral Dissertation]. Georgia Tech; 2008. Available from: http://hdl.handle.net/1853/24652

12. Merelle, Vincent. Concept de radars novateurs pour la vision à travers les milieux opaques : Innovative radar concept for through-the-wall applications.

Degree: Docteur es, Image, signal et automatique, 2018, La Rochelle

La « vision » à travers les milieux opaques (murs, cloisons, décombres, ou plus généralement tout milieu qui occulte la vision humaine) est l’un des… (more)

Subjects/Keywords: Radar UWB; Impulsionnel; FMCW; Signes vitaux; Micro-mouvements; Doppler impulsionnel; Acquisition rapide; Échantillonnage équivalent; FPGA; Track&hold; Radar UWB; Pulse radar; FMCW; Vital signs; Micro-motion; Pulse Doppler; High speed digitalisation; Equivalent time sampling; FPGA; Track&hold

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APA (6th Edition):

Merelle, V. (2018). Concept de radars novateurs pour la vision à travers les milieux opaques : Innovative radar concept for through-the-wall applications. (Doctoral Dissertation). La Rochelle. Retrieved from http://www.theses.fr/2018LAROS017

Chicago Manual of Style (16th Edition):

Merelle, Vincent. “Concept de radars novateurs pour la vision à travers les milieux opaques : Innovative radar concept for through-the-wall applications.” 2018. Doctoral Dissertation, La Rochelle. Accessed May 30, 2020. http://www.theses.fr/2018LAROS017.

MLA Handbook (7th Edition):

Merelle, Vincent. “Concept de radars novateurs pour la vision à travers les milieux opaques : Innovative radar concept for through-the-wall applications.” 2018. Web. 30 May 2020.

Vancouver:

Merelle V. Concept de radars novateurs pour la vision à travers les milieux opaques : Innovative radar concept for through-the-wall applications. [Internet] [Doctoral dissertation]. La Rochelle; 2018. [cited 2020 May 30]. Available from: http://www.theses.fr/2018LAROS017.

Council of Science Editors:

Merelle V. Concept de radars novateurs pour la vision à travers les milieux opaques : Innovative radar concept for through-the-wall applications. [Doctoral Dissertation]. La Rochelle; 2018. Available from: http://www.theses.fr/2018LAROS017


Linköping University

13. Säll, Erik. Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology.

Degree: Electrical Engineering, 2002, Linköping University

  This master thesis describes the design of a track-and-hold (T&H) circuit with 10bit resolution, 80MS/s and 30MHz bandwidth. It is designed in a 0.18µm… (more)

Subjects/Keywords: Electronics; track-and-hold; CMOS; 0.18; low power; high performance; 10-bit; folded cascode; switch theory; correlated double sampling; CDS; fully differential; gain boosting; regulated cascode; transmission gate; transmission gate switch; clock generator; clock driver; bias; bias circuit; amplifier design; switch design; common mode feedback; CMFB; 80MSPS; 80MS/s; Elektronik; Electronics; Elektronik

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Säll, E. (2002). Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1353

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Säll, Erik. “Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology.” 2002. Thesis, Linköping University. Accessed May 30, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1353.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Säll, Erik. “Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology.” 2002. Web. 30 May 2020.

Vancouver:

Säll E. Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology. [Internet] [Thesis]. Linköping University; 2002. [cited 2020 May 30]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1353.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Säll E. Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology. [Thesis]. Linköping University; 2002. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1353

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Lund

14. Wu, Jun. Vertical III-V/High-k Nanowire MOS Capacitors and Transistors.

Degree: 2016, University of Lund

 The emerging nanowire technology in recent years has attracted an increasing interest for high-speed, low-power electronics due to the possibility of a gate-all-around (GAA) geometry… (more)

Subjects/Keywords: Electrical Engineering, Electronic Engineering, Information Engineering; Nanowire; MOSFET; MOS capacitor; C-V; XPS; MOVPE; InGaAs; InAs; High-k; RF; Track-and-hold circuit

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APA (6th Edition):

Wu, J. (2016). Vertical III-V/High-k Nanowire MOS Capacitors and Transistors. (Doctoral Dissertation). University of Lund. Retrieved from https://lup.lub.lu.se/record/8865209 ; https://portal.research.lu.se/ws/files/5984513/8865239.pdf

Chicago Manual of Style (16th Edition):

Wu, Jun. “Vertical III-V/High-k Nanowire MOS Capacitors and Transistors.” 2016. Doctoral Dissertation, University of Lund. Accessed May 30, 2020. https://lup.lub.lu.se/record/8865209 ; https://portal.research.lu.se/ws/files/5984513/8865239.pdf.

MLA Handbook (7th Edition):

Wu, Jun. “Vertical III-V/High-k Nanowire MOS Capacitors and Transistors.” 2016. Web. 30 May 2020.

Vancouver:

Wu J. Vertical III-V/High-k Nanowire MOS Capacitors and Transistors. [Internet] [Doctoral dissertation]. University of Lund; 2016. [cited 2020 May 30]. Available from: https://lup.lub.lu.se/record/8865209 ; https://portal.research.lu.se/ws/files/5984513/8865239.pdf.

Council of Science Editors:

Wu J. Vertical III-V/High-k Nanowire MOS Capacitors and Transistors. [Doctoral Dissertation]. University of Lund; 2016. Available from: https://lup.lub.lu.se/record/8865209 ; https://portal.research.lu.se/ws/files/5984513/8865239.pdf


University of Melbourne

15. LIANG, HAILANG. Design and analysis of multi-gigahertz track and hold amplifiers.

Degree: 2010, University of Melbourne

 Ultra high speed, moderate resolution data acquisition systems such as high-end test and measurement equipment, radio, radar require ultra high speed analog to digital converters(ADCs).… (more)

Subjects/Keywords: track and hold; high speed; noise analysis; distortion analysis; amplifer; switched source follower

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APA (6th Edition):

LIANG, H. (2010). Design and analysis of multi-gigahertz track and hold amplifiers. (Doctoral Dissertation). University of Melbourne. Retrieved from http://hdl.handle.net/11343/35751

Chicago Manual of Style (16th Edition):

LIANG, HAILANG. “Design and analysis of multi-gigahertz track and hold amplifiers.” 2010. Doctoral Dissertation, University of Melbourne. Accessed May 30, 2020. http://hdl.handle.net/11343/35751.

MLA Handbook (7th Edition):

LIANG, HAILANG. “Design and analysis of multi-gigahertz track and hold amplifiers.” 2010. Web. 30 May 2020.

Vancouver:

LIANG H. Design and analysis of multi-gigahertz track and hold amplifiers. [Internet] [Doctoral dissertation]. University of Melbourne; 2010. [cited 2020 May 30]. Available from: http://hdl.handle.net/11343/35751.

Council of Science Editors:

LIANG H. Design and analysis of multi-gigahertz track and hold amplifiers. [Doctoral Dissertation]. University of Melbourne; 2010. Available from: http://hdl.handle.net/11343/35751

16. SU ZHENJIANG. If sampling receiver front end design.

Degree: 2004, National University of Singapore

Subjects/Keywords: IF sampling; analog-to-digital conversion; bandpass sigma-delta modulation; switched-capacitor; track&hold; intermediate frequency

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APA (6th Edition):

ZHENJIANG, S. (2004). If sampling receiver front end design. (Thesis). National University of Singapore. Retrieved from http://scholarbank.nus.edu.sg/handle/10635/13931

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

ZHENJIANG, SU. “If sampling receiver front end design.” 2004. Thesis, National University of Singapore. Accessed May 30, 2020. http://scholarbank.nus.edu.sg/handle/10635/13931.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

ZHENJIANG, SU. “If sampling receiver front end design.” 2004. Web. 30 May 2020.

Vancouver:

ZHENJIANG S. If sampling receiver front end design. [Internet] [Thesis]. National University of Singapore; 2004. [cited 2020 May 30]. Available from: http://scholarbank.nus.edu.sg/handle/10635/13931.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

ZHENJIANG S. If sampling receiver front end design. [Thesis]. National University of Singapore; 2004. Available from: http://scholarbank.nus.edu.sg/handle/10635/13931

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Linköping University

17. Dahlbäck, Magnus. Implementation and Evaluation of a RF Receiver Architecture Using an Undersampling Track-and-Hold Circuit.

Degree: Electrical Engineering, 2003, Linköping University

  Today's radio frequency receivers for digital wireless communication are getting more and more complex. A single receiver unit should support multiple bands, have a… (more)

Subjects/Keywords: Electronics; RF; track-and-hold; undersampling; receiver; noise folding; harmonics aliasing; Elektronik; Electronics; Elektronik

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Dahlbäck, M. (2003). Implementation and Evaluation of a RF Receiver Architecture Using an Undersampling Track-and-Hold Circuit. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1732

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Dahlbäck, Magnus. “Implementation and Evaluation of a RF Receiver Architecture Using an Undersampling Track-and-Hold Circuit.” 2003. Thesis, Linköping University. Accessed May 30, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1732.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Dahlbäck, Magnus. “Implementation and Evaluation of a RF Receiver Architecture Using an Undersampling Track-and-Hold Circuit.” 2003. Web. 30 May 2020.

Vancouver:

Dahlbäck M. Implementation and Evaluation of a RF Receiver Architecture Using an Undersampling Track-and-Hold Circuit. [Internet] [Thesis]. Linköping University; 2003. [cited 2020 May 30]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1732.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Dahlbäck M. Implementation and Evaluation of a RF Receiver Architecture Using an Undersampling Track-and-Hold Circuit. [Thesis]. Linköping University; 2003. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1732

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Linköping University

18. Forsgren, Niklas. Sampling Ocsilloscope On-Chip.

Degree: Electrical Engineering, 2003, Linköping University

  Signal-integrity degradation from such factors as supply and substrate noise and cross talk between interconnects restricts the performance advances in Very Large Scale Integration… (more)

Subjects/Keywords: Electronics; sampling; high-speed sampling; subsampling; sampling oscilloscope on-chip; source follower; common source; sampling switch; transmission gate; sample and hold; track and hold; MOS transistor; Elektronik; Electronics; Elektronik

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Forsgren, N. (2003). Sampling Ocsilloscope On-Chip. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1563

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Forsgren, Niklas. “Sampling Ocsilloscope On-Chip.” 2003. Thesis, Linköping University. Accessed May 30, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1563.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Forsgren, Niklas. “Sampling Ocsilloscope On-Chip.” 2003. Web. 30 May 2020.

Vancouver:

Forsgren N. Sampling Ocsilloscope On-Chip. [Internet] [Thesis]. Linköping University; 2003. [cited 2020 May 30]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1563.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Forsgren N. Sampling Ocsilloscope On-Chip. [Thesis]. Linköping University; 2003. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1563

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

19. Mehta, N. Sampling time error calibration in Time-interleaved ADCs:.

Degree: 2013, Delft University of Technology

Subjects/Keywords: LMS calibration loop; Timing error detection; Time-interleaving, Observer Effect; Reference lanes; Wideband capture ADC; Digital-to-Analog converter; Track-and-hold, Low-power.

…Edge Tuning Circuit 5-3 Track-and-hold Design . . . . . . . . 5-4 HOLD Buffer Design… …SNR and input frequencies . . . . . . . . . 19 2-8 Typical track-and-hold circuit for 2x… …55 5-4 Simulation results of the track-and-hold circuit for main-lane and 16x scaled… …Simulation results of the track-and-hold circuit for main-lane and 16x scaled reference lane… …C-1 Track-and-hold circuit used in this thesis. . . . . . . . . . . . . . . . . . . . . C… 

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APA (6th Edition):

Mehta, N. (2013). Sampling time error calibration in Time-interleaved ADCs:. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:e606b0a9-f273-425f-86ac-11840676e03d

Chicago Manual of Style (16th Edition):

Mehta, N. “Sampling time error calibration in Time-interleaved ADCs:.” 2013. Masters Thesis, Delft University of Technology. Accessed May 30, 2020. http://resolver.tudelft.nl/uuid:e606b0a9-f273-425f-86ac-11840676e03d.

MLA Handbook (7th Edition):

Mehta, N. “Sampling time error calibration in Time-interleaved ADCs:.” 2013. Web. 30 May 2020.

Vancouver:

Mehta N. Sampling time error calibration in Time-interleaved ADCs:. [Internet] [Masters thesis]. Delft University of Technology; 2013. [cited 2020 May 30]. Available from: http://resolver.tudelft.nl/uuid:e606b0a9-f273-425f-86ac-11840676e03d.

Council of Science Editors:

Mehta N. Sampling time error calibration in Time-interleaved ADCs:. [Masters Thesis]. Delft University of Technology; 2013. Available from: http://resolver.tudelft.nl/uuid:e606b0a9-f273-425f-86ac-11840676e03d


Linköping University

20. Stridfelt, Arvid. High Speed On-Chip Measurment Circuit.

Degree: Electrical Engineering, 2005, Linköping University

  This master thesis describes a design exploration of a circuit capable of measuring high speed signals without adding significant capacitive load to the measuring… (more)

Subjects/Keywords: Electronics; CMOS; 0.13; sampling; periodic sampling; digital oscilloscope; time equivalent sampling; track and hold; master and slave; sampling clock generator; voltagedivider; source follower; sampling switch; transmission gate; RLC-line; Elektronik; Electronics; Elektronik

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APA (6th Edition):

Stridfelt, A. (2005). High Speed On-Chip Measurment Circuit. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2764

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Stridfelt, Arvid. “High Speed On-Chip Measurment Circuit.” 2005. Thesis, Linköping University. Accessed May 30, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2764.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Stridfelt, Arvid. “High Speed On-Chip Measurment Circuit.” 2005. Web. 30 May 2020.

Vancouver:

Stridfelt A. High Speed On-Chip Measurment Circuit. [Internet] [Thesis]. Linköping University; 2005. [cited 2020 May 30]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2764.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Stridfelt A. High Speed On-Chip Measurment Circuit. [Thesis]. Linköping University; 2005. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2764

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

.