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Texas A&M University
1.
Vega, Richard Manuel.
An Extended Slice Balance Approach for Solving the Discrete Ordinates Neutral Particle Transport Equations on the Next Generation of Super-Computers.
Degree: PhD, Nuclear Engineering, 2019, Texas A&M University
URL: http://hdl.handle.net/1969.1/183839 
► The research presented in this document extends the slice balance approach (SBA) for solving the discrete ordinates neutral particle transport equations. The extended slice balance…
(more)
▼ The research presented in this document extends the slice balance approach
(SBA) for solving the discrete ordinates neutral particle transport equations. The
extended slice balance approach (ESBA) formulated here improves the accuracy of
the underlying spatial discretization scheme in the presence of shadow-type discontinuities
by exploiting the new concept of a sub-slice.
This research also derives and employs the linear discontinuous nite element
(LDFE) spatial discretization scheme within the ESBA framework. Current codes
utilizing the SBA rely on low-accuracy discretization schemes, because the geometric
information required for higher accuracy schemes has been seen as too voluminous to
store and too computationally expensive to re-calculate each time it is needed. Here
we show that the judicious use of modern hardware such as the graphics processing
unit (GPU) can speed the re-calculation of geometric quantities by factors of a few
hundred compared to a single core, raising the possibility that more accurate SBA
and ESBA methods may become practical if such hardware is employed.
The re-de nition of a slice such that no slice may straddle any arbitrarily placed
cut plane parallel to the discrete ordinate, leads to the region in between adjacent
cut planes being completely independent of any other such region during a transport
\sweep." This provides the ability to divide the mesh into independent regions,
resulting in consequences that lead to two new parallel sweep strategies introduced
in this document.
When considering the LDFE discretization scheme, the ESBA is found to reduce
the absolute error for smooth solutions and increase the convergence rate for
discontinuous solutions compared to the SBA, which similarly reduces the error and
increases the convergence rate over the traditional cell balance approach (CBA). The
two parallelization strategies made possible by the ESBA exhibit weak-scaling results
similar to those obtained with a simple volume-decomposed parallel transport sweep
for both the SBA and CBA. The acceleration of the slice and sub-slice formation
process using GPUs is found to exhibit speedups of up to 400 times when compared
to a single core of the host CPU.
Advisors/Committee Members: Adams, Marvin (advisor), Morel, Jim (committee member), Ragusa, Jean (committee member), Amato, Nancy (committee member).
Subjects/Keywords: transport; numerical methods; GPUs; supercomputing
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APA (6th Edition):
Vega, R. M. (2019). An Extended Slice Balance Approach for Solving the Discrete Ordinates Neutral Particle Transport Equations on the Next Generation of Super-Computers. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/183839
Chicago Manual of Style (16th Edition):
Vega, Richard Manuel. “An Extended Slice Balance Approach for Solving the Discrete Ordinates Neutral Particle Transport Equations on the Next Generation of Super-Computers.” 2019. Doctoral Dissertation, Texas A&M University. Accessed March 03, 2021.
http://hdl.handle.net/1969.1/183839.
MLA Handbook (7th Edition):
Vega, Richard Manuel. “An Extended Slice Balance Approach for Solving the Discrete Ordinates Neutral Particle Transport Equations on the Next Generation of Super-Computers.” 2019. Web. 03 Mar 2021.
Vancouver:
Vega RM. An Extended Slice Balance Approach for Solving the Discrete Ordinates Neutral Particle Transport Equations on the Next Generation of Super-Computers. [Internet] [Doctoral dissertation]. Texas A&M University; 2019. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/1969.1/183839.
Council of Science Editors:
Vega RM. An Extended Slice Balance Approach for Solving the Discrete Ordinates Neutral Particle Transport Equations on the Next Generation of Super-Computers. [Doctoral Dissertation]. Texas A&M University; 2019. Available from: http://hdl.handle.net/1969.1/183839
Queens University
2.
Zounmevo, Ayi Judicael.
Scalability-Driven Approaches to Key Aspects of the Message Passing Interface for Next Generation Supercomputing
.
Degree: Electrical and Computer Engineering, 2014, Queens University
URL: http://hdl.handle.net/1974/12194
► The Message Passing Interface (MPI), which dominates the supercomputing programming environment, is used to orchestrate and fulfill communication in High Performance Computing (HPC). How far…
(more)
▼ The Message Passing Interface (MPI), which dominates the supercomputing programming environment,
is used to orchestrate and fulfill communication in High Performance Computing (HPC).
How far HPC programs can scale depends in large part
on the ability to achieve fast communication; and to overlap communication with computation or
communication with communication.
This dissertation proposes a new asynchronous solution to the nonblocking Rendezvous protocol used
between pairs of processes to transfer large payloads. On top of enforcing communication/computation
overlapping in a comprehensive way, the proposal trumps existing network device-agnostic
asynchronous solutions by being memory-scalable and by avoiding brute force strategies.
Achieving overlapping between communication and computation is important; but each
communication is also expected to generate minimal latency. In that respect, the
processing of the queues meant to hold messages pending reception inside the MPI middleware is
expected to be fast. Currently though, that processing slows down when program scales grow.
This research presents a novel scalability-driven message queue whose processing skips
altogether large portions of queue items that are deterministically guaranteed to lead to
unfruitful searches. For having little sensitivity to program sizes, the proposed message
queue maintains a very good performance,
on top of displaying a low and flattening memory footprint growth pattern.
Due to the blocking nature of its required synchronizations, the one-sided
communication model of MPI creates both communication/computation and communication/communication
serializations. This research fixes these issues and latency-related inefficiencies documented for
MPI one-sided communications by proposing completely nonblocking and non-serializing versions for
those synchronizations. The improvements, meant for consideration in a future MPI standard,
also allow new classes of programs to be more efficiently expressed in MPI.
Finally, a persistent distributed service is designed over MPI to show its impacts
at large scales beyond communication-only activities.
MPI is analyzed in situations of resource exhaustion, partial failure and heavy use of internal
objects for communicating and non-communicating routines. Important scalability issues are revealed
and solution approaches are put forth.
Subjects/Keywords: HPC
;
MPI
;
Scalability
;
Supercomputing
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APA (6th Edition):
Zounmevo, A. J. (2014). Scalability-Driven Approaches to Key Aspects of the Message Passing Interface for Next Generation Supercomputing
. (Thesis). Queens University. Retrieved from http://hdl.handle.net/1974/12194
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Zounmevo, Ayi Judicael. “Scalability-Driven Approaches to Key Aspects of the Message Passing Interface for Next Generation Supercomputing
.” 2014. Thesis, Queens University. Accessed March 03, 2021.
http://hdl.handle.net/1974/12194.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Zounmevo, Ayi Judicael. “Scalability-Driven Approaches to Key Aspects of the Message Passing Interface for Next Generation Supercomputing
.” 2014. Web. 03 Mar 2021.
Vancouver:
Zounmevo AJ. Scalability-Driven Approaches to Key Aspects of the Message Passing Interface for Next Generation Supercomputing
. [Internet] [Thesis]. Queens University; 2014. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/1974/12194.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Zounmevo AJ. Scalability-Driven Approaches to Key Aspects of the Message Passing Interface for Next Generation Supercomputing
. [Thesis]. Queens University; 2014. Available from: http://hdl.handle.net/1974/12194
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
3.
Christodoulis, Georgios.
Adaption d'un système HPC pour intégrer des FPGAs : Adapting a HPC runtime system to FPGAs.
Degree: Docteur es, Informatique, 2019, Université Grenoble Alpes (ComUE)
URL: http://www.theses.fr/2019GREAM061
► En plus des cœurs de CPU traditionnels, d'autres unités de traitementsont utilisées par la communauté High Performance Computing (HPC) afind'obtenir une efficacité et des performances…
(more)
▼ En plus des cœurs de CPU traditionnels, d'autres unités de traitementsont utilisées par la communauté High Performance Computing (HPC) afind'obtenir une efficacité et des performances améliorées. Un FieldProgrammable Gate Arrays (FPGA), est une unité de traitement composée delogique reprogrammable interconnectée et de blocs mémoire.Ce type d'unité de traitement constitue un candidat prometteur pouraméliorer la puissance de calcul de plates-formes HPC car il permet deréduire le nombre de couches d'abstraction entre le niveau deprogrammation et le matériel réel. En contre-partie, l'exploitation deFPGA nécessite une connaissance approfondie de la conception matériellede bas niveau et une grande expertise des outils fournis par lesvendeurs qui ne correspond pas à celle des programmeurs HPC. Nous avons,dans le cadre de cette thèse, conçu un framework permettant undéveloppement simple des applications scientifiques sur des plateformeshétérogènes intégrant des FPGAs. Au cœur de notre framework se trouve lesystème d'exécution hétérogène StarPU, qui a été étendu pour supporterles FPGAs, cachant aux programmeurs des opérations complexes dérivant dela complexité de l'architecture sous-jacente et permettant un contrôlefin de la performance à travers différentes stratégies de planification.Pour la communication avec le FPGA, nous avons créé Conor, unebibliothèque de communication basée sur RIFFA, qui assure la cohérencede l'accélérateur lors de scénarios où les threads logicielsinteragissent simultanément avec le calcul effectué sur le FPGA.Notre approche est évaluée selon deux axes, l'un correspondant à laprogrammabilité et l'autre aux surcoûts imposés par les composantesadditionnelles rattachées au FPGA.La programmabilité du framework a été évaluée à l'aide d'une version parblocs de multiplication de matrice. Cette multiplication de matrice estégalement utilisée pour démontrer que nos extensions à StarPU n'ont pasimposé de surcoût supplémentaires.En plus du premier exemple de multiplication de matrice, nous avons crééune conception matérielle efficace de gemm, qui permettra l'exécutiond'applications plus complexes et intéressantes comme la décomposition deCholesky.
Along with the traditional CPU cores, processing units of different architectures have been employed by the HPC community in order to obtain improved efficiency and performance. A Field Programmable Gate Arrays - FPGA, is a hardware fabric composed by interconnected re-programmable logic and memory blocks. This type of processing unit, constitutes promising candidate to amplify the computational power of heterogeneous HPC platforms, since due to the reduced amount of abstraction layers between the level of programming and the actual hardware, they can satisfy the aforementioned objectives.However, exploiting them requires an in-depth knowledge of low-level hardware design and high expertise on vendor-provided tools, which is not aligned with the expertise of HPC application programmers. In the scope of this thesis, we have designed a framework that allows a…
Advisors/Committee Members: Desprez, Frédéric (thesis director), Broquedis, François (thesis director).
Subjects/Keywords: Hpc; Fpga; Runtime; Supercomputing; Hpc; Fpga; Runtime; Supercomputing; 004
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APA (6th Edition):
Christodoulis, G. (2019). Adaption d'un système HPC pour intégrer des FPGAs : Adapting a HPC runtime system to FPGAs. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2019GREAM061
Chicago Manual of Style (16th Edition):
Christodoulis, Georgios. “Adaption d'un système HPC pour intégrer des FPGAs : Adapting a HPC runtime system to FPGAs.” 2019. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed March 03, 2021.
http://www.theses.fr/2019GREAM061.
MLA Handbook (7th Edition):
Christodoulis, Georgios. “Adaption d'un système HPC pour intégrer des FPGAs : Adapting a HPC runtime system to FPGAs.” 2019. Web. 03 Mar 2021.
Vancouver:
Christodoulis G. Adaption d'un système HPC pour intégrer des FPGAs : Adapting a HPC runtime system to FPGAs. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2019. [cited 2021 Mar 03].
Available from: http://www.theses.fr/2019GREAM061.
Council of Science Editors:
Christodoulis G. Adaption d'un système HPC pour intégrer des FPGAs : Adapting a HPC runtime system to FPGAs. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2019. Available from: http://www.theses.fr/2019GREAM061
Northeastern University
4.
Cao, Jiajun.
Transparent checkpointing over RDMA-based networks.
Degree: PhD, Computer Science Program, 2017, Northeastern University
URL: http://hdl.handle.net/2047/D20290419
► Fault tolerance for large-scale applications has long been an area of active research, as the size of the computation keeps growing. One of the components…
(more)
▼ Fault tolerance for large-scale applications has long been an area of active research, as the size of the computation keeps growing. One of the components of a fault-tolerance strategy is checkpointing. However, no explicit checkpoint-restart solution has been available for applications running over RDMA-based networks. RDMA-based networks are the primary network used in high-performance computing, and many researchers believe that RDMA networks will be widely deployed in the Cloud as the costs decrease. Existing approaches often rely on a solution that is specific to the particular MPI implementation or other parallel model in order to disconnect the network at checkpoint time, and to reconnect the network at restart time. Such schemes are difficult to incorporate for new parallel programming models, and also imply higher checkpoint overhead.; In this dissertation, we present the first transparent, system-initiated checkpoint-restart solution that directly supports RDMA networks. This new approach does not depend on a specific parallel programming model, and does not require any modification to the operating system. In addition, network connections remain active during checkpointing, thus making checkpointing more efficient.; Conceptually, this dissertation can be divided into three parts. First, we introduce a new, generic model for RDMA networks, by extracting the key components for checkpointing an RDMA network. These components are the essential states that need to be saved, in order to restore the network connection on restart. This model is then applied to two distinct RDMA networks: InfiniBand, and Intel Omni-Path. This work demonstrates the generality of the model, and it also describes variations needed to adapt to InfiniBand or Omni-Path.; Second, we demonstrate the performance of the proposed approach. Moving from a medium-sized academic computer cluster to a petascale supercomputer, we show what issues are exposed as the application scales up, and how these issues are addressed. In particular, different strategies to drain the network at checkpoint time are investigated, based on the underlying network protocol. As a result, failure-free overhead is reduced to below 1%, even at the largest scale demonstrated: 32,752 processes.; Third, we show how to retrofit transparent checkpointing into the Cloud, as RDMA networks are also becoming more popular in the Cloud. A Checkpointing as a Service approach is presented, which employs checkpointing to provide fault tolerance as a service in the Cloud, and enables application migration in heterogeneous cloud environments.
Subjects/Keywords: checkpoint-restart; cloud computing; MPI; RDMA; supercomputing; virtualization
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APA (6th Edition):
Cao, J. (2017). Transparent checkpointing over RDMA-based networks. (Doctoral Dissertation). Northeastern University. Retrieved from http://hdl.handle.net/2047/D20290419
Chicago Manual of Style (16th Edition):
Cao, Jiajun. “Transparent checkpointing over RDMA-based networks.” 2017. Doctoral Dissertation, Northeastern University. Accessed March 03, 2021.
http://hdl.handle.net/2047/D20290419.
MLA Handbook (7th Edition):
Cao, Jiajun. “Transparent checkpointing over RDMA-based networks.” 2017. Web. 03 Mar 2021.
Vancouver:
Cao J. Transparent checkpointing over RDMA-based networks. [Internet] [Doctoral dissertation]. Northeastern University; 2017. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/2047/D20290419.
Council of Science Editors:
Cao J. Transparent checkpointing over RDMA-based networks. [Doctoral Dissertation]. Northeastern University; 2017. Available from: http://hdl.handle.net/2047/D20290419
5.
Sack, Paul.
Scalable collective message-passing algorithms.
Degree: PhD, 0112, 2012, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/29839
► Governments, universities, and companies expend vast resources building the top supercomputers. The processors and interconnect networks become faster, while the number of nodes grows exponentially.…
(more)
▼ Governments, universities, and companies expend vast resources
building the top supercomputers. The processors and interconnect
networks become faster, while the number of nodes grows exponentially. Problems of scale emerge, not least of which is
collective performance. This thesis identifies and proposes solutions for two major scalability problems.
Our first contribution is a novel algorithm for process-partitioning
and remapping for exascale systems that has far better time and space
scaling than known algorithms. Our evaluations predict an improvement
of up to 60x for large exascale systems and arbitrary reduction in the large temporary buffer space required for generating new
communicators.
Our second contribution consists of several novel collective
algorithms for Clos and torus networks. Known allgather,
reduce-scatter, and composite algorithms for Clos networks suffer the worst congestion when the largest messages are exchanged, damaging
performance. Known algorithms for torus networks use only one network
port, regardless of how many are available. Unlike known algorithms,
our algorithms have a small amount of redundant communication. Unlike
known algorithms, our algorithms can be reordered so that congestion
hinders small messages rather than large, and all ports can be fully
used on multi-port torus networks. The redundant communication gives
us this flexibility. On a 32k-node system, we deliver improvements of
up to 11x for the reduce-scatter operation, when the native
reduce-satter algorithm does not use special hardware, and 5.5x for
the allgather operation. We show large improvements over native
algorithms with as few as 16 processors.
Advisors/Committee Members: Gropp, William D. (advisor), Kale, Laxmikant V. (committee member), Padua, David A. (committee member), Snir, Marc (committee member).
Subjects/Keywords: Supercomputing; Message-passing; collective algorithms
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APA (6th Edition):
Sack, P. (2012). Scalable collective message-passing algorithms. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/29839
Chicago Manual of Style (16th Edition):
Sack, Paul. “Scalable collective message-passing algorithms.” 2012. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed March 03, 2021.
http://hdl.handle.net/2142/29839.
MLA Handbook (7th Edition):
Sack, Paul. “Scalable collective message-passing algorithms.” 2012. Web. 03 Mar 2021.
Vancouver:
Sack P. Scalable collective message-passing algorithms. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2012. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/2142/29839.
Council of Science Editors:
Sack P. Scalable collective message-passing algorithms. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2012. Available from: http://hdl.handle.net/2142/29839
Brno University of Technology
6.
Kryške, Lukáš.
Škálovatelné strojové učení s využitím nástrojů Hadoop a Mahout: Scalable machine learning using Hadoop and Mahout tools.
Degree: 2019, Brno University of Technology
URL: http://hdl.handle.net/11012/10042
► This bachelor’s thesis compares several tools for building a scalable, machine learning platform and describes their advantages and disadvantages. It also practically demonstrates functionality of…
(more)
▼ This bachelor’s thesis compares several tools for building a scalable, machine learning platform and describes their advantages and disadvantages. It also practically demonstrates functionality of this scalable platform based on the Apache Hadoop and Apache Mahout tools and measures performance of the K-Means algorithm for total of five computing nodes.
Advisors/Committee Members: Burget, Radim (advisor), Atassi, Hicham (referee).
Subjects/Keywords: Hadoop; Mahout; superpočítač; paralelní zpracování dat; strojové učení; Hadoop; Mahout; supercomputer; parallel supercomputing; machine learning
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APA ·
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APA (6th Edition):
Kryške, L. (2019). Škálovatelné strojové učení s využitím nástrojů Hadoop a Mahout: Scalable machine learning using Hadoop and Mahout tools. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/10042
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Kryške, Lukáš. “Škálovatelné strojové učení s využitím nástrojů Hadoop a Mahout: Scalable machine learning using Hadoop and Mahout tools.” 2019. Thesis, Brno University of Technology. Accessed March 03, 2021.
http://hdl.handle.net/11012/10042.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Kryške, Lukáš. “Škálovatelné strojové učení s využitím nástrojů Hadoop a Mahout: Scalable machine learning using Hadoop and Mahout tools.” 2019. Web. 03 Mar 2021.
Vancouver:
Kryške L. Škálovatelné strojové učení s využitím nástrojů Hadoop a Mahout: Scalable machine learning using Hadoop and Mahout tools. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/11012/10042.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Kryške L. Škálovatelné strojové učení s využitím nástrojů Hadoop a Mahout: Scalable machine learning using Hadoop and Mahout tools. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/10042
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Arizona
7.
Patki, Tapasya.
The Case For Hardware Overprovisioned Supercomputers
.
Degree: 2015, University of Arizona
URL: http://hdl.handle.net/10150/577307
► Power management is one of the most critical challenges on the path to exascale supercomputing. High Performance Computing (HPC) centers today are designed to be…
(more)
▼ Power management is one of the most critical challenges on the path to exascale
supercomputing. High Performance Computing (HPC) centers today are designed to be worst-case power provisioned, leading to two main problems: limited application performance and under-utilization of procured power. In this dissertation we introduce hardware overprovisioning: a novel, flexible design methodology for future HPC systems that addresses the aforementioned problems and leads to significant improvements in application and system performance under a power constraint. We first establish that choosing the right configuration based on application characteristics when using hardware overprovisioning can improve application performance under a power constraint by up to 62%. We conduct a detailed analysis of the infrastructure costs associated with hardware overprovisioning and show that it is an economically viable
supercomputing design approach. We then develop RMAP (Resource MAnager for Power), a power-aware, low-overhead, scalable resource manager for future hardware overprovisioned HPC systems. RMAP addresses the issue of under-utilized power by using power-aware backfilling and improves job turnaround times by up to 31%. This dissertation opens up several new avenues for research in power-constrained
supercomputing as we venture toward exascale, and we conclude by enumerating these.
Advisors/Committee Members: Lowenthal, David K (advisor), Lowenthal, David K. (committeemember), Debray, Saumya K. (committeemember), Hartman, John H. (committeemember), Rountree, Barry L. (committeemember), Schulz, Martin W. (committeemember).
Subjects/Keywords: Hardware Overprovisioning;
High Performance Computing;
Performance Optimization;
Power;
Supercomputing;
Computer Science;
Energy Efficiency
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APA ·
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Manager
APA (6th Edition):
Patki, T. (2015). The Case For Hardware Overprovisioned Supercomputers
. (Doctoral Dissertation). University of Arizona. Retrieved from http://hdl.handle.net/10150/577307
Chicago Manual of Style (16th Edition):
Patki, Tapasya. “The Case For Hardware Overprovisioned Supercomputers
.” 2015. Doctoral Dissertation, University of Arizona. Accessed March 03, 2021.
http://hdl.handle.net/10150/577307.
MLA Handbook (7th Edition):
Patki, Tapasya. “The Case For Hardware Overprovisioned Supercomputers
.” 2015. Web. 03 Mar 2021.
Vancouver:
Patki T. The Case For Hardware Overprovisioned Supercomputers
. [Internet] [Doctoral dissertation]. University of Arizona; 2015. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/10150/577307.
Council of Science Editors:
Patki T. The Case For Hardware Overprovisioned Supercomputers
. [Doctoral Dissertation]. University of Arizona; 2015. Available from: http://hdl.handle.net/10150/577307
Vrije Universiteit Amsterdam
8.
Drost, N.
Real-World Distributed Supercomputing
.
Degree: 2010, Vrije Universiteit Amsterdam
URL: http://hdl.handle.net/1871/16291
Subjects/Keywords: Grid-computing;
supercomputing;
Peer-to-Peer;
Gossiping;
Resource tracking
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APA ·
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Manager
APA (6th Edition):
Drost, N. (2010). Real-World Distributed Supercomputing
. (Doctoral Dissertation). Vrije Universiteit Amsterdam. Retrieved from http://hdl.handle.net/1871/16291
Chicago Manual of Style (16th Edition):
Drost, N. “Real-World Distributed Supercomputing
.” 2010. Doctoral Dissertation, Vrije Universiteit Amsterdam. Accessed March 03, 2021.
http://hdl.handle.net/1871/16291.
MLA Handbook (7th Edition):
Drost, N. “Real-World Distributed Supercomputing
.” 2010. Web. 03 Mar 2021.
Vancouver:
Drost N. Real-World Distributed Supercomputing
. [Internet] [Doctoral dissertation]. Vrije Universiteit Amsterdam; 2010. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/1871/16291.
Council of Science Editors:
Drost N. Real-World Distributed Supercomputing
. [Doctoral Dissertation]. Vrije Universiteit Amsterdam; 2010. Available from: http://hdl.handle.net/1871/16291
University of New Mexico
9.
Ibtesham, Dewan M.
Improving Large Scale Application Performance via Data Movement Reduction.
Degree: Department of Computer Science, 2017, University of New Mexico
URL: https://digitalrepository.unm.edu/cs_etds/87
► The compute capacity growth in high performance computing (HPC) systems is outperforming improvements in other areas of the system for example, memory capacity, network…
(more)
▼ The compute capacity growth in high performance computing (HPC) systems is outperforming improvements in other areas of the system for example, memory capacity, network bandwidth and I/O bandwidth. Therefore, the cost of executing a floating point operation is decreasing at a faster rate than moving that data. This increasing performance gap causes wasted CPU cycles while waiting for slower I/O operations to complete in the memory hierarchy, network, and storage. These bottlenecks decrease application time to solution performance, and increase energy consumption, resulting in system under utilization. In other words, data movement is becoming a key concern for future HPC system-design. Data volume reduction techniques (e.g. lossless data compression, information hiding approaches, difference-based patches etc.) have been useful in many contexts to reduce data movement. In this thesis, I study the use of such techniques to reduce data movement in the context of current and future HPC environments. I trade off computation to reduce data volume, for faster completion of I/O operations. I identify three key data movement areas in HPC, intra-process, inter-process and inter-application data movement and investigate the impacts of various compression techniques on the data associated with each of these areas. To be specific, I introduce a compression-based paging system for HPC memory and demonstrate up to 78% capacity improvement with minimal runtime overhead (4%). Next, I propose and demonstrate a novel two-level diff-based approach that can reduce inter-process data movement by up to 99% although with potentially large runtime overhead. Finally, I reduce inter-application data movement by up to 90% using checkpoint/restart-based fault tolerance protocol as a case study. By doing so, I show that checkpoint data compression can improve application runtime efficiency by more than 50% and reduce energy expenditure by up to 90%.
Advisors/Committee Members: Dorian Arnold, Kurt Ferreira, Patrick Bridges, David Lowenthal.
Subjects/Keywords: High performance computing; Supercomputing; Data movement; Distributed computing; Fault tolerance; Computer and Systems Architecture; Computer Engineering
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APA (6th Edition):
Ibtesham, D. M. (2017). Improving Large Scale Application Performance via Data Movement Reduction. (Doctoral Dissertation). University of New Mexico. Retrieved from https://digitalrepository.unm.edu/cs_etds/87
Chicago Manual of Style (16th Edition):
Ibtesham, Dewan M. “Improving Large Scale Application Performance via Data Movement Reduction.” 2017. Doctoral Dissertation, University of New Mexico. Accessed March 03, 2021.
https://digitalrepository.unm.edu/cs_etds/87.
MLA Handbook (7th Edition):
Ibtesham, Dewan M. “Improving Large Scale Application Performance via Data Movement Reduction.” 2017. Web. 03 Mar 2021.
Vancouver:
Ibtesham DM. Improving Large Scale Application Performance via Data Movement Reduction. [Internet] [Doctoral dissertation]. University of New Mexico; 2017. [cited 2021 Mar 03].
Available from: https://digitalrepository.unm.edu/cs_etds/87.
Council of Science Editors:
Ibtesham DM. Improving Large Scale Application Performance via Data Movement Reduction. [Doctoral Dissertation]. University of New Mexico; 2017. Available from: https://digitalrepository.unm.edu/cs_etds/87
University of Southern California
10.
Hukerikar, Saurabh.
Introspective resilience for exascale high-performance
computing systems.
Degree: PhD, Electrical Engineering, 2015, University of Southern California
URL: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/626119/rec/3617
► Future exascale high-performance computing (HPC) systems will be constructed using VLSI devices with smaller feature sizes that will be far less reliable than those used…
(more)
▼ Future exascale high-performance computing (HPC)
systems will be constructed using VLSI devices with smaller feature
sizes that will be far less reliable than those used today.
Furthermore, in the pursuit of higher floating point operations per
second (FLOPS), these systems are projected to exponentially
increase the number of processor cores and memory chips used.
Unfortunately, the mean time to failure (MTTF) of the system scales
inversely in relation to the number of components. Therefore,
faults and resultant system-level failures will become the norm,
not the exception. This will pose significant problems for system
designers and programmers who, for half a century have enjoyed an
execution model that assumed correct behavior by the underlying
computing system. However, not every error detected needs to result
in catastrophic failure. Many HPC applications are inherently fault
resilient, but lack convenient mechanisms to express their
resilience features to the execution environments that are designed
to be fault oblivious. ❧ In this dissertation work, we propose an
execution model based on the notion of introspection. We develop a
set of resilience-oriented language extensions that facilitate the
incorporation of fault resilience as an intrinsic property of
scientific application codes. These extensions are supported by a
simple compiler infrastructure and a runtime system that reasons
about the context and significance of faults to the outcome of an
application's execution. We extend the compiler infrastructure to
provide an application-level methodology for fault detection and
correction that is based on redundant multithreading (RMT). We also
propose an introspective runtime framework that continuously
observes and reflects upon system-level fault indicators to assess
the vulnerability of the system's resources. The introspective
runtime system provides a unified execution environment that
reasons about the implications of resource management actions for
the resilience and performance of the application processes. Our
results, which cover several high-performance computing
applications and different fault types and distributions,
demonstrate that a resilience-aware execution environment is
important in order to solve the most demanding computational
challenges using future extreme scale HPC systems.
Advisors/Committee Members: Draper, JeffreyLucas, Robert F. (Committee Chair), Prasanna, Viktor K. (Committee Member), Nakano, Aiichiro (Committee Member).
Subjects/Keywords: high performance computing; HPC; supercomputing; exascale computing; extreme scale computing; resilience; fault tolerance; programming models; compiler techniques; runtime systems; introspection
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APA (6th Edition):
Hukerikar, S. (2015). Introspective resilience for exascale high-performance
computing systems. (Doctoral Dissertation). University of Southern California. Retrieved from http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/626119/rec/3617
Chicago Manual of Style (16th Edition):
Hukerikar, Saurabh. “Introspective resilience for exascale high-performance
computing systems.” 2015. Doctoral Dissertation, University of Southern California. Accessed March 03, 2021.
http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/626119/rec/3617.
MLA Handbook (7th Edition):
Hukerikar, Saurabh. “Introspective resilience for exascale high-performance
computing systems.” 2015. Web. 03 Mar 2021.
Vancouver:
Hukerikar S. Introspective resilience for exascale high-performance
computing systems. [Internet] [Doctoral dissertation]. University of Southern California; 2015. [cited 2021 Mar 03].
Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/626119/rec/3617.
Council of Science Editors:
Hukerikar S. Introspective resilience for exascale high-performance
computing systems. [Doctoral Dissertation]. University of Southern California; 2015. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/626119/rec/3617
Virginia Tech
11.
Adhinarayanan, Vignesh.
Models and Techniques for Green High-Performance Computing.
Degree: PhD, Computer Science and Applications, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/98660
► Past research in green high-performance computing (HPC) mostly focused on managing the power consumed by general-purpose processors, known as central processing units (CPUs) and to…
(more)
▼ Past research in green high-performance computing (HPC) mostly focused on managing the power consumed by general-purpose processors, known as central processing units (CPUs) and to a lesser extent, memory. In this dissertation, we study two increasingly important components: interconnects (predominantly focused on those inside a chip, but not limited to them) and graphics processing units (GPUs). Our contributions in this dissertation include a set of innovative measurement techniques to estimate the power consumed by the target components, statistical and analytical approaches to develop power models and their optimizations, and algorithms to manage power statically and at runtime. Experimental results show that it is possible to build models of sufficient accuracy and apply them for intelligently managing power on multiple levels of the system hierarchy: chip interconnect at the micro-level, heterogeneous nodes at the meso-level, and a
supercomputing cluster at the macro-level.
Advisors/Committee Members: Feng, Wu-Chun (committeechair), Butt, Ali (committee member), Gardner, Mark K. (committee member), Tilevich, Eli (committee member), Pakin, Scott (committee member).
Subjects/Keywords: Keywords: Green Supercomputing; Power Modeling; Power Management; DVFS; Phase Prediction; Heterogeneity; GPUs; Data Movement; On-chip Interconnects; In-situ Techniques
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APA (6th Edition):
Adhinarayanan, V. (2020). Models and Techniques for Green High-Performance Computing. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/98660
Chicago Manual of Style (16th Edition):
Adhinarayanan, Vignesh. “Models and Techniques for Green High-Performance Computing.” 2020. Doctoral Dissertation, Virginia Tech. Accessed March 03, 2021.
http://hdl.handle.net/10919/98660.
MLA Handbook (7th Edition):
Adhinarayanan, Vignesh. “Models and Techniques for Green High-Performance Computing.” 2020. Web. 03 Mar 2021.
Vancouver:
Adhinarayanan V. Models and Techniques for Green High-Performance Computing. [Internet] [Doctoral dissertation]. Virginia Tech; 2020. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/10919/98660.
Council of Science Editors:
Adhinarayanan V. Models and Techniques for Green High-Performance Computing. [Doctoral Dissertation]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/98660
University of Texas – Austin
12.
Norman, Alison Nicholas.
Compiler-assisted staggered checkpointing.
Degree: PhD, Computer Sciences, 2010, University of Texas – Austin
URL: http://hdl.handle.net/2152/ETD-UT-2010-08-1746
► To make progress in the face of failures, long-running parallel applications need to save their state, known as a checkpoint. Unfortunately, current checkpointing techniques are…
(more)
▼ To make progress in the face of failures, long-running parallel applications need to save their state, known as a checkpoint. Unfortunately, current checkpointing techniques are becoming untenable on large-scale supercomputers. Many applications checkpoint all processes simultaneously – a technique that is easy to implement but often saturates the network and file system, causing a significant increase in checkpoint overhead. This thesis introduces compiler-assisted staggered checkpointing, where processes checkpoint at different places in the application text, thereby reducing contention for the network and file system. This checkpointing technique is algorithmically challenging since the number of possible solutions is enormous and the number of desirable solutions is small, but we have developed a compiler algorithm that both places staggered checkpoints in an application and ensures that the solution is desirable. This algorithm successfully places staggered checkpoints in parallel applications configured to use tens of thousands of processes. For our benchmarks, this algorithm successfully finds and places useful recovery lines that are up to 37% faster for all configurations than recovery lines where all processes write their data at approximately the same time. We also analyze the success of staggered checkpointing by investigating sets of application and system characteristics for which it reduces network and file system contention. We find that for many configurations, staggered checkpointing reduces both checkpointing time and overall execution time. To perform these analyses, we develop an event-driven simulator for large-scale systems that estimates the behavior of the network, global file system, and local hardware using predictive models. Our simulator allows us to accurately study applications that have thousands of processes; it on average predicts execution times as 83% of their measured value.
Advisors/Committee Members: Lin, Yun Calvin (advisor), Choi, Sung-Eun (committee member), Alvisi, Lorenzo (committee member), McKinley, Kathryn S. (committee member), Pingali, Keshav (committee member).
Subjects/Keywords: Supercomputing; Checkpointing; Simulator; Large-scale parallel applications
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MLA ·
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CSE |
Export
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Manager
APA (6th Edition):
Norman, A. N. (2010). Compiler-assisted staggered checkpointing. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2010-08-1746
Chicago Manual of Style (16th Edition):
Norman, Alison Nicholas. “Compiler-assisted staggered checkpointing.” 2010. Doctoral Dissertation, University of Texas – Austin. Accessed March 03, 2021.
http://hdl.handle.net/2152/ETD-UT-2010-08-1746.
MLA Handbook (7th Edition):
Norman, Alison Nicholas. “Compiler-assisted staggered checkpointing.” 2010. Web. 03 Mar 2021.
Vancouver:
Norman AN. Compiler-assisted staggered checkpointing. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2010. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/2152/ETD-UT-2010-08-1746.
Council of Science Editors:
Norman AN. Compiler-assisted staggered checkpointing. [Doctoral Dissertation]. University of Texas – Austin; 2010. Available from: http://hdl.handle.net/2152/ETD-UT-2010-08-1746
Brno University of Technology
13.
Ryba, Jan.
Generování komplexních procedurálních terénů na GPU: Generating Complex Procedural Terrains Using the GPU.
Degree: 2019, Brno University of Technology
URL: http://hdl.handle.net/11012/54225
► Generating fully 3D terrains is a dificult task, meaning that we need to store a lot of data or do a lot of computing or…
(more)
▼ Generating fully 3D terrains is a dificult task, meaning that we need to store a lot of data or do a lot of computing or both. We can reduce or completly eliminate the data srorage by using a procedural approch, but this is where the problem gets realy computationaly costly and the CUDA platform comes in. CUDA kernels runinng parallely on graphic accelerators can rapidly decrease time needed for computation, allowing even these complex calculations to work in real time or even better. Finding its use in game or movie industry.
Advisors/Committee Members: Herout, Adam (advisor), Bartoň, Radek (referee).
Subjects/Keywords: Procedurální; generování; CUDA; paralelizace; GPU; grafické akcelerátory; volumetrická data; terény; perlinův šum; marching cubes; supercomputing; shadery; Procedural generating; CUDA; paralelization; GPU; graphics accelerators; volume data; terrains; perlin noise; marchnig cubes; supercomputing; shaders
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APA (6th Edition):
Ryba, J. (2019). Generování komplexních procedurálních terénů na GPU: Generating Complex Procedural Terrains Using the GPU. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/54225
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Ryba, Jan. “Generování komplexních procedurálních terénů na GPU: Generating Complex Procedural Terrains Using the GPU.” 2019. Thesis, Brno University of Technology. Accessed March 03, 2021.
http://hdl.handle.net/11012/54225.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Ryba, Jan. “Generování komplexních procedurálních terénů na GPU: Generating Complex Procedural Terrains Using the GPU.” 2019. Web. 03 Mar 2021.
Vancouver:
Ryba J. Generování komplexních procedurálních terénů na GPU: Generating Complex Procedural Terrains Using the GPU. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/11012/54225.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Ryba J. Generování komplexních procedurálních terénů na GPU: Generating Complex Procedural Terrains Using the GPU. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/54225
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Vienna
14.
Shahi Barogh, Bahareh.
Grid und Cloud Computing.
Degree: 2010, University of Vienna
URL: http://othes.univie.ac.at/9969/
► In dieser Arbeit werden die theoretischen Konzepte und mögliche praktische Anwendungsmöglichkeiten von Grid- und Cloud-Computing dargestellt. Als erster Teil der Arbeit wird zuerst auf Grids…
(more)
▼ In dieser Arbeit werden die theoretischen Konzepte und mögliche praktische Anwendungsmöglichkeiten von Grid- und Cloud-Computing dargestellt.
Als erster Teil der Arbeit wird zuerst auf Grids eingegangen. Hierzu wird die Klassifikation von Grids gegliedert nach Distributed Supercomputing, Data-Intensive Computing, On-Demand Computing, High-Troughput Computing bzw. Collaborative Computing erläutert. Anschließend werden im Rahmen einer historischen Betrachtung die Technologien hinter Grid-Computing dargestellt. Hierbei wird sich zeigen, dass mit jeder neuen Generation eine weitergehende Standardisierung erfolgt ist. Innerhalb dieser Abschnitte wird auch die Architektur beschrieben, mit der Darstellung der verschiedenen Schichten, es wird auf das Globus Toolkit eingegangen und es wird beschrieben werden, wie unter dem SOA-Aspekt und Nutzung von WebServices immer stärker Industriestandards anstatt proprietärer Lösungen eingesetzt werden. Dieser Teil wird dem Problem der Sicherstellung eines Quality-of-Service (QoS) abgeschlossen.
Der zweite Teil behandelt Cloud-Computing. Hierbei werden in ähnlicher Weise wie im ersten Teil die theoretischen Konzepte für Clouds erläutert, so erfolgt eine Definition des Begriffs und es werden die Arten von Clouds beschrieben. Dabei wird in einem stärkeren Ausmaß auch auf die wirtschaftlichen Gründe für die Entstehung von Clouds eingegangen. Dies erfolgt sowohl in Hinsicht auf die Anbieter (Cloud-Provider), als auch auf die Anwender von Clouds. Zusätzlich werden auch die Probleme aufgezählt, die einer stärkeren kommerziellen Nutzung von Cloud-Computing im Weg stehen könnten. In eigenen Abschnitten wird auf den Zusammenhang zu Virtualisierung und dem „Everything as a Service“-Konzept eingegangen. In einem weiteren Kapitel dieses Teils werden die kommerziellen Cloud-Umgebungen von Amazon, Google, IBM und Microsoft vorgestellt, hierbei werden Kostenbeispiele gebracht. Anschließend werden mögliche Anwendungen beschrieben, der Teil schließt mit einem Experiment in einer Cloud.
In this work the theoretical concepts and potential practical applications of Grid and Cloud Computing are presented.
The first section of the work focuses on Grids. Here the classification of Grids into Distributed Supercomputing, Data-Intensive Computing, On-Demand Computing, High-Throughput Computing / Collaborative Computing is explained. The technologies behind grid computing are presented in a historical perspective. This will show that with each new generation a further standardization takes place. Within these sections the architecture is also described with the representation of the different layers, the Globus Toolkit is examined and it is described how, by using SOA aspects and Web services, increasingly more industry standards instead of proprietary solutions are being implemented. This part is concluded with an assessment of the problem of ensuring Quality of Service (QoS).
The second section deals with Cloud Computing. These are explained in a similar manner as in the first section - the…
Subjects/Keywords: 54.22 Datenspeicher; 54.25 Parallele Datenverarbeitung; 54.64 Datenbanken; Grid Computing / Distributed Supercomputing / On-Demand Computing / Collaborative Computing / Grid Architektur / WebServices / Cloud Computing / Business Context / Virtualisierung / kommerzielle Cloud Umgebungen; Grid Computing / Distributed Supercomputing / On-Demand Computing / Collaborative Computing / Grid architecture / WebServices / Cloud Computing / Business context / Virtualisation / Commercial Cloud environments
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Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Shahi Barogh, B. (2010). Grid und Cloud Computing. (Thesis). University of Vienna. Retrieved from http://othes.univie.ac.at/9969/
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Shahi Barogh, Bahareh. “Grid und Cloud Computing.” 2010. Thesis, University of Vienna. Accessed March 03, 2021.
http://othes.univie.ac.at/9969/.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Shahi Barogh, Bahareh. “Grid und Cloud Computing.” 2010. Web. 03 Mar 2021.
Vancouver:
Shahi Barogh B. Grid und Cloud Computing. [Internet] [Thesis]. University of Vienna; 2010. [cited 2021 Mar 03].
Available from: http://othes.univie.ac.at/9969/.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Shahi Barogh B. Grid und Cloud Computing. [Thesis]. University of Vienna; 2010. Available from: http://othes.univie.ac.at/9969/
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Brno University of Technology
15.
Ryba, Jan.
Detekce zájmových bodů na CUDA: Interest-Point Detection on CUDA.
Degree: 2019, Brno University of Technology
URL: http://hdl.handle.net/11012/54557
► Corner point detection is one of many functions used in computer vision for tasks such as tracking, detecting objects, comparing images and much more. Many…
(more)
▼ Corner point detection is one of many functions used in computer vision for tasks such as tracking, detecting objects, comparing images and much more. Many of the algorithms are complex and require a lot of CPU time. This is where the CUDA platform comes in. CUDA kernels run parallely on graphic accelerators can rapidly decrease time needed for execution, allowing even these complex calculations to work in real time or even better. Text focuces on Moravec and Harris corner detection algorithms and their effective implementation on CUDA. Examination of potetntial and performance of CUDA platform is also importatnt.
Advisors/Committee Members: Herout, Adam (advisor), Řezníček, Ivo (referee).
Subjects/Keywords: rohové body; zájmové body; význačné body; detekce; CUDA; zrychlování; optimalizace; zpracování obrazu; supercomputing; Moravec operátor; Harris operátor; navigace robota; grafický akcelerátor; GPU; corner-points; interest-points; feature-points; detection; CUDA; speedup; optimalization; computer vision; supercomputing; Moravec operator; Harris operator; robot navigation; graphic accelerator; GPU
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APA ·
Chicago ·
MLA ·
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CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Ryba, J. (2019). Detekce zájmových bodů na CUDA: Interest-Point Detection on CUDA. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/54557
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Ryba, Jan. “Detekce zájmových bodů na CUDA: Interest-Point Detection on CUDA.” 2019. Thesis, Brno University of Technology. Accessed March 03, 2021.
http://hdl.handle.net/11012/54557.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Ryba, Jan. “Detekce zájmových bodů na CUDA: Interest-Point Detection on CUDA.” 2019. Web. 03 Mar 2021.
Vancouver:
Ryba J. Detekce zájmových bodů na CUDA: Interest-Point Detection on CUDA. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/11012/54557.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Ryba J. Detekce zájmových bodů na CUDA: Interest-Point Detection on CUDA. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/54557
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Texas A&M University
16.
Lively, Charles Wesley, III.
Performance analysis and modeling of GYRO.
Degree: MS, Computer Science, 2006, Texas A&M University
URL: http://hdl.handle.net/1969.1/4335
► Efficient execution of scientific applications requires an understanding of how system features impact the performance of the application. Performance models provide significant insight into the…
(more)
▼ Efficient execution of scientific applications requires an understanding of how system features
impact the performance of the application. Performance models provide significant insight into
the performance relationships between an application and the system used for execution. In
particular, models can be used to predict the relative performance of different systems used to
execute an application. Recently, a significant effort has been devoted to gaining a more detailed
understanding of the performance characteristics of a fusion reaction application, GYRO.
GYRO is a plasma-physics application used to gain a better understanding of the interaction of
ions and electrons in fusion reactions. In this thesis, we use the well-known Prophesy system to
analyze and model the performance of GYRO across various supercomputer platforms. Using
processor partitioning, we determine that utilizing the smallest number of processors per node is
the most effective processor configuration for executing the application. Further, we explore
trends in kernel coupling values across platforms to understand how kernels of GYRO interact.
In this work, experiments are conducted on the supercomputers Seaborg and Jacquard at
the DOE National Energy Research Scientific Computing Center and
the supercomputers DataStar P655 and P690 at the San Diego
Supercomputing
Center. Across all four platforms, our results show that utilizing one processor per node (ppn)
yields better performance than full or half ppn usage. Our experimental results also show that
using kernel coupling to model and predict the performance of GYRO is more accurate than
summation. On average, kernel coupling provides for prediction estimates that have less than a
7% error. The performance relationship between kernel coupling values and the sharing of
information throughout the GYRO application is explored by understanding the global
communication within the application and data locality.
Advisors/Committee Members: Taylor, Valerie E. (advisor), Butler-Purry, Karen L. (committee member), Kim, Eun J. (committee member).
Subjects/Keywords: performance; supercomputing; GYRO; kernel coupling; processor partitioning; performance prediction; MPI; modeling
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Manager
APA (6th Edition):
Lively, Charles Wesley, I. (2006). Performance analysis and modeling of GYRO. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/4335
Chicago Manual of Style (16th Edition):
Lively, Charles Wesley, III. “Performance analysis and modeling of GYRO.” 2006. Masters Thesis, Texas A&M University. Accessed March 03, 2021.
http://hdl.handle.net/1969.1/4335.
MLA Handbook (7th Edition):
Lively, Charles Wesley, III. “Performance analysis and modeling of GYRO.” 2006. Web. 03 Mar 2021.
Vancouver:
Lively, Charles Wesley I. Performance analysis and modeling of GYRO. [Internet] [Masters thesis]. Texas A&M University; 2006. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/1969.1/4335.
Council of Science Editors:
Lively, Charles Wesley I. Performance analysis and modeling of GYRO. [Masters Thesis]. Texas A&M University; 2006. Available from: http://hdl.handle.net/1969.1/4335
Addis Ababa University
17.
Naod, Duga.
Optimality Analysis and Middleware Design for Heterogeneous Cloud HPC in Mobile Devices
.
Degree: 2012, Addis Ababa University
URL: http://etd.aau.edu.et/dspace/handle/123456789/4680
► Mobile and embedded devices such as smartphones, wireless sensor nodes, and other ubiquitous consumer and industrial electronic systems play increasingly sig- nificant roles in our…
(more)
▼ Mobile and embedded devices such as smartphones, wireless sensor nodes, and
other ubiquitous consumer and industrial electronic systems play increasingly sig-
nificant roles in our lives. Those devices provision a range of functionalities despite
their limitations in terms of size, processing capacity and power constraints. The
advent of ubiquitous systems like those finds itself in par with another emerging
trend – cloud computing, wherein computational resources like storage, processing
hardware and software systems are provisioned to clients as services via the Inter-
net. Mobile cloud computing and the cloud in general could allow for yet more
use cases while saving the otherwise limited battery power and augmenting the
comparatively small computational workhorse available in mobile devices.
Such a scenario of cloud HPC in mobile devices needs supporting middleware for
transparent end-to-end (i.e. mobile-to/from-cloud) service oriented communica-
tion. In so doing the middleware abstracts and exposes heterogeneous cloud re-
sources like general-purpose CPUs; GPU and FPGA clusters; raw and relational
datastores; et cetera. In addition, such middleware should be able to provide run-
time support and brokerage mechanism for the mobile devices in order to consume
an abstract cloud HPC service.
In this thesis, a number of novel and existing techniques are explored towards
lightweight middleware architecture and an end-to-end mobile-cloud infrastruc-
ture is introduced. A case study is done with Android powered mobile devices, a
GPU-accelerated algorithm, a Wi-Fi network and said infrastructure towards an
experimental evaluation and model driven optimality analysis of the envisioned
system. Results showed that middleware-supported cloud HPC in mobile devices
is indeed promising and results in significant energy savings, faster response times
and paves way for more mobile computing use cases.
Advisors/Committee Members: Prof. Dr. Heiko Schr ̈der (advisor).
Subjects/Keywords: service-oriented architecture;
Android;
GPGPU;
parallel algorithms and programming;
middleware;
commodity supercomputing;
energy-response time optimality;
mobile cloud computing;
hetero- geneous HPC
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APA (6th Edition):
Naod, D. (2012). Optimality Analysis and Middleware Design for Heterogeneous Cloud HPC in Mobile Devices
. (Thesis). Addis Ababa University. Retrieved from http://etd.aau.edu.et/dspace/handle/123456789/4680
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Naod, Duga. “Optimality Analysis and Middleware Design for Heterogeneous Cloud HPC in Mobile Devices
.” 2012. Thesis, Addis Ababa University. Accessed March 03, 2021.
http://etd.aau.edu.et/dspace/handle/123456789/4680.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Naod, Duga. “Optimality Analysis and Middleware Design for Heterogeneous Cloud HPC in Mobile Devices
.” 2012. Web. 03 Mar 2021.
Vancouver:
Naod D. Optimality Analysis and Middleware Design for Heterogeneous Cloud HPC in Mobile Devices
. [Internet] [Thesis]. Addis Ababa University; 2012. [cited 2021 Mar 03].
Available from: http://etd.aau.edu.et/dspace/handle/123456789/4680.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Naod D. Optimality Analysis and Middleware Design for Heterogeneous Cloud HPC in Mobile Devices
. [Thesis]. Addis Ababa University; 2012. Available from: http://etd.aau.edu.et/dspace/handle/123456789/4680
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Brno University of Technology
18.
Hradecký, Michal.
Výstavba a programování clusteru o nízkém příkonu: Development and Programming of Low Power Cluster.
Degree: 2018, Brno University of Technology
URL: http://hdl.handle.net/11012/61949
► This thesis deals with the building and programming of a low power cluster composed of Hardkernel Odroid XU4 kits based on ARM Cortex A15 and…
(more)
▼ This thesis deals with the building and programming of a low power cluster composed of Hardkernel Odroid XU4 kits based on ARM Cortex A15 and Cortex A7 chips. The goal was to design a simple cluster composed of multiple kits and run a set of benchmarks to analyze performance and power consumption. The test set consisted of HPL and Stream benchmarks and various tests for the MPI interface. The overall performance of the cluster composed of four kits in HPL benchmark was measured 23~GFLOP/s in double-precision. During this test, the cluster showed power efficiency about 0.58~GFLOP/W. The work also describes the installation of PBS Torque scheduler and HPC software build and installation framework EasyBuild on 32-bit ARM platform. The comparison with Anselm supercomputer showed that Odroid cluster is as effiecient as large supercomputer but with slightly higher price.
Advisors/Committee Members: Jaroš, Jiří (advisor), Nikl, Vojtěch (referee).
Subjects/Keywords: Odroid XU4; cluster; ARM; Cortex A15; HPC; PBS; Torque; EasyBuild; superpočítač; Odroid XU4; cluster; ARM; Cortex A15; HPC; PBS; Torque; EasyBuild; supercomputing
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APA (6th Edition):
Hradecký, M. (2018). Výstavba a programování clusteru o nízkém příkonu: Development and Programming of Low Power Cluster. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/61949
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Hradecký, Michal. “Výstavba a programování clusteru o nízkém příkonu: Development and Programming of Low Power Cluster.” 2018. Thesis, Brno University of Technology. Accessed March 03, 2021.
http://hdl.handle.net/11012/61949.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Hradecký, Michal. “Výstavba a programování clusteru o nízkém příkonu: Development and Programming of Low Power Cluster.” 2018. Web. 03 Mar 2021.
Vancouver:
Hradecký M. Výstavba a programování clusteru o nízkém příkonu: Development and Programming of Low Power Cluster. [Internet] [Thesis]. Brno University of Technology; 2018. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/11012/61949.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Hradecký M. Výstavba a programování clusteru o nízkém příkonu: Development and Programming of Low Power Cluster. [Thesis]. Brno University of Technology; 2018. Available from: http://hdl.handle.net/11012/61949
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Tennessee – Knoxville
19.
Li, Zhou.
QUANTITATIVE CHARACTERIZATION OF PROTEINS AND POST-TRANSLATIONAL MODIFICATIONS IN COMPLEX PROTEOMES USING HIGH-RESOLUTION MASS SPECTROMETRY-BASED PROTEOMICS.
Degree: 2014, University of Tennessee – Knoxville
URL: https://trace.tennessee.edu/utk_graddiss/2896
► Mass spectrometry-based proteomics is focused on identifying the entire suite of proteins and their post-translational modifications (PTMs) in a cell, organism, or community. In particular,…
(more)
▼ Mass spectrometry-based proteomics is focused on identifying the entire suite of proteins and their post-translational modifications (PTMs) in a cell, organism, or community. In particular, quantitative proteomics measures abundance changes of thousands of proteins among multiple samples and provides network-level insight into how biological systems respond to environmental perturbations. Various quantitative proteomics methods have been developed, including label-free, metabolic labeling, and isobaric chemical labeling. This dissertation starts with systematic comparison of these three methods, and shows that isobaric chemical labeling provides accurate, precise, and reproducible quantification for thousands of proteins. Based on these results, we applied this approach to characterizing the proteome of Arabidopsis seedlings treated with Strigolactones (SLs), a new class of plant hormones that modulate various developmental processes. Our study reveals that SLs regulate the expression of a range of proteins that have not been assigned to SL pathways, which provides novel targets for follow-up genetic and biochemical characterization of SL signaling. The same approach was also used to measure how elevated temperature impacts the physiology of individual microbial groups in an acid mine drainage (AMD) microbial community, and shows that related organisms differed in their abundance and functional responses to temperature. Elevated temperature repressed carbon fixation by two Leptospirillum genotypes, whereas carbon fixation was significantly up-regulated at higher temperature by a third member of this genus. Further, we developed a new proteomic approach that harnessed high-resolution mass spectrometry and supercomputing for direct identification and quantification of a broad range of PTMs from an AMD microbial community. We find that PTMs are extraordinarily diverse between different growth stages and highly divergent between closely related bacteria. The findings of this study motivate further investigation of the role of PTMs in the ecology and evolution of microbial communities. Finally, a computational approach has been developed to improve the sensitivity of phosphopeptide identification. Overall, the research presented in the dissertation not only reveals biological insights with existing quantitative proteomics methods, but also develops novel methodologies that open up new avenues in studying PTMs of proteins (e.g. PTM cross-talk).
Subjects/Keywords: Mass Spectrometry; Quantitative Proteomics; Post-translational Modification; Microbial Ecology and Evolution; Systems Biology; Supercomputing; Bioinformatics; Environmental Microbiology and Microbial Ecology; Evolution; Systems Biology
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APA ·
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to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Li, Z. (2014). QUANTITATIVE CHARACTERIZATION OF PROTEINS AND POST-TRANSLATIONAL MODIFICATIONS IN COMPLEX PROTEOMES USING HIGH-RESOLUTION MASS SPECTROMETRY-BASED PROTEOMICS. (Doctoral Dissertation). University of Tennessee – Knoxville. Retrieved from https://trace.tennessee.edu/utk_graddiss/2896
Chicago Manual of Style (16th Edition):
Li, Zhou. “QUANTITATIVE CHARACTERIZATION OF PROTEINS AND POST-TRANSLATIONAL MODIFICATIONS IN COMPLEX PROTEOMES USING HIGH-RESOLUTION MASS SPECTROMETRY-BASED PROTEOMICS.” 2014. Doctoral Dissertation, University of Tennessee – Knoxville. Accessed March 03, 2021.
https://trace.tennessee.edu/utk_graddiss/2896.
MLA Handbook (7th Edition):
Li, Zhou. “QUANTITATIVE CHARACTERIZATION OF PROTEINS AND POST-TRANSLATIONAL MODIFICATIONS IN COMPLEX PROTEOMES USING HIGH-RESOLUTION MASS SPECTROMETRY-BASED PROTEOMICS.” 2014. Web. 03 Mar 2021.
Vancouver:
Li Z. QUANTITATIVE CHARACTERIZATION OF PROTEINS AND POST-TRANSLATIONAL MODIFICATIONS IN COMPLEX PROTEOMES USING HIGH-RESOLUTION MASS SPECTROMETRY-BASED PROTEOMICS. [Internet] [Doctoral dissertation]. University of Tennessee – Knoxville; 2014. [cited 2021 Mar 03].
Available from: https://trace.tennessee.edu/utk_graddiss/2896.
Council of Science Editors:
Li Z. QUANTITATIVE CHARACTERIZATION OF PROTEINS AND POST-TRANSLATIONAL MODIFICATIONS IN COMPLEX PROTEOMES USING HIGH-RESOLUTION MASS SPECTROMETRY-BASED PROTEOMICS. [Doctoral Dissertation]. University of Tennessee – Knoxville; 2014. Available from: https://trace.tennessee.edu/utk_graddiss/2896
Virginia Tech
20.
Srivastava, Anurag.
Stabilized Explicit Time Integration for Parallel Air Quality Models.
Degree: MS, Computer Science, 2006, Virginia Tech
URL: http://hdl.handle.net/10919/34736
► Air Quality Models are defined for prediction and simulation of air pollutant concentrations over a certain period of time. The predictions can be used in…
(more)
▼ Air Quality Models are defined for prediction and simulation of air pollutant concentrations over a certain period of time. The predictions can be used in setting limits for the emission levels of industrial facilities. The input data for the air quality models are very large and encompass various environmental conditions like wind speed, turbulence, temperature and cloud density.
Most air quality models are based on advection-diffusion equations. These differential equations are moderately stiff and require appropriate techniques for fast integration over large intervals of time. Implicit time stepping techniques for solving differential equations being unconditionally stable are considered suitable for the solution. However, implicit time stepping techniques impose certain data dependencies that can cause the parallelization of air quality models to be inefficient.
The current approach uses Runge Kutta Chebyshev explicit method for solution of advection diffusion equations. It is found that even if the explicit method used is computationally more expensive in the serial execution, it takes lesser execution time when parallelized because of less complicated data dependencies presented by the explicit time-stepping. The implicit time-stepping on the other hand cannot be parallelized efficiently because of the inherent complicated data dependencies.
Advisors/Committee Members: Sandu, Adrian (committeechair), Ribbens, Calvin J. (committee member), Tafti, Danesh K. (committee member).
Subjects/Keywords: Explcit time-stepping; Runge Kutta Chebyshev; STEM; Air Quality Models; Supercomputing; Parallel Computing
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APA (6th Edition):
Srivastava, A. (2006). Stabilized Explicit Time Integration for Parallel Air Quality Models. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/34736
Chicago Manual of Style (16th Edition):
Srivastava, Anurag. “Stabilized Explicit Time Integration for Parallel Air Quality Models.” 2006. Masters Thesis, Virginia Tech. Accessed March 03, 2021.
http://hdl.handle.net/10919/34736.
MLA Handbook (7th Edition):
Srivastava, Anurag. “Stabilized Explicit Time Integration for Parallel Air Quality Models.” 2006. Web. 03 Mar 2021.
Vancouver:
Srivastava A. Stabilized Explicit Time Integration for Parallel Air Quality Models. [Internet] [Masters thesis]. Virginia Tech; 2006. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/10919/34736.
Council of Science Editors:
Srivastava A. Stabilized Explicit Time Integration for Parallel Air Quality Models. [Masters Thesis]. Virginia Tech; 2006. Available from: http://hdl.handle.net/10919/34736
Oklahoma State University
21.
Son, Hee Jin.
Parmi: a Publish/Subscribe Based Asynchronous Rmi Framework.
Degree: Computer Science Department, 2007, Oklahoma State University
URL: http://hdl.handle.net/11244/8249
► This thesis aims to design a publish/subscribe-based asynchronous RMI (Remote Method Invocation) Framework (PARMI) residing on different machines over a network. The objectives of this…
(more)
▼ This thesis aims to design a publish/subscribe-based asynchronous RMI (Remote Method Invocation) Framework (PARMI) residing on different machines over a network. The objectives of this thesis are: (1) explore the existing RMI model and analyze the performance of an existing RMI implementation; (2) study the related programming models for designing asynchronous RMI structure; (3) design a new PARMI framework based on publish/subscribe paradigm, realizing asynchronous communication and computation and decoupling objects in space and time; (4) evaluate the performance of the PARMI framework on the local/remote and homogeneous/heterogeneous environments. An example scientific application based on the Jacobi iteration numerical method is developed. Extensive experimental evaluation on up to 64 processors demonstrates the performance improvement using the PARMI framework.
Subjects/Keywords: grid computing; parallel and distributed computing; asynchronous communication; supercomputing; cluster computing
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Manager
APA (6th Edition):
Son, H. J. (2007). Parmi: a Publish/Subscribe Based Asynchronous Rmi Framework. (Thesis). Oklahoma State University. Retrieved from http://hdl.handle.net/11244/8249
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Son, Hee Jin. “Parmi: a Publish/Subscribe Based Asynchronous Rmi Framework.” 2007. Thesis, Oklahoma State University. Accessed March 03, 2021.
http://hdl.handle.net/11244/8249.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Son, Hee Jin. “Parmi: a Publish/Subscribe Based Asynchronous Rmi Framework.” 2007. Web. 03 Mar 2021.
Vancouver:
Son HJ. Parmi: a Publish/Subscribe Based Asynchronous Rmi Framework. [Internet] [Thesis]. Oklahoma State University; 2007. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/11244/8249.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Son HJ. Parmi: a Publish/Subscribe Based Asynchronous Rmi Framework. [Thesis]. Oklahoma State University; 2007. Available from: http://hdl.handle.net/11244/8249
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
22.
Satchwell, Steven Tanner.
Isolation of Temporary Storage in High Performance Computing via Linux Namespacing.
Degree: MS, 2018, Brigham Young University
URL: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=7873&context=etd
► Per job isolation of temporary file storage in High Performance Computing (HPC) environments provide benefits in security, efficiency, and administration. HPC system administrators can use…
(more)
▼ Per job isolation of temporary file storage in High Performance Computing (HPC) environments provide benefits in security, efficiency, and administration. HPC system administrators can use the mount_isolation Slurm task plugin to improve security by isolating temporary files where no isolation previously existed. The mount_isolation plugin also increases efficiency by removing obsolete temporary files immediately after each job terminates. This frees valuable disk space in the HPC environment to be used by other jobs. These two improvements reduce the amount of work system administrators must expend to ensure temporary files are removed in a timely manner.Previous temporary file removal solutions were removal on reboot, manual removal, or removal through a Slurm epilog script. The epilog script was the most effective of these, allowing files to be removed in a timely manner. However, HPC users can have multiple supercomputing jobs running concurrently. Temporary files generated by these concurrent or overlapping jobs are only deleted by the epilog script when all jobs run by that user on the compute node have completed. Even though the user may have only one running job, the temporary directory may still contain temporary files from many previously executed jobs, taking up valuable temporary storage on the compute node. The mount_isolation plugin isolates these temporary files on a per job basis allowing prompt removal of obsolete files regardless of job overlap.
Subjects/Keywords: bind mounts; mount namespaces; Slurm; supercomputing; HPC; temporary storage; Science and Technology Studies
…until the supercomputing node upon
which the files reside is rebooted. Alternatively, system… …Supercomputing Center over a period of 1 month. Results may vary depending on when data is
gathered… …only when all the user jobs on a compute node had
terminated. Each user’s supercomputing job… …Fulton Supercomputing Center, one of our partners on the project, suggested using a
task plugin… …isolation of these files accounts for different users taking advantage of
supercomputing…
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APA (6th Edition):
Satchwell, S. T. (2018). Isolation of Temporary Storage in High Performance Computing via Linux Namespacing. (Masters Thesis). Brigham Young University. Retrieved from https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=7873&context=etd
Chicago Manual of Style (16th Edition):
Satchwell, Steven Tanner. “Isolation of Temporary Storage in High Performance Computing via Linux Namespacing.” 2018. Masters Thesis, Brigham Young University. Accessed March 03, 2021.
https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=7873&context=etd.
MLA Handbook (7th Edition):
Satchwell, Steven Tanner. “Isolation of Temporary Storage in High Performance Computing via Linux Namespacing.” 2018. Web. 03 Mar 2021.
Vancouver:
Satchwell ST. Isolation of Temporary Storage in High Performance Computing via Linux Namespacing. [Internet] [Masters thesis]. Brigham Young University; 2018. [cited 2021 Mar 03].
Available from: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=7873&context=etd.
Council of Science Editors:
Satchwell ST. Isolation of Temporary Storage in High Performance Computing via Linux Namespacing. [Masters Thesis]. Brigham Young University; 2018. Available from: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=7873&context=etd
23.
Arya, Anshu.
Optimization of FFT communication on 3-D torus and mesh supercomputer networks.
Degree: MS, 0112, 2013, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/45288
► The fast Fourier transform (FFT) is of intense interest to the scientific community. Its utility in a vast range of parallel scientific simulations warrants investigating…
(more)
▼ The fast Fourier transform (FFT) is of intense interest to the scientific community. Its utility in a vast range of parallel scientific simulations warrants investigating its efficiency on a leading class of supercomputers that employ 3-D torus and mesh networks. Given the divide-and-conquer approach of the popular Cooley-Tukey approach, a parallel FFT can use a highly optimized serial algorithm for intra-node calculations, but the communication patterns between nodes reveal a potential for improvement.
In this work, the scalability and communication patterns of global 1-D and 3-D parallel FFTs and how they map to 3-D torus and mesh networks are investigated. As a starting point, a naive implementation of a 1-D FFT is modified and scaled to 65,536 cores of a BlueGene/P machine. Insights into the machine architecture and network limits gained from the 1-D FFT are then applied to improve the performance of a 3-D FFT. Default mappings of a 3-D FFT onto a torus result in low network utilization and sub-optimal communication costs. The communication graph of a 3-D FFT is formulated and graph partitioning techniques are used to find a new mapping that greatly improves performance. Data migration techniques are then used to alleviate possible link contention associated with the new mappings. Migration techniques are discussed and modeled. It is discovered that specific migration patterns are able to reduce link contention without increasing the overall data movement (hop-bytes). With both mapping and migration techniques combined, a decrease of nearly 20% in the running time compared to the default 3-D FFT mapping is observed on 512 nodes, 2048 cores of a BlueGene/P machine.
Advisors/Committee Members: Kale, Laxmikant V. (advisor).
Subjects/Keywords: supercomputing; Fast Fourier Transform (FFT); parallel; topology; networks; communication; torus; mesh
…Supercomputing, (Salt Lake City,
Utah), November 2012.
[9] E. Solomonik, A. Bhatele…
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APA (6th Edition):
Arya, A. (2013). Optimization of FFT communication on 3-D torus and mesh supercomputer networks. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/45288
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Arya, Anshu. “Optimization of FFT communication on 3-D torus and mesh supercomputer networks.” 2013. Thesis, University of Illinois – Urbana-Champaign. Accessed March 03, 2021.
http://hdl.handle.net/2142/45288.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Arya, Anshu. “Optimization of FFT communication on 3-D torus and mesh supercomputer networks.” 2013. Web. 03 Mar 2021.
Vancouver:
Arya A. Optimization of FFT communication on 3-D torus and mesh supercomputer networks. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2013. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/2142/45288.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Arya A. Optimization of FFT communication on 3-D torus and mesh supercomputer networks. [Thesis]. University of Illinois – Urbana-Champaign; 2013. Available from: http://hdl.handle.net/2142/45288
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
24.
Ellingson, Sally Rose.
Acceleration and Verification of Virtual High-throughput Multiconformer Docking.
Degree: 2014, University of Tennessee – Knoxville
URL: https://trace.tennessee.edu/utk_graddiss/2688
► The work in this dissertation explores the use of massive computational power available through modern supercomputers as a virtual laboratory to aid drug discovery. As…
(more)
▼ The work in this dissertation explores the use of massive computational power available through modern supercomputers as a virtual laboratory to aid drug discovery. As of November 2013, Tianhe-2, the fastest supercomputer in the world, has a theoretical performance peak of 54,902 TFlop/s or nearly 55 thousand trillion calculations per second. The Titan supercomputer located at Oak Ridge National Laboratory has 560,640 computing cores that can work in parallel to solve scientific problems. In order to harness this computational power to assist in drug discovery, tools are developed to aid in the preparation and analysis of high-throughput virtual docking screens, a tool to predict how and how well small molecules bind to disease associated proteins and potentially serve as a novel drug candidate. Methods and software for performing large screens are developed that run on high-performance computer systems. The future potential and benefits of using these tools to study polypharmacology and revolutionizing the pharmaceutical industry are also discussed.
Subjects/Keywords: supercomputing; drug-discovery; ensemble docking; Other Biochemistry, Biophysics, and Structural Biology
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APA (6th Edition):
Ellingson, S. R. (2014). Acceleration and Verification of Virtual High-throughput Multiconformer Docking. (Doctoral Dissertation). University of Tennessee – Knoxville. Retrieved from https://trace.tennessee.edu/utk_graddiss/2688
Chicago Manual of Style (16th Edition):
Ellingson, Sally Rose. “Acceleration and Verification of Virtual High-throughput Multiconformer Docking.” 2014. Doctoral Dissertation, University of Tennessee – Knoxville. Accessed March 03, 2021.
https://trace.tennessee.edu/utk_graddiss/2688.
MLA Handbook (7th Edition):
Ellingson, Sally Rose. “Acceleration and Verification of Virtual High-throughput Multiconformer Docking.” 2014. Web. 03 Mar 2021.
Vancouver:
Ellingson SR. Acceleration and Verification of Virtual High-throughput Multiconformer Docking. [Internet] [Doctoral dissertation]. University of Tennessee – Knoxville; 2014. [cited 2021 Mar 03].
Available from: https://trace.tennessee.edu/utk_graddiss/2688.
Council of Science Editors:
Ellingson SR. Acceleration and Verification of Virtual High-throughput Multiconformer Docking. [Doctoral Dissertation]. University of Tennessee – Knoxville; 2014. Available from: https://trace.tennessee.edu/utk_graddiss/2688
25.
Lee, Myoungkyu.
Direct numerical simulation (DNS) for incompressible turbulent channel flow at Reτ = 5200.
Degree: PhD, Mechanical engineering, 2015, University of Texas – Austin
URL: http://hdl.handle.net/2152/33514
► Nearly all moving objects on Earth pass through fluids and many of them move at high speed. This makes high Re wall-bounded turbulent flows of…
(more)
▼ Nearly all moving objects on Earth pass through fluids and many of them move at high speed. This makes high Re wall-bounded turbulent flows of great technological impor- tance. To study high Re wall-bounded turbulence, high spatial and temporal resolution is required due to the multi-scale nature of turbulence. Direct numerical simulation (DNS) is a technique for the study of turbulence in which the Navier-Stoke equations, the governing equations of fluid flow, are solved with sufficient resolution to represent all the scales of tur- bulence. Hence, DNS is very expensive and always limited by computational capability. To perform DNS on the most advanced high performance computing systems, extensive code optimization is required. A new turbulence DNS code, PoongBack, was developed for the studies reported here. It shows excellent performance and scalability (∼97%) on upto 786k cores on Mira at Argonne Leadership Computing Facility.
We have performed DNS of turbulent channel flow using a Fourier-Galerkin method in the streamwise(x) and spanwise (z) directions and a B-Splines collocation method in the wall-normal (y) direction. The highest Reynolds number based on shear velocity (uτ = √(τw/ρ)), Reτ is approximately 5200. The simulation results exhibit a number of the char- acteristics of high Re wall-bounded turbulent flows. For example, a region where the mean velocity has a logarithmic variation is observed, with von Kármán constant κ = 0.384±0.004. There is also a logarithmic dependence of the variance of the spanwise velocity component, though not the streamwise component. A distinct separation of scales exists between the large outer-layer structures and small inner-layer structures. At intermediate distances from the wall, the one-dimensional spectrum of the streamwise velocity fluctuation in both the streamwise and spanwise directions exhibits 1/k dependence over a short range in wavenum- ber (k). Further, consistent with previous experimental observations, when these spectra are multiplied by k (premultiplied spectra), they have a bimodal structure with local peaks located at wavenumbers on either side of the 1/k range.
To study the scale dependence of the dynamics of the Reynolds stress components, we applied a spectral analysis to the terms in the Reynolds stress transport equation (RSTE). It is shown that only the turbulent transport terms show significant Re dependencies. Further- more, the turbulent transport terms can be decomposed into two parts, one that contributes to transport in the wall-normal direction and one that is responsible for transfer between length scales. The results show that the large scale motion in the outer region has direct effects on the flow in the near-wall region through transport of turbulent kinetic energy. Also, a reverse energy cascade from intermediate scales to large scales is observed in the spanwise velocity fluctuations.
Advisors/Committee Members: Moser, Robert deLancey (advisor), Biros, George (committee member), Bogard, David G. (committee member), Murthy, Jayathi (committee member), Oliver, Todd A. (committee member).
Subjects/Keywords: Turbulence; Wall-bounded turbulent flow; Direct numerical simulation; 3D-FFT; Supercomputing; Computational fluid dynamics
…Supercomputing Applications, Cray XE6, AMD
6276 “Interlagos” 2.3Ghz, Cray Gemini 3D torus interconnect…
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APA (6th Edition):
Lee, M. (2015). Direct numerical simulation (DNS) for incompressible turbulent channel flow at Reτ = 5200. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/33514
Chicago Manual of Style (16th Edition):
Lee, Myoungkyu. “Direct numerical simulation (DNS) for incompressible turbulent channel flow at Reτ = 5200.” 2015. Doctoral Dissertation, University of Texas – Austin. Accessed March 03, 2021.
http://hdl.handle.net/2152/33514.
MLA Handbook (7th Edition):
Lee, Myoungkyu. “Direct numerical simulation (DNS) for incompressible turbulent channel flow at Reτ = 5200.” 2015. Web. 03 Mar 2021.
Vancouver:
Lee M. Direct numerical simulation (DNS) for incompressible turbulent channel flow at Reτ = 5200. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2015. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/2152/33514.
Council of Science Editors:
Lee M. Direct numerical simulation (DNS) for incompressible turbulent channel flow at Reτ = 5200. [Doctoral Dissertation]. University of Texas – Austin; 2015. Available from: http://hdl.handle.net/2152/33514
Brno University of Technology
26.
Herec, Jan.
Principy a aplikace neuroevoluce: Neuroevolution Principles and Applications.
Degree: 2019, Brno University of Technology
URL: http://hdl.handle.net/11012/84862
► The theoretical part of this work deals with evolutionary algorithms (EA), neural networks (NN) and their synthesis in the form of neuroevolution. From a practical…
(more)
▼ The theoretical part of this work deals with evolutionary algorithms (EA), neural networks (NN) and their synthesis in the form of neuroevolution. From a practical point of view, the aim of the work is to show the application of neuroevolution on two different tasks. The first task is the evolutionary design of the convolutional neural network (CNN) architecture that would be able to classify handwritten digits (from the MNIST dataset) with a high accurancy. The second task is the evolutionary optimization of neurocontroller for a simulated Falcon 9 rocket landing. Both tasks are computationally demanding and therefore have been solved on a supercomputer. As a part of the first task, it was possible to design such architectures which, when properly trained, achieve an accuracy of 99.49%. It turned out that it is possible to automate the design of high-quality architectures with the use of neuroevolution. Within the second task, the neuro-controller weights have been optimized so that, for defined initial conditions, the model of the Falcon booster can successfully land. Neuroevolution succeeded in both tasks.
Advisors/Committee Members: Bidlo, Michal (advisor), Strnadel, Josef (referee).
Subjects/Keywords: Umělá inteligence; Biocomputing; Neuronová sít; Konvoluční neuronová síť; Evoluční algoritmus; Genetický algoritmus; Evoluční strategie; Diferenciální evoluce; Neuroevoluce; Neurokontrolér; Řídicí systém; Falcon 9; Superpočítání; MNIST; Klasifikace; Artificial intelligence; Biocomputing; Neural network; Convolution neural network; Evolution algorithm; Genetic algorithm; Evolution Strategy; Differential Evolution; Neuroevolution; Neurocontroller; Control system; Falcon 9; Supercomputing; MNIST; Classification
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APA (6th Edition):
Herec, J. (2019). Principy a aplikace neuroevoluce: Neuroevolution Principles and Applications. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/84862
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Herec, Jan. “Principy a aplikace neuroevoluce: Neuroevolution Principles and Applications.” 2019. Thesis, Brno University of Technology. Accessed March 03, 2021.
http://hdl.handle.net/11012/84862.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Herec, Jan. “Principy a aplikace neuroevoluce: Neuroevolution Principles and Applications.” 2019. Web. 03 Mar 2021.
Vancouver:
Herec J. Principy a aplikace neuroevoluce: Neuroevolution Principles and Applications. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/11012/84862.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Herec J. Principy a aplikace neuroevoluce: Neuroevolution Principles and Applications. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/84862
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Halmstad University
27.
Cheema, Fahad Islam.
High-Level Parallel Programming of Computation-Intensive Algorithms on Fine-Grained Architecture.
Degree: Computer and Electrical Engineering (IDE), 2009, Halmstad University
URL: http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-2620
► Computation-intensive algorithms require a high level of parallelism and programmability, which make them good candidate for hardware acceleration using fine-grained processor arrays. Using Hardware…
(more)
▼ Computation-intensive algorithms require a high level of parallelism and programmability, which make them good candidate for hardware acceleration using fine-grained processor arrays. Using Hardware Description Language (HDL), it is very difficult to design and manage fine-grained processing units and therefore High-Level Language (HLL) is a preferred alternative. This thesis analyzes HLL programming of fine-grained architecture in terms of achieved performance and resource consumption. In a case study, highly computation-intensive algorithms (interpolation kernels) are implemented on fine-grained architecture (FPGA) using a high-level language (Mitrion-C). Mitrion Virtual Processor (MVP) is extracted as an application-specific fine-grain processor array, and the Mitrion development environment translates high-level design to hardware description (HDL). Performance requirements, parallelism possibilities/limitations and resource requirement for parallelism vary from algorithm to algorithm as well as by hardware platform. By considering parallelism at different levels, we can adjust the parallelism according to available hardware resources and can achieve better adjustment of different tradeoffs like gates-performance and memory-performance tradeoffs. This thesis proposes different design approaches to adjust parallelism at different design levels. For interpolation kernels, different parallelism levels and design variants are proposed, which can be mixed to get a well-tuned application and resource specific design.
Subjects/Keywords: Parallel computing; FPGA; Mitrion; Computation-intensive; HDL; Mitrionics; Mitrion C; Fine grained; Interpolation Kernels; High level programming; Embedded Systems; Accelerator; HPC; Supercomputing; Cray; XD1
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APA (6th Edition):
Cheema, F. I. (2009). High-Level Parallel Programming of Computation-Intensive Algorithms on Fine-Grained Architecture. (Thesis). Halmstad University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-2620
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Cheema, Fahad Islam. “High-Level Parallel Programming of Computation-Intensive Algorithms on Fine-Grained Architecture.” 2009. Thesis, Halmstad University. Accessed March 03, 2021.
http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-2620.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Cheema, Fahad Islam. “High-Level Parallel Programming of Computation-Intensive Algorithms on Fine-Grained Architecture.” 2009. Web. 03 Mar 2021.
Vancouver:
Cheema FI. High-Level Parallel Programming of Computation-Intensive Algorithms on Fine-Grained Architecture. [Internet] [Thesis]. Halmstad University; 2009. [cited 2021 Mar 03].
Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-2620.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Cheema FI. High-Level Parallel Programming of Computation-Intensive Algorithms on Fine-Grained Architecture. [Thesis]. Halmstad University; 2009. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-2620
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Delft University of Technology
28.
Iosup, A.
A framework for the study of grid inter-operation mechanisms.
Degree: 2009, Delft University of Technology
URL: http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6
;
urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6
;
urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6
;
http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6
► The study of the history of computing infrastructures reveals an integration trend. For example, the explosive growth of the Internet in the 1990s was the…
(more)
▼ The study of the history of computing infrastructures reveals an integration trend. For example, the explosive growth of the Internet in the 1990s was the result of an integration process started in the 1960s with the emerging networks of computers. By using the Internet, millions of users were capable of accessing information anytime and anywhere, much like other daily utilities such as water, electricity, and telephone. However, an important category of users remained under-served: the users with large computational and storage requirements, e.g., the scientists, the companies that focus on data analysis, and the governmental departments that manage the interaction between the state and the population (such as census, tax, and public health). Thus, in the mid-1990s, the vision of the (Computing) Grid as a universal computing utility was formulated. The main benefits promised by the Grid are similar to those of other integration efforts: extended and optimized service of the integrated network, and significant reductions of maintenance and operation costs through sharing and better scheduling. While the universal Grid has yet to be developed, large-scale distributed computing infrastructures that provide their users with seamless and secure access to computing resources, individually called Grid parts or simply grids, have been built throughout the world – in different countries, for different sciences, and both for production work and for computer-science research. At the same time, the main technological alternatives to grids, that is, supercomputers and large clusters, have evolved into much larger, scalable, and reliable systems. Thus, the integration of existing grids into larger infrastructures and finally into The Grid is key in keeping the grid vision attractive for its potential users. The integration of grids raises a double challenge, one related with the efficient scaling of a distributed computing system, the second associated with the operation of a system across different ownership and administrative domains. Thus, many of the traditional approaches for inter-operating computer systems, such as those based on completely centralized or purely decentralized system architectures, are eliminated from the start. To mark the distinction between the typical problem of integrating smaller components into a larger system and the double challenge of grid integration, we call the latter the problem of grid inter-operation. In this thesis we approach the problem of grid inter-operation with two main objectives: to design a comprehensive framework for the study of grid inter-operation mechanisms, and to provide an initial but good solution for this problem. We design a framework for the study of grid inter-operation that includes a toolbox for grid inter-operation research and a method for the study of grid inter-operation mechanisms. In the research toolbox we include the Grid Workloads Archive (GWA), a comprehensive model for grid resources and workloads, the GrenchMark performance evaluation framework, and the…
Advisors/Committee Members: Sips, H.J., Epema, D.H.J..
Subjects/Keywords: grid inter-operation; grid computing; distributed systems; trace-based simulation; research toolbox; mechanism design; performance evaluation; performance analysis; supercomputing; cloud computing; grid workloads archive; dgsim; grenchmark
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APA (6th Edition):
Iosup, A. (2009). A framework for the study of grid inter-operation mechanisms. (Doctoral Dissertation). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6
Chicago Manual of Style (16th Edition):
Iosup, A. “A framework for the study of grid inter-operation mechanisms.” 2009. Doctoral Dissertation, Delft University of Technology. Accessed March 03, 2021.
http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6.
MLA Handbook (7th Edition):
Iosup, A. “A framework for the study of grid inter-operation mechanisms.” 2009. Web. 03 Mar 2021.
Vancouver:
Iosup A. A framework for the study of grid inter-operation mechanisms. [Internet] [Doctoral dissertation]. Delft University of Technology; 2009. [cited 2021 Mar 03].
Available from: http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6.
Council of Science Editors:
Iosup A. A framework for the study of grid inter-operation mechanisms. [Doctoral Dissertation]. Delft University of Technology; 2009. Available from: http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; urn:NBN:nl:ui:24-uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6 ; http://resolver.tudelft.nl/uuid:6741902f-fc75-4bc2-91d5-5d204218c6d6
29.
Raja Chandrasekar, Raghunath.
Designing Scalable and Efficient I/O Middleware for
Fault-Resilient High-Performance Computing Clusters.
Degree: PhD, Computer Science and Engineering, 2014, The Ohio State University
URL: http://rave.ohiolink.edu/etdc/view?acc_num=osu1417733721
► In high-performance computing (HPC), tightly-coupled, parallel applications run in lock-step over thousands to millions of processor cores. These applications simulate a wide-range of scientific phenomena,…
(more)
▼ In high-performance computing (HPC), tightly-coupled,
parallel applications run in lock-step over thousands to millions
of processor cores. These applications simulate a wide-range of
scientific phenomena, such as hurricanes and earthquakes, or the
functioning of a human heart. The results of these simulations are
important and time-critical, e.g., we want to know the path of the
hurricane before it makes landfall. Thus, these applications are
run on the fastest supercomputers in the world at the largest
scales possible. However, due to the increased component count,
large-scale executions are more prone to experience faults, with
Mean Times Between Failures (MTBF) on the order of hours or days
due to hardware breakdowns and soft errors.A vast majority of
current-generation HPC systems and application codes work around
system failures using rollback-recovery schemes, also known as
Checkpoint-Restart (CR), wherein the parallel processes of an
application frequently save a mutually agreed-upon state of their
execution as checkpoints in a globally-shared storage medium. In
the face of failures, applications rollback their execution to a
fault-free state using these snapshots that were saved
periodically. Over the years, checkpointing mechanisms have gained
notoriety for their colossal I/O demands. While state-of-art
parallel file systems are optimized for concurrent accesses from
millions of processes, checkpointing overheads continue to dominate
application run times, with the time taken to write a single
checkpoint taking on the order of tens of minutes to hours. On
future systems, checkpointing activities are predicted to dominate
compute time and overwhelm file system resources.On
supercomputing
systems geared for Exascale, parallel applications will have a
wider range of storage media to choose from - on-chip/off-chip
caches, node-level RAM, Non-Volatile Memory (NVM), distributed-RAM,
flash-storage (SSDs), HDDs, parallel file systems, and archival
storage. Current-generation checkpointing middleware and frameworks
are oblivious to this hierarchy in storage where each medium has
unique performance and data-persistence characteristics.This thesis
proposes a cross-layer framework that leverages this hierarchy in
storage media, to design scalable and low-overhead fault-tolerance
mechanisms that are inherently I/O bound. The key components of the
framework include - it{CRUISE}, a highly-scalable in-memory
checkpointing system that leverages both volatile and Non-Volatile
Memory technologies; it{Stage-FS}, a light-weight data-staging
system that leverages burst-buffers and SSDs to asynchronously move
application snapshots to a remote file system; Stage-QoS, a file
system agnostic Quality-of-Service mechanism for data-staging
systems that minimizes network contention; it{MIC-Check}, a
distributed checkpoint-restart system for coprocessor-based
supercomputing systems; it{Power-Check}, an energy-efficient
checkpointing framework for transparent and application-aware HPC
checkpointing systems; and…
Advisors/Committee Members: Panda, Dhabaleswar (Advisor).
Subjects/Keywords: Computer Engineering; Computer Science; fault-tolerance; resilience; checkpointing; process-migration; Input-Output; HPC; supercomputing; MPI; MVAPICH; accelerators; energy-efficiency
…Supercomputing (SC ’12), Nov. 2012
Fields of Study
Major Field: Computer Science and… …proportions. These supercomputing systems allow scientists and engineers to tackle
grand challenge… …Mechanisms in HPC
The primary use of Checkpoint-Restart techniques in supercomputing systems has…
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APA ·
Chicago ·
MLA ·
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CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Raja Chandrasekar, R. (2014). Designing Scalable and Efficient I/O Middleware for
Fault-Resilient High-Performance Computing Clusters. (Doctoral Dissertation). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1417733721
Chicago Manual of Style (16th Edition):
Raja Chandrasekar, Raghunath. “Designing Scalable and Efficient I/O Middleware for
Fault-Resilient High-Performance Computing Clusters.” 2014. Doctoral Dissertation, The Ohio State University. Accessed March 03, 2021.
http://rave.ohiolink.edu/etdc/view?acc_num=osu1417733721.
MLA Handbook (7th Edition):
Raja Chandrasekar, Raghunath. “Designing Scalable and Efficient I/O Middleware for
Fault-Resilient High-Performance Computing Clusters.” 2014. Web. 03 Mar 2021.
Vancouver:
Raja Chandrasekar R. Designing Scalable and Efficient I/O Middleware for
Fault-Resilient High-Performance Computing Clusters. [Internet] [Doctoral dissertation]. The Ohio State University; 2014. [cited 2021 Mar 03].
Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1417733721.
Council of Science Editors:
Raja Chandrasekar R. Designing Scalable and Efficient I/O Middleware for
Fault-Resilient High-Performance Computing Clusters. [Doctoral Dissertation]. The Ohio State University; 2014. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1417733721
30.
Abbasi, Mohammad Hasan.
Data services: bringing I/O processing to petascale.
Degree: PhD, Computing, 2011, Georgia Tech
URL: http://hdl.handle.net/1853/42694
► The increasing size of high performance computing systems and the associated increase in the volume of generated data, has resulted in an I/O bottleneck for…
(more)
▼ The increasing size of high performance computing systems and the associated
increase in the volume of generated data, has resulted in an I/O bottleneck for these applications.
This bottleneck is further exacerbated by the imbalance in the growth of processing
capability compared to storage capability, due mainly to the power and cost requirements
of scaling the storage. This thesis introduces data services, a new abstraction which provides
significant benefits for data intensive applications. Data services combine low overhead
data movement with flexible placement of data manipulation operations, to address
the I/O challenges of leadership class scientific applications. The impact of asynchronous
data movement on application runtime is minimized by utilizing novel server side data
movement schedulers to avoid contention related jitter in application communication. Additionally,
the JITStager component is presented. Utilizing dynamic code generation and
flexible code placement, the JITStager allows data services to be executed as a pipeline
extending from the application to storage. It is shown in this thesis that data services can
add new functionality to the application without having an significant negative impact on
performance.
Advisors/Committee Members: Karsten Schwan (Committee Chair), Matthew Wolf (Committee Member), Rich Vuduc (Committee Member), Ron Oldfield (Committee Member), Scott Klasky (Committee Member).
Subjects/Keywords: I/O; Scientific computing; Data services; I/O frameworks; Infiniband; Cray; Supercomputing; Data; HPC; Petaflops computers; High performance computing; Electronic data processing; Computer science
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APA ·
Chicago ·
MLA ·
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Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Abbasi, M. H. (2011). Data services: bringing I/O processing to petascale. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/42694
Chicago Manual of Style (16th Edition):
Abbasi, Mohammad Hasan. “Data services: bringing I/O processing to petascale.” 2011. Doctoral Dissertation, Georgia Tech. Accessed March 03, 2021.
http://hdl.handle.net/1853/42694.
MLA Handbook (7th Edition):
Abbasi, Mohammad Hasan. “Data services: bringing I/O processing to petascale.” 2011. Web. 03 Mar 2021.
Vancouver:
Abbasi MH. Data services: bringing I/O processing to petascale. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2021 Mar 03].
Available from: http://hdl.handle.net/1853/42694.
Council of Science Editors:
Abbasi MH. Data services: bringing I/O processing to petascale. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/42694
◁ [1] [2] ▶
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Open Access Theses and Dissertations
