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You searched for subject:(SIMD). Showing records 1 – 30 of 148 total matches.

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Rochester Institute of Technology

1. Mazza, James P. Software/Hardware Tradeoffs in the Speedup of Color Image Processing Algorithms.

Degree: MS, Electrical Engineering, 2014, Rochester Institute of Technology

  Data parallel image processing algorithms have numerous uses in many real time applications. Depending on the complexity of the computations involved, these algorithms may… (more)

Subjects/Keywords: FPGA; Hardward; SIMD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mazza, J. P. (2014). Software/Hardware Tradeoffs in the Speedup of Color Image Processing Algorithms. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/8604

Chicago Manual of Style (16th Edition):

Mazza, James P. “Software/Hardware Tradeoffs in the Speedup of Color Image Processing Algorithms.” 2014. Masters Thesis, Rochester Institute of Technology. Accessed July 23, 2019. https://scholarworks.rit.edu/theses/8604.

MLA Handbook (7th Edition):

Mazza, James P. “Software/Hardware Tradeoffs in the Speedup of Color Image Processing Algorithms.” 2014. Web. 23 Jul 2019.

Vancouver:

Mazza JP. Software/Hardware Tradeoffs in the Speedup of Color Image Processing Algorithms. [Internet] [Masters thesis]. Rochester Institute of Technology; 2014. [cited 2019 Jul 23]. Available from: https://scholarworks.rit.edu/theses/8604.

Council of Science Editors:

Mazza JP. Software/Hardware Tradeoffs in the Speedup of Color Image Processing Algorithms. [Masters Thesis]. Rochester Institute of Technology; 2014. Available from: https://scholarworks.rit.edu/theses/8604


NSYSU

2. Huang, Kuan-min. Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader.

Degree: Master, Computer Science and Engineering, 2009, NSYSU

 3D graphics pipeline can be divided into two subsystems: geometry subsystem and rendering subsystem. Hardware implementation of the transformation and lighting in the geometric subsystem… (more)

Subjects/Keywords: Vertex Shader; SIMD; Programmable

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APA (6th Edition):

Huang, K. (2009). Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043304

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Kuan-min. “Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader.” 2009. Thesis, NSYSU. Accessed July 23, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043304.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Kuan-min. “Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader.” 2009. Web. 23 Jul 2019.

Vancouver:

Huang K. Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader. [Internet] [Thesis]. NSYSU; 2009. [cited 2019 Jul 23]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043304.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang K. Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043304

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

3. Pan, Po-Hsun. The Optimal Design for Action Recognition Algorithm on Cell Processor Architecture.

Degree: Master, Electrical Engineering, 2011, NSYSU

 In recent years, automatic human action recognition has been widely researched within the computer vision and image processing communities. To identify human behavior which achieve… (more)

Subjects/Keywords: action recognition; SIMD; CELL; parallelize

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Pan, P. (2011). The Optimal Design for Action Recognition Algorithm on Cell Processor Architecture. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0823111-143005

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Pan, Po-Hsun. “The Optimal Design for Action Recognition Algorithm on Cell Processor Architecture.” 2011. Thesis, NSYSU. Accessed July 23, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0823111-143005.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Pan, Po-Hsun. “The Optimal Design for Action Recognition Algorithm on Cell Processor Architecture.” 2011. Web. 23 Jul 2019.

Vancouver:

Pan P. The Optimal Design for Action Recognition Algorithm on Cell Processor Architecture. [Internet] [Thesis]. NSYSU; 2011. [cited 2019 Jul 23]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0823111-143005.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Pan P. The Optimal Design for Action Recognition Algorithm on Cell Processor Architecture. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0823111-143005

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

4. 松本, 剛英. 組み込み向けマルチスレッドプロセッサの設計と評価 : Design and evaluation of multithread processor for embedded system; クミコミムケ マルチスレッド プロセッサ ノ セッケイ ト ヒョウカ.

Degree: Nara Institute of Science and Technology / 奈良先端科学技術大学院大学

Subjects/Keywords: プロセッサ; SIMD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

松本, . (n.d.). 組み込み向けマルチスレッドプロセッサの設計と評価 : Design and evaluation of multithread processor for embedded system; クミコミムケ マルチスレッド プロセッサ ノ セッケイ ト ヒョウカ. (Thesis). Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Retrieved from http://hdl.handle.net/10061/1770

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

松本, 剛英. “組み込み向けマルチスレッドプロセッサの設計と評価 : Design and evaluation of multithread processor for embedded system; クミコミムケ マルチスレッド プロセッサ ノ セッケイ ト ヒョウカ.” Thesis, Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Accessed July 23, 2019. http://hdl.handle.net/10061/1770.

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

松本, 剛英. “組み込み向けマルチスレッドプロセッサの設計と評価 : Design and evaluation of multithread processor for embedded system; クミコミムケ マルチスレッド プロセッサ ノ セッケイ ト ヒョウカ.” Web. 23 Jul 2019.

Note: this citation may be lacking information needed for this citation format:
No year of publication.

Vancouver:

松本 . 組み込み向けマルチスレッドプロセッサの設計と評価 : Design and evaluation of multithread processor for embedded system; クミコミムケ マルチスレッド プロセッサ ノ セッケイ ト ヒョウカ. [Internet] [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; [cited 2019 Jul 23]. Available from: http://hdl.handle.net/10061/1770.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.

Council of Science Editors:

松本 . 組み込み向けマルチスレッドプロセッサの設計と評価 : Design and evaluation of multithread processor for embedded system; クミコミムケ マルチスレッド プロセッサ ノ セッケイ ト ヒョウカ. [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; Available from: http://hdl.handle.net/10061/1770

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.


Linköping University

5. Chan, Chun-Jung. Investigation of NoGap : SIMD Datapath Implementation.

Degree: Electrical Engineering, 2011, Linköping University

  Nowadays, many ASIP systems with high computational capabilities are designed in order to fulfill the increasing demands of technical applications. However, the design of… (more)

Subjects/Keywords: ASIP; NoGap; ePUMA; Sleipnir; SIMD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chan, C. (2011). Investigation of NoGap : SIMD Datapath Implementation. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72131

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chan, Chun-Jung. “Investigation of NoGap : SIMD Datapath Implementation.” 2011. Thesis, Linköping University. Accessed July 23, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72131.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chan, Chun-Jung. “Investigation of NoGap : SIMD Datapath Implementation.” 2011. Web. 23 Jul 2019.

Vancouver:

Chan C. Investigation of NoGap : SIMD Datapath Implementation. [Internet] [Thesis]. Linköping University; 2011. [cited 2019 Jul 23]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72131.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chan C. Investigation of NoGap : SIMD Datapath Implementation. [Thesis]. Linköping University; 2011. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72131

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Delft University of Technology

6. De Smalen, S. A solution to misaligned data access in a vectorizing compiler framework:.

Degree: 2009, Delft University of Technology

 Vectorizing code for short vector architectures as employed by today’s multimedia extensions comes with a number of issues. The responsibilities of these issues are moved… (more)

Subjects/Keywords: SIMD; vectorization; compiler; alignment

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APA (6th Edition):

De Smalen, S. (2009). A solution to misaligned data access in a vectorizing compiler framework:. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:ee641d0f-b8c2-4194-bc46-a3e5326bea5f

Chicago Manual of Style (16th Edition):

De Smalen, S. “A solution to misaligned data access in a vectorizing compiler framework:.” 2009. Masters Thesis, Delft University of Technology. Accessed July 23, 2019. http://resolver.tudelft.nl/uuid:ee641d0f-b8c2-4194-bc46-a3e5326bea5f.

MLA Handbook (7th Edition):

De Smalen, S. “A solution to misaligned data access in a vectorizing compiler framework:.” 2009. Web. 23 Jul 2019.

Vancouver:

De Smalen S. A solution to misaligned data access in a vectorizing compiler framework:. [Internet] [Masters thesis]. Delft University of Technology; 2009. [cited 2019 Jul 23]. Available from: http://resolver.tudelft.nl/uuid:ee641d0f-b8c2-4194-bc46-a3e5326bea5f.

Council of Science Editors:

De Smalen S. A solution to misaligned data access in a vectorizing compiler framework:. [Masters Thesis]. Delft University of Technology; 2009. Available from: http://resolver.tudelft.nl/uuid:ee641d0f-b8c2-4194-bc46-a3e5326bea5f


NSYSU

7. Chang, Hsin-Tzu. Study on LTE MIMO System in SIMD Architecture.

Degree: Master, Communications Engineering, 2018, NSYSU

 In order to increase the spectral efficiency under limited bandwidth, the main technology Long Term Evolution (LTE) of the Fourth Generation of Mobile Phone Mobile… (more)

Subjects/Keywords: MKL; MIMO; SIMD; OFDM; LTE

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APA (6th Edition):

Chang, H. (2018). Study on LTE MIMO System in SIMD Architecture. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625118-175738

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Hsin-Tzu. “Study on LTE MIMO System in SIMD Architecture.” 2018. Thesis, NSYSU. Accessed July 23, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625118-175738.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Hsin-Tzu. “Study on LTE MIMO System in SIMD Architecture.” 2018. Web. 23 Jul 2019.

Vancouver:

Chang H. Study on LTE MIMO System in SIMD Architecture. [Internet] [Thesis]. NSYSU; 2018. [cited 2019 Jul 23]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625118-175738.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang H. Study on LTE MIMO System in SIMD Architecture. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625118-175738

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of New South Wales

8. Zhang, Feng. Accelerating Tree-Based Irregular Applications by Exploiting SIMD Parallelism.

Degree: Computer Science & Engineering, 2018, University of New South Wales

 Tree structures are one of the most pervasive data structures. Many tree-based applications feature abundant amount of data level parallelism (DLP), and modern SIMD architectures,… (more)

Subjects/Keywords: SIMD; Tree structures; Irregular applications

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APA (6th Edition):

Zhang, F. (2018). Accelerating Tree-Based Irregular Applications by Exploiting SIMD Parallelism. (Doctoral Dissertation). University of New South Wales. Retrieved from http://handle.unsw.edu.au/1959.4/60429

Chicago Manual of Style (16th Edition):

Zhang, Feng. “Accelerating Tree-Based Irregular Applications by Exploiting SIMD Parallelism.” 2018. Doctoral Dissertation, University of New South Wales. Accessed July 23, 2019. http://handle.unsw.edu.au/1959.4/60429.

MLA Handbook (7th Edition):

Zhang, Feng. “Accelerating Tree-Based Irregular Applications by Exploiting SIMD Parallelism.” 2018. Web. 23 Jul 2019.

Vancouver:

Zhang F. Accelerating Tree-Based Irregular Applications by Exploiting SIMD Parallelism. [Internet] [Doctoral dissertation]. University of New South Wales; 2018. [cited 2019 Jul 23]. Available from: http://handle.unsw.edu.au/1959.4/60429.

Council of Science Editors:

Zhang F. Accelerating Tree-Based Irregular Applications by Exploiting SIMD Parallelism. [Doctoral Dissertation]. University of New South Wales; 2018. Available from: http://handle.unsw.edu.au/1959.4/60429


Brno University of Technology

9. Benna, Filip. Optimalizace procesorového jádra pro knihovnu OpenCV .

Degree: 2015, Brno University of Technology

 Tato bakalářská práce se zabývá překladem knihovny OpenCV pro procesorové jádro Codix RISC a následnou optimalizací vybraných aplikací implementovaných s použitím této knihovny. Optimalizace je… (more)

Subjects/Keywords: OpenCV; Codix RISC; SIMD; optimalizace; OpenCV; Codix RISC; SIMD; optimization

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APA (6th Edition):

Benna, F. (2015). Optimalizace procesorového jádra pro knihovnu OpenCV . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/52377

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Benna, Filip. “Optimalizace procesorového jádra pro knihovnu OpenCV .” 2015. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/52377.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Benna, Filip. “Optimalizace procesorového jádra pro knihovnu OpenCV .” 2015. Web. 23 Jul 2019.

Vancouver:

Benna F. Optimalizace procesorového jádra pro knihovnu OpenCV . [Internet] [Thesis]. Brno University of Technology; 2015. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/52377.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Benna F. Optimalizace procesorového jádra pro knihovnu OpenCV . [Thesis]. Brno University of Technology; 2015. Available from: http://hdl.handle.net/11012/52377

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

10. Šnobl, Pavel. Překlad OpenCL aplikací pro vestavěné systémy .

Degree: 2016, Brno University of Technology

 Tato diplomová práce se zabývá podporou pro překlad a spouštění programů napsaných pomocí OpenCL frameworku na vestavěných systémech. OpenCL je systém pro programování heterogenních systémů,… (more)

Subjects/Keywords: OpenCL; LLVM; Codasip; SIMD; VLIW; OpenCL; LLVM; Codasip; SIMD; VLIW

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Šnobl, P. (2016). Překlad OpenCL aplikací pro vestavěné systémy . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/61853

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Šnobl, Pavel. “Překlad OpenCL aplikací pro vestavěné systémy .” 2016. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/61853.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Šnobl, Pavel. “Překlad OpenCL aplikací pro vestavěné systémy .” 2016. Web. 23 Jul 2019.

Vancouver:

Šnobl P. Překlad OpenCL aplikací pro vestavěné systémy . [Internet] [Thesis]. Brno University of Technology; 2016. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/61853.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Šnobl P. Překlad OpenCL aplikací pro vestavěné systémy . [Thesis]. Brno University of Technology; 2016. Available from: http://hdl.handle.net/11012/61853

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

11. Šnobl, Pavel. Podpora SIMD instrukcí v překladači LLVM .

Degree: 2014, Brno University of Technology

 Tato bakalářská práce se zabývá podporou automatické vektorizace kódu v kompilačním frameworku LLVM a rozšířením modelu procesoru Codix o SIMD instrukce. Výsledkem je schopnost LLVM… (more)

Subjects/Keywords: SIMD; LLVM; Codix; CodAL; autovektorizace; SIMD; LLVM; Codix; CodAL; Auto-Vectorization

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Šnobl, P. (2014). Podpora SIMD instrukcí v překladači LLVM . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/56572

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Šnobl, Pavel. “Podpora SIMD instrukcí v překladači LLVM .” 2014. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/56572.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Šnobl, Pavel. “Podpora SIMD instrukcí v překladači LLVM .” 2014. Web. 23 Jul 2019.

Vancouver:

Šnobl P. Podpora SIMD instrukcí v překladači LLVM . [Internet] [Thesis]. Brno University of Technology; 2014. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/56572.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Šnobl P. Podpora SIMD instrukcí v překladači LLVM . [Thesis]. Brno University of Technology; 2014. Available from: http://hdl.handle.net/11012/56572

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

12. Chen, Li-Yao. Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader.

Degree: Master, Computer Science and Engineering, 2010, NSYSU

 OpenGL ES 2.0 programmable 3D graphics pipeline is the current new standard for embedded graphics processor designs. The programmable vertex shader replaces the geometry operations… (more)

Subjects/Keywords: Integration; SOC; Programmable; SIMD; Vertex Shader

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, L. (2010). Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Li-Yao. “Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader.” 2010. Thesis, NSYSU. Accessed July 23, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Li-Yao. “Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader.” 2010. Web. 23 Jul 2019.

Vancouver:

Chen L. Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader. [Internet] [Thesis]. NSYSU; 2010. [cited 2019 Jul 23]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen L. Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

13. Li, Shang-Yu. Design and Implementation of a Vision Processor Based on the OpenVX Specification.

Degree: Master, Computer Science and Engineering, 2016, NSYSU

 Embedded computer vision applications emphasizes fast and real-time processing speed with low power consumption. To face these challenge, we need more suitable hardware accelerator for… (more)

Subjects/Keywords: Computer vision applications; OpenVX; SIMD; Vision Processor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, S. (2016). Design and Implementation of a Vision Processor Based on the OpenVX Specification. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731116-151556

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Shang-Yu. “Design and Implementation of a Vision Processor Based on the OpenVX Specification.” 2016. Thesis, NSYSU. Accessed July 23, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731116-151556.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Shang-Yu. “Design and Implementation of a Vision Processor Based on the OpenVX Specification.” 2016. Web. 23 Jul 2019.

Vancouver:

Li S. Design and Implementation of a Vision Processor Based on the OpenVX Specification. [Internet] [Thesis]. NSYSU; 2016. [cited 2019 Jul 23]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731116-151556.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li S. Design and Implementation of a Vision Processor Based on the OpenVX Specification. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731116-151556

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

14. Hsieh, Cheng-han. Study on Real-Time Software Architecture for LTE MIMO System.

Degree: Master, Communications Engineering, 2017, NSYSU

 Long-term-evolution (LTE) and LTE-Advance are undoubtedly the most successful mobile broadband technologies in the fourth generation (4G) wireless system. LTE employs orthogonal frequency division multiplexing… (more)

Subjects/Keywords: MKL; parallel processing; MIMO; OFDM; LTE; SIMD

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APA (6th Edition):

Hsieh, C. (2017). Study on Real-Time Software Architecture for LTE MIMO System. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0618117-094659

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsieh, Cheng-han. “Study on Real-Time Software Architecture for LTE MIMO System.” 2017. Thesis, NSYSU. Accessed July 23, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0618117-094659.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsieh, Cheng-han. “Study on Real-Time Software Architecture for LTE MIMO System.” 2017. Web. 23 Jul 2019.

Vancouver:

Hsieh C. Study on Real-Time Software Architecture for LTE MIMO System. [Internet] [Thesis]. NSYSU; 2017. [cited 2019 Jul 23]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0618117-094659.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsieh C. Study on Real-Time Software Architecture for LTE MIMO System. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0618117-094659

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Texas – Austin

15. Krimer, Evgeni. Improving energy efficiency of reliable massively-parallel architectures.

Degree: Electrical and Computer Engineering, 2012, University of Texas – Austin

 While transistor size continues to shrink every technology generation increasing the amount of transistors on a die, the reduction in energy consumption is less significant.… (more)

Subjects/Keywords: SIMD; Energy-efficiency; Process variation; GPU; GPGPU

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Krimer, E. (2012). Improving energy efficiency of reliable massively-parallel architectures. (Thesis). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2012-05-5473

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Krimer, Evgeni. “Improving energy efficiency of reliable massively-parallel architectures.” 2012. Thesis, University of Texas – Austin. Accessed July 23, 2019. http://hdl.handle.net/2152/ETD-UT-2012-05-5473.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Krimer, Evgeni. “Improving energy efficiency of reliable massively-parallel architectures.” 2012. Web. 23 Jul 2019.

Vancouver:

Krimer E. Improving energy efficiency of reliable massively-parallel architectures. [Internet] [Thesis]. University of Texas – Austin; 2012. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/2152/ETD-UT-2012-05-5473.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Krimer E. Improving energy efficiency of reliable massively-parallel architectures. [Thesis]. University of Texas – Austin; 2012. Available from: http://hdl.handle.net/2152/ETD-UT-2012-05-5473

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of New South Wales

16. Zhou, Hao. Compiler techniques for improving SIMD parallelism.

Degree: Computer Science & Engineering, 2016, University of New South Wales

 Modern CPUs are equipped with Single Instruction Multiple Data (SIMD) engines operating on short vectors, in order to meet the growing demands of accelerating multimedia… (more)

Subjects/Keywords: Compiler; Vectorization; SIMD; Loop Vectorizer; SLP; Simdization

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhou, H. (2016). Compiler techniques for improving SIMD parallelism. (Doctoral Dissertation). University of New South Wales. Retrieved from http://handle.unsw.edu.au/1959.4/56842 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:41633/SOURCE02?view=true

Chicago Manual of Style (16th Edition):

Zhou, Hao. “Compiler techniques for improving SIMD parallelism.” 2016. Doctoral Dissertation, University of New South Wales. Accessed July 23, 2019. http://handle.unsw.edu.au/1959.4/56842 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:41633/SOURCE02?view=true.

MLA Handbook (7th Edition):

Zhou, Hao. “Compiler techniques for improving SIMD parallelism.” 2016. Web. 23 Jul 2019.

Vancouver:

Zhou H. Compiler techniques for improving SIMD parallelism. [Internet] [Doctoral dissertation]. University of New South Wales; 2016. [cited 2019 Jul 23]. Available from: http://handle.unsw.edu.au/1959.4/56842 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:41633/SOURCE02?view=true.

Council of Science Editors:

Zhou H. Compiler techniques for improving SIMD parallelism. [Doctoral Dissertation]. University of New South Wales; 2016. Available from: http://handle.unsw.edu.au/1959.4/56842 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:41633/SOURCE02?view=true


Northeastern University

17. Yilmazer, Ayse. Micro-architectural support for improving synchronization and efficiency of SIMD execution on GPUS.

Degree: PhD, Department of Electrical and Computer Engineering, 2013, Northeastern University

 GPUs dedicate a majority of their transistor budgets to compute units rather than control logic. As a result, they can achieve excellent data-parallel power/performance. Given… (more)

Subjects/Keywords: GPU; SIMD Execution; Synchronization; Computer Engineering

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APA (6th Edition):

Yilmazer, A. (2013). Micro-architectural support for improving synchronization and efficiency of SIMD execution on GPUS. (Doctoral Dissertation). Northeastern University. Retrieved from http://hdl.handle.net/2047/d20004880

Chicago Manual of Style (16th Edition):

Yilmazer, Ayse. “Micro-architectural support for improving synchronization and efficiency of SIMD execution on GPUS.” 2013. Doctoral Dissertation, Northeastern University. Accessed July 23, 2019. http://hdl.handle.net/2047/d20004880.

MLA Handbook (7th Edition):

Yilmazer, Ayse. “Micro-architectural support for improving synchronization and efficiency of SIMD execution on GPUS.” 2013. Web. 23 Jul 2019.

Vancouver:

Yilmazer A. Micro-architectural support for improving synchronization and efficiency of SIMD execution on GPUS. [Internet] [Doctoral dissertation]. Northeastern University; 2013. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/2047/d20004880.

Council of Science Editors:

Yilmazer A. Micro-architectural support for improving synchronization and efficiency of SIMD execution on GPUS. [Doctoral Dissertation]. Northeastern University; 2013. Available from: http://hdl.handle.net/2047/d20004880

18. Winberg, Olov. Parallell beräkning av omslutande volymer.

Degree: Design and Engineering, 2010, Mälardalen University

  This paper presents techniques for speeding up commonly used algorithms forbounding volume (BV) computation, such as the AABB, sphere and k-DOP. Byexploiting the possibilities… (more)

Subjects/Keywords: Bounding volume; SIMD; parallel; k-DOP; AABB; Omslutande Volymer; SIMD; parallell; k-DOP; AABB

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Winberg, O. (2010). Parallell beräkning av omslutande volymer. (Thesis). Mälardalen University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-9439

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Winberg, Olov. “Parallell beräkning av omslutande volymer.” 2010. Thesis, Mälardalen University. Accessed July 23, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-9439.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Winberg, Olov. “Parallell beräkning av omslutande volymer.” 2010. Web. 23 Jul 2019.

Vancouver:

Winberg O. Parallell beräkning av omslutande volymer. [Internet] [Thesis]. Mälardalen University; 2010. [cited 2019 Jul 23]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-9439.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Winberg O. Parallell beräkning av omslutande volymer. [Thesis]. Mälardalen University; 2010. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-9439

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

19. Bergach, Mohamed Amine. Adaptation du calcul de la Transformée de Fourier Rapide sur une architecture mixte CPU/GPU intégrée : Adaptation of the Fast Fourier Transform processing on hybride integrated CPU/GPU architecture.

Degree: Docteur es, Informatique, 2015, Nice

Les architectures multi-cœurs Intel Core (IvyBridge, Haswell,...) contiennent à la fois des cœurs CPU généralistes (4), mais aussi des cœurs dédiés GPU embarqués sur cette… (more)

Subjects/Keywords: FFT; OpenCL; GPGPU; CPU; SIMD; SIMT; AAA; FFT; OpenCL; GPGPU; CPU; SIMD; SIMT; AAA

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Bergach, M. A. (2015). Adaptation du calcul de la Transformée de Fourier Rapide sur une architecture mixte CPU/GPU intégrée : Adaptation of the Fast Fourier Transform processing on hybride integrated CPU/GPU architecture. (Doctoral Dissertation). Nice. Retrieved from http://www.theses.fr/2015NICE4060

Chicago Manual of Style (16th Edition):

Bergach, Mohamed Amine. “Adaptation du calcul de la Transformée de Fourier Rapide sur une architecture mixte CPU/GPU intégrée : Adaptation of the Fast Fourier Transform processing on hybride integrated CPU/GPU architecture.” 2015. Doctoral Dissertation, Nice. Accessed July 23, 2019. http://www.theses.fr/2015NICE4060.

MLA Handbook (7th Edition):

Bergach, Mohamed Amine. “Adaptation du calcul de la Transformée de Fourier Rapide sur une architecture mixte CPU/GPU intégrée : Adaptation of the Fast Fourier Transform processing on hybride integrated CPU/GPU architecture.” 2015. Web. 23 Jul 2019.

Vancouver:

Bergach MA. Adaptation du calcul de la Transformée de Fourier Rapide sur une architecture mixte CPU/GPU intégrée : Adaptation of the Fast Fourier Transform processing on hybride integrated CPU/GPU architecture. [Internet] [Doctoral dissertation]. Nice; 2015. [cited 2019 Jul 23]. Available from: http://www.theses.fr/2015NICE4060.

Council of Science Editors:

Bergach MA. Adaptation du calcul de la Transformée de Fourier Rapide sur une architecture mixte CPU/GPU intégrée : Adaptation of the Fast Fourier Transform processing on hybride integrated CPU/GPU architecture. [Doctoral Dissertation]. Nice; 2015. Available from: http://www.theses.fr/2015NICE4060

20. Kalathingal, Sajith. Transforming TLP into DLP with the dynamic inter-thread vectorization architecture : Transformer le TLP en DLP avec l'architecture de vectorisation dynamique inter-thread.

Degree: Docteur es, Informatique, 2016, Rennes 1

De nombreux microprocesseurs modernes mettent en œuvre le multi-threading simultané (SMT) pour améliorer l'efficacité globale des processeurs superscalaires. SMT masque les opérations à longue latence… (more)

Subjects/Keywords: Multi-Threading simultané; SPMD; SIMD; Vectorisation dynamique; Architectures des microprocesseurs; Simultaneous Multi-Threading; SPMD; SIMD; Dynamic inter-Thread vectorization; Microprocessor architectures

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APA (6th Edition):

Kalathingal, S. (2016). Transforming TLP into DLP with the dynamic inter-thread vectorization architecture : Transformer le TLP en DLP avec l'architecture de vectorisation dynamique inter-thread. (Doctoral Dissertation). Rennes 1. Retrieved from http://www.theses.fr/2016REN1S133

Chicago Manual of Style (16th Edition):

Kalathingal, Sajith. “Transforming TLP into DLP with the dynamic inter-thread vectorization architecture : Transformer le TLP en DLP avec l'architecture de vectorisation dynamique inter-thread.” 2016. Doctoral Dissertation, Rennes 1. Accessed July 23, 2019. http://www.theses.fr/2016REN1S133.

MLA Handbook (7th Edition):

Kalathingal, Sajith. “Transforming TLP into DLP with the dynamic inter-thread vectorization architecture : Transformer le TLP en DLP avec l'architecture de vectorisation dynamique inter-thread.” 2016. Web. 23 Jul 2019.

Vancouver:

Kalathingal S. Transforming TLP into DLP with the dynamic inter-thread vectorization architecture : Transformer le TLP en DLP avec l'architecture de vectorisation dynamique inter-thread. [Internet] [Doctoral dissertation]. Rennes 1; 2016. [cited 2019 Jul 23]. Available from: http://www.theses.fr/2016REN1S133.

Council of Science Editors:

Kalathingal S. Transforming TLP into DLP with the dynamic inter-thread vectorization architecture : Transformer le TLP en DLP avec l'architecture de vectorisation dynamique inter-thread. [Doctoral Dissertation]. Rennes 1; 2016. Available from: http://www.theses.fr/2016REN1S133


Delft University of Technology

21. Shahbahrami, A. Avoiding conversion and rearrangement overhead in SIMD architecures.

Degree: 2008, Delft University of Technology

 In this dissertation, a novel SIMD extension called Modified MMX (MMMX) for multimedia computing is presented. Specifically, the MMX architecture is enhanced with the extended… (more)

Subjects/Keywords: SIMD architectures; vectorization; SIMD programming; multimedia application; cache optimization

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APA (6th Edition):

Shahbahrami, A. (2008). Avoiding conversion and rearrangement overhead in SIMD architecures. (Doctoral Dissertation). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; urn:NBN:nl:ui:24-uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; urn:NBN:nl:ui:24-uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; http://resolver.tudelft.nl/uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5

Chicago Manual of Style (16th Edition):

Shahbahrami, A. “Avoiding conversion and rearrangement overhead in SIMD architecures.” 2008. Doctoral Dissertation, Delft University of Technology. Accessed July 23, 2019. http://resolver.tudelft.nl/uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; urn:NBN:nl:ui:24-uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; urn:NBN:nl:ui:24-uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; http://resolver.tudelft.nl/uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5.

MLA Handbook (7th Edition):

Shahbahrami, A. “Avoiding conversion and rearrangement overhead in SIMD architecures.” 2008. Web. 23 Jul 2019.

Vancouver:

Shahbahrami A. Avoiding conversion and rearrangement overhead in SIMD architecures. [Internet] [Doctoral dissertation]. Delft University of Technology; 2008. [cited 2019 Jul 23]. Available from: http://resolver.tudelft.nl/uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; urn:NBN:nl:ui:24-uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; urn:NBN:nl:ui:24-uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; http://resolver.tudelft.nl/uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5.

Council of Science Editors:

Shahbahrami A. Avoiding conversion and rearrangement overhead in SIMD architecures. [Doctoral Dissertation]. Delft University of Technology; 2008. Available from: http://resolver.tudelft.nl/uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; urn:NBN:nl:ui:24-uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; urn:NBN:nl:ui:24-uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5 ; http://resolver.tudelft.nl/uuid:4fd01d95-6bf6-4864-8662-f7adf837e2f5


KTH

22. Guo, Jiabing. Design and implementation of LTE-A and 5G kernel algorithms on SIMD vector processor.

Degree: Radio Systems Laboratory (RS Lab), 2015, KTH

With the wide spread of wireless technology, the time for 4G has arrived, and 5G will appear not so far in the future. However,… (more)

Subjects/Keywords: channel estimation; MIMO detection; massive complex matrix inversion; SIMD; kanaluppskattning; MIMO-detektion; massiva komplex matrisinversion; SIMD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Guo, J. (2015). Design and implementation of LTE-A and 5G kernel algorithms on SIMD vector processor. (Thesis). KTH. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-159474

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Guo, Jiabing. “Design and implementation of LTE-A and 5G kernel algorithms on SIMD vector processor.” 2015. Thesis, KTH. Accessed July 23, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-159474.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Guo, Jiabing. “Design and implementation of LTE-A and 5G kernel algorithms on SIMD vector processor.” 2015. Web. 23 Jul 2019.

Vancouver:

Guo J. Design and implementation of LTE-A and 5G kernel algorithms on SIMD vector processor. [Internet] [Thesis]. KTH; 2015. [cited 2019 Jul 23]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-159474.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Guo J. Design and implementation of LTE-A and 5G kernel algorithms on SIMD vector processor. [Thesis]. KTH; 2015. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-159474

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

23. Tomec, Martin. Optimalizace rozpoznávání řeči pro mobilní zařízení .

Degree: 2010, Brno University of Technology

 Práce se zabývá optimalizací algoritmů pro detekci klíčových slov na procesorové architektuře ARM Cortex-A8. Nejprve je popsána tato architektura a zejména její jednotka NEON pro… (more)

Subjects/Keywords: optimalizace; ARM; NEON; SIMD; detekce klíčových slov; rozpoznávání řeči; neuronová síť; optimization; ARM; NEON; SIMD; keyword spotting; speech recognition; neural net

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tomec, M. (2010). Optimalizace rozpoznávání řeči pro mobilní zařízení . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/54275

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tomec, Martin. “Optimalizace rozpoznávání řeči pro mobilní zařízení .” 2010. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/54275.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tomec, Martin. “Optimalizace rozpoznávání řeči pro mobilní zařízení .” 2010. Web. 23 Jul 2019.

Vancouver:

Tomec M. Optimalizace rozpoznávání řeči pro mobilní zařízení . [Internet] [Thesis]. Brno University of Technology; 2010. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/54275.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tomec M. Optimalizace rozpoznávání řeči pro mobilní zařízení . [Thesis]. Brno University of Technology; 2010. Available from: http://hdl.handle.net/11012/54275

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

24. Fuksa, Tomáš. Paralelizace výpočtů pro zpracování obrazu .

Degree: 2011, Brno University of Technology

 Tato práce se zabývá problematikou paralelních výpočtů na moderních procesorech, ať už se jedná o vícejádrová CPU nebo grafické karty. Cílem práce je seznámit se… (more)

Subjects/Keywords: Grafický procesor; GPGPU; Nvidia; CUDA; Paralelismus; OpenCL; Intel IPP; SIMD; Graphic processor; GPGPU; Nvidia; CUDA; Paralelism; OpenCL; Intel IPP; SIMD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Fuksa, T. (2011). Paralelizace výpočtů pro zpracování obrazu . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/8264

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Fuksa, Tomáš. “Paralelizace výpočtů pro zpracování obrazu .” 2011. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/8264.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Fuksa, Tomáš. “Paralelizace výpočtů pro zpracování obrazu .” 2011. Web. 23 Jul 2019.

Vancouver:

Fuksa T. Paralelizace výpočtů pro zpracování obrazu . [Internet] [Thesis]. Brno University of Technology; 2011. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/8264.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Fuksa T. Paralelizace výpočtů pro zpracování obrazu . [Thesis]. Brno University of Technology; 2011. Available from: http://hdl.handle.net/11012/8264

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

25. Šlenker, Samuel. Výpočetní jednotky procesorů poslední generace a jejich využití .

Degree: 2015, Brno University of Technology

 Cieľom tejto práce bolo naštudovať a následne spracovať rozdiely medzi staršími inštrukčnými sadami a novšími inštrukčnými sadami, uviesť prínosy jednotlivých rozšírení, porovnať spôsoby výpočtov jednotlivých… (more)

Subjects/Keywords: SIMD; SSE; AVX; FMA; vektorové spracovanie dát; Intel; AMD; SIMD; SSE; AVX; FMA; vector data processing; Intel; AMD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Šlenker, S. (2015). Výpočetní jednotky procesorů poslední generace a jejich využití . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/41353

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Šlenker, Samuel. “Výpočetní jednotky procesorů poslední generace a jejich využití .” 2015. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/41353.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Šlenker, Samuel. “Výpočetní jednotky procesorů poslední generace a jejich využití .” 2015. Web. 23 Jul 2019.

Vancouver:

Šlenker S. Výpočetní jednotky procesorů poslední generace a jejich využití . [Internet] [Thesis]. Brno University of Technology; 2015. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/41353.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Šlenker S. Výpočetní jednotky procesorů poslední generace a jejich využití . [Thesis]. Brno University of Technology; 2015. Available from: http://hdl.handle.net/11012/41353

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

26. Beneš, Vojtěch. Generování kódu optimalizovaných matematických operací .

Degree: 2010, Brno University of Technology

 Bakalářská práce se zabývá vytvořením jednoduchého programovacího jazyka pro práci s matematickými operacemi. Hlavním cílem práce je vytvořit kompilátor tohoto jazyka, který pro generování instrukcí cílového… (more)

Subjects/Keywords: Generování kódu; překladač; optimalizace; algoritmus kontextového generování; MMX; SSE; SIMD; Code generation; compiler; optimization; algorithm of context generation; MMX; SSE; SIMD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Beneš, V. (2010). Generování kódu optimalizovaných matematických operací . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/55969

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Beneš, Vojtěch. “Generování kódu optimalizovaných matematických operací .” 2010. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/55969.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Beneš, Vojtěch. “Generování kódu optimalizovaných matematických operací .” 2010. Web. 23 Jul 2019.

Vancouver:

Beneš V. Generování kódu optimalizovaných matematických operací . [Internet] [Thesis]. Brno University of Technology; 2010. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/55969.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Beneš V. Generování kódu optimalizovaných matematických operací . [Thesis]. Brno University of Technology; 2010. Available from: http://hdl.handle.net/11012/55969

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

27. Tomečko, Lukáš. Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech .

Degree: 2016, Brno University of Technology

 Cieľom tejto práce je paralelizovať a vektorizovať simuláciu toku kvapalín. Dosiahne sa to pomocou knižnice OpenMP a prekladaču od Intelu. Implementované boli rôzne prístupy k… (more)

Subjects/Keywords: paralelizácia; vektorizácia; OpenMP; simd; Intel; SPH; simulácia; násobenie matíc; parallelization; vectorization; OpenMP; simd; Intel; SPH; simulation; matmul

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tomečko, L. (2016). Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/62068

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tomečko, Lukáš. “Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech .” 2016. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/62068.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tomečko, Lukáš. “Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech .” 2016. Web. 23 Jul 2019.

Vancouver:

Tomečko L. Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech . [Internet] [Thesis]. Brno University of Technology; 2016. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/62068.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tomečko L. Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech . [Thesis]. Brno University of Technology; 2016. Available from: http://hdl.handle.net/11012/62068

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

28. Juránek, Roman. Akcelerace detekce objektů pomocí klasifikátorů .

Degree: 2012, Brno University of Technology

 Detekce objektů v počítačovém vidění je složítá úloha. Velmi populární a rozšířená metoda pro detekci je využití statistických klasifikátorů a skenovacích oken. Pro učení kalsifikátorů… (more)

Subjects/Keywords: Detekce objektů; AdaBoost; WaldBoost; Akcelerace; SIMD; Minimalizace ceny; Object Detection; AdaBoost; WaldBoost; Acceleration; SIMD; Cost Minimization

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Juránek, R. (2012). Akcelerace detekce objektů pomocí klasifikátorů . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/63272

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Juránek, Roman. “Akcelerace detekce objektů pomocí klasifikátorů .” 2012. Thesis, Brno University of Technology. Accessed July 23, 2019. http://hdl.handle.net/11012/63272.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Juránek, Roman. “Akcelerace detekce objektů pomocí klasifikátorů .” 2012. Web. 23 Jul 2019.

Vancouver:

Juránek R. Akcelerace detekce objektů pomocí klasifikátorů . [Internet] [Thesis]. Brno University of Technology; 2012. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/11012/63272.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Juránek R. Akcelerace detekce objektů pomocí klasifikátorů . [Thesis]. Brno University of Technology; 2012. Available from: http://hdl.handle.net/11012/63272

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

29. Westermann, Peter. Exploration of the scalability of SIMD processing for software defined radio.

Degree: 2011, Technische Universität Dortmund

 The idea of software defined radio (SDR) describes a signal processing system for wireless communications that allows performing major parts of the physical layer processing… (more)

Subjects/Keywords: FFT; LDPC; MIMO; SIMD; Software defined radio (SDR); Sphere decoding; 620

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Westermann, P. (2011). Exploration of the scalability of SIMD processing for software defined radio. (Thesis). Technische Universität Dortmund. Retrieved from http://hdl.handle.net/2003/27666

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Westermann, Peter. “Exploration of the scalability of SIMD processing for software defined radio.” 2011. Thesis, Technische Universität Dortmund. Accessed July 23, 2019. http://hdl.handle.net/2003/27666.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Westermann, Peter. “Exploration of the scalability of SIMD processing for software defined radio.” 2011. Web. 23 Jul 2019.

Vancouver:

Westermann P. Exploration of the scalability of SIMD processing for software defined radio. [Internet] [Thesis]. Technische Universität Dortmund; 2011. [cited 2019 Jul 23]. Available from: http://hdl.handle.net/2003/27666.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Westermann P. Exploration of the scalability of SIMD processing for software defined radio. [Thesis]. Technische Universität Dortmund; 2011. Available from: http://hdl.handle.net/2003/27666

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Linköping University

30. Hussain, Sajid. Verification and FPGA implementation of a floating point SIMD processor for MIMO processing.

Degree: Computer Engineering, 2010, Linköping University

The rapidly increasing capabilities of digital electronics have increased the demand of Software Defined Radio (SDR), which were not possible in the special purpose… (more)

Subjects/Keywords: SDR; SIMD; Xilinx; FPGA; DMA; Computer Engineering; Datorteknik

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hussain, S. (2010). Verification and FPGA implementation of a floating point SIMD processor for MIMO processing. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-64077

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hussain, Sajid. “Verification and FPGA implementation of a floating point SIMD processor for MIMO processing.” 2010. Thesis, Linköping University. Accessed July 23, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-64077.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hussain, Sajid. “Verification and FPGA implementation of a floating point SIMD processor for MIMO processing.” 2010. Web. 23 Jul 2019.

Vancouver:

Hussain S. Verification and FPGA implementation of a floating point SIMD processor for MIMO processing. [Internet] [Thesis]. Linköping University; 2010. [cited 2019 Jul 23]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-64077.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hussain S. Verification and FPGA implementation of a floating point SIMD processor for MIMO processing. [Thesis]. Linköping University; 2010. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-64077

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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