You searched for subject:(Real Time Systems).
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University of Illinois – Urbana-Champaign
1.
Lu, Yi.
The delay composition theorem on pipeline systems with non-preemptive priority varying scheduling algorithms.
Degree: MS, Computer Science, 2015, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/78658 
► The delay composition theorem, by taking into account the fact that pipeline systems allow concurrent execution, expresses the upper-bounded delay of a real-time task as…
(more)
▼ The delay composition theorem, by taking into account the fact that pipeline systems allow concurrent execution, expresses the upper-bounded delay of a real-time task as the sum of two summations, where the first one is linear to the number of stages of the system, and the second one is linear to the number of tasks running on the system. The schedulability analysis based on delay composition theorem performs better than traditional analysis techniques. In this paper we break one assumption that has been hold by previous works on delay composition theorem, namely each task has the same relative priority across all stages. We extend the theorem to pipeline systems running non-preemptive scheduling algorithm which may assign different relative priorities to a task on different stages.
Subjects/Keywords: real-time scheduling; pipeline systems
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APA (6th Edition):
Lu, Y. (2015). The delay composition theorem on pipeline systems with non-preemptive priority varying scheduling algorithms. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/78658
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lu, Yi. “The delay composition theorem on pipeline systems with non-preemptive priority varying scheduling algorithms.” 2015. Thesis, University of Illinois – Urbana-Champaign. Accessed January 19, 2021.
http://hdl.handle.net/2142/78658.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lu, Yi. “The delay composition theorem on pipeline systems with non-preemptive priority varying scheduling algorithms.” 2015. Web. 19 Jan 2021.
Vancouver:
Lu Y. The delay composition theorem on pipeline systems with non-preemptive priority varying scheduling algorithms. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2015. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/2142/78658.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lu Y. The delay composition theorem on pipeline systems with non-preemptive priority varying scheduling algorithms. [Thesis]. University of Illinois – Urbana-Champaign; 2015. Available from: http://hdl.handle.net/2142/78658
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
2.
Delaney, Samuel F.
RealPi - A Real Time Operating System on the Raspberry Pi.
Degree: 2018, University of Nevada – Reno
URL: http://hdl.handle.net/11714/4868
► Academia has always sought to ride the line between established thought and new developments. No much more so than in the terms of technology. Universities…
(more)
▼ Academia has always sought to ride the line between established thought and new developments. No much more so than in the terms of technology. Universities seek to teach using a known and proven method and resource but also stay relevant with new technologies to provide students the knowledge they will need to be competitive in the work place or graduate field.This thesis will explore how the University of Nevada Reno approaches this problem with its
Real Time Operating system course. Namely on how using the established Micro cOS II
Real time Operating System with the new builder phenomena the Raspberry Pi we can overcome the challenge of updating a tried and true lesson plan updated to use technology relevant and interesting to the students of today.
Advisors/Committee Members: Egbert, Dwight (advisor), Harris, Frederick C. (committee member), Zhu, Xiaoshan (committee member).
Subjects/Keywords: Operating Systems; Real Time
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APA (6th Edition):
Delaney, S. F. (2018). RealPi - A Real Time Operating System on the Raspberry Pi. (Thesis). University of Nevada – Reno. Retrieved from http://hdl.handle.net/11714/4868
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Delaney, Samuel F. “RealPi - A Real Time Operating System on the Raspberry Pi.” 2018. Thesis, University of Nevada – Reno. Accessed January 19, 2021.
http://hdl.handle.net/11714/4868.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Delaney, Samuel F. “RealPi - A Real Time Operating System on the Raspberry Pi.” 2018. Web. 19 Jan 2021.
Vancouver:
Delaney SF. RealPi - A Real Time Operating System on the Raspberry Pi. [Internet] [Thesis]. University of Nevada – Reno; 2018. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/11714/4868.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Delaney SF. RealPi - A Real Time Operating System on the Raspberry Pi. [Thesis]. University of Nevada – Reno; 2018. Available from: http://hdl.handle.net/11714/4868
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Illinois – Urbana-Champaign
3.
Tabish, Rohan.
A real-time scratchpad-centric OS for multi-core embedded systems.
Degree: MS, Computer Science, 2016, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/95440
► Multicore processors have been increasing in development by the industry to meet the ever-growing processing requirements of various applications because these processors offer benefits such…
(more)
▼ Multicore processors have been increasing in development by the industry to meet the ever-growing processing requirements of various applications because these processors offer benefits such as reduced power consumption, more processing power and efficient parallel task execution for general purpose work- loads. However, in hard
real time systems where predictability is a key aspect, the average performance of these multicore processors is even worse than the scenarios in which the same task set is executed on a single core processor. This performance degradation is due to the fact that the multicore
systems have shared resources such as DRAM, BUS and caches which make the system highly unpredictable. One way to achieve predictability in such
systems is to serialize the access of the cores to the shared resources such that there is no contention. Another widely emerging approach is the integration of the scratchpad memory. Using scratchpad, at run
time, the code and data for the requested task is made available in the scratchpad and contention can be avoided.
In this thesis, we approach the problem of shared resource arbitration at an OS-level and propose a novel scratchpad centric OS design for multi-core platforms. In the proposed OS, the predictable usage of shared resources across multiple cores represents a central design-
time goal. Hence, we show (i) how contention-free execution of
real-
time tasks can be achieved on scratchpad-based architectures, and (ii) how a separation of application logic and I/O operations in the
time domain can be enforced. To validate the proposed design, we implemented the proposed OS using a commercial-off-the-shelf (COTS) platform. Experiments show that this novel design delivers predictable temporal behavior to hard
real-
time tasks, and it improves performance up to 2.1x compared to traditional approaches.
Advisors/Committee Members: Caccamo, Marco (advisor).
Subjects/Keywords: Real Time Systems; Real time operating systems (RTOS); Multicore; Scratchpad
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APA (6th Edition):
Tabish, R. (2016). A real-time scratchpad-centric OS for multi-core embedded systems. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/95440
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Tabish, Rohan. “A real-time scratchpad-centric OS for multi-core embedded systems.” 2016. Thesis, University of Illinois – Urbana-Champaign. Accessed January 19, 2021.
http://hdl.handle.net/2142/95440.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Tabish, Rohan. “A real-time scratchpad-centric OS for multi-core embedded systems.” 2016. Web. 19 Jan 2021.
Vancouver:
Tabish R. A real-time scratchpad-centric OS for multi-core embedded systems. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2016. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/2142/95440.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Tabish R. A real-time scratchpad-centric OS for multi-core embedded systems. [Thesis]. University of Illinois – Urbana-Champaign; 2016. Available from: http://hdl.handle.net/2142/95440
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Texas – Austin
4.
Wei, Yi-Hung.
Real-time communication platfrom for wireless cyber-physical applications.
Degree: PhD, Computer science, 2016, University of Texas – Austin
URL: http://hdl.handle.net/2152/43585
► A Cyber-Physical System (CPS) is a physical system whose operations are monitored, coordinated, and controlled by computation and communication processes. Applying wireless technologies to cyber-physical…
(more)
▼ A Cyber-Physical System (CPS) is a physical system whose operations are monitored, coordinated, and controlled by computation and communication processes. Applying wireless technologies to cyber-physical
systems can significantly enhance the system mobility and reduce the deployment and maintenance cost. Existing wireless technologies, however either cannot provide
real-
time or probabilistic guarantee on packet delivery or are not fast enough to support desired application requirements. Nondeterministic packet transmission and insufficiently high sampling rate will severely hurt application performance. To address this problem, we propose a
real-
time wireless communication platform called RT-WiFi. In this dissertation, we present our design and implementation of the data link layer and network management framework of RT-WiFi platform that provides predictable packet delivery and high sampling rate. The RT-WiFi communication platform is designed to support configurable components for adjusting design trade-offs including sampling rate, latency variance, reliability and thus can serve as a suitable communication platform for supporting a wide range of wireless CPS applications. Based on the RT-WiFi management platform, we further propose advanced network management techniques to provide jitter-free scheduling algorithm for improving system performance and to support reliable data transmission in noisy environments. To evaluate the effectiveness of our proposed algorithms and to verify the efficiency of our network management platform, we conduct a series of experiments and a case study that integrate the RT-WiFi communication platform with a health care CPS application to investigate the application performance in the
real world.
Advisors/Committee Members: Mok, Aloysius Ka-Lau (advisor), Gouda, Mohamed G. (committee member), Han, Song (committee member), Lam, Simon S. (committee member), Qiu, Lili (committee member).
Subjects/Keywords: Cyber-physical systems; Real-time systems; Real-time wireless communication
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APA ·
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Manager
APA (6th Edition):
Wei, Y. (2016). Real-time communication platfrom for wireless cyber-physical applications. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/43585
Chicago Manual of Style (16th Edition):
Wei, Yi-Hung. “Real-time communication platfrom for wireless cyber-physical applications.” 2016. Doctoral Dissertation, University of Texas – Austin. Accessed January 19, 2021.
http://hdl.handle.net/2152/43585.
MLA Handbook (7th Edition):
Wei, Yi-Hung. “Real-time communication platfrom for wireless cyber-physical applications.” 2016. Web. 19 Jan 2021.
Vancouver:
Wei Y. Real-time communication platfrom for wireless cyber-physical applications. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2016. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/2152/43585.
Council of Science Editors:
Wei Y. Real-time communication platfrom for wireless cyber-physical applications. [Doctoral Dissertation]. University of Texas – Austin; 2016. Available from: http://hdl.handle.net/2152/43585
Penn State University
5.
Advani, Siddharth Kishin.
Large-Scale Object Recognition for Embedded Wearable Platforms.
Degree: 2016, Penn State University
URL: https://submit-etda.libraries.psu.edu/catalog/z029p472x
► Visual object recognition has been an active thrust of research in the vast field of computer vision and neuroscience, both symbiotically closing the gap between…
(more)
▼ Visual object recognition has been an active thrust of research in the vast field of computer vision and neuroscience, both symbiotically closing the gap between man and machine. We, as humans, use years of evolution and a tightly integrated top-down and bottom-up visual system to be able to recognize a large set of objects with a very high degree of precision. When poor lighting, occlusion and varying pose create confusion or when new unidentifiable objects come into the picture, we use context to make an educated guess. For example, consider a foreign tourist looking for a restaurant in a busy city. Even though the tourist may not be able to understand the language of that place, by recognizing known objects such as 'plate', 'cup', 'chair', 'bread', he or she can come to a very quick conclusion about it being a restaurant.
As machines have evolved in their learning capabilities, technology has brought them closer to us allowing finer levels of interactions; initially from being hand-operated to then being hand-held and now being worn. However, current
systems being deployed for vision-specific tasks are still either too power-hungry, require huge storage space or computationally take too long for them to be useful for any
real-world scenario. Thus, as computing takes a new leap into this exciting world of 'Wearables', the need for smart cameras capable of supporting, engaging and enhancing human capabilities has never been felt more acutely.
This thesis tackles one of the critical tasks of large-scale visual object recognition for embedded wearable platforms. A scalable architecture for visual object detection that is fast, accurate, light-weight and
power efficient is first proposed. A Context-Aware Scalable Pipeline for Efficient Recognition - CASPER - which uses context in conjunction with a hierarchical visual recognition pipeline targeted for retail is then discussed. We are able to achieve high recognition rates across 62 object classes that are diverse in shape, size and color. The utility of using context in this visual pipeline is showcased and computing effort is reduced significantly without impacting accuracy at all. This allows for higher system throughput with limited area resources - an important factor in enhancing the capabilities of the next generation of wearable devices.
Advisors/Committee Members: Vijaykrishnan Narayanan, Dissertation Advisor/Co-Advisor, Jack Sampson, Committee Chair/Co-Chair, Lee Giles, Committee Member, Kevin Irick, Committee Member, Mary Beth Rosson, Outside Member.
Subjects/Keywords: Embedded vision systems; Real-time systems
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APA ·
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Manager
APA (6th Edition):
Advani, S. K. (2016). Large-Scale Object Recognition for Embedded Wearable Platforms. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/z029p472x
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Advani, Siddharth Kishin. “Large-Scale Object Recognition for Embedded Wearable Platforms.” 2016. Thesis, Penn State University. Accessed January 19, 2021.
https://submit-etda.libraries.psu.edu/catalog/z029p472x.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Advani, Siddharth Kishin. “Large-Scale Object Recognition for Embedded Wearable Platforms.” 2016. Web. 19 Jan 2021.
Vancouver:
Advani SK. Large-Scale Object Recognition for Embedded Wearable Platforms. [Internet] [Thesis]. Penn State University; 2016. [cited 2021 Jan 19].
Available from: https://submit-etda.libraries.psu.edu/catalog/z029p472x.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Advani SK. Large-Scale Object Recognition for Embedded Wearable Platforms. [Thesis]. Penn State University; 2016. Available from: https://submit-etda.libraries.psu.edu/catalog/z029p472x
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Georgia
6.
Jadhav, Mayur.
Improving dual priority scheduling.
Degree: 2014, University of Georgia
URL: http://hdl.handle.net/10724/30485
► A real-time system is a highly time constrained system and computes within restricted time intervals. These systems tend to have multiple time-critical tasks that must…
(more)
▼ A real-time system is a highly time constrained system and computes within restricted time intervals. These systems tend to have multiple time-critical tasks that must be carefully scheduled. Real-time systems can be used in many industries
including healthcare, aircraft control, etc., where a single time derailment could create life threatening consequences. Real-time systems commonly need to execute the same jobs repeatedly. We call these repeated jobs periodic tasks. A common scheduling
paradigm, called fixed priority, assigns priorities to each task and executes all jobs generated by a task at its assigned priority. A simple variation of fixed priority is dual priority scheduling. In dual priority scheduling, tasks have a low priority,
a high priority, and a promotion time. Each task executes in lower priority level untill it reaches its promotion time. Once it reaches the promotion time it starts executing at its higher priority level. This thesis focuses on improving the dual
priority multiprocessor scheduling algorithm to make more task sets meet their deadlines. Our approach to increase feasibility is by increasing the priority promotion times. The increase in priority promotion time reduces the interference of the tasks
that miss their deadlines in Fixed Priority schedules or Standard Dual Priority schedules. Resulting comparisons and evaluations derived from the experiments demonstrates that this approach can make many, but not all, of the task sets meet their
deadlines. In fact for some scenarios 100 percent of the Fixed Priority unschedulable task sets we tested are schedulable using our Modified Dual Priority algorithm.
Subjects/Keywords: Real-Time Systems; Real-Time Multiprocessor Scheduling; Dual Priority Scheduling
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APA ·
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APA (6th Edition):
Jadhav, M. (2014). Improving dual priority scheduling. (Thesis). University of Georgia. Retrieved from http://hdl.handle.net/10724/30485
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Jadhav, Mayur. “Improving dual priority scheduling.” 2014. Thesis, University of Georgia. Accessed January 19, 2021.
http://hdl.handle.net/10724/30485.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Jadhav, Mayur. “Improving dual priority scheduling.” 2014. Web. 19 Jan 2021.
Vancouver:
Jadhav M. Improving dual priority scheduling. [Internet] [Thesis]. University of Georgia; 2014. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10724/30485.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Jadhav M. Improving dual priority scheduling. [Thesis]. University of Georgia; 2014. Available from: http://hdl.handle.net/10724/30485
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Cornell University
7.
Lo, Daniel.
Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems.
Degree: PhD, Electrical Engineering, 2015, Cornell University
URL: http://hdl.handle.net/1813/40913
► The last decade has seen an increased ubiquity of computers with the widespread adoption of smartphones and tablets and the continued spread of embedded cyber-physical…
(more)
▼ The last decade has seen an increased ubiquity of computers with the widespread adoption of smartphones and tablets and the continued spread of embedded cyber-physical
systems. With this integration into our environments, it has become important to consider the
real-world interactions of these computers rather than simply treating them as abstract computing machines. For example, cyber-physical
systems typically have
real-
time constraints in order to ensure safe and correct physical interactions. Similarly, even mobile and desktop
systems, which are not traditionally considered
real-
time systems, are inherently
time-sensitive because of their interaction with users. Traditional techniques proposed for improving hardware architectures are not designed with these
real-
time constraints in mind. In this thesis, we explore some of the challenges and opportunities in hardware design for
real-
time systems. Specifically, we study recent techniques for improving security, reliability, and energyefficiency of computer
systems. Run-
time monitoring has been shown to be a promising technique for improving system security and reliability. Applying run-
time monitoring to realtime
systems introduces challenges due to the performance impact of monitoring. To address this, we first developed a technique for estimating the worstcase execution
time impact of run-
time monitoring, enabling it to be applied within existing
real-
time system design methodologies. Next, we developed hardware architectures that selectively enable and disable monitoring in order to meet
real-
time deadlines while still allowing a portion of the monitoring to be performed. We show architectures for hard and soft
real-
time systems, with different design decisions and trade-offs for each. Dynamic voltage and frequency scaling (DVFS) is commonly found in modern processors as a way to dynamically trade off power and performance. In the presence of
real-
time deadlines, this presents an opportunity for improved energy-efficiency by slowing down jobs to reduce energy while still meeting deadline requirements. We developed a method for creating DVFS controllers that are able to predict the appropriate frequency level for tasks before they execute and show improved energy savings and reduced deadline misses compared to current state-of-the-art DVFS controllers.
Advisors/Committee Members: Suh,Gookwon Edward (chair), Campbell,Mark (committee member), Manohar,Rajit (committee member).
Subjects/Keywords: computer architecture; real-time systems; computer security
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APA ·
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to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Lo, D. (2015). Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems. (Doctoral Dissertation). Cornell University. Retrieved from http://hdl.handle.net/1813/40913
Chicago Manual of Style (16th Edition):
Lo, Daniel. “Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems.” 2015. Doctoral Dissertation, Cornell University. Accessed January 19, 2021.
http://hdl.handle.net/1813/40913.
MLA Handbook (7th Edition):
Lo, Daniel. “Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems.” 2015. Web. 19 Jan 2021.
Vancouver:
Lo D. Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems. [Internet] [Doctoral dissertation]. Cornell University; 2015. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/1813/40913.
Council of Science Editors:
Lo D. Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems. [Doctoral Dissertation]. Cornell University; 2015. Available from: http://hdl.handle.net/1813/40913
Texas A&M University
8.
Kamath, Krishna Y.
Mining, Modeling, and Analyzing Real-Time Social Trails.
Degree: PhD, Computer Science, 2013, Texas A&M University
URL: http://hdl.handle.net/1969.1/150975
► Real-time social systems are the fastest growing phenomena on the web, enabling millions of users to generate, share, and consume content on a massive scale.…
(more)
▼ Real-
time social
systems are the fastest growing phenomena on the web, enabling millions of users to generate, share, and consume content on a massive scale. These
systems are manifestations of a larger trend toward the global sharing of the
real-
time interests, affiliations, and activities of everyday users and demand new computational approaches for monitoring, analyzing, and distilling information from the prospective web of
real-
time content.
In this dissertation research, we focus on the
real-
time social trails that reflect the digital footprints of crowds of
real-
time web users in response to
real-world events or online phenomena. These digital footprints correspond to the artifacts strewn across the
real-
time web like posting of messages to Twitter or Facebook; the creation, sharing, and viewing of videos on websites like YouTube; and so on. While access to social trails could benefit many domains there is a significant research gap toward discovering, modeling, and leveraging these social trails. Hence, this dissertation research makes three contributions:
• The first contribution of this dissertation research is a suite of efficient techniques for discovering non-trivial social trails from large-scale
real-
time social
systems. We first develop a communication-based method using temporal graphs for discovering social trails on a stream of conversations from social messaging
systems like instant messages, emails, Twitter directed or @ messages, SMS, etc. and then develop a content-based method using locality sensitive hashing for discovering content based social trails on a stream of text messages like Tweet stream, stream of Facebook messages, YouTube comments, etc.
• The second contribution of this dissertation research is a framework for modeling and predicting the spatio-temporal dynamics of social trails. In particular, we develop a probabilistic model that synthesizes two conflicting hypotheses about the nature of online information spread: (i) the spatial influence model, which asserts that social trails propagates to locations that are close by; and (ii) the community affinity influence model, which asserts that social trail prop- agates between locations that are culturally connected, even if they are distant.
• The third contribution of this dissertation research is a set of methods for social trail analytics and leveraging social trails for prognostic applications like
real-
time content recommendation, personalized advertising, and so on. We first analyze geo-spatial social trails of hashtags from Twitter, investigate their spatio-temporal dynamics and then use this analysis to develop a framework for recommending hashtags. Finally, we address the challenge of classifying social trails efficiently on
real-
time social
systems.
Advisors/Committee Members: Caverlee, James (advisor), Furuta, Richard (committee member), Gutierrez-Osuna, Ricardo (committee member), Burkart, Patrick (committee member).
Subjects/Keywords: social media analysis; real-time social systems
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Manager
APA (6th Edition):
Kamath, K. Y. (2013). Mining, Modeling, and Analyzing Real-Time Social Trails. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/150975
Chicago Manual of Style (16th Edition):
Kamath, Krishna Y. “Mining, Modeling, and Analyzing Real-Time Social Trails.” 2013. Doctoral Dissertation, Texas A&M University. Accessed January 19, 2021.
http://hdl.handle.net/1969.1/150975.
MLA Handbook (7th Edition):
Kamath, Krishna Y. “Mining, Modeling, and Analyzing Real-Time Social Trails.” 2013. Web. 19 Jan 2021.
Vancouver:
Kamath KY. Mining, Modeling, and Analyzing Real-Time Social Trails. [Internet] [Doctoral dissertation]. Texas A&M University; 2013. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/1969.1/150975.
Council of Science Editors:
Kamath KY. Mining, Modeling, and Analyzing Real-Time Social Trails. [Doctoral Dissertation]. Texas A&M University; 2013. Available from: http://hdl.handle.net/1969.1/150975
University of Toronto
9.
Wong, Justin.
Contributions to the Development of a Real-time Ultrasound Simulator.
Degree: 2015, University of Toronto
URL: http://hdl.handle.net/1807/69719
► Realistic, real-time ultrasound simulation is important for medical education and research. This thesis continues to develop the Fast and Mechanistic Ultrasound Simulator through understanding computational…
(more)
▼ Realistic, real-time ultrasound simulation is important for medical education and research. This thesis continues to develop the Fast and Mechanistic Ultrasound Simulator through understanding computational artifacts, constructing metrics for reliable simulation, and improving acoustic modelling. Computational artifacts in simulated Doppler spectra were found to originate from various types of discretization, such as in sampling frequency and subsequent phase mismatches, providing insight into mitigation strategies. A study of simulation and input data parameters has determined a practical estimate of greater than 6 point scatterers/mm3 within the acoustic sample volume as sufficient to support consistent and realistic Doppler simulation. Finally, frequency dependent attenuation was incorporated to model dispersive effects in tissue. The resulting simulated B-mode images are comparable to those of the Field II ultrasound simulation package, with only a modest performance penalty over the existing simulator.
M.A.S.
Advisors/Committee Members: Cobbold, Richard S.C., Steinman, David A., Electrical and Computer Engineering.
Subjects/Keywords: real-time systems; simulation; training; ultrasound; 0544
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APA (6th Edition):
Wong, J. (2015). Contributions to the Development of a Real-time Ultrasound Simulator. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/69719
Chicago Manual of Style (16th Edition):
Wong, Justin. “Contributions to the Development of a Real-time Ultrasound Simulator.” 2015. Masters Thesis, University of Toronto. Accessed January 19, 2021.
http://hdl.handle.net/1807/69719.
MLA Handbook (7th Edition):
Wong, Justin. “Contributions to the Development of a Real-time Ultrasound Simulator.” 2015. Web. 19 Jan 2021.
Vancouver:
Wong J. Contributions to the Development of a Real-time Ultrasound Simulator. [Internet] [Masters thesis]. University of Toronto; 2015. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/1807/69719.
Council of Science Editors:
Wong J. Contributions to the Development of a Real-time Ultrasound Simulator. [Masters Thesis]. University of Toronto; 2015. Available from: http://hdl.handle.net/1807/69719
10.
Rossi, Matija.
Real-time vision systems for underwater robotics: towards the automation of underwater inspection and intervention operations.
Degree: 2018, University of Limerick
URL: http://hdl.handle.net/10344/7591
► peer-reviewed
This thesis describes a body of research work in the domain of underwater robotics, aimed towards improving performance and efficiency; and achieving partial or…
(more)
▼ peer-reviewed
This thesis describes a body of research work in the domain of underwater robotics,
aimed towards improving performance and efficiency; and achieving partial or full
autonomy in a wide range of inspection and intervention tasks. The emphasis is on
the development and application of real-time vision systems, utilising underwater
cameras for mapping, navigation, and manipulation. Real-time analysis of survey
data, which is typically post-processed, can significantly improve the quality and
time of inspection operations. If vision systems prove sufficiently robust, they may
obviate the need for inertial navigation systems and replace them with image-based
target referenced navigation. Additionally, in order for an intervention task to be
carried out autonomously, it is necessary to know the structure of the scene around
the target and the position of the robot relative to it. This makes it possible to then
implement higher level features such as path planning, obstacle avoidance, and
target identification. Even in the case of manual operations, providing an augmented
feedback could increase the ROV pilot’s efficiency multiple times compared to a
standard 2D camera stream, which is what is currently being used for teleoperation.
Due to offshore operations being particularly expensive, time consuming, and limited
by other factors such as weather, making them more efficient is of great value. The
work presented in this thesis consists of three systems that aim to bring underwater
robotics closer to achieving these and many other new opportunities.
The first is a real-time 2D image mosaicking tool developed to provide instantaneous
feedback on image quality and area coverage during underwater site inspection
or documentation surveys. The algorithm implements a feature extraction and matching
approach to stitching video frames into a single image. While its main advantage
is providing good results for fast documentation in real-time even on low-end computer
hardware, it has also the possibility to provide camera motion estimation and
therefore be used as a navigation system or aid.
The second is underwater StereoFusion, an algorithm for real-time 3D dense
reconstruction and camera tracking. Unlike KinectFusion on which it is based,
StereoFusion relies on a stereo camera as its main sensor. The algorithm uses the
depth map obtained from the stereo camera to incrementally build a volumetric
3D model of the environment, while simultaneously using the model for camera
tracking. It has been successfully tested both in a lake and in the ocean, using two
different state-of-the-art underwater ROVs. A monocular camera solution for dense
reconstruction is also investigated and reported.
Advisors/Committee Members: Toal, Daniel, Dooly, Gerard, SFI.
Subjects/Keywords: underwater robotics; real-time vision systems
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APA (6th Edition):
Rossi, M. (2018). Real-time vision systems for underwater robotics: towards the automation of underwater inspection and intervention operations. (Thesis). University of Limerick. Retrieved from http://hdl.handle.net/10344/7591
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Rossi, Matija. “Real-time vision systems for underwater robotics: towards the automation of underwater inspection and intervention operations.” 2018. Thesis, University of Limerick. Accessed January 19, 2021.
http://hdl.handle.net/10344/7591.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Rossi, Matija. “Real-time vision systems for underwater robotics: towards the automation of underwater inspection and intervention operations.” 2018. Web. 19 Jan 2021.
Vancouver:
Rossi M. Real-time vision systems for underwater robotics: towards the automation of underwater inspection and intervention operations. [Internet] [Thesis]. University of Limerick; 2018. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10344/7591.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Rossi M. Real-time vision systems for underwater robotics: towards the automation of underwater inspection and intervention operations. [Thesis]. University of Limerick; 2018. Available from: http://hdl.handle.net/10344/7591
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Limerick
11.
Fogarty, Padraig Justin.
Utilizing multicore architectures to enhance software verification in real-time embedded systems.
Degree: 2013, University of Limerick
URL: http://hdl.handle.net/10344/3602
► peer-reviewed
The hypothesis of this research is that new techniques are required to facilitate software verification on the highly-integrated, but resource constrained, real-time embedded systems;…
(more)
▼ peer-reviewed
The hypothesis of this research is that new techniques are required to facilitate software
verification on the highly-integrated, but resource constrained, real-time embedded systems;
which are widely used in safety-critical applications. Software verification is an essential but
expensive undertaking which often consumes as much or more resources than design
activities; this is particularly the case in embedded systems that require functional safety. This
research explores the existing techniques for software verification on these systems and the
verification challenges posed by modern highly-integrated devices. The author then proposes
a novel target-level verification approach which addresses some of these challenges.
Advances in semiconductor manufacturing processes have fuelled the relentless shrinking
of IC design geometries. This has dramatically reduced the area required for each functional
block, reduced costs, and allowed more complex circuits to be realised; which has led to the
System-on-Chip (SoC) designs which now include multiple processors within a single die.
Undoubtedly many benefits result from this increased integration, but one significant
drawback is the loss of access to the many signals indicating the internal operational state.
Visibility of these signals is essential for many embedded software verification purposes.
In parallel with increasing SoC complexity, verification technology has transformed from
using full in-circuit emulation, to bond-out devices, to on-chip instrumentation (OCI), each
providing less visibility to the execution state of the processor. A key benefit of OCI
approaches is the associated reduced physical interface requirements; unfortunately this also
limits the real-time data that can be captured and transferred to external analysis tools. The
author proposes the alternative of using this OCI in conjunction with a co-processor to
perform monitoring and verification tasks on-chip; thus overcoming the interface limitations
and enhancing visibility.
The experimental platform used to explore the feasibility of using a co-processor and OCI
for software verification activities is described; and several case studies are examined. The
results demonstrate that this approach does offer a means of addressing several software
verification challenges and provides some unique capabilities, but also has some limitations.
These benefits and limitations are discussed and suggestions for future work to advance this
research topic are provided.
Advisors/Committee Members: Heffernan, Donal, IRCSET, International Centre for Graduate Education in Micro and Nano Engineering (ICGEE).
Subjects/Keywords: software verification; real-time embedded systems
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APA (6th Edition):
Fogarty, P. J. (2013). Utilizing multicore architectures to enhance software verification in real-time embedded systems. (Thesis). University of Limerick. Retrieved from http://hdl.handle.net/10344/3602
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Fogarty, Padraig Justin. “Utilizing multicore architectures to enhance software verification in real-time embedded systems.” 2013. Thesis, University of Limerick. Accessed January 19, 2021.
http://hdl.handle.net/10344/3602.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Fogarty, Padraig Justin. “Utilizing multicore architectures to enhance software verification in real-time embedded systems.” 2013. Web. 19 Jan 2021.
Vancouver:
Fogarty PJ. Utilizing multicore architectures to enhance software verification in real-time embedded systems. [Internet] [Thesis]. University of Limerick; 2013. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10344/3602.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Fogarty PJ. Utilizing multicore architectures to enhance software verification in real-time embedded systems. [Thesis]. University of Limerick; 2013. Available from: http://hdl.handle.net/10344/3602
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Virginia Tech
12.
Mishra, Tanmaya.
Parallelizing Trusted Execution Environments for Multicore Hard Real-Time Systems.
Degree: MS, Computer Engineering, 2019, Virginia Tech
URL: http://hdl.handle.net/10919/89889
► Real-Time systems are computing systems that not only maintain the traditional purpose of any computer, i.e, to be logically correct, but also timeliness, i.e, guaranteeing…
(more)
▼ Real-
Time systems are computing
systems that not only maintain the traditional purpose of any computer, i.e, to be logically correct, but also timeliness, i.e, guaranteeing an output in a given amount of
time. While, traditionally,
real-
time systems were isolated to reduce interference which could affect the timeliness, modern
real-
time systems are being increasingly connected to the internet. Many
real-
time systems, especially those used for critical applications like industrial control or military equipment, contain sensitive code or data that must not be divulged to a third party or open to modification. In such cases, it is necessary to use methods to safeguard this information, regardless of the extra processing
time/resource consumption (overheads) that it may add to the system. Modern hardware support Trusted Execution Environments (TEEs), a cheap, easy and robust mechanism to secure arbitrary pieces of code and data. To effectively use TEEs in a
real-
time system, the scheduling policy which decides which task to run at a given
time instant, must be made aware of TEEs and must be modified to take as much advantage of TEE execution while mitigating the effect of its overheads on the timeliness guarantees of the system. This thesis presents an approach to schedule TEE augmented code and simulation results of two previously proposed approaches.
Advisors/Committee Members: Chantem, Thidapat (committeechair), Gerdes, Ryan M. (committee member), Paul, JoAnn Mary (committee member).
Subjects/Keywords: Trusted Execution; Hard real-time systems; Scheduling
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Manager
APA (6th Edition):
Mishra, T. (2019). Parallelizing Trusted Execution Environments for Multicore Hard Real-Time Systems. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/89889
Chicago Manual of Style (16th Edition):
Mishra, Tanmaya. “Parallelizing Trusted Execution Environments for Multicore Hard Real-Time Systems.” 2019. Masters Thesis, Virginia Tech. Accessed January 19, 2021.
http://hdl.handle.net/10919/89889.
MLA Handbook (7th Edition):
Mishra, Tanmaya. “Parallelizing Trusted Execution Environments for Multicore Hard Real-Time Systems.” 2019. Web. 19 Jan 2021.
Vancouver:
Mishra T. Parallelizing Trusted Execution Environments for Multicore Hard Real-Time Systems. [Internet] [Masters thesis]. Virginia Tech; 2019. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10919/89889.
Council of Science Editors:
Mishra T. Parallelizing Trusted Execution Environments for Multicore Hard Real-Time Systems. [Masters Thesis]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/89889
Virginia Tech
13.
Kracht, Matthew Wallace.
Real-Time Embedded Software Modeling and Synthesis using Polychronous Data Flow Languages.
Degree: MS, Computer Engineering, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/46866
► As embedded software and platforms become more complicated, many safety properties are left to simulation and testing. MRICDF is a formal polychronous language used to…
(more)
▼ As embedded software and platforms become more complicated, many safety properties are left to simulation and testing. MRICDF is a formal polychronous language used to guarantee certain safety properties and alleviate the burden of software development and testing. We propose
real-
time extensions to MRICDF so that temporal properties of embedded
systems can also be proven. We adapt the extended precedence encoding technique of Prelude and expand upon current schedulability analysis techniques for multi-periodic
real-
time systems.
Advisors/Committee Members: Shukla, Sandeep K. (committeechair), Wang, Chao (committee member), Clancy, Thomas Charles (committee member).
Subjects/Keywords: Synchronous Languages; Real-Time Systems; Schedulability Analysis
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APA ·
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APA (6th Edition):
Kracht, M. W. (2014). Real-Time Embedded Software Modeling and Synthesis using Polychronous Data Flow Languages. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/46866
Chicago Manual of Style (16th Edition):
Kracht, Matthew Wallace. “Real-Time Embedded Software Modeling and Synthesis using Polychronous Data Flow Languages.” 2014. Masters Thesis, Virginia Tech. Accessed January 19, 2021.
http://hdl.handle.net/10919/46866.
MLA Handbook (7th Edition):
Kracht, Matthew Wallace. “Real-Time Embedded Software Modeling and Synthesis using Polychronous Data Flow Languages.” 2014. Web. 19 Jan 2021.
Vancouver:
Kracht MW. Real-Time Embedded Software Modeling and Synthesis using Polychronous Data Flow Languages. [Internet] [Masters thesis]. Virginia Tech; 2014. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10919/46866.
Council of Science Editors:
Kracht MW. Real-Time Embedded Software Modeling and Synthesis using Polychronous Data Flow Languages. [Masters Thesis]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/46866
Delft University of Technology
14.
Vădineanu, Serban (author).
Deriving Timing Properties from System Traces using Data-driven Techniques.
Degree: 2020, Delft University of Technology
URL: http://resolver.tudelft.nl/uuid:5dbe0031-cea8-4e4b-a6e6-021ce1458205
► With the growth in the complexity of real-time embedded systems, there is an increasing need for tools and techniques to understand and compare the observed…
(more)
▼ With the growth in the complexity of real-time embedded systems, there is an increasing need for tools and techniques to understand and compare the observed runtime behavior of a system with the expected one. Since many realtime applications require periodic interactions with the environment, one of the fundamental problems in guaranteeing/monitoring their temporal correctness is to be able to infer the periodicity of certain events in the system. The practicability of a period inference tool, however, depends on both its accuracy and robustness (resilience) against noise in the output trace of the system, e.g., when the system trace is impacted by events that have a non-deterministic nature such as the presence of aperiodic tasks, release jitters and runtime execution-time variations of the tasks. This work (i) presents a period inference framework that uses regression-based machine-learning (RBML) methods, (ii) thoroughly investigates the accuracy and robustness of different families of RBML methods in the presence of uncertainties in the system parameters, and (iii) proposes further accuracy improvements by deriving candidate pruning rules based on the inherent properties of the underlying scheduling policies. We show, on both synthetically generated traces and traces from actual systems, that our solutions can reduce the error of period estimation by two to three orders of magnitudes w.r.t. state of the art. Also, our methods showed to be robust against most sources of disturbance.
Electrical Engineer | Embedded Systems
Advisors/Committee Members: Nasri Nasrabadi, M. (mentor), Kuipers, F.A. (graduation committee), Rellermeyer, J.S. (graduation committee), Delft University of Technology (degree granting institution).
Subjects/Keywords: real-time systems; Machine Learning; Regression; Periodicity
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Export
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Manager
APA (6th Edition):
Vădineanu, S. (. (2020). Deriving Timing Properties from System Traces using Data-driven Techniques. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:5dbe0031-cea8-4e4b-a6e6-021ce1458205
Chicago Manual of Style (16th Edition):
Vădineanu, Serban (author). “Deriving Timing Properties from System Traces using Data-driven Techniques.” 2020. Masters Thesis, Delft University of Technology. Accessed January 19, 2021.
http://resolver.tudelft.nl/uuid:5dbe0031-cea8-4e4b-a6e6-021ce1458205.
MLA Handbook (7th Edition):
Vădineanu, Serban (author). “Deriving Timing Properties from System Traces using Data-driven Techniques.” 2020. Web. 19 Jan 2021.
Vancouver:
Vădineanu S(. Deriving Timing Properties from System Traces using Data-driven Techniques. [Internet] [Masters thesis]. Delft University of Technology; 2020. [cited 2021 Jan 19].
Available from: http://resolver.tudelft.nl/uuid:5dbe0031-cea8-4e4b-a6e6-021ce1458205.
Council of Science Editors:
Vădineanu S(. Deriving Timing Properties from System Traces using Data-driven Techniques. [Masters Thesis]. Delft University of Technology; 2020. Available from: http://resolver.tudelft.nl/uuid:5dbe0031-cea8-4e4b-a6e6-021ce1458205
Universidade Estadual de Campinas
15.
Leone Filho, Marcos de Almeida.
Uma metodologia baseada em algoritmos genéticos para melhorar o perfil de tensão diário de sistemas de potência = A genetic-algorithm-based methodology for improving daily voltage profile of power systems: A genetic-algorithm-based methodology for improving daily voltage profile of power systems.
Degree: 2012, Universidade Estadual de Campinas
URL: http://repositorio.unicamp.br/jspui/handle/REPOSIP/261162
► Abstract: The main contribution of this thesis is the proposal of a new methodology together with the implementation of a decision support system for real-time…
(more)
▼ Abstract: The main contribution of this thesis is the proposal of a new methodology together with the implementation of a decision support system for
real-
time transmission grid operation. Hence, a methodology for improving voltage pro-
le for power transmission
systems is described in this thesis. Basically, it consists in tuning the transformers taps in a way that the buses voltages in the same area would stay around a pre-specified level. Genetic Algorithms are applied for this optimization process in a way that, at the end of this process, a set of taps values that can drive the power system's voltage closer to a desired voltage level (if applied to it) is obtained. Furthermore, the proposed approach is not only able to analyze a static πcture" of power load, but also to cope with the issue of programming the hourly daily tap strategy according to the variations of the daily load profile. The proposed methodology is first evaluated with the
\IEEE-30-bus" and with the \IEEE-118-bus" test cases so that it could be finally applied to the Brazilian interconnected national power system. Besides, a decision support system was implemented during the progress of the work. Such system was designed in a way that it could be possibly used by a grid operator in order to evaluate load flows and also to develop many different studies by analyzing the system's sensitiveness to the load variations at
real time operation and also by evaluating a variety of contingencies scenarios
Advisors/Committee Members: UNIVERSIDADE ESTADUAL DE CAMPINAS (CRUESP), Ohishi, Takaaki, 1955- (advisor), Universidade Estadual de Campinas. Faculdade de Engenharia Elétrica e de Computação (institution), Programa de Pós-Graduação em Engenharia Elétrica (nameofprogram), Nepomuceno, Leonardo (committee member), Junior, Gelson da Cruz (committee member), Barbosa, Paulo Sergio Franco (committee member), Filho, Secundino Soares (committee member).
Subjects/Keywords: Algoritmos genéticos; Sistemas de tempo real; Genetic algorithms; Real time systems
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Export
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Manager
APA (6th Edition):
Leone Filho, M. d. A. (2012). Uma metodologia baseada em algoritmos genéticos para melhorar o perfil de tensão diário de sistemas de potência = A genetic-algorithm-based methodology for improving daily voltage profile of power systems: A genetic-algorithm-based methodology for improving daily voltage profile of power systems. (Thesis). Universidade Estadual de Campinas. Retrieved from http://repositorio.unicamp.br/jspui/handle/REPOSIP/261162
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Leone Filho, Marcos de Almeida. “Uma metodologia baseada em algoritmos genéticos para melhorar o perfil de tensão diário de sistemas de potência = A genetic-algorithm-based methodology for improving daily voltage profile of power systems: A genetic-algorithm-based methodology for improving daily voltage profile of power systems.” 2012. Thesis, Universidade Estadual de Campinas. Accessed January 19, 2021.
http://repositorio.unicamp.br/jspui/handle/REPOSIP/261162.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Leone Filho, Marcos de Almeida. “Uma metodologia baseada em algoritmos genéticos para melhorar o perfil de tensão diário de sistemas de potência = A genetic-algorithm-based methodology for improving daily voltage profile of power systems: A genetic-algorithm-based methodology for improving daily voltage profile of power systems.” 2012. Web. 19 Jan 2021.
Vancouver:
Leone Filho MdA. Uma metodologia baseada em algoritmos genéticos para melhorar o perfil de tensão diário de sistemas de potência = A genetic-algorithm-based methodology for improving daily voltage profile of power systems: A genetic-algorithm-based methodology for improving daily voltage profile of power systems. [Internet] [Thesis]. Universidade Estadual de Campinas; 2012. [cited 2021 Jan 19].
Available from: http://repositorio.unicamp.br/jspui/handle/REPOSIP/261162.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Leone Filho MdA. Uma metodologia baseada em algoritmos genéticos para melhorar o perfil de tensão diário de sistemas de potência = A genetic-algorithm-based methodology for improving daily voltage profile of power systems: A genetic-algorithm-based methodology for improving daily voltage profile of power systems. [Thesis]. Universidade Estadual de Campinas; 2012. Available from: http://repositorio.unicamp.br/jspui/handle/REPOSIP/261162
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Halmstad University
16.
Ganjalizadeh, Milad.
Reliability for Hard Real-time Communication in Packet-switched Networks.
Degree: Centre for Research on Embedded Systems (CERES), 2014, Halmstad University
URL: http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-27973
► Nowadays, different companies use Ethernet for different industrial applications. Industrial Ethernet has some specific requirements due to its specific applications and environmental conditions which…
(more)
▼ Nowadays, different companies use Ethernet for different industrial applications. Industrial Ethernet has some specific requirements due to its specific applications and environmental conditions which is the reason that makes it different than corporate LANs. Real-time guarantees, which require precise synchronization between all communication devices, as well as reliability are the keys in performance evaluation of different methods [1]. High bandwidth, high availability, reduced cost, support for open infrastructure as well as deterministic architecture make packet-switched networks suitable for a variety of different industrial distributed hard real-time applications. Although research on guaranteeing timing requirements in packet-switched networks has been done, communication reliability is still an open problem for hard real-time applications. In this thesis report, a framework for enhancing the reliability in multihop packet-switched networks is presented. Moreover, a novel admission control mechanism using a real-time analysis is suggested to provide deadline guarantees for hard real-time traffic. A generic and flexible simulator has been implemented for the purpose of this research study to measure different defined performance metrics. This simulator can also be used for future research due to its flexibility. The performance evaluation of the proposed solution shows a possible enhancement of the message error rate by several orders of magnitude, while the decrease in network utilization stays at a reasonable level.
Subjects/Keywords: Distributed real-time systems; reliability; packet-switched network; hard real-time; industrial control
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APA (6th Edition):
Ganjalizadeh, M. (2014). Reliability for Hard Real-time Communication in Packet-switched Networks. (Thesis). Halmstad University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-27973
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Ganjalizadeh, Milad. “Reliability for Hard Real-time Communication in Packet-switched Networks.” 2014. Thesis, Halmstad University. Accessed January 19, 2021.
http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-27973.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Ganjalizadeh, Milad. “Reliability for Hard Real-time Communication in Packet-switched Networks.” 2014. Web. 19 Jan 2021.
Vancouver:
Ganjalizadeh M. Reliability for Hard Real-time Communication in Packet-switched Networks. [Internet] [Thesis]. Halmstad University; 2014. [cited 2021 Jan 19].
Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-27973.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Ganjalizadeh M. Reliability for Hard Real-time Communication in Packet-switched Networks. [Thesis]. Halmstad University; 2014. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-27973
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of New South Wales
17.
Blackham, Bernard.
Towards verified microkernels for real-time mixed-criticality systems.
Degree: Computer Science & Engineering, 2013, University of New South Wales
URL: http://handle.unsw.edu.au/1959.4/52937
;
https://unsworks.unsw.edu.au/fapi/datastream/unsworks:11615/SOURCE01?view=true
► Today's embedded systems are becoming increasingly complex. We are seeing many devices consolidate both mission-critical real-timesubsystems with convenience functionality such as networking stacks and graphical…
(more)
▼ Today's embedded
systems are becoming increasingly complex. We are seeing many devices consolidate both mission-critical
real-timesubsystems with convenience functionality such as networking stacks and graphical user interfaces. For example, medical implants suchas pacemakers now provide wireless monitoring and control; bugs within the wireless subsystem must not be able to affect the safetycriticalreal-
time operations of the pacemaker. Traditionally, this is achieved by using multiple processors with limited communicationchannels. However, these extra processors add significant overheads of size, weight and power.The mixed-criticality design promises to mitigate these overheads by consolidating multiple subsystems onto a single CPU, but this entailsboth mission-critical and convenience functionality sharing the same processor. In order to enforce isolation between subsystems ofdiffering criticalities, we require a trustworthy supervisor to mediate control over the processor and provide behavioural guarantees.In this thesis, we explore several ingredients required to construct a high-assurance mixed-criticality
real-
time system. We propose thatthe formal verification and design of the seL4 microkernel makes it highly suited as a trustworthy foundation for these
systems. We showhow to compute interrupt response
time guarantees which complement seL4's guarantees of functional correctness. We also explore thedesign space for such microkernels, which must balance the competing goals of formal verification and
real-
time responsiveness. Weinvestigate the limits of interrupt latency for non-preemptible microkernels, and question whether fully-preemptible kernels are necessaryfor low-interrupt latency applications.We show that C can achieve equivalent performance to hand-optimised assembly for performance-critical kernel code, thereby allowingsuch code to be formally verified using C verification frameworks and maintain trustworthiness.We also present a practical framework for applying the capabilities of model checkers and SMT solvers to reason about compiled binaries.This framework can automatically detect infeasible paths and compute loop bounds, increasing the accuracy and the trustworthiness ofresponse
time guarantees.
Advisors/Committee Members: Heiser, Gernot, Computer Science & Engineering, Faculty of Engineering, UNSW.
Subjects/Keywords: Real-time systems; Worst-case execution time; Microkernels; Mixed-criticality systems; Reliable systems
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APA (6th Edition):
Blackham, B. (2013). Towards verified microkernels for real-time mixed-criticality systems. (Doctoral Dissertation). University of New South Wales. Retrieved from http://handle.unsw.edu.au/1959.4/52937 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:11615/SOURCE01?view=true
Chicago Manual of Style (16th Edition):
Blackham, Bernard. “Towards verified microkernels for real-time mixed-criticality systems.” 2013. Doctoral Dissertation, University of New South Wales. Accessed January 19, 2021.
http://handle.unsw.edu.au/1959.4/52937 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:11615/SOURCE01?view=true.
MLA Handbook (7th Edition):
Blackham, Bernard. “Towards verified microkernels for real-time mixed-criticality systems.” 2013. Web. 19 Jan 2021.
Vancouver:
Blackham B. Towards verified microkernels for real-time mixed-criticality systems. [Internet] [Doctoral dissertation]. University of New South Wales; 2013. [cited 2021 Jan 19].
Available from: http://handle.unsw.edu.au/1959.4/52937 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:11615/SOURCE01?view=true.
Council of Science Editors:
Blackham B. Towards verified microkernels for real-time mixed-criticality systems. [Doctoral Dissertation]. University of New South Wales; 2013. Available from: http://handle.unsw.edu.au/1959.4/52937 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:11615/SOURCE01?view=true
University of Waterloo
18.
Thomas, Johnson.
Time-Triggered Program Monitoring.
Degree: 2012, University of Waterloo
URL: http://hdl.handle.net/10012/7004
► Debugging is an important phase in the embedded software development cycle because of its high proportion in the overall cost in the product development. Debugging…
(more)
▼ Debugging is an important phase in the embedded software development cycle because of its high proportion in the overall cost in the product development. Debugging is difficult for real-time applications as such programs are time-sensitive and must meet deadlines in often a resource constrained environment. A common approach for real-time systems is to monitor the execution instead of stepping through the program, because stepping will usually violate all deadline constraints. We consider a time-triggered approach for program monitoring at runtime, resulting in bounded and predictable overhead.
In time-triggered execution monitoring, a monitor runs as a separate process in parallel with an application program and samples the program's state periodically to evaluate a set of properties. Applying this technique in computing systems, results in bounded and predictable overhead. However, the time-triggered approach can have high overhead depending on the granularity of the monitoring effort. To reduce this overhead, we instrument the program with markers that will require to sample less frequently and thus reduce the overhead. This leads to interesting problems of (a) where to place the markers in the code and (b) how to manipulate the markers. While related work investigates the first part, in this work, we investigate the second part. We investigate different instrumentation schemes and propose two new schemes based on bitvectors that significantly reduce the overhead for time-triggered execution monitoring.
Time-triggered execution monitoring suffers from several drawbacks such as; the time-triggered monitor requires certain synchronization features at the operating system level and may suffer from various concurrency and synchronization dependencies in a real-time setting. Furthermore, the time-triggered execution monitoring scheme requires the embedded environment to provide multi-tasking features. To address the aforementioned problems, we propose a new method called time-triggered self-monitoring, where the program under inspection is instrumented, so that it self-samples its state in a periodic fashion without requiring assistance from an external monitor or an internal timer. The experimental results show that a time-triggered self-monitored program performs significantly better in terms of execution time, binary code size, and context switches when compared to the same program monitored by an external time-triggered monitor.
Subjects/Keywords: time-triggered monitoring; self-monitoring; real-time embedded systems; runtime verification
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APA (6th Edition):
Thomas, J. (2012). Time-Triggered Program Monitoring. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/7004
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Thomas, Johnson. “Time-Triggered Program Monitoring.” 2012. Thesis, University of Waterloo. Accessed January 19, 2021.
http://hdl.handle.net/10012/7004.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Thomas, Johnson. “Time-Triggered Program Monitoring.” 2012. Web. 19 Jan 2021.
Vancouver:
Thomas J. Time-Triggered Program Monitoring. [Internet] [Thesis]. University of Waterloo; 2012. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10012/7004.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Thomas J. Time-Triggered Program Monitoring. [Thesis]. University of Waterloo; 2012. Available from: http://hdl.handle.net/10012/7004
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Delft University of Technology
19.
Treijtel, Caspar (author).
Parametric measurement-based WCET estimation for multiprocessor platforms.
Degree: 2020, Delft University of Technology
URL: http://resolver.tudelft.nl/uuid:073e1182-8af3-4deb-91cb-87ba9f3009fa
► Real-time systems are bound to timing constraints. These constraints are meant to ensure that the application exhibits predictable behavior by having bounded response times. The…
(more)
▼ Real-time systems are bound to timing constraints. These constraints are meant to ensure that the application exhibits predictable behavior by having bounded response times. The worst case execution time (WCET) is an important property of programs, which must be bounded to allow for a response time analysis of tasks. While estimation of the WCET is a difficult problem, modern commercial off-the-shelf processors with multiple processor cores make the WCET estimation problem even harder to solve, because of the existence of shared hardware resource contention among co-running tasks. This work proposes a parametric WCET estimation tool, with which configurable and reproducible experiments can be created to investigate the co-runners’ problem for specific task sets. The created tool runs on two hardware platforms, both featuring ARM Cortex quad core processors. Three different benchmarks suites are implemented in the tool, which can be configured to run in arbitrary combinations on the processor cores. These are a set of synthetic benchmarks meant to stress the memory system, a subset of the Mälardalen WCET benchmark suite and a subset of the San Diego vision benchmark suite. The value of the tool is demonstrated through three sets of experiments. With these experiments, the effects of shared hardware resources are investigated in detail. We show that the experienced slowdown is highly dependent on multiple factors. First, a major factor is the sensitivity to the co-runners’ effects of the task itself. Two extremes are investigated, from a task being insensitive to a task being highly sensitive. Another factor is the size of the input data, which is shown to be a major contributor to the experienced slowdown. Finally, we evaluate the delayed execution of co-running tasks, which in some cases has a significant effect on the experienced slowdown. When we consider a task’s slowdown as a function of the delayed execution of its co-runners, the knowledge on this function’s behavior for specific tasks provides an optimization strategy that could be used to mitigate the problem of shared hardware resource contention.
Electrical Engineer | Embedded Systems
Advisors/Committee Members: Nasri, Mitra (mentor), Langendoen, K.G. (graduation committee), Cotofana, S.D. (graduation committee), Delft University of Technology (degree granting institution).
Subjects/Keywords: real-time systems; computer engineering; worst-case execution time
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APA (6th Edition):
Treijtel, C. (. (2020). Parametric measurement-based WCET estimation for multiprocessor platforms. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:073e1182-8af3-4deb-91cb-87ba9f3009fa
Chicago Manual of Style (16th Edition):
Treijtel, Caspar (author). “Parametric measurement-based WCET estimation for multiprocessor platforms.” 2020. Masters Thesis, Delft University of Technology. Accessed January 19, 2021.
http://resolver.tudelft.nl/uuid:073e1182-8af3-4deb-91cb-87ba9f3009fa.
MLA Handbook (7th Edition):
Treijtel, Caspar (author). “Parametric measurement-based WCET estimation for multiprocessor platforms.” 2020. Web. 19 Jan 2021.
Vancouver:
Treijtel C(. Parametric measurement-based WCET estimation for multiprocessor platforms. [Internet] [Masters thesis]. Delft University of Technology; 2020. [cited 2021 Jan 19].
Available from: http://resolver.tudelft.nl/uuid:073e1182-8af3-4deb-91cb-87ba9f3009fa.
Council of Science Editors:
Treijtel C(. Parametric measurement-based WCET estimation for multiprocessor platforms. [Masters Thesis]. Delft University of Technology; 2020. Available from: http://resolver.tudelft.nl/uuid:073e1182-8af3-4deb-91cb-87ba9f3009fa
20.
Borges, Rodrigo Weissmann.
Aplicabilidade de sistemas operacionais de tempo real (RTOS) para sistemas embarcados de baixo custo e pequeno porte.
Degree: Mestrado, Processamento de Sinais de Instrumentação, 2011, University of São Paulo
URL: http://www.teses.usp.br/teses/disponiveis/18/18152/tde-09082011-081631/
;
► Sistemas embarcados ganham cada vez mais espaço devido ao aumento da demanda por novas funções em equipamentos, às normas regulatórias e às novas necessidades dos…
(more)
▼ Sistemas embarcados ganham cada vez mais espaço devido ao aumento da demanda por novas funções em equipamentos, às normas regulatórias e às novas necessidades dos consumidores e do mercado. Esse aumento nos requisitos aumenta o tamanho e a complexidade dos softwares embarcados cuja importância cresce significativamente. Sistemas operacionais de tempo real constituem uma ferramenta poderosa para gerenciar a complexidade, facilitar o reuso e aumentar a portabilidade do software e também reduzir o time-to-market. Este trabalho visa avaliar a aplicabilidade de sistemas operacionais de tempo real em sistemas embarcados de baixo custo que utilizam microprocessadores pequenos (8 e 16 bits), avaliando suas características e propondo as melhores alternativas para desenvolvimento de software embarcado. Para o atendimento desta proposta, foi realizado o levantamento de características sobre o desenvolvimento brasileiro de sistemas embarcados, uma análise das características de sistemas de pequeno porte, uma discussão da viabilidade do uso de RTOS e um estudo de caso comparando arquiteturas de software embarcado. Os resultados principais mostram que arquiteturas simplificadas como a Superloop apresentam vantagem sobre os sistemas operacionais devido ao baixo consumo de memória e processamento. Os sistemas operacionais, apesar de propiciarem desenvolvimentos de códigos modulares bem como facilitar o gerenciamento de tempo, são de difícil implementação em microcontroladores pequenos, devido ao seu elevado consumo de memória e processamento. O uso de sistemas operacionais é viável para sistemas de pequeno porte com no mínimo 4 Kbytes de memória RAM e processos com limite de tempo máximo para execução (deadlines) superiores a 1 ms, condições essas que evitam a sobrecarga do microcontrolador. Neste trabalho também é mostrado um retrato do desenvolvimento de embarcados no Brasil.
Embedded systems, more and more are gaining importance, due to the increase of features requested on equipments, the regulatory standards and the costumers and market requirements. This increment on requirements increases the software size and complexity, which importance significantly grows. Real-time operating systems represents a powerful tool to manage the complexity, help the software reuse and improve portability of the software and also reduce the time-to-market. This work aims to analyze the real-time operating systems, verifying their application on low cost embedded systems using small microcontrollers (8 and 16-bit), evaluating their characteristics and propose the best architectures for software development. To attend this proposal, it was performed a survey of Brazilian embedded system development, evaluates the low cost embedded system characteristics, discusses the viability of RTOS usage and performs a comparative study of embedded software architectures. Results show that simplified architectures like the Superloop presents vantages over the operating systems due to their low memory and processing consumption. The operating system, besides…
Advisors/Committee Members: Rodrigues, Evandro Luís Linhari.
Subjects/Keywords: Embedded systems; Operating systems; Real-time; RTOS; RTOS; Sistemas embarcados; Sistemas operacionais; Tempo-real
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APA ·
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to Zotero / EndNote / Reference
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APA (6th Edition):
Borges, R. W. (2011). Aplicabilidade de sistemas operacionais de tempo real (RTOS) para sistemas embarcados de baixo custo e pequeno porte. (Masters Thesis). University of São Paulo. Retrieved from http://www.teses.usp.br/teses/disponiveis/18/18152/tde-09082011-081631/ ;
Chicago Manual of Style (16th Edition):
Borges, Rodrigo Weissmann. “Aplicabilidade de sistemas operacionais de tempo real (RTOS) para sistemas embarcados de baixo custo e pequeno porte.” 2011. Masters Thesis, University of São Paulo. Accessed January 19, 2021.
http://www.teses.usp.br/teses/disponiveis/18/18152/tde-09082011-081631/ ;.
MLA Handbook (7th Edition):
Borges, Rodrigo Weissmann. “Aplicabilidade de sistemas operacionais de tempo real (RTOS) para sistemas embarcados de baixo custo e pequeno porte.” 2011. Web. 19 Jan 2021.
Vancouver:
Borges RW. Aplicabilidade de sistemas operacionais de tempo real (RTOS) para sistemas embarcados de baixo custo e pequeno porte. [Internet] [Masters thesis]. University of São Paulo; 2011. [cited 2021 Jan 19].
Available from: http://www.teses.usp.br/teses/disponiveis/18/18152/tde-09082011-081631/ ;.
Council of Science Editors:
Borges RW. Aplicabilidade de sistemas operacionais de tempo real (RTOS) para sistemas embarcados de baixo custo e pequeno porte. [Masters Thesis]. University of São Paulo; 2011. Available from: http://www.teses.usp.br/teses/disponiveis/18/18152/tde-09082011-081631/ ;
University of Waterloo
21.
Torres Labrada, Reinier.
Multi-signal Anomaly Detection for Real-Time Embedded Systems.
Degree: 2020, University of Waterloo
URL: http://hdl.handle.net/10012/15929
► This thesis presents MuSADET, an anomaly detection framework targeting timing anomalies found in event traces from real-time embedded systems. The method leverages stationary event generators,…
(more)
▼ This thesis presents MuSADET, an anomaly detection framework targeting timing anomalies found in event traces from real-time embedded systems. The method leverages stationary event generators, signal processing, and distance metrics to classify inter-arrival time sequences as normal/anomalous. Experimental evaluation of traces collected from two real-time embedded systems provides empirical evidence of MuSADET’s anomaly detection performance.
MuSADET is appropriate for embedded systems, where many event generators are intrinsically recurrent and generate stationary sequences of timestamp. To find timinganomalies, MuSADET compares the frequency domain features of an unknown trace to a normal model trained from well-behaved executions of the system. Each signal in the analysis trace receives a normal/anomalous score, which can help engineers isolate the source of the anomaly.
Empirical evidence of anomaly detection performed on traces collected from an industrygrade hexacopter and the Controller Area Network (CAN) bus deployed in a real vehicle demonstrates the feasibility of the proposed method. In all case studies, anomaly detection did not require an anomaly model while achieving high detection rates. For some of the studied scenarios, the true positive detection rate goes above 99 %, with false-positive rates below one %. The visualization of classification scores shows that some timing anomalies can propagate to multiple signals within the system. Comparison to the similar method, Signal Processing for Trace Analysis (SiPTA), indicates that MuSADET is superior in detection performance and provides complementary information that can help link anomalies to the process where they occurred.
Subjects/Keywords: anomaly detection; embedded systems; real-time systems; Embedded computer systems; Anomaly detection (Computer security); Real-time programming
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APA (6th Edition):
Torres Labrada, R. (2020). Multi-signal Anomaly Detection for Real-Time Embedded Systems. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/15929
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Torres Labrada, Reinier. “Multi-signal Anomaly Detection for Real-Time Embedded Systems.” 2020. Thesis, University of Waterloo. Accessed January 19, 2021.
http://hdl.handle.net/10012/15929.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Torres Labrada, Reinier. “Multi-signal Anomaly Detection for Real-Time Embedded Systems.” 2020. Web. 19 Jan 2021.
Vancouver:
Torres Labrada R. Multi-signal Anomaly Detection for Real-Time Embedded Systems. [Internet] [Thesis]. University of Waterloo; 2020. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10012/15929.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Torres Labrada R. Multi-signal Anomaly Detection for Real-Time Embedded Systems. [Thesis]. University of Waterloo; 2020. Available from: http://hdl.handle.net/10012/15929
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Notre Dame
22.
Shengyan Hong.
Real-Time Scheduling in Cyber-Physical
System</h1>.
Degree: Computer Science and Engineering, 2014, University of Notre Dame
URL: https://curate.nd.edu/show/3r074t66c8h
► A Cyber-Physical System (CPS) is a system where physical components and computational components are tightly integrated. Tasks in a CPS generally need to be…
(more)
▼ A Cyber-Physical System (CPS) is a system
where physical components and computational components are tightly
integrated. Tasks in a CPS generally need to be accomplished
correctly in terms of not only functionality but also punctuality.
Real-
time scheduling provides the methodology of determining the
task execution order on a shared resource in order to make as many
tasks in a CPS as possible to meet their deadlines. We addressed
four different challenges in this dissertation, i.e., minimizing
delay variations of
real-
time control tasks in a CPS,
schedulability of jobs in a distributed
real-
time system (DRTS),
tradeoff between energy savings and
real-
time stream deadline
meetings in a wireless sensor network, and minimizing the impact of
network dynamics on a wireless networked control system (WNCS).
For many CPSs, control performance is strongly
dependent on delay variations of the control tasks. Such variations
can come from a number of sources including task preemptions,
variations in task workloads and perturbations in the physical
environment. We designed a general adaptive framework that
incorporates a powerful heuristic aiming to minimize delay
variations. In a DRTS, jobs are often executed
on a number of processors and must complete by their end-to-end
deadlines. Job deadline requirements may be violated if resource
competition among different jobs on a given processor is not
considered. We designed a distributed, locally optimal algorithm to
assign local deadlines to the jobs on each processor to meet as
many jobs? end-to-end deadline requirements as possible in a
distributed soft
real-
time system. Most of the
wireless sensors are powered by batteries with a limited amount of
energy, hence require the transmission to be energy efficient.
Lower transmission rates can greatly reduce transmission energy.
However, if the lowest transmission rate is selected, many messages
can miss their deadlines, which degrades the Quality of Service
(QoS) for CPS applications. We have designed an on-line
transmission rate selection approach to maximize the number of
packets to meet their deadlines with a small increase in the energy
dissipation. A key design challenge in a WNCS is
to design efficient data link layer scheduling algorithms to
achieve deterministic end-to-end
real-
time communication while the
WNCS is disturbed by various physical events. In this work, we
adopted a rhythmic task in adaptive to external disturbances and
designed an effective approach to adjust existing schedule for all
the nodes in the WNCS when the disturbances
happen.
Advisors/Committee Members: Aaron Striegel, Committee Member, Michael Lemmon , Committee Member, Xiaobo Sharon Hu, Committee Chair, Christian Poellabauer, Committee Member.
Subjects/Keywords: Real-time and embedded systems; Mathematical Programming; Optimization; Sequencing and scheduling; Wireless Networked Control Systems; Performance of systems; Real-time distributed
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Manager
APA (6th Edition):
Hong, S. (2014). Real-Time Scheduling in Cyber-Physical
System</h1>. (Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/3r074t66c8h
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Hong, Shengyan. “Real-Time Scheduling in Cyber-Physical
System</h1>.” 2014. Thesis, University of Notre Dame. Accessed January 19, 2021.
https://curate.nd.edu/show/3r074t66c8h.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Hong, Shengyan. “Real-Time Scheduling in Cyber-Physical
System</h1>.” 2014. Web. 19 Jan 2021.
Vancouver:
Hong S. Real-Time Scheduling in Cyber-Physical
System</h1>. [Internet] [Thesis]. University of Notre Dame; 2014. [cited 2021 Jan 19].
Available from: https://curate.nd.edu/show/3r074t66c8h.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Hong S. Real-Time Scheduling in Cyber-Physical
System</h1>. [Thesis]. University of Notre Dame; 2014. Available from: https://curate.nd.edu/show/3r074t66c8h
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
23.
Aroca, Rafael Vidal.
Análise de sistemas operacionais de tempo real para aplicações de robótica e automação.
Degree: Mestrado, Dinâmica das Máquinas e Sistemas, 2008, University of São Paulo
URL: http://www.teses.usp.br/teses/disponiveis/18/18149/tde-09012009-210323/
;
► Este trabalho apresenta um estudo sobre sistemas operacionais de tempo real (RTOS) utilizados na implementação da infraestrutura de controle digital para sistemas mecatrônicos, mas serve…
(more)
▼ Este trabalho apresenta um estudo sobre sistemas operacionais de tempo real (RTOS) utilizados na implementação da infraestrutura de controle digital para sistemas mecatrônicos, mas serve também como referência para outros sistemas que possuam restrições de tempo. Além de ter um caráter experimental, onde foram medidos e analisados dados como o pior tempo de resposta dos sistemas e a latência para tratamento de interrupções, este trabalho de pesquisa ainda contempla a implementação e uso de RTOS em situações práticas, bem como contempla a construção de uma plataforma geral de pesquisa que servirá de base para futuros trabalhos no laboratório de mecatrônica. Os sistemas analisados neste trabalho foram o VxWorks, QNX, Linux, RTAI, Windows XP, Windows CE e \'mü\'C/OS-II. Outro produto gerado durante este trabalho foi um Live CD para auxiliar na implementação e ensino de conceitos e sistemas de tempo real.
This work presents a study about real time operating systems (RTOS) that are utilized as infrastructure to create digital control systems for mechatronics systems, and also for systems that have critical time constraints. Parameters like worst case response time and interrupt latency were measured for each operating system. This research project also covers the implementation and use of RTOS in practical situations. A general research platform for robotics and real time research was also developed and will be used for future works in the Mechatronics Laboratory. The tested systems were VxWorks, QNX, Linux, RTAI, Windows XP, Windows CE and \'mü\'C/OS-II. Another product released during this work was a Live CD to aid the implementation and teaching of real time systems and concepts.
Advisors/Committee Members: Caurin, Glauco Augusto de Paula.
Subjects/Keywords: Interrupt latency; Latência de interrupções; Pior caso de resposta; Real time operating systems; Real time systems; Sistemas de tempo real; Sistemas operacionais de tempo real; Worst case response time
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Manager
APA (6th Edition):
Aroca, R. V. (2008). Análise de sistemas operacionais de tempo real para aplicações de robótica e automação. (Masters Thesis). University of São Paulo. Retrieved from http://www.teses.usp.br/teses/disponiveis/18/18149/tde-09012009-210323/ ;
Chicago Manual of Style (16th Edition):
Aroca, Rafael Vidal. “Análise de sistemas operacionais de tempo real para aplicações de robótica e automação.” 2008. Masters Thesis, University of São Paulo. Accessed January 19, 2021.
http://www.teses.usp.br/teses/disponiveis/18/18149/tde-09012009-210323/ ;.
MLA Handbook (7th Edition):
Aroca, Rafael Vidal. “Análise de sistemas operacionais de tempo real para aplicações de robótica e automação.” 2008. Web. 19 Jan 2021.
Vancouver:
Aroca RV. Análise de sistemas operacionais de tempo real para aplicações de robótica e automação. [Internet] [Masters thesis]. University of São Paulo; 2008. [cited 2021 Jan 19].
Available from: http://www.teses.usp.br/teses/disponiveis/18/18149/tde-09012009-210323/ ;.
Council of Science Editors:
Aroca RV. Análise de sistemas operacionais de tempo real para aplicações de robótica e automação. [Masters Thesis]. University of São Paulo; 2008. Available from: http://www.teses.usp.br/teses/disponiveis/18/18149/tde-09012009-210323/ ;
University of Technology, Sydney
24.
Ashamalla, Amir Nabil Naoum.
A requirement modelling framework for real-time multi-agent systems.
Degree: 2017, University of Technology, Sydney
URL: http://hdl.handle.net/10453/102158
► Real-time constraints are a subset of abstract temporal constraints, which are a class of constraints that are often placed on real world tasks during a…
(more)
▼ Real-time constraints are a subset of abstract temporal constraints, which are a class of constraints that are often placed on real world tasks during a problem-solving activity. Violating temporal constraints can produce consequences of unknown severity. Real-time constraints research is extremely useful in environments that require a high degree of availability and reliability, which are the main characteristics of real-time multi-agent systems (RTMAS). Domains currently using RTMAS include, but are not limited to, rescue systems, scheduling applications, electricity, infrastructure systems, flight control systems, marine systems, automotive systems.
This thesis synthesises a framework to support RTMAS requirements analysis to enhance system design identifying real-time and fault tolerance requirements in the early phase of the software development life cycle. The framework consists of a sufficient set of constraints and an associated process to identify and apply the modelling units. The analysts identify the applicable modelling units during the system analysis phase of the sought RTMAS. A design science approach was applied to construct the framework systematically. The framework was validated incrementally as it was constructed using a call centre case study, a meeting scheduling application and an iPhone scheduling application. These case studies have illustrated that the early identification of the real-time constraints and their even distribution among different agent, significantly reduce the chance of an agent failing. These also enhance the system stability and redundancy by providing an extra level of fault tolerance at the agent and task level, as well as at the overall system level.
Subjects/Keywords: Real-time multi-agent systems (RTMAS); Real-time constraints research.; Real-time and fault tolerance requirements.; Early identification of the real-time constraints.
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APA (6th Edition):
Ashamalla, A. N. N. (2017). A requirement modelling framework for real-time multi-agent systems. (Thesis). University of Technology, Sydney. Retrieved from http://hdl.handle.net/10453/102158
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Ashamalla, Amir Nabil Naoum. “A requirement modelling framework for real-time multi-agent systems.” 2017. Thesis, University of Technology, Sydney. Accessed January 19, 2021.
http://hdl.handle.net/10453/102158.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Ashamalla, Amir Nabil Naoum. “A requirement modelling framework for real-time multi-agent systems.” 2017. Web. 19 Jan 2021.
Vancouver:
Ashamalla ANN. A requirement modelling framework for real-time multi-agent systems. [Internet] [Thesis]. University of Technology, Sydney; 2017. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10453/102158.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Ashamalla ANN. A requirement modelling framework for real-time multi-agent systems. [Thesis]. University of Technology, Sydney; 2017. Available from: http://hdl.handle.net/10453/102158
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of California – Berkeley
25.
Liu, Isaac Suyu.
Precision Timed Machines.
Degree: Electrical Engineering & Computer Sciences, 2012, University of California – Berkeley
URL: http://www.escholarship.org/uc/item/49w8c7t9
► Cyber-Physical Systems (CPS) are integrations of computation with physical processes. These systems must be equipped to handle the inherent concurrency and inexorable passage of time…
(more)
▼ Cyber-Physical Systems (CPS) are integrations of computation with physical processes. These systems must be equipped to handle the inherent concurrency and inexorable passage of time of physical processes. Traditional computing abstractions only concern themselves with the functional aspects of a program, and not its timing properties. Thus, nearly every abstraction layer has failed to incorporate time into its semantics; the passage of time is merely a consequence of the implementation. When the temporal properties of the system must be guaranteed, designers must reach beneath the abstraction layers. This not only increases the design complexity and effort, but the systems are overdesigned, brittle and extremely sensitive to change.In this work, we address the difficulties of handling time in computing systems by re- examining the lower levels of abstraction. In particular, we focus on the instruction set architecture (ISA) layer and its affects on microarchitecture design. The ISA defines the contract between software instructions and hardware implementations. Modern ISAs do not constrain timing properties of instructions as part of the contract. Thus, architecture designs have largely implemented techniques that improve average performance at the expense of execution time variability. This leads to imprecise WCET bounds that limit the timing predictability and timing composability of architectures.In order to address the lack of temporal semantics in the ISA, we propose instruction extensions to the ISA that give temporal meaning to the program. The instruction extensions allow programs to specify execution time properties in software that must be observed for any correct execution of the program. These include the ability to specify a minimum execution time for code blocks, and the ability to detect and handle missed deadlines from code blocks that exhibit variable execution times. This brings control over timing to the software and allows programs to contain timing properties that are independent of the underlying architecture. In addition, we present the Precision Timed ARM (PTARM) architecture, a realization of Precision Timed (PRET) machines that provides timing predictability and composability without sacrificing performance. PTARM employs a predictable thread-interleaved pipeline with an exposed memory hierarchy that uses scratchpads and a predictable DRAM controller. This removes timing interference among the hardware threads, enabling timing composability in the architecture, and provides deterministic execution times for instructions within the architecture, enabling timing predictability in the architecture. We show that the predictable thread-interleaved pipeline and DRAM controller design also achieve better throughput compared to conventional architectures when fully utilized, accomplishing our goal to provide both predictability and performance. To show the applicability of the architecture, we present two applications implementedwith the PRET architecture that utilize the predictable execution time…
Subjects/Keywords: Computer engineering; Computer Architecture; Cyber-Physical Systems; Predictability; Real-time Systems
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APA (6th Edition):
Liu, I. S. (2012). Precision Timed Machines. (Thesis). University of California – Berkeley. Retrieved from http://www.escholarship.org/uc/item/49w8c7t9
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Liu, Isaac Suyu. “Precision Timed Machines.” 2012. Thesis, University of California – Berkeley. Accessed January 19, 2021.
http://www.escholarship.org/uc/item/49w8c7t9.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Liu, Isaac Suyu. “Precision Timed Machines.” 2012. Web. 19 Jan 2021.
Vancouver:
Liu IS. Precision Timed Machines. [Internet] [Thesis]. University of California – Berkeley; 2012. [cited 2021 Jan 19].
Available from: http://www.escholarship.org/uc/item/49w8c7t9.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Liu IS. Precision Timed Machines. [Thesis]. University of California – Berkeley; 2012. Available from: http://www.escholarship.org/uc/item/49w8c7t9
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Rochester Institute of Technology
26.
De Francis, Michael.
Schedulability-driven scratchpad memory swapping for resource-constrained real-time embedded systems.
Degree: Computer Engineering, 2012, Rochester Institute of Technology
URL: https://scholarworks.rit.edu/theses/5473
► In resource-constrained real-time embedded systems, scratchpad memory (SPM) is utilized in place of cache to increase performance and enforce consistent behavior of both hard and…
(more)
▼ In resource-constrained
real-
time embedded
systems, scratchpad memory (SPM) is utilized in place of cache to increase performance and enforce consistent behavior of both hard and soft
real-
time tasks via software-controlled SPM management techniques (SPMMTs).
Real-
time systems depend on
time critical (hard) tasks to complete execution before their deadline times. Many
real-
time systems also depend on the execution of soft tasks that do not have to complete by hard deadlines. This thesis evaluates a new SPMMT that increases both worst-case task slack
time (TST) and soft task processing capabilities, by combining two existing SPMMTs.
The schedulability-driven ACETRB / WCETRB swapping (SDAWS) SPMMT of this thesis uses task schedulability characteristics to control the selection of either the average-case execution
time reduction based (ACETRB) SPMMT or the worst-case execution
time reduction based (WCETRB) SPMMT. While the literature contains examples of combined management techniques, until now there have been none that combine both WCETRB and ACETRB SPMMTs. The advantage of combining them is to achieve WCET reduction comparable to what can be achieved with the WCETRB SPMMT, while achieving significantly reduced ACET relative to the WCETRB SPMMT.
Using a stripped-down RTOS and an SPMMT simulator implemented for this work, evaluated resource-constrained scenarios show a reduction in task slack
time from the SDAWS SPMMT relative to the WCETRB SPMMT between 20% and 45%. However, the evaluated scenarios also conservatively show that SDAWS can reduce ACET relative to the WCETRB SPMMT by up to 60%.
Advisors/Committee Members: Vallino, Jim.
Subjects/Keywords: Embedded systems; Real-time systems; Scratchpad memory; SDAWS; SPM
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APA ·
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CSE |
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APA (6th Edition):
De Francis, M. (2012). Schedulability-driven scratchpad memory swapping for resource-constrained real-time embedded systems. (Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/5473
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
De Francis, Michael. “Schedulability-driven scratchpad memory swapping for resource-constrained real-time embedded systems.” 2012. Thesis, Rochester Institute of Technology. Accessed January 19, 2021.
https://scholarworks.rit.edu/theses/5473.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
De Francis, Michael. “Schedulability-driven scratchpad memory swapping for resource-constrained real-time embedded systems.” 2012. Web. 19 Jan 2021.
Vancouver:
De Francis M. Schedulability-driven scratchpad memory swapping for resource-constrained real-time embedded systems. [Internet] [Thesis]. Rochester Institute of Technology; 2012. [cited 2021 Jan 19].
Available from: https://scholarworks.rit.edu/theses/5473.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
De Francis M. Schedulability-driven scratchpad memory swapping for resource-constrained real-time embedded systems. [Thesis]. Rochester Institute of Technology; 2012. Available from: https://scholarworks.rit.edu/theses/5473
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Ottawa
27.
Gadea, Cristian.
Collaborative Web-Based Mapping of Real-Time Sensor Data
.
Degree: 2011, University of Ottawa
URL: http://hdl.handle.net/10393/19772
► The distribution of real-time GIS (Geographic Information System) data among users is now more important than ever as it becomes increasingly affordable and important for…
(more)
▼ The distribution of real-time GIS (Geographic Information System) data among users is now more important than ever as it becomes increasingly affordable and important for scientific and government agencies to monitor environmental phenomena in real-time. A growing number of sensor networks are being deployed all over the world, but there is a lack of solutions for their effective monitoring. Increasingly, GIS users need access to real-time sensor data from a variety of sources, and the data must be represented in a visually-pleasing way and be easily accessible. In addition, users need to be able to collaborate with each other to share and discuss specific sensor data. The real-time acquisition, analysis, and sharing of sensor data from a large variety of heterogeneous sensor sources is currently difficult due to the lack of a standard architecture to properly represent the dynamic properties of the data and make it readily accessible for collaboration between users. This thesis will present a JEE-based publisher/subscriber architecture that allows real-time sensor data to be displayed collaboratively on the web, requiring users to have nothing more than a web browser and Internet connectivity to gain access to that data. The proposed architecture is evaluated by showing how an AJAX-based and a Flash-based web application are able to represent the real-time sensor data within novel collaborative environments. By using the latest web-based technology and relevant open standards, this thesis shows how map data and GIS data can be made more accessible, more collaborative and generally more useful.
Subjects/Keywords: Real-Time Web Collaboration;
Distributed Systems;
Geographic Information Systems;
Web Collaboration
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Manager
APA (6th Edition):
Gadea, C. (2011). Collaborative Web-Based Mapping of Real-Time Sensor Data
. (Thesis). University of Ottawa. Retrieved from http://hdl.handle.net/10393/19772
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Gadea, Cristian. “Collaborative Web-Based Mapping of Real-Time Sensor Data
.” 2011. Thesis, University of Ottawa. Accessed January 19, 2021.
http://hdl.handle.net/10393/19772.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Gadea, Cristian. “Collaborative Web-Based Mapping of Real-Time Sensor Data
.” 2011. Web. 19 Jan 2021.
Vancouver:
Gadea C. Collaborative Web-Based Mapping of Real-Time Sensor Data
. [Internet] [Thesis]. University of Ottawa; 2011. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10393/19772.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Gadea C. Collaborative Web-Based Mapping of Real-Time Sensor Data
. [Thesis]. University of Ottawa; 2011. Available from: http://hdl.handle.net/10393/19772
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
University of Illinois – Urbana-Champaign
28.
Jayachandran, Praveen.
Delay composition theory: A reduction-based schedulability theory for distributed real-time systems.
Degree: PhD, 0112, 2011, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/18459
► This thesis develops a new reduction-based analysis methodology for studying the worst-case end-to-end delay and schedulability of real-time jobs in distributed systems. The main result…
(more)
▼ This thesis develops a new reduction-based analysis methodology for studying the worst-case end-to-end delay and schedulability of
real-
time jobs in distributed
systems. The main result is a simple delay composition rule, that computes a worst-case bound on the end-to-end delay of a job, given the computation times of all other jobs that execute concurrently with it in the system. This delay composition rule is first derived for pipelined distributed
systems, where all the jobs execute on the same sequence of resources before leaving the system. We then derive the delay composition rule for
systems where the union of task paths forms a Directed Acyclic Graph (DAG), and subsequently generalize the result to non-acyclic task graphs as well, under both preemptive and non-preemptive scheduling. The result makes no assumptions on periodicity and is valid for periodic and aperiodic jobs. It applies to fixed and dynamic priority scheduling, as long as all jobs have the same relative priority on all stages on which they execute. The delay composition result enables a simple reduction of the distributed system to an equivalent hypothetical uniprocessor that can be analyzed using traditional uniprocessor schedulability analysis to infer the schedulability of the distributed system. Thus, the wealth of uniprocessor analysis techniques can now be used to analyze distributed task
systems. Such a reduction significantly reduces the complexity of analysis and ensures that the analysis does not become exceedingly pessimistic with system scale, unlike existing analysis techniques for distributed
systems such as holistic analysis and network calculus. Evaluation using simulations suggest that
the new reduction-based analysis is able to significantly outperform existing analysis
techniques, and the improvement is more pronounced for larger
systems.
We develop an algebra, called delay composition algebra, based on the delay composition results for systematic transformation of distributed
real-
time task
systems into single-resource task
systems such that
schedulability properties of the original system are preserved.
The operands of the algebra represent workloads on composed subsystems, and the operators define ways in which
subsystems can be composed together. By repeatedly applying
the operators on the operands representing resource stages, any distributed system can be
systematically reduced to an equivalent uniprocessor that can be analyzed later to determine end-to-end
delay and schedulability properties of all jobs in the original distributed system.
The above reduction-based schedulability analysis techniques suffer from pessimism that results
from mismatches between uniprocessor analysis assumptions and characteristics of workloads
reduced from distributed
systems, especially for the case of periodic tasks. To address the problem, we introduce
{\em flow-based mode changes\/}, a uniprocessor load model
tuned to the novel constraints of workloads reduced from distributed
system tasks. In this model,…
Advisors/Committee Members: Abdelzaher, Tarek F. (advisor), Abdelzaher, Tarek F. (Committee Chair), Kumar, P. R. (committee member), Sha, Lui R. (committee member), Baruah, Sanjoy (committee member).
Subjects/Keywords: Delay; Schedulability; Distributed Systems; Real-Time Systems; Robustness; Wireless Networks
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APA (6th Edition):
Jayachandran, P. (2011). Delay composition theory: A reduction-based schedulability theory for distributed real-time systems. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/18459
Chicago Manual of Style (16th Edition):
Jayachandran, Praveen. “Delay composition theory: A reduction-based schedulability theory for distributed real-time systems.” 2011. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed January 19, 2021.
http://hdl.handle.net/2142/18459.
MLA Handbook (7th Edition):
Jayachandran, Praveen. “Delay composition theory: A reduction-based schedulability theory for distributed real-time systems.” 2011. Web. 19 Jan 2021.
Vancouver:
Jayachandran P. Delay composition theory: A reduction-based schedulability theory for distributed real-time systems. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2011. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/2142/18459.
Council of Science Editors:
Jayachandran P. Delay composition theory: A reduction-based schedulability theory for distributed real-time systems. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2011. Available from: http://hdl.handle.net/2142/18459
29.
Cruz Davalos, Patricio J.
Real-time control architecture for a multi UAV test bed.
Degree: Electrical and Computer Engineering, 2013, University of New Mexico
URL: http://hdl.handle.net/1928/21995
► The purpose of this thesis is to develop a control architecture running at real-time for a multi unmanned aerial vehicle test bed formed by three…
(more)
▼ The purpose of this thesis is to develop a control architecture running at
real-
time for a multi unmanned aerial vehicle test bed formed by three AscTec Hummingbird mini quadrotors. The reliable and reconfigurable architecture presented here has a FPGA-based embedded system as main controller. Under the implemented control system, different practical applications have been performed in the MARHES Lab at the University of New Mexico as part of its research in cooperative control of mobile aerial agents. This thesis also covers the quadrotor modeling, the design of a position controller, the
real-
time architecture implementation and the experimental flight tests. A hybrid approach combining first-principles with system identification techniques is used for modeling the quadrotor due to the lack of information around the structure of the onboard controller designed by AscTec. The complete quadrotor model structure is formed by a black-box subsystem and a point-mass submodel. Experimental data have been gathered for system identification and black-box submodel validation purposes; while the point-mass submodel is found applying rigid-body dynamics. Using the dynamical model, a position control block based in lead-lag and PI compensators is developed and simulated. Improvements in trajectory tracking performance are achieved estimating the linear velocity of the aerial robot and incorporating velocity lead-lag compensators to the control approach. The velocity of the aerial robot is computed by numerical differentiation of position data. Simulation results to a variety of input signals of the control block in cascade with the complete dynamic model of the quadrotor are included. The control block together with the velocity estimation is fully programmed in the embedded controller. A graphical user interface, GUI, as part of the architecture is designed to display
real-
time data of position and orientation streamed from the motion tracking system as well as to contain useful user controllers. This GUI facilitates that a single operator conducts and oversees all aspects of the different applications where one or multiple quadrotors are used. Experimental tests have helped to tune the control parameters determined by simulation. The performance of the whole architecture has been validated through a variety of practical applications. Autonomous take off, hovering and landing, target surveillance, trajectory tracking and suspended payload transportation are just some of the applications carried out employing the
real-
time control architecture proposed in this thesis.
Advisors/Committee Members: Fierro, Rafael, Oishi, Meeko, Naseri, Asal.
Subjects/Keywords: Drone aircraft – Control systems; Real-time control; Multiagent systems.
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APA (6th Edition):
Cruz Davalos, P. J. (2013). Real-time control architecture for a multi UAV test bed. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/21995
Chicago Manual of Style (16th Edition):
Cruz Davalos, Patricio J. “Real-time control architecture for a multi UAV test bed.” 2013. Masters Thesis, University of New Mexico. Accessed January 19, 2021.
http://hdl.handle.net/1928/21995.
MLA Handbook (7th Edition):
Cruz Davalos, Patricio J. “Real-time control architecture for a multi UAV test bed.” 2013. Web. 19 Jan 2021.
Vancouver:
Cruz Davalos PJ. Real-time control architecture for a multi UAV test bed. [Internet] [Masters thesis]. University of New Mexico; 2013. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/1928/21995.
Council of Science Editors:
Cruz Davalos PJ. Real-time control architecture for a multi UAV test bed. [Masters Thesis]. University of New Mexico; 2013. Available from: http://hdl.handle.net/1928/21995
30.
Faghihekhorasani, Fathiyeh.
Automated Synthesis of Timed and Distributed Fault-Tolerant Systems.
Degree: 2015, University of Waterloo
URL: http://hdl.handle.net/10012/9678
► This dissertation concentrates on the problem of automated synthesis and repair of fault-tolerant systems. In particular, given the required specification of the system, our goal…
(more)
▼ This dissertation concentrates on the problem of automated synthesis and repair of fault-tolerant systems. In particular, given the required specification of the system, our goal is to synthesize a fault-tolerant system, or repair an existing one. We study this problem for two classes of timed and distributed systems.
In the context of timed systems, we focus on efficient synthesis of fault-tolerant timed models from their fault-intolerant version. Although the complexity of the synthesis problem is known to be polynomial time in the size of the time-abstract bisimulation of the input model, the state of the art lacked synthesis
algorithms that can be efficiently implemented. This is in part due to the fact that synthesis is in general a
challenging problem and its complexity is significantly magnified in the context of timed systems. We
propose an algorithm that takes a timed automaton, a set of fault actions, and a set of safety and bounded-time response properties as input, and utilizes a space-efficient symbolic representation of the timed
automaton (called the zone graph) to synthesize a fault-tolerant timed automaton as output. The output
automaton satisfies strict phased recovery, where it is guaranteed that the output model behaves similarly
to the input model in the absence of faults and in the presence of faults, fault recovery is achieved in two
phases, each satisfying certain safety and timing constraints.
In the context of distributed systems, we study the problem of synthesizing fault-tolerant systems from their
intolerant versions, when the number of processes is unknown. To synthesize a distributed fault-tolerant
protocol that works for systems with any number of processes, we use counter abstraction. Using this
abstraction, we deal with a finite-state abstract model to do the synthesis. Applying our proposed algorithm,
we successfully synthesized a fault-tolerant distributed agreement protocol in the presence of Byzantine fault. Although the synthesis problem is known to be NP-complete in the state space of the input
protocol (due to partial observability of processes) in the non-parameterized setting, our parameterized
algorithm manages to synthesize a solution for a complex problem such as Byzantine agreement within less than two minutes.
A system may reach a bad state due to wrong initialization or fault occurrence. One of the well-known
types of distributed fault-tolerant systems are self-stabilizing systems. These are the systems that converge
to their legitimate states starting from any state, and if no fault occurs, stay in legitimate states thereafter.
We propose an automated sound and complete method to synthesize self-stabilizing systems starting from
the desired topology and type of the system. Our proposed method is based on SMT-solving, where the
desired specification of the system is formulated as SMT constraints. We used the Alloy solver to
implement our method, and successfully synthesized some of the well-known self-stabilizing…
Subjects/Keywords: Synthesis; Fault-Tolerance; Distributed Systems; Real-Time Systems; Self-Stabilization
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APA (6th Edition):
Faghihekhorasani, F. (2015). Automated Synthesis of Timed and Distributed Fault-Tolerant Systems. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/9678
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Faghihekhorasani, Fathiyeh. “Automated Synthesis of Timed and Distributed Fault-Tolerant Systems.” 2015. Thesis, University of Waterloo. Accessed January 19, 2021.
http://hdl.handle.net/10012/9678.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Faghihekhorasani, Fathiyeh. “Automated Synthesis of Timed and Distributed Fault-Tolerant Systems.” 2015. Web. 19 Jan 2021.
Vancouver:
Faghihekhorasani F. Automated Synthesis of Timed and Distributed Fault-Tolerant Systems. [Internet] [Thesis]. University of Waterloo; 2015. [cited 2021 Jan 19].
Available from: http://hdl.handle.net/10012/9678.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Faghihekhorasani F. Automated Synthesis of Timed and Distributed Fault-Tolerant Systems. [Thesis]. University of Waterloo; 2015. Available from: http://hdl.handle.net/10012/9678
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
◁ [1] [2] [3] [4] [5] … [29] ▶
. 
Open Access Theses and Dissertations
