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You searched for subject:(RTN). Showing records 1 – 7 of 7 total matches.

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University of Minnesota

1. Jain, Pulkit. Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes.

Degree: PhD, Electrical Engineering, 2012, University of Minnesota

 Rising electric fields and imperfections due to atomic level scaling create non-ideal and stochastic electrodynamics inside a transistor.These appear as reliability mechanisms such as Bias… (more)

Subjects/Keywords: 3D IC; BTI; Reliability; RTN; TDDB; TSV

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jain, P. (2012). Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes. (Doctoral Dissertation). University of Minnesota. Retrieved from http://hdl.handle.net/11299/165683

Chicago Manual of Style (16th Edition):

Jain, Pulkit. “Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes.” 2012. Doctoral Dissertation, University of Minnesota. Accessed September 19, 2020. http://hdl.handle.net/11299/165683.

MLA Handbook (7th Edition):

Jain, Pulkit. “Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes.” 2012. Web. 19 Sep 2020.

Vancouver:

Jain P. Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes. [Internet] [Doctoral dissertation]. University of Minnesota; 2012. [cited 2020 Sep 19]. Available from: http://hdl.handle.net/11299/165683.

Council of Science Editors:

Jain P. Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes. [Doctoral Dissertation]. University of Minnesota; 2012. Available from: http://hdl.handle.net/11299/165683


University of Minnesota

2. Delles, James. Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles.

Degree: PhD, Physics, 2019, University of Minnesota

 There has been much theoretical study attempting to expand upon the Arrhenius law, f=fo exp(U/kT), which describes the switching rate in thermally activated, two-state systems,… (more)

Subjects/Keywords: Arrhenius; Ferromagnetism; Magnetodynamics; Magnetostatics; Mesoscale; RTN

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APA (6th Edition):

Delles, J. (2019). Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles. (Doctoral Dissertation). University of Minnesota. Retrieved from http://hdl.handle.net/11299/206674

Chicago Manual of Style (16th Edition):

Delles, James. “Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles.” 2019. Doctoral Dissertation, University of Minnesota. Accessed September 19, 2020. http://hdl.handle.net/11299/206674.

MLA Handbook (7th Edition):

Delles, James. “Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles.” 2019. Web. 19 Sep 2020.

Vancouver:

Delles J. Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles. [Internet] [Doctoral dissertation]. University of Minnesota; 2019. [cited 2020 Sep 19]. Available from: http://hdl.handle.net/11299/206674.

Council of Science Editors:

Delles J. Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles. [Doctoral Dissertation]. University of Minnesota; 2019. Available from: http://hdl.handle.net/11299/206674

3. Tsiara, Artemisia. Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm.

Degree: Docteur es, Nano electronique et nano technologies, 2019, Université Grenoble Alpes (ComUE)

Dans les technologies CMOS avancées, les défauts microscopiques localisées à l'interface Si (Nit) ou dans l'oxyde de grille (Nox) dégradent les performances des transistors CMOS,… (more)

Subjects/Keywords: Nanofils; Bruit; Piégeages; CMOS avancés; Nanowires; Bti; Rtn; Traps; Advanced CMOS; 620

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tsiara, A. (2019). Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2019GREAT010

Chicago Manual of Style (16th Edition):

Tsiara, Artemisia. “Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm.” 2019. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed September 19, 2020. http://www.theses.fr/2019GREAT010.

MLA Handbook (7th Edition):

Tsiara, Artemisia. “Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm.” 2019. Web. 19 Sep 2020.

Vancouver:

Tsiara A. Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2019. [cited 2020 Sep 19]. Available from: http://www.theses.fr/2019GREAT010.

Council of Science Editors:

Tsiara A. Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2019. Available from: http://www.theses.fr/2019GREAT010

4. Matsumoto, Takashi. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響.

Degree: 博士(情報学), 2015, Kyoto University / 京都大学

新制・課程博士

甲第19137号

情博第583号

Subjects/Keywords: CMOS; NBTI; RTN; combinational circuit; gate oxide; reliability; noise

Page 1 Page 2 Page 3 Page 4

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Matsumoto, T. (2015). Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響. (Thesis). Kyoto University / 京都大学. Retrieved from http://hdl.handle.net/2433/199461 ; http://dx.doi.org/10.14989/doctor.k19137

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Matsumoto, Takashi. “Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響.” 2015. Thesis, Kyoto University / 京都大学. Accessed September 19, 2020. http://hdl.handle.net/2433/199461 ; http://dx.doi.org/10.14989/doctor.k19137.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Matsumoto, Takashi. “Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響.” 2015. Web. 19 Sep 2020.

Vancouver:

Matsumoto T. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響. [Internet] [Thesis]. Kyoto University / 京都大学; 2015. [cited 2020 Sep 19]. Available from: http://hdl.handle.net/2433/199461 ; http://dx.doi.org/10.14989/doctor.k19137.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Matsumoto T. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響. [Thesis]. Kyoto University / 京都大学; 2015. Available from: http://hdl.handle.net/2433/199461 ; http://dx.doi.org/10.14989/doctor.k19137

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


KTH

5. Ait-Ali, Abderrahman. Integration of Production Scheduling and Energy Management : Software Development.

Degree: Optimization and Systems Theory, 2015, KTH

  Demand-Side Management concepts have the potential to positively impact the financial as well as the environmental aspects of energy-intensive industries. More specifically, they allow… (more)

Subjects/Keywords: Pulp and paper production; stainless steel production; scheduling; energy-awareness; energy optimization; RTN; MILP; demand-side management; decomposition methods; prototype implementation.

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ait-Ali, A. (2015). Integration of Production Scheduling and Energy Management : Software Development. (Thesis). KTH. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160136

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ait-Ali, Abderrahman. “Integration of Production Scheduling and Energy Management : Software Development.” 2015. Thesis, KTH. Accessed September 19, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160136.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ait-Ali, Abderrahman. “Integration of Production Scheduling and Energy Management : Software Development.” 2015. Web. 19 Sep 2020.

Vancouver:

Ait-Ali A. Integration of Production Scheduling and Energy Management : Software Development. [Internet] [Thesis]. KTH; 2015. [cited 2020 Sep 19]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160136.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ait-Ali A. Integration of Production Scheduling and Energy Management : Software Development. [Thesis]. KTH; 2015. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160136

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Kyoto University

6. Matsumoto, Takashi. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits .

Degree: 2015, Kyoto University

Subjects/Keywords: CMOS; NBTI; RTN; combinational circuit; gate oxide; reliability; noise

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Matsumoto, T. (2015). Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits . (Thesis). Kyoto University. Retrieved from http://hdl.handle.net/2433/199461

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Matsumoto, Takashi. “Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits .” 2015. Thesis, Kyoto University. Accessed September 19, 2020. http://hdl.handle.net/2433/199461.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Matsumoto, Takashi. “Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits .” 2015. Web. 19 Sep 2020.

Vancouver:

Matsumoto T. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits . [Internet] [Thesis]. Kyoto University; 2015. [cited 2020 Sep 19]. Available from: http://hdl.handle.net/2433/199461.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Matsumoto T. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits . [Thesis]. Kyoto University; 2015. Available from: http://hdl.handle.net/2433/199461

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

7. Silva, Maurício Banaszeski da. A physics-based statistical random telegraph noise model.

Degree: 2016, Universidade do Rio Grande do Sul

Low Frequency Noise (LFN) and Random Telegraph Noise (RTN) are performance limiters in many analog and digital circuits. For small area devices, the noise power… (more)

Subjects/Keywords: Flicker noise; Microeletrônica; Halo implants; Mosfet; Low frequency noise (LFN); MOSFETs; Power spectral density (PSD); Random telegraph noise (RTN); Statistical model; Variability

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Silva, M. B. d. (2016). A physics-based statistical random telegraph noise model. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/150171

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Silva, Maurício Banaszeski da. “A physics-based statistical random telegraph noise model.” 2016. Thesis, Universidade do Rio Grande do Sul. Accessed September 19, 2020. http://hdl.handle.net/10183/150171.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Silva, Maurício Banaszeski da. “A physics-based statistical random telegraph noise model.” 2016. Web. 19 Sep 2020.

Vancouver:

Silva MBd. A physics-based statistical random telegraph noise model. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2016. [cited 2020 Sep 19]. Available from: http://hdl.handle.net/10183/150171.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Silva MBd. A physics-based statistical random telegraph noise model. [Thesis]. Universidade do Rio Grande do Sul; 2016. Available from: http://hdl.handle.net/10183/150171

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

.