Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for subject:(RTN). Showing records 1 – 12 of 12 total matches.

Search Limiters

Last 2 Years | English Only

No search limiters apply to these results.

▼ Search Limiters


University of Minnesota

1. Jain, Pulkit. Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes.

Degree: PhD, Electrical Engineering, 2012, University of Minnesota

 Rising electric fields and imperfections due to atomic level scaling create non-ideal and stochastic electrodynamics inside a transistor.These appear as reliability mechanisms such as Bias… (more)

Subjects/Keywords: 3D IC; BTI; Reliability; RTN; TDDB; TSV

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jain, P. (2012). Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes. (Doctoral Dissertation). University of Minnesota. Retrieved from http://hdl.handle.net/11299/165683

Chicago Manual of Style (16th Edition):

Jain, Pulkit. “Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes.” 2012. Doctoral Dissertation, University of Minnesota. Accessed August 05, 2020. http://hdl.handle.net/11299/165683.

MLA Handbook (7th Edition):

Jain, Pulkit. “Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes.” 2012. Web. 05 Aug 2020.

Vancouver:

Jain P. Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes. [Internet] [Doctoral dissertation]. University of Minnesota; 2012. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/11299/165683.

Council of Science Editors:

Jain P. Methodologies for Statistical Characterization of Circuit Reliability in Advanced Silicon Processes. [Doctoral Dissertation]. University of Minnesota; 2012. Available from: http://hdl.handle.net/11299/165683


University of Minnesota

2. Delles, James. Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles.

Degree: PhD, Physics, 2019, University of Minnesota

 There has been much theoretical study attempting to expand upon the Arrhenius law, f=fo exp(U/kT), which describes the switching rate in thermally activated, two-state systems,… (more)

Subjects/Keywords: Arrhenius; Ferromagnetism; Magnetodynamics; Magnetostatics; Mesoscale; RTN

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Delles, J. (2019). Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles. (Doctoral Dissertation). University of Minnesota. Retrieved from http://hdl.handle.net/11299/206674

Chicago Manual of Style (16th Edition):

Delles, James. “Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles.” 2019. Doctoral Dissertation, University of Minnesota. Accessed August 05, 2020. http://hdl.handle.net/11299/206674.

MLA Handbook (7th Edition):

Delles, James. “Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles.” 2019. Web. 05 Aug 2020.

Vancouver:

Delles J. Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles. [Internet] [Doctoral dissertation]. University of Minnesota; 2019. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/11299/206674.

Council of Science Editors:

Delles J. Non-Equilibrium Two-State Switching in Mesoscale, Ferromagnetic Particles. [Doctoral Dissertation]. University of Minnesota; 2019. Available from: http://hdl.handle.net/11299/206674


Universidade do Rio Grande do Sul

3. Melos, Ricardo Carvalho de. Trapsimulator : um simulador didático de ruído RTN.

Degree: 2018, Universidade do Rio Grande do Sul

TrapSimulator é uma ferramenta didática de simulação de corrente elétrica sob efeito do ruído Random Telegraph Noise, presente nos dispositivos eletrônicos semicondutores, mais precisamente em… (more)

Subjects/Keywords: RTN; Dispositivos eletrônicos; Project-based learning; Simulação elétrica; Ruído; PBL; Cmos; Simulators; TrapSimulator

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Melos, R. C. d. (2018). Trapsimulator : um simulador didático de ruído RTN. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/180145

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Melos, Ricardo Carvalho de. “Trapsimulator : um simulador didático de ruído RTN.” 2018. Thesis, Universidade do Rio Grande do Sul. Accessed August 05, 2020. http://hdl.handle.net/10183/180145.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Melos, Ricardo Carvalho de. “Trapsimulator : um simulador didático de ruído RTN.” 2018. Web. 05 Aug 2020.

Vancouver:

Melos RCd. Trapsimulator : um simulador didático de ruído RTN. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2018. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/10183/180145.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Melos RCd. Trapsimulator : um simulador didático de ruído RTN. [Thesis]. Universidade do Rio Grande do Sul; 2018. Available from: http://hdl.handle.net/10183/180145

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

4. Camargo, Vinícius Valduga de Almeida. Modelagem e simulação de NBTI em circuitos digitais.

Degree: 2012, Universidade do Rio Grande do Sul

A miniaturização dos transistores do tipo MOS traz consigo um aumento na variabilidade de seus parâmetros elétricos, originaria do processo de fabricação e de efeitos… (more)

Subjects/Keywords: Microeletrônica; NBTI; RTS; Circuitos digitais; Modelagem computacional; RTN; Simulação computacional; Circuit simulation; SSTA; Microelectronics

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Camargo, V. V. d. A. (2012). Modelagem e simulação de NBTI em circuitos digitais. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/131896

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Camargo, Vinícius Valduga de Almeida. “Modelagem e simulação de NBTI em circuitos digitais.” 2012. Thesis, Universidade do Rio Grande do Sul. Accessed August 05, 2020. http://hdl.handle.net/10183/131896.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Camargo, Vinícius Valduga de Almeida. “Modelagem e simulação de NBTI em circuitos digitais.” 2012. Web. 05 Aug 2020.

Vancouver:

Camargo VVdA. Modelagem e simulação de NBTI em circuitos digitais. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2012. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/10183/131896.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Camargo VVdA. Modelagem e simulação de NBTI em circuitos digitais. [Thesis]. Universidade do Rio Grande do Sul; 2012. Available from: http://hdl.handle.net/10183/131896

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

5. Tsiara, Artemisia. Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm.

Degree: Docteur es, Nano electronique et nano technologies, 2019, Université Grenoble Alpes (ComUE)

Dans les technologies CMOS avancées, les défauts microscopiques localisées à l'interface Si (Nit) ou dans l'oxyde de grille (Nox) dégradent les performances des transistors CMOS,… (more)

Subjects/Keywords: Nanofils; Bruit; Piégeages; CMOS avancés; Nanowires; Bti; Rtn; Traps; Advanced CMOS; 620

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tsiara, A. (2019). Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2019GREAT010

Chicago Manual of Style (16th Edition):

Tsiara, Artemisia. “Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm.” 2019. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed August 05, 2020. http://www.theses.fr/2019GREAT010.

MLA Handbook (7th Edition):

Tsiara, Artemisia. “Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm.” 2019. Web. 05 Aug 2020.

Vancouver:

Tsiara A. Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2019. [cited 2020 Aug 05]. Available from: http://www.theses.fr/2019GREAT010.

Council of Science Editors:

Tsiara A. Electrical characterization & modeling of the trapping phenomena impacting the reliability of nanowire transistors for sub 10nm nodes : Caractérisations électriques et modélisation des phénomènes de piégeages affectant la fiabilité des technologies CMOS avancées (Nanofils) 10nm. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2019. Available from: http://www.theses.fr/2019GREAT010

6. Matsumoto, Takashi. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響.

Degree: 博士(情報学), 2015, Kyoto University / 京都大学

新制・課程博士

甲第19137号

情博第583号

Subjects/Keywords: CMOS; NBTI; RTN; combinational circuit; gate oxide; reliability; noise

Page 1 Page 2 Page 3 Page 4

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Matsumoto, T. (2015). Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響. (Thesis). Kyoto University / 京都大学. Retrieved from http://hdl.handle.net/2433/199461 ; http://dx.doi.org/10.14989/doctor.k19137

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Matsumoto, Takashi. “Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響.” 2015. Thesis, Kyoto University / 京都大学. Accessed August 05, 2020. http://hdl.handle.net/2433/199461 ; http://dx.doi.org/10.14989/doctor.k19137.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Matsumoto, Takashi. “Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響.” 2015. Web. 05 Aug 2020.

Vancouver:

Matsumoto T. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響. [Internet] [Thesis]. Kyoto University / 京都大学; 2015. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/2433/199461 ; http://dx.doi.org/10.14989/doctor.k19137.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Matsumoto T. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits : バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響. [Thesis]. Kyoto University / 京都大学; 2015. Available from: http://hdl.handle.net/2433/199461 ; http://dx.doi.org/10.14989/doctor.k19137

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Kyoto University / 京都大学

7. 松本, 高士. バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響 : Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits.

Degree: 博士(情報学), 2015, Kyoto University / 京都大学

新制・課程博士

甲第19137号

情博第583号

Subjects/Keywords: CMOS; NBTI; RTN; combinational circuit; gate oxide; reliability; noise

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

松本, . (2015). バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響 : Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits. (Thesis). Kyoto University / 京都大学. Retrieved from http://hdl.handle.net/2433/199558

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

松本, 高士. “バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響 : Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits.” 2015. Thesis, Kyoto University / 京都大学. Accessed August 05, 2020. http://hdl.handle.net/2433/199558.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

松本, 高士. “バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響 : Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits.” 2015. Web. 05 Aug 2020.

Vancouver:

松本 . バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響 : Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits. [Internet] [Thesis]. Kyoto University / 京都大学; 2015. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/2433/199558.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

松本 . バイアス温度不安定性とランダムテレグラフノイズがCMOS論理回路特性に及ぼす影響 : Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits. [Thesis]. Kyoto University / 京都大学; 2015. Available from: http://hdl.handle.net/2433/199558

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Kyoto University

8. Matsumoto, Takashi. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits .

Degree: 2015, Kyoto University

Subjects/Keywords: CMOS; NBTI; RTN; combinational circuit; gate oxide; reliability; noise

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Matsumoto, T. (2015). Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits . (Thesis). Kyoto University. Retrieved from http://hdl.handle.net/2433/199461

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Matsumoto, Takashi. “Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits .” 2015. Thesis, Kyoto University. Accessed August 05, 2020. http://hdl.handle.net/2433/199461.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Matsumoto, Takashi. “Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits .” 2015. Web. 05 Aug 2020.

Vancouver:

Matsumoto T. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits . [Internet] [Thesis]. Kyoto University; 2015. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/2433/199461.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Matsumoto T. Impact of Bias Temperature Instability and Random Telegraph Noise on CMOS Logic Circuits . [Thesis]. Kyoto University; 2015. Available from: http://hdl.handle.net/2433/199461

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


KTH

9. Ait-Ali, Abderrahman. Integration of Production Scheduling and Energy Management : Software Development.

Degree: Optimization and Systems Theory, 2015, KTH

  Demand-Side Management concepts have the potential to positively impact the financial as well as the environmental aspects of energy-intensive industries. More specifically, they allow… (more)

Subjects/Keywords: Pulp and paper production; stainless steel production; scheduling; energy-awareness; energy optimization; RTN; MILP; demand-side management; decomposition methods; prototype implementation.

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ait-Ali, A. (2015). Integration of Production Scheduling and Energy Management : Software Development. (Thesis). KTH. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160136

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ait-Ali, Abderrahman. “Integration of Production Scheduling and Energy Management : Software Development.” 2015. Thesis, KTH. Accessed August 05, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160136.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ait-Ali, Abderrahman. “Integration of Production Scheduling and Energy Management : Software Development.” 2015. Web. 05 Aug 2020.

Vancouver:

Ait-Ali A. Integration of Production Scheduling and Energy Management : Software Development. [Internet] [Thesis]. KTH; 2015. [cited 2020 Aug 05]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160136.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ait-Ali A. Integration of Production Scheduling and Energy Management : Software Development. [Thesis]. KTH; 2015. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160136

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

10. Silva, Maurício Banaszeski da. A physics-based statistical random telegraph noise model.

Degree: 2016, Universidade do Rio Grande do Sul

Low Frequency Noise (LFN) and Random Telegraph Noise (RTN) are performance limiters in many analog and digital circuits. For small area devices, the noise power… (more)

Subjects/Keywords: Flicker noise; Microeletrônica; Halo implants; Mosfet; Low frequency noise (LFN); MOSFETs; Power spectral density (PSD); Random telegraph noise (RTN); Statistical model; Variability

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Silva, M. B. d. (2016). A physics-based statistical random telegraph noise model. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/150171

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Silva, Maurício Banaszeski da. “A physics-based statistical random telegraph noise model.” 2016. Thesis, Universidade do Rio Grande do Sul. Accessed August 05, 2020. http://hdl.handle.net/10183/150171.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Silva, Maurício Banaszeski da. “A physics-based statistical random telegraph noise model.” 2016. Web. 05 Aug 2020.

Vancouver:

Silva MBd. A physics-based statistical random telegraph noise model. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2016. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/10183/150171.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Silva MBd. A physics-based statistical random telegraph noise model. [Thesis]. Universidade do Rio Grande do Sul; 2016. Available from: http://hdl.handle.net/10183/150171

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

11. Gorchichko, Mariia. Total-Ionizing-Dose Effects and Low-Frequency Noise in 30-nm Gate-Length Bulk and SOI FinFETs with SiO2/HfO2 Gate Dielectrics.

Degree: MS, Electrical Engineering, 2019, Vanderbilt University

 Due to the advances in manufacturing and enhanced gate control of the transistor channel, FinFETs are commonly used in highly-scaled ICs. The geometry of the… (more)

Subjects/Keywords: FinFET; silicon-on-insulator (SOI); total ionizing dose (TID); low-frequency noise; random telegraph noise (RTN)

…shown in Fig. II-4. Random telegraph noise (RTN) measurements were performed at room… …random telegraph noise (RTN), as well as Dutta-Horn model application are reported… …between two stable states known as the random-telegraph noise (RTN), indicating the… …significant contributions from RTN (e.g., Fig. IV3) are excluded from these particular… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gorchichko, M. (2019). Total-Ionizing-Dose Effects and Low-Frequency Noise in 30-nm Gate-Length Bulk and SOI FinFETs with SiO2/HfO2 Gate Dielectrics. (Masters Thesis). Vanderbilt University. Retrieved from http://etd.library.vanderbilt.edu/available/etd-11142019-111120/ ;

Chicago Manual of Style (16th Edition):

Gorchichko, Mariia. “Total-Ionizing-Dose Effects and Low-Frequency Noise in 30-nm Gate-Length Bulk and SOI FinFETs with SiO2/HfO2 Gate Dielectrics.” 2019. Masters Thesis, Vanderbilt University. Accessed August 05, 2020. http://etd.library.vanderbilt.edu/available/etd-11142019-111120/ ;.

MLA Handbook (7th Edition):

Gorchichko, Mariia. “Total-Ionizing-Dose Effects and Low-Frequency Noise in 30-nm Gate-Length Bulk and SOI FinFETs with SiO2/HfO2 Gate Dielectrics.” 2019. Web. 05 Aug 2020.

Vancouver:

Gorchichko M. Total-Ionizing-Dose Effects and Low-Frequency Noise in 30-nm Gate-Length Bulk and SOI FinFETs with SiO2/HfO2 Gate Dielectrics. [Internet] [Masters thesis]. Vanderbilt University; 2019. [cited 2020 Aug 05]. Available from: http://etd.library.vanderbilt.edu/available/etd-11142019-111120/ ;.

Council of Science Editors:

Gorchichko M. Total-Ionizing-Dose Effects and Low-Frequency Noise in 30-nm Gate-Length Bulk and SOI FinFETs with SiO2/HfO2 Gate Dielectrics. [Masters Thesis]. Vanderbilt University; 2019. Available from: http://etd.library.vanderbilt.edu/available/etd-11142019-111120/ ;

12. Γρηγορίου, Μιχάλης. Μουσική αντίληψη και δημιουργία: καθολικές σταθερές και πολιτιστικές μεταβλητές.

Degree: 2006, Ionian University; Ιόνιο Πανεπιστήμιο

Subjects/Keywords: Μουσικά νοήματα; Μονιστικά πλαίσια επικοινωνίας; Πλουραλιστικά πλαίσια επικοινωνίας; Συμβολικοί κώδικες; Φορμαλισμός; Αισθητική καινοτομία; Μουσική; Expressive deviations; Recusrcive Transition Networks (RTN); Monopolistic situations; Pluralistic situations; Symbolic codes; Boundary maintenance; Social roles; Ritualization; Agency

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Γρηγορίου, . . (2006). Μουσική αντίληψη και δημιουργία: καθολικές σταθερές και πολιτιστικές μεταβλητές. (Thesis). Ionian University; Ιόνιο Πανεπιστήμιο. Retrieved from http://hdl.handle.net/10442/hedi/14615

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Γρηγορίου, Μιχάλης. “Μουσική αντίληψη και δημιουργία: καθολικές σταθερές και πολιτιστικές μεταβλητές.” 2006. Thesis, Ionian University; Ιόνιο Πανεπιστήμιο. Accessed August 05, 2020. http://hdl.handle.net/10442/hedi/14615.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Γρηγορίου, Μιχάλης. “Μουσική αντίληψη και δημιουργία: καθολικές σταθερές και πολιτιστικές μεταβλητές.” 2006. Web. 05 Aug 2020.

Vancouver:

Γρηγορίου . Μουσική αντίληψη και δημιουργία: καθολικές σταθερές και πολιτιστικές μεταβλητές. [Internet] [Thesis]. Ionian University; Ιόνιο Πανεπιστήμιο; 2006. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/10442/hedi/14615.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Γρηγορίου . Μουσική αντίληψη και δημιουργία: καθολικές σταθερές και πολιτιστικές μεταβλητές. [Thesis]. Ionian University; Ιόνιο Πανεπιστήμιο; 2006. Available from: http://hdl.handle.net/10442/hedi/14615

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

.