Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for subject:(Performance Debugging). Showing records 1 – 14 of 14 total matches.

Search Limiters

Last 2 Years | English Only

No search limiters apply to these results.

▼ Search Limiters


Virginia Tech

1. Khan, Jehandad. Holistic Abstraction for Distributed Network Debugging.

Degree: PhD, Computer Engineering, 2018, Virginia Tech

 Computer networks are engineered for performance and flexibility, delivering billions of packets per second with high reliability, until they fail. It is during such time… (more)

Subjects/Keywords: performance debugging; networks; P4; distributed state

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Khan, J. (2018). Holistic Abstraction for Distributed Network Debugging. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/93500

Chicago Manual of Style (16th Edition):

Khan, Jehandad. “Holistic Abstraction for Distributed Network Debugging.” 2018. Doctoral Dissertation, Virginia Tech. Accessed February 18, 2020. http://hdl.handle.net/10919/93500.

MLA Handbook (7th Edition):

Khan, Jehandad. “Holistic Abstraction for Distributed Network Debugging.” 2018. Web. 18 Feb 2020.

Vancouver:

Khan J. Holistic Abstraction for Distributed Network Debugging. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/10919/93500.

Council of Science Editors:

Khan J. Holistic Abstraction for Distributed Network Debugging. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/93500


University of California – Berkeley

2. Altekar, Gautam Deepak. Replay Debugging for the Datacenter.

Degree: Computer Science, 2011, University of California – Berkeley

Debugging large-scale, data-intensive, distributed applications running in a datacenter ("datacenter applications") is complex and time-consuming. The key obstacle is non-deterministic failures – hard-to-reproduce program misbehaviors that… (more)

Subjects/Keywords: Computer science; bugs; debugging; determinism; deterministic; performance; replay

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Altekar, G. D. (2011). Replay Debugging for the Datacenter. (Thesis). University of California – Berkeley. Retrieved from http://www.escholarship.org/uc/item/68f2f22b

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Altekar, Gautam Deepak. “Replay Debugging for the Datacenter.” 2011. Thesis, University of California – Berkeley. Accessed February 18, 2020. http://www.escholarship.org/uc/item/68f2f22b.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Altekar, Gautam Deepak. “Replay Debugging for the Datacenter.” 2011. Web. 18 Feb 2020.

Vancouver:

Altekar GD. Replay Debugging for the Datacenter. [Internet] [Thesis]. University of California – Berkeley; 2011. [cited 2020 Feb 18]. Available from: http://www.escholarship.org/uc/item/68f2f22b.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Altekar GD. Replay Debugging for the Datacenter. [Thesis]. University of California – Berkeley; 2011. Available from: http://www.escholarship.org/uc/item/68f2f22b

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

3. Heo, Jin. Performance composability: An emerging challenge in performance-adaptive systems.

Degree: PhD, 0112, 2011, University of Illinois – Urbana-Champaign

 The goal of this dissertation is to design, implement, and evaluate design techniques and software support for performance composition and dynamic performance management in large-scale… (more)

Subjects/Keywords: Performance Composition; Adaptive System; Energy Minimization; Data Center; Online Diagnosis; Performance Debugging

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Heo, J. (2011). Performance composability: An emerging challenge in performance-adaptive systems. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/18350

Chicago Manual of Style (16th Edition):

Heo, Jin. “Performance composability: An emerging challenge in performance-adaptive systems.” 2011. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed February 18, 2020. http://hdl.handle.net/2142/18350.

MLA Handbook (7th Edition):

Heo, Jin. “Performance composability: An emerging challenge in performance-adaptive systems.” 2011. Web. 18 Feb 2020.

Vancouver:

Heo J. Performance composability: An emerging challenge in performance-adaptive systems. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2011. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/2142/18350.

Council of Science Editors:

Heo J. Performance composability: An emerging challenge in performance-adaptive systems. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2011. Available from: http://hdl.handle.net/2142/18350


University of California – Berkeley

4. Su, Jimmy Zhigang. Optimizing Irregular Data Accesses for Cluster and Multicore Architectures.

Degree: Computer Science, 2010, University of California – Berkeley

 Applications with irregular accesses to shared state are one of the most challenging computational patterns in parallel computing. Accesses can involve both read or write… (more)

Subjects/Keywords: Computer science; Cluster; Compiler optimization; Multicore; Parallel computing; Performance debugging; Program analysis

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Su, J. Z. (2010). Optimizing Irregular Data Accesses for Cluster and Multicore Architectures. (Thesis). University of California – Berkeley. Retrieved from http://www.escholarship.org/uc/item/3jn6c2f6

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Su, Jimmy Zhigang. “Optimizing Irregular Data Accesses for Cluster and Multicore Architectures.” 2010. Thesis, University of California – Berkeley. Accessed February 18, 2020. http://www.escholarship.org/uc/item/3jn6c2f6.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Su, Jimmy Zhigang. “Optimizing Irregular Data Accesses for Cluster and Multicore Architectures.” 2010. Web. 18 Feb 2020.

Vancouver:

Su JZ. Optimizing Irregular Data Accesses for Cluster and Multicore Architectures. [Internet] [Thesis]. University of California – Berkeley; 2010. [cited 2020 Feb 18]. Available from: http://www.escholarship.org/uc/item/3jn6c2f6.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Su JZ. Optimizing Irregular Data Accesses for Cluster and Multicore Architectures. [Thesis]. University of California – Berkeley; 2010. Available from: http://www.escholarship.org/uc/item/3jn6c2f6

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

5. Saillard, Emmanuelle. Static/Dynamic Analyses for Validation and Improvements of Multi-Model HPC Applications. : Analyse statique/dynamique pour la validation et l'amélioration des applications parallèles multi-modèles.

Degree: Docteur es, Informatique, 2015, Bordeaux

L’utilisation du parallélisme des architectures actuelles dans le domaine du calcul hautes performances, oblige à recourir à différents langages parallèles. Ainsi, l’utilisation conjointe de MPI… (more)

Subjects/Keywords: Calcul haute performance; Débogage; OpenMP; MPI; Analyse statique; High Performance Computing; Debugging; OpenMP; MPI; Static analysis

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Saillard, E. (2015). Static/Dynamic Analyses for Validation and Improvements of Multi-Model HPC Applications. : Analyse statique/dynamique pour la validation et l'amélioration des applications parallèles multi-modèles. (Doctoral Dissertation). Bordeaux. Retrieved from http://www.theses.fr/2015BORD0176

Chicago Manual of Style (16th Edition):

Saillard, Emmanuelle. “Static/Dynamic Analyses for Validation and Improvements of Multi-Model HPC Applications. : Analyse statique/dynamique pour la validation et l'amélioration des applications parallèles multi-modèles.” 2015. Doctoral Dissertation, Bordeaux. Accessed February 18, 2020. http://www.theses.fr/2015BORD0176.

MLA Handbook (7th Edition):

Saillard, Emmanuelle. “Static/Dynamic Analyses for Validation and Improvements of Multi-Model HPC Applications. : Analyse statique/dynamique pour la validation et l'amélioration des applications parallèles multi-modèles.” 2015. Web. 18 Feb 2020.

Vancouver:

Saillard E. Static/Dynamic Analyses for Validation and Improvements of Multi-Model HPC Applications. : Analyse statique/dynamique pour la validation et l'amélioration des applications parallèles multi-modèles. [Internet] [Doctoral dissertation]. Bordeaux; 2015. [cited 2020 Feb 18]. Available from: http://www.theses.fr/2015BORD0176.

Council of Science Editors:

Saillard E. Static/Dynamic Analyses for Validation and Improvements of Multi-Model HPC Applications. : Analyse statique/dynamique pour la validation et l'amélioration des applications parallèles multi-modèles. [Doctoral Dissertation]. Bordeaux; 2015. Available from: http://www.theses.fr/2015BORD0176

6. Ozarde, Sarang Anil. Performance understanding and tuning of iterative computation using profiling techniques.

Degree: MS, Computing, 2010, Georgia Tech

 Most applications spend a significant amount of time in the iterative parts of a computation. They typically iterate over the same set of operations with… (more)

Subjects/Keywords: Performance debugging; Performance analysis; Combinatorial optimization; Algorithms; Heuristic algorithms

…5.1 Choosing and tuning a solver 39 5.2 Performance Debugging 40 6 GPU ARCHITECTURE… …Performance Debugging for WalkSAT 41 Figure 20: Performance Debugging of MiniSAT 42 Figure 21… …Speedup achieved using Performance Debugging for MiniSAT 43 Figure 22: Performance Debugging… …of zChaff 45 viii Figure 23: Speedup achieved using Performance Debugging for zChaff… …point for generating a satisfiable solution. The performance debugging and tuning of SAT… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ozarde, S. A. (2010). Performance understanding and tuning of iterative computation using profiling techniques. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/34757

Chicago Manual of Style (16th Edition):

Ozarde, Sarang Anil. “Performance understanding and tuning of iterative computation using profiling techniques.” 2010. Masters Thesis, Georgia Tech. Accessed February 18, 2020. http://hdl.handle.net/1853/34757.

MLA Handbook (7th Edition):

Ozarde, Sarang Anil. “Performance understanding and tuning of iterative computation using profiling techniques.” 2010. Web. 18 Feb 2020.

Vancouver:

Ozarde SA. Performance understanding and tuning of iterative computation using profiling techniques. [Internet] [Masters thesis]. Georgia Tech; 2010. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/1853/34757.

Council of Science Editors:

Ozarde SA. Performance understanding and tuning of iterative computation using profiling techniques. [Masters Thesis]. Georgia Tech; 2010. Available from: http://hdl.handle.net/1853/34757


Texas A&M University

7. Rajagopalan, Arun Krishnakumar. Fast and Precise On-The-Fly Data Race Detection.

Degree: MS, Computer Science, 2016, Texas A&M University

 While concurrent programming is quickly gaining popularity lately, developing bug-free programs is still challenging. Although developers have a wide choice of race detection tools available,… (more)

Subjects/Keywords: bug detection; concurrency; debugging; dynamic analysis; parallelism; performance analysis; runtime monitoring; software engineering; redundancy; data race; missing events; precise detection; happens-before; maximal thread causality

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rajagopalan, A. K. (2016). Fast and Precise On-The-Fly Data Race Detection. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/157131

Chicago Manual of Style (16th Edition):

Rajagopalan, Arun Krishnakumar. “Fast and Precise On-The-Fly Data Race Detection.” 2016. Masters Thesis, Texas A&M University. Accessed February 18, 2020. http://hdl.handle.net/1969.1/157131.

MLA Handbook (7th Edition):

Rajagopalan, Arun Krishnakumar. “Fast and Precise On-The-Fly Data Race Detection.” 2016. Web. 18 Feb 2020.

Vancouver:

Rajagopalan AK. Fast and Precise On-The-Fly Data Race Detection. [Internet] [Masters thesis]. Texas A&M University; 2016. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/1969.1/157131.

Council of Science Editors:

Rajagopalan AK. Fast and Precise On-The-Fly Data Race Detection. [Masters Thesis]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/157131

8. ABHIJEET BANERJEE. STATIC ANALYSIS DRIVEN TESTING OF PEFORMANCE AND ENERGY-CONSUMPTION PROPERTIES OF SOFTWARE.

Degree: 2016, National University of Singapore

Subjects/Keywords: software engineering; non-functional testing; performance; energy efficiency; re-factoring; debugging

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

BANERJEE, A. (2016). STATIC ANALYSIS DRIVEN TESTING OF PEFORMANCE AND ENERGY-CONSUMPTION PROPERTIES OF SOFTWARE. (Thesis). National University of Singapore. Retrieved from http://scholarbank.nus.edu.sg/handle/10635/143311

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

BANERJEE, ABHIJEET. “STATIC ANALYSIS DRIVEN TESTING OF PEFORMANCE AND ENERGY-CONSUMPTION PROPERTIES OF SOFTWARE.” 2016. Thesis, National University of Singapore. Accessed February 18, 2020. http://scholarbank.nus.edu.sg/handle/10635/143311.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

BANERJEE, ABHIJEET. “STATIC ANALYSIS DRIVEN TESTING OF PEFORMANCE AND ENERGY-CONSUMPTION PROPERTIES OF SOFTWARE.” 2016. Web. 18 Feb 2020.

Vancouver:

BANERJEE A. STATIC ANALYSIS DRIVEN TESTING OF PEFORMANCE AND ENERGY-CONSUMPTION PROPERTIES OF SOFTWARE. [Internet] [Thesis]. National University of Singapore; 2016. [cited 2020 Feb 18]. Available from: http://scholarbank.nus.edu.sg/handle/10635/143311.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

BANERJEE A. STATIC ANALYSIS DRIVEN TESTING OF PEFORMANCE AND ENERGY-CONSUMPTION PROPERTIES OF SOFTWARE. [Thesis]. National University of Singapore; 2016. Available from: http://scholarbank.nus.edu.sg/handle/10635/143311

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

9. Brugnara, Telmo. Nprof : uma ferramenta para monitoramento de aplicações distribuídas.

Degree: 2006, Universidade do Rio Grande do Sul

A crescente complexidade dos programas de computador e o crescimento da carga de trabalho a qual eles são submetidos têm sido tendências recorrentes nos sistemas… (more)

Subjects/Keywords: Monitor; Ensino : Programacao; Profiler; Java (Linguagem de programação); Performance; Debugging; Java; Distributed computing; Messages; Socket

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Brugnara, T. (2006). Nprof : uma ferramenta para monitoramento de aplicações distribuídas. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/13650

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Brugnara, Telmo. “Nprof : uma ferramenta para monitoramento de aplicações distribuídas.” 2006. Thesis, Universidade do Rio Grande do Sul. Accessed February 18, 2020. http://hdl.handle.net/10183/13650.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Brugnara, Telmo. “Nprof : uma ferramenta para monitoramento de aplicações distribuídas.” 2006. Web. 18 Feb 2020.

Vancouver:

Brugnara T. Nprof : uma ferramenta para monitoramento de aplicações distribuídas. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2006. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/10183/13650.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Brugnara T. Nprof : uma ferramenta para monitoramento de aplicações distribuídas. [Thesis]. Universidade do Rio Grande do Sul; 2006. Available from: http://hdl.handle.net/10183/13650

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Bao, Tianyi. Visualization Tool for Debugging Pilot Cluster Programs .

Degree: 2017, University of Guelph

 This thesis presents the adaptation and integration of MPI Parallel Environment (MPE) as a logfile producing library and Jumpshot-4 as a visualization tool to support… (more)

Subjects/Keywords: high-performance computing; log visualization; Pilot library; MPI; MPE; Jumpshot; parallel programming; debugging; message-passing programming; cluster programming

…and developing debugging or any other beneficial facilities to improve the performance of… …requirement of the tool should be more concentrated on debugging than performance profiling. 3… …Chapter 1 Introduction 1.1 Motivation High-performance computing (HPC) has been… …timing and synchronization errors. 1 Besides the former two reasons, traditional debugging… …systems and shared-memory systems. Aiming for high performance, portability, and scalability… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Bao, T. (2017). Visualization Tool for Debugging Pilot Cluster Programs . (Thesis). University of Guelph. Retrieved from https://atrium.lib.uoguelph.ca/xmlui/handle/10214/10193

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Bao, Tianyi. “Visualization Tool for Debugging Pilot Cluster Programs .” 2017. Thesis, University of Guelph. Accessed February 18, 2020. https://atrium.lib.uoguelph.ca/xmlui/handle/10214/10193.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Bao, Tianyi. “Visualization Tool for Debugging Pilot Cluster Programs .” 2017. Web. 18 Feb 2020.

Vancouver:

Bao T. Visualization Tool for Debugging Pilot Cluster Programs . [Internet] [Thesis]. University of Guelph; 2017. [cited 2020 Feb 18]. Available from: https://atrium.lib.uoguelph.ca/xmlui/handle/10214/10193.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Bao T. Visualization Tool for Debugging Pilot Cluster Programs . [Thesis]. University of Guelph; 2017. Available from: https://atrium.lib.uoguelph.ca/xmlui/handle/10214/10193

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

11. Wang, Chengwei. Monitoring and analysis system for performance troubleshooting in data centers.

Degree: PhD, Computer Science, 2013, Georgia Tech

 It was not long ago. On Christmas Eve 2012, a war of troubleshooting began in Amazon data centers. It started at 12:24 PM, with an… (more)

Subjects/Keywords: Monitoring; Analysis; Performance; Troubleshooting; Data center; Debugging in computer science; Computer networks Security measures.; Cloud computing; Reliability (Engineering); Systems availability

…114 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . 117 5.5.1… …118 5.5.3 Graph Construction Performance 5.5.4 Graph Analysis Performance… …Change of performance ranking at different scales . . . . . . . . . . . 38 15 TTI of… …analysis application. . . . . . . . . . . . . 44 19 E2E performance slowdown caused by debug… …62 27 Analytics Microbenchmark Performance . . . . . . . . . . . . . . . . 63 xi 28… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, C. (2013). Monitoring and analysis system for performance troubleshooting in data centers. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/50411

Chicago Manual of Style (16th Edition):

Wang, Chengwei. “Monitoring and analysis system for performance troubleshooting in data centers.” 2013. Doctoral Dissertation, Georgia Tech. Accessed February 18, 2020. http://hdl.handle.net/1853/50411.

MLA Handbook (7th Edition):

Wang, Chengwei. “Monitoring and analysis system for performance troubleshooting in data centers.” 2013. Web. 18 Feb 2020.

Vancouver:

Wang C. Monitoring and analysis system for performance troubleshooting in data centers. [Internet] [Doctoral dissertation]. Georgia Tech; 2013. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/1853/50411.

Council of Science Editors:

Wang C. Monitoring and analysis system for performance troubleshooting in data centers. [Doctoral Dissertation]. Georgia Tech; 2013. Available from: http://hdl.handle.net/1853/50411

12. Oh, Jungju. Efficient hardware and software assist for many-core performance.

Degree: PhD, Computer Science, 2013, Georgia Tech

 In recent years, the number of available cores in a processor are increasing rapidly while the pace of performance improvement of an individual core has… (more)

Subjects/Keywords: Many-core; Performance debugging; Load imbalance; Hardware barrier; Transmission line; Hybrid interconnection; Parallel processing (Electronic computers); Multiprocessors; Memory management (Computer science)

…Because load imbalance is a major issue in debugging the performance of parallel programs, and… …Performance debugging has long been studied in distributed systems. Much work focuses on finding the… …different domain. One notable study is the performance debugging method proposed by Aguilera et al… …6.5 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . 104 6.5.1… …heterogeneous cores due to the performance difference… 

Page 1 Page 2 Page 3 Page 4 Page 5 Page 6 Page 7

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Oh, J. (2013). Efficient hardware and software assist for many-core performance. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/50219

Chicago Manual of Style (16th Edition):

Oh, Jungju. “Efficient hardware and software assist for many-core performance.” 2013. Doctoral Dissertation, Georgia Tech. Accessed February 18, 2020. http://hdl.handle.net/1853/50219.

MLA Handbook (7th Edition):

Oh, Jungju. “Efficient hardware and software assist for many-core performance.” 2013. Web. 18 Feb 2020.

Vancouver:

Oh J. Efficient hardware and software assist for many-core performance. [Internet] [Doctoral dissertation]. Georgia Tech; 2013. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/1853/50219.

Council of Science Editors:

Oh J. Efficient hardware and software assist for many-core performance. [Doctoral Dissertation]. Georgia Tech; 2013. Available from: http://hdl.handle.net/1853/50219


ETH Zürich

13. Kohler, Manuel Christoph. Soft Error Resilient Time Stepping Schemes on Regular Grids.

Degree: 2016, ETH Zürich

Subjects/Keywords: TESTEN + FEHLERSUCHEN (SOFTWARE ENGINEERING); PARALLELVERARBEITUNG + NEBENLÄUFIGKEIT (BETRIEBSSYSTEME); STOCHASTISCHE APPROXIMATION + MONTE-CARLO-METHODEN (STOCHASTIK); VERTEILTE ANWENDUNGEN + CLOUD COMPUTING + GRID COMPUTING (COMPUTERSYSTEME); HOCHLEISTUNGSCOMPUTER + SUPERCOMPUTER (COMPUTERSYSTEME); TESTING + DEBUGGING (SOFTWARE ENGINEERING); PARALLEL PROCESSING + CONCURRENCY (OPERATING SYSTEMS); STOCHASTIC APPROXIMATION + MONTE CARLO METHODS (STOCHASTICS); DISTRIBUTED APPLICATIONS + CLOUD COMPUTING + GRID COMPUTING (COMPUTER SYSTEMS); HIGH-PERFORMANCE COMPUTERS + SUPERCOMPUTERS (COMPUTER SYSTEMS); info:eu-repo/classification/ddc/004; info:eu-repo/classification/ddc/004; Data processing, computer science; Data processing, computer science

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kohler, M. C. (2016). Soft Error Resilient Time Stepping Schemes on Regular Grids. (Thesis). ETH Zürich. Retrieved from http://hdl.handle.net/20.500.11850/155418

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kohler, Manuel Christoph. “Soft Error Resilient Time Stepping Schemes on Regular Grids.” 2016. Thesis, ETH Zürich. Accessed February 18, 2020. http://hdl.handle.net/20.500.11850/155418.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kohler, Manuel Christoph. “Soft Error Resilient Time Stepping Schemes on Regular Grids.” 2016. Web. 18 Feb 2020.

Vancouver:

Kohler MC. Soft Error Resilient Time Stepping Schemes on Regular Grids. [Internet] [Thesis]. ETH Zürich; 2016. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/20.500.11850/155418.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kohler MC. Soft Error Resilient Time Stepping Schemes on Regular Grids. [Thesis]. ETH Zürich; 2016. Available from: http://hdl.handle.net/20.500.11850/155418

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

14. Campbell, Keith A. Robust and reliable hardware accelerator design through high-level synthesis.

Degree: PhD, Electrical & Computer Engr, 2017, University of Illinois – Urbana-Champaign

 System-on-chip design is becoming increasingly complex as technology scaling enables more and more functionality on a chip. This scaling-driven complexity has resulted in a variety… (more)

Subjects/Keywords: High-level synthesis (HLS); Automation; Error detection; Scheduling; Binding; Compiler transformation; Compiler optimization; Pipelining; Modulo arithmetic; Modulo-3; Logic optimization; State machine; Datapath; Control logic; Shadow datapath; Modulo datapath; Low cost; High performance; Electrical bug; Aliasing; Stuck-at fault; Soft error; Timing error; Checkpointing; Rollback; Recovery; Pre-silicon validation; Post-silicon validation; Pre-silicon debug; Post-silicon debug; Accelerator; System on a chip; Signature generation; Execution signature; Execution hash; Logic bug; Nondeterministic bug; Masked error; Circuit reliability; Hot spot; Wear out; Silent data corruption; Observability; Detection latency; Mixed datapath; Diversity; Checkpoint corruption; Error injection; Error removal; Quick Error Detection (QED); Hybrid Quick Error Detection (H-QED); Instrumentation; Hybrid co-simulation; Hardware/software; Integration testing; Hybrid tracing; Hybrid hashing; Source-code localization; Software debugging tool; Valgrind; Clang sanitizer; Clang static analyzer; Cppcheck; Root cause analysis; Execution tracing; Realtime error detection; Simulation trigger; Nonintrusive; Address conversion; Undefined behavior; High-level synthesis (HLS) bug; Detection coverage; Gate-level architecture; Mersenne modulus; Full adder; Half adder; Quarter adder; Wraparound; Modulo reducer; Modulo adder; Modulo multiplier; Modulo comparator; Cross-layer; Algorithm; Instruction; Architecture; Logic synthesis; Physical design; Algorithm-based fault tolerance (ABFT); Error detection by duplicated instructions (EDDI); Parity; Flip-flop hardening; Layout design through error-aware transistor positioning dual interlocked storage cell (LEAP-DICE); Cost-effective; Place-and-route; Field programmable gate array (FPGA) emulation; Application specific integrated circuit (ASIC); Field programmable gate array (FPGA); Energy; Area; Latency

Debugging . . . . . . . . . . 5.2 Hybrid Tracing Framework . . . . . . . . . . . . . . . 5.3… …solution is inadequate for power consumption and/or performance reasons. Thus problems that… …require a hardware solution already come with demanding power and performance constraints. With… …the end of Dennard scaling, improvements in power consumption and performance for… …Furthermore, through the use of debugging metadata, we show that this technique can pinpoint the… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Campbell, K. A. (2017). Robust and reliable hardware accelerator design through high-level synthesis. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/99294

Chicago Manual of Style (16th Edition):

Campbell, Keith A. “Robust and reliable hardware accelerator design through high-level synthesis.” 2017. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed February 18, 2020. http://hdl.handle.net/2142/99294.

MLA Handbook (7th Edition):

Campbell, Keith A. “Robust and reliable hardware accelerator design through high-level synthesis.” 2017. Web. 18 Feb 2020.

Vancouver:

Campbell KA. Robust and reliable hardware accelerator design through high-level synthesis. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2017. [cited 2020 Feb 18]. Available from: http://hdl.handle.net/2142/99294.

Council of Science Editors:

Campbell KA. Robust and reliable hardware accelerator design through high-level synthesis. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2017. Available from: http://hdl.handle.net/2142/99294

.