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You searched for subject:(Parallel processing Electronic computers ). Showing records 1 – 30 of 50480 total matches.

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Hong Kong University of Science and Technology

1. Fang, Wenbin. Mars : accelerating MapReduce with graphics processors.

Degree: 2010, Hong Kong University of Science and Technology

 We design and implement Mars, a MapReduce runtime system accelerated with graphics processing units (GPUs). MapReduce is a simple and flexible parallel programming paradigm originally… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Fang, W. (2010). Mars : accelerating MapReduce with graphics processors. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1106617 ; http://repository.ust.hk/ir/bitstream/1783.1-6755/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Fang, Wenbin. “Mars : accelerating MapReduce with graphics processors.” 2010. Thesis, Hong Kong University of Science and Technology. Accessed September 21, 2019. https://doi.org/10.14711/thesis-b1106617 ; http://repository.ust.hk/ir/bitstream/1783.1-6755/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Fang, Wenbin. “Mars : accelerating MapReduce with graphics processors.” 2010. Web. 21 Sep 2019.

Vancouver:

Fang W. Mars : accelerating MapReduce with graphics processors. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2010. [cited 2019 Sep 21]. Available from: https://doi.org/10.14711/thesis-b1106617 ; http://repository.ust.hk/ir/bitstream/1783.1-6755/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Fang W. Mars : accelerating MapReduce with graphics processors. [Thesis]. Hong Kong University of Science and Technology; 2010. Available from: https://doi.org/10.14711/thesis-b1106617 ; http://repository.ust.hk/ir/bitstream/1783.1-6755/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Ryerson University

2. Guo, Xixiong. Immersed boundary (IB) - Lattice Boltzmann Method (LBM) coupled with Adaptive MESH Refinement (AMR) techniques for simulation of Incompressible Viscous Flow.

Degree: 2014, Ryerson University

 This study is aimed at developing a novel computational framework that seamlessly incorporates the feedback forcing model and adaptive mesh refinement mesh refinement (AMR) techniques… (more)

Subjects/Keywords: Parallel processing (Electronic computers); Parallel computers; Time-domain analysis

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APA (6th Edition):

Guo, X. (2014). Immersed boundary (IB) - Lattice Boltzmann Method (LBM) coupled with Adaptive MESH Refinement (AMR) techniques for simulation of Incompressible Viscous Flow. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A3380

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Guo, Xixiong. “Immersed boundary (IB) - Lattice Boltzmann Method (LBM) coupled with Adaptive MESH Refinement (AMR) techniques for simulation of Incompressible Viscous Flow.” 2014. Thesis, Ryerson University. Accessed September 21, 2019. https://digital.library.ryerson.ca/islandora/object/RULA%3A3380.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Guo, Xixiong. “Immersed boundary (IB) - Lattice Boltzmann Method (LBM) coupled with Adaptive MESH Refinement (AMR) techniques for simulation of Incompressible Viscous Flow.” 2014. Web. 21 Sep 2019.

Vancouver:

Guo X. Immersed boundary (IB) - Lattice Boltzmann Method (LBM) coupled with Adaptive MESH Refinement (AMR) techniques for simulation of Incompressible Viscous Flow. [Internet] [Thesis]. Ryerson University; 2014. [cited 2019 Sep 21]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A3380.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Guo X. Immersed boundary (IB) - Lattice Boltzmann Method (LBM) coupled with Adaptive MESH Refinement (AMR) techniques for simulation of Incompressible Viscous Flow. [Thesis]. Ryerson University; 2014. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A3380

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Victoria

3. Gardner, William Bennett. CSP++ : an object-oriented application framework for software synthesis from CSP specifications.

Degree: Department of Computer Science, 2018, University of Victoria

 One of the useful formalisms for designing concurrent systems is the process algebra called CSP, or Communicating Sequential Processes. CSP statements can be used to… (more)

Subjects/Keywords: Computer programming; Parallel processing (Electronic computers)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gardner, W. B. (2018). CSP++ : an object-oriented application framework for software synthesis from CSP specifications. (Thesis). University of Victoria. Retrieved from https://dspace.library.uvic.ca//handle/1828/9350

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gardner, William Bennett. “CSP++ : an object-oriented application framework for software synthesis from CSP specifications.” 2018. Thesis, University of Victoria. Accessed September 21, 2019. https://dspace.library.uvic.ca//handle/1828/9350.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gardner, William Bennett. “CSP++ : an object-oriented application framework for software synthesis from CSP specifications.” 2018. Web. 21 Sep 2019.

Vancouver:

Gardner WB. CSP++ : an object-oriented application framework for software synthesis from CSP specifications. [Internet] [Thesis]. University of Victoria; 2018. [cited 2019 Sep 21]. Available from: https://dspace.library.uvic.ca//handle/1828/9350.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gardner WB. CSP++ : an object-oriented application framework for software synthesis from CSP specifications. [Thesis]. University of Victoria; 2018. Available from: https://dspace.library.uvic.ca//handle/1828/9350

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Oklahoma

4. Sawalha, Lina Hakam. Exploiting Heterogeneous Multicore Processors Through Fine-Grained Scheduling and Low-Overhead Thread Migration.

Degree: PhD, 2012, University of Oklahoma

 Exploiting differences between relatively short duration phases using the presented scheduling techniques results in frequent thread migrations that can harm performance. Operating system (OS) context… (more)

Subjects/Keywords: Multiprocessors; Parallel processing (Electronic computers); Computer architecture

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APA (6th Edition):

Sawalha, L. H. (2012). Exploiting Heterogeneous Multicore Processors Through Fine-Grained Scheduling and Low-Overhead Thread Migration. (Doctoral Dissertation). University of Oklahoma. Retrieved from http://hdl.handle.net/11244/318794

Chicago Manual of Style (16th Edition):

Sawalha, Lina Hakam. “Exploiting Heterogeneous Multicore Processors Through Fine-Grained Scheduling and Low-Overhead Thread Migration.” 2012. Doctoral Dissertation, University of Oklahoma. Accessed September 21, 2019. http://hdl.handle.net/11244/318794.

MLA Handbook (7th Edition):

Sawalha, Lina Hakam. “Exploiting Heterogeneous Multicore Processors Through Fine-Grained Scheduling and Low-Overhead Thread Migration.” 2012. Web. 21 Sep 2019.

Vancouver:

Sawalha LH. Exploiting Heterogeneous Multicore Processors Through Fine-Grained Scheduling and Low-Overhead Thread Migration. [Internet] [Doctoral dissertation]. University of Oklahoma; 2012. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/11244/318794.

Council of Science Editors:

Sawalha LH. Exploiting Heterogeneous Multicore Processors Through Fine-Grained Scheduling and Low-Overhead Thread Migration. [Doctoral Dissertation]. University of Oklahoma; 2012. Available from: http://hdl.handle.net/11244/318794


Northeastern University

5. Sun, Enqiang. Cross-platform heterogeneous runtime environment.

Degree: PhD, Department of Electrical and Computer Engineering, 2016, Northeastern University

 Heterogeneous platforms are becoming widely adopted thanks for the support from new languages and programming models. Among these languages/models, OpenCL is an industry standard for… (more)

Subjects/Keywords: parallel computing; runtime; Heterogeneous computing; Parallel programming (Computer science); Parallel processing (Electronic computers); Parallel computers; Electronic data processing; Distributed processing

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APA (6th Edition):

Sun, E. (2016). Cross-platform heterogeneous runtime environment. (Doctoral Dissertation). Northeastern University. Retrieved from http://hdl.handle.net/2047/D20213163

Chicago Manual of Style (16th Edition):

Sun, Enqiang. “Cross-platform heterogeneous runtime environment.” 2016. Doctoral Dissertation, Northeastern University. Accessed September 21, 2019. http://hdl.handle.net/2047/D20213163.

MLA Handbook (7th Edition):

Sun, Enqiang. “Cross-platform heterogeneous runtime environment.” 2016. Web. 21 Sep 2019.

Vancouver:

Sun E. Cross-platform heterogeneous runtime environment. [Internet] [Doctoral dissertation]. Northeastern University; 2016. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/2047/D20213163.

Council of Science Editors:

Sun E. Cross-platform heterogeneous runtime environment. [Doctoral Dissertation]. Northeastern University; 2016. Available from: http://hdl.handle.net/2047/D20213163


Ryerson University

6. Nekouei, Hesamaldin. Acceleration of Hessenberg reduction for nonsymmetric matrix.:.

Degree: 2013, Ryerson University

 The worth of finding a general solution for nonsymmetric eigenvalue problems is specified in many areas of engineering and science computations, such as reducing noise… (more)

Subjects/Keywords: Eigenvalues.; Eigenvalues. – -; Matrices.; Matrices. – -; Parallel processing (Electronic computers); Parallel processing (Electronic computers) – -

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Nekouei, H. (2013). Acceleration of Hessenberg reduction for nonsymmetric matrix.:. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A2720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Nekouei, Hesamaldin. “Acceleration of Hessenberg reduction for nonsymmetric matrix.:.” 2013. Thesis, Ryerson University. Accessed September 21, 2019. https://digital.library.ryerson.ca/islandora/object/RULA%3A2720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Nekouei, Hesamaldin. “Acceleration of Hessenberg reduction for nonsymmetric matrix.:.” 2013. Web. 21 Sep 2019.

Vancouver:

Nekouei H. Acceleration of Hessenberg reduction for nonsymmetric matrix.:. [Internet] [Thesis]. Ryerson University; 2013. [cited 2019 Sep 21]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A2720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Nekouei H. Acceleration of Hessenberg reduction for nonsymmetric matrix.:. [Thesis]. Ryerson University; 2013. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A2720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas State University – San Marcos

7. Taheri, Saeed. A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization.

Degree: MS, Computer Science, 2014, Texas State University – San Marcos

 Future computing systems, from handhelds all the way to supercomputers, will be more parallel and more heterogeneous than today’s systems to provide more performance without… (more)

Subjects/Keywords: GPU; Optimization; Irregular; Computer science; Graphics processing units; Parallel computers; Parallel processing (Electronic computers)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Taheri, S. (2014). A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization. (Masters Thesis). Texas State University – San Marcos. Retrieved from https://digital.library.txstate.edu/handle/10877/5380

Chicago Manual of Style (16th Edition):

Taheri, Saeed. “A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization.” 2014. Masters Thesis, Texas State University – San Marcos. Accessed September 21, 2019. https://digital.library.txstate.edu/handle/10877/5380.

MLA Handbook (7th Edition):

Taheri, Saeed. “A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization.” 2014. Web. 21 Sep 2019.

Vancouver:

Taheri S. A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization. [Internet] [Masters thesis]. Texas State University – San Marcos; 2014. [cited 2019 Sep 21]. Available from: https://digital.library.txstate.edu/handle/10877/5380.

Council of Science Editors:

Taheri S. A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization. [Masters Thesis]. Texas State University – San Marcos; 2014. Available from: https://digital.library.txstate.edu/handle/10877/5380


Texas State University – San Marcos

8. Devale, Sindhu. Low-Overhead Tracing of Large-Scale Parallel Programs.

Degree: MS, Computer Science, 2016, Texas State University – San Marcos

 Some parallelization bugs only manifest themselves when a program is executed at scale. Such bugs are notoriously difficult to find, and tracing parallel programs at… (more)

Subjects/Keywords: Tracing; Large-scale Parallel Programs; Parallel processing (Electronic computers)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Devale, S. (2016). Low-Overhead Tracing of Large-Scale Parallel Programs. (Masters Thesis). Texas State University – San Marcos. Retrieved from https://digital.library.txstate.edu/handle/10877/6049

Chicago Manual of Style (16th Edition):

Devale, Sindhu. “Low-Overhead Tracing of Large-Scale Parallel Programs.” 2016. Masters Thesis, Texas State University – San Marcos. Accessed September 21, 2019. https://digital.library.txstate.edu/handle/10877/6049.

MLA Handbook (7th Edition):

Devale, Sindhu. “Low-Overhead Tracing of Large-Scale Parallel Programs.” 2016. Web. 21 Sep 2019.

Vancouver:

Devale S. Low-Overhead Tracing of Large-Scale Parallel Programs. [Internet] [Masters thesis]. Texas State University – San Marcos; 2016. [cited 2019 Sep 21]. Available from: https://digital.library.txstate.edu/handle/10877/6049.

Council of Science Editors:

Devale S. Low-Overhead Tracing of Large-Scale Parallel Programs. [Masters Thesis]. Texas State University – San Marcos; 2016. Available from: https://digital.library.txstate.edu/handle/10877/6049


University of South Australia

9. Cowie, Alexander James. The modelling of temporal properties in a process algebra framework.

Degree: PhD, 1999, University of South Australia

Subjects/Keywords: Parallel computers; Parallel processing (Electronic computers)

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APA (6th Edition):

Cowie, A. J. (1999). The modelling of temporal properties in a process algebra framework. (Doctoral Dissertation). University of South Australia. Retrieved from http://arrow.unisa.edu.au:8081/1959.8/85611 ; http://arrow.unisa.edu.au/vital/access/manager/Repository/unisa:43029

Chicago Manual of Style (16th Edition):

Cowie, Alexander James. “The modelling of temporal properties in a process algebra framework.” 1999. Doctoral Dissertation, University of South Australia. Accessed September 21, 2019. http://arrow.unisa.edu.au:8081/1959.8/85611 ; http://arrow.unisa.edu.au/vital/access/manager/Repository/unisa:43029.

MLA Handbook (7th Edition):

Cowie, Alexander James. “The modelling of temporal properties in a process algebra framework.” 1999. Web. 21 Sep 2019.

Vancouver:

Cowie AJ. The modelling of temporal properties in a process algebra framework. [Internet] [Doctoral dissertation]. University of South Australia; 1999. [cited 2019 Sep 21]. Available from: http://arrow.unisa.edu.au:8081/1959.8/85611 ; http://arrow.unisa.edu.au/vital/access/manager/Repository/unisa:43029.

Council of Science Editors:

Cowie AJ. The modelling of temporal properties in a process algebra framework. [Doctoral Dissertation]. University of South Australia; 1999. Available from: http://arrow.unisa.edu.au:8081/1959.8/85611 ; http://arrow.unisa.edu.au/vital/access/manager/Repository/unisa:43029


University of Hong Kong

10. 衛兆傑; Wai, Siu-kit. Virtual links for multicomputers.

Degree: M. Phil., 1996, University of Hong Kong

(Uncorrected OCR) Abstract of Thesis entitled 'Virtual Links for Multicomputers' Submitted by Siu Kit Wai for the degree of Master of Philosophy at Univsersity of… (more)

Subjects/Keywords: Parallel computers.; Parallel processing (Electronic computers)

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APA (6th Edition):

衛兆傑; Wai, S. (1996). Virtual links for multicomputers. (Masters Thesis). University of Hong Kong. Retrieved from http://hdl.handle.net/10722/38150

Chicago Manual of Style (16th Edition):

衛兆傑; Wai, Siu-kit. “Virtual links for multicomputers.” 1996. Masters Thesis, University of Hong Kong. Accessed September 21, 2019. http://hdl.handle.net/10722/38150.

MLA Handbook (7th Edition):

衛兆傑; Wai, Siu-kit. “Virtual links for multicomputers.” 1996. Web. 21 Sep 2019.

Vancouver:

衛兆傑; Wai S. Virtual links for multicomputers. [Internet] [Masters thesis]. University of Hong Kong; 1996. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/10722/38150.

Council of Science Editors:

衛兆傑; Wai S. Virtual links for multicomputers. [Masters Thesis]. University of Hong Kong; 1996. Available from: http://hdl.handle.net/10722/38150


Hong Kong University of Science and Technology

11. Yang, Lin. PESC : a parallel system for clustering ECG streams based on MapReduce.

Degree: 2013, Hong Kong University of Science and Technology

 Nowadays, due to the unhealthy lifestyle and high stress in modern society, cardiovascular disease (CVD) has become a disease of the majority. As an important… (more)

Subjects/Keywords: Electrocardiography; Data processing; Parallel processing (Electronic computers); Programming; Cluster analysis

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yang, L. (2013). PESC : a parallel system for clustering ECG streams based on MapReduce. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1255218 ; http://repository.ust.hk/ir/bitstream/1783.1-62299/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Lin. “PESC : a parallel system for clustering ECG streams based on MapReduce.” 2013. Thesis, Hong Kong University of Science and Technology. Accessed September 21, 2019. https://doi.org/10.14711/thesis-b1255218 ; http://repository.ust.hk/ir/bitstream/1783.1-62299/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Lin. “PESC : a parallel system for clustering ECG streams based on MapReduce.” 2013. Web. 21 Sep 2019.

Vancouver:

Yang L. PESC : a parallel system for clustering ECG streams based on MapReduce. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2013. [cited 2019 Sep 21]. Available from: https://doi.org/10.14711/thesis-b1255218 ; http://repository.ust.hk/ir/bitstream/1783.1-62299/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang L. PESC : a parallel system for clustering ECG streams based on MapReduce. [Thesis]. Hong Kong University of Science and Technology; 2013. Available from: https://doi.org/10.14711/thesis-b1255218 ; http://repository.ust.hk/ir/bitstream/1783.1-62299/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Hong Kong

12. Zhang, Chenggang. Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms.

Degree: M. Phil., 2011, University of Hong Kong

General-Purpose computing on Graphics Processing Units (GPGPU) has attracted a lot of attention recently. Exciting results have been reported in using GPUs to accelerate applications… (more)

Subjects/Keywords: Threads (Computer programs); Parallel processing (Electronic computers); Graphics processing units.

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhang, C. (2011). Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms. (Masters Thesis). University of Hong Kong. Retrieved from Zhang, C. [张呈刚]. (2011). Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4716765 ; http://dx.doi.org/10.5353/th_b4716765 ; http://hdl.handle.net/10722/180014

Chicago Manual of Style (16th Edition):

Zhang, Chenggang. “Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms.” 2011. Masters Thesis, University of Hong Kong. Accessed September 21, 2019. Zhang, C. [张呈刚]. (2011). Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4716765 ; http://dx.doi.org/10.5353/th_b4716765 ; http://hdl.handle.net/10722/180014.

MLA Handbook (7th Edition):

Zhang, Chenggang. “Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms.” 2011. Web. 21 Sep 2019.

Vancouver:

Zhang C. Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms. [Internet] [Masters thesis]. University of Hong Kong; 2011. [cited 2019 Sep 21]. Available from: Zhang, C. [张呈刚]. (2011). Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4716765 ; http://dx.doi.org/10.5353/th_b4716765 ; http://hdl.handle.net/10722/180014.

Council of Science Editors:

Zhang C. Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms. [Masters Thesis]. University of Hong Kong; 2011. Available from: Zhang, C. [张呈刚]. (2011). Run-time loop parallelization with efficient dependency checking on GPU-accelerated platforms. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4716765 ; http://dx.doi.org/10.5353/th_b4716765 ; http://hdl.handle.net/10722/180014


University of Hong Kong

13. 韩国栋; Han, Guodong. Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures.

Degree: M. Phil., 2013, University of Hong Kong

The GPU-based heterogeneous architectures (e.g., Tianhe-1A, Nebulae), composing multi-core CPU and GPU, have drawn increasing adoptions and are becoming the norm of supercomputing as they… (more)

Subjects/Keywords: Parallel processing (Electronic computers); Graphics processing units.; Computer architecture.

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APA (6th Edition):

韩国栋; Han, G. (2013). Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures. (Masters Thesis). University of Hong Kong. Retrieved from Han, G. [韩国栋]. (2013). Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5053425 ; http://dx.doi.org/10.5353/th_b5053425 ; http://hdl.handle.net/10722/188306

Chicago Manual of Style (16th Edition):

韩国栋; Han, Guodong. “Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures.” 2013. Masters Thesis, University of Hong Kong. Accessed September 21, 2019. Han, G. [韩国栋]. (2013). Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5053425 ; http://dx.doi.org/10.5353/th_b5053425 ; http://hdl.handle.net/10722/188306.

MLA Handbook (7th Edition):

韩国栋; Han, Guodong. “Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures.” 2013. Web. 21 Sep 2019.

Vancouver:

韩国栋; Han G. Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures. [Internet] [Masters thesis]. University of Hong Kong; 2013. [cited 2019 Sep 21]. Available from: Han, G. [韩国栋]. (2013). Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5053425 ; http://dx.doi.org/10.5353/th_b5053425 ; http://hdl.handle.net/10722/188306.

Council of Science Editors:

韩国栋; Han G. Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures. [Masters Thesis]. University of Hong Kong; 2013. Available from: Han, G. [韩国栋]. (2013). Profile-guided loop parallelization and co-scheduling on GPU-based heterogeneous many-core architectures. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5053425 ; http://dx.doi.org/10.5353/th_b5053425 ; http://hdl.handle.net/10722/188306


Texas State University – San Marcos

14. Jaiganesh, Jayadharini. An Efficient Connected Components Algorithm for Massively-Parallel Devices.

Degree: MS, Computer Science, 2017, Texas State University – San Marcos

 Massively-parallel devices such as GPUs are best suited for accelerating regular algorithms. Since the memory access patterns and control flow of irregular algorithms are data… (more)

Subjects/Keywords: GPU; Connected Components; Irregular algorithm; Parallel Processing; Computer science; Parallel processing (Electronic computers)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jaiganesh, J. (2017). An Efficient Connected Components Algorithm for Massively-Parallel Devices. (Masters Thesis). Texas State University – San Marcos. Retrieved from https://digital.library.txstate.edu/handle/10877/6570

Chicago Manual of Style (16th Edition):

Jaiganesh, Jayadharini. “An Efficient Connected Components Algorithm for Massively-Parallel Devices.” 2017. Masters Thesis, Texas State University – San Marcos. Accessed September 21, 2019. https://digital.library.txstate.edu/handle/10877/6570.

MLA Handbook (7th Edition):

Jaiganesh, Jayadharini. “An Efficient Connected Components Algorithm for Massively-Parallel Devices.” 2017. Web. 21 Sep 2019.

Vancouver:

Jaiganesh J. An Efficient Connected Components Algorithm for Massively-Parallel Devices. [Internet] [Masters thesis]. Texas State University – San Marcos; 2017. [cited 2019 Sep 21]. Available from: https://digital.library.txstate.edu/handle/10877/6570.

Council of Science Editors:

Jaiganesh J. An Efficient Connected Components Algorithm for Massively-Parallel Devices. [Masters Thesis]. Texas State University – San Marcos; 2017. Available from: https://digital.library.txstate.edu/handle/10877/6570


Reykjavík University

15. Hörður Hauksson 1957. Towards model checking BSV in Uppaal.

Degree: 2013, Reykjavík University

In recent years the complexity of hardware design for parallel processes has increased considerably. Despite advances in structural abstractions of description languages none has the… (more)

Subjects/Keywords: Tölvunarfræði; Tölvufræði; Merkingarfræði; Hermilíkön; Samhliðavinnsla; Computer science; Parallel processing (Electronic computers)

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APA (6th Edition):

1957, H. H. (2013). Towards model checking BSV in Uppaal. (Thesis). Reykjavík University. Retrieved from http://hdl.handle.net/1946/17446

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

1957, Hörður Hauksson. “Towards model checking BSV in Uppaal.” 2013. Thesis, Reykjavík University. Accessed September 21, 2019. http://hdl.handle.net/1946/17446.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

1957, Hörður Hauksson. “Towards model checking BSV in Uppaal.” 2013. Web. 21 Sep 2019.

Vancouver:

1957 HH. Towards model checking BSV in Uppaal. [Internet] [Thesis]. Reykjavík University; 2013. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1946/17446.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

1957 HH. Towards model checking BSV in Uppaal. [Thesis]. Reykjavík University; 2013. Available from: http://hdl.handle.net/1946/17446

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Reykjavík University

16. Gunnar Kristinn Vilbergsson 1981. Hröðun Samsetningar Þvingunarstöðuvéla með GPGPU Samhliðu.

Degree: 2012, Reykjavík University

Ein helsta áskorunin þegar kemur að samsetningu þvingunarstöðuvéla er hversu hratt stöðunum fjölgar og vandamál sem upp koma við meðhöndlun mikils stöðufjölda bæði þegar kemur… (more)

Subjects/Keywords: Tölvunarfræði; Samhliðavinnsla; Computer science; Parallel processing (Electronic computers)

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APA (6th Edition):

1981, G. K. V. (2012). Hröðun Samsetningar Þvingunarstöðuvéla með GPGPU Samhliðu. (Thesis). Reykjavík University. Retrieved from http://hdl.handle.net/1946/12720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

1981, Gunnar Kristinn Vilbergsson. “Hröðun Samsetningar Þvingunarstöðuvéla með GPGPU Samhliðu.” 2012. Thesis, Reykjavík University. Accessed September 21, 2019. http://hdl.handle.net/1946/12720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

1981, Gunnar Kristinn Vilbergsson. “Hröðun Samsetningar Þvingunarstöðuvéla með GPGPU Samhliðu.” 2012. Web. 21 Sep 2019.

Vancouver:

1981 GKV. Hröðun Samsetningar Þvingunarstöðuvéla með GPGPU Samhliðu. [Internet] [Thesis]. Reykjavík University; 2012. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1946/12720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

1981 GKV. Hröðun Samsetningar Þvingunarstöðuvéla með GPGPU Samhliðu. [Thesis]. Reykjavík University; 2012. Available from: http://hdl.handle.net/1946/12720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Oxford

17. Donaldson, Stephen Richard. Global optimisation of communication protocols for bulk synchronous parallel computation.

Degree: 1999, University of Oxford

 In the Bulk Synchronous Parallel (or BSP) model of parallel communication represented by BSPlib, the relaxed coupling of the global computation, communication and synchronisation, whilst… (more)

Subjects/Keywords: 005; Parallel processing (Electronic computers)

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APA (6th Edition):

Donaldson, S. R. (1999). Global optimisation of communication protocols for bulk synchronous parallel computation. (Doctoral Dissertation). University of Oxford. Retrieved from http://ora.ox.ac.uk/objects/uuid:5bb12320-92ac-4e9f-a9f1-b9b23947c8ae ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.325625

Chicago Manual of Style (16th Edition):

Donaldson, Stephen Richard. “Global optimisation of communication protocols for bulk synchronous parallel computation.” 1999. Doctoral Dissertation, University of Oxford. Accessed September 21, 2019. http://ora.ox.ac.uk/objects/uuid:5bb12320-92ac-4e9f-a9f1-b9b23947c8ae ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.325625.

MLA Handbook (7th Edition):

Donaldson, Stephen Richard. “Global optimisation of communication protocols for bulk synchronous parallel computation.” 1999. Web. 21 Sep 2019.

Vancouver:

Donaldson SR. Global optimisation of communication protocols for bulk synchronous parallel computation. [Internet] [Doctoral dissertation]. University of Oxford; 1999. [cited 2019 Sep 21]. Available from: http://ora.ox.ac.uk/objects/uuid:5bb12320-92ac-4e9f-a9f1-b9b23947c8ae ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.325625.

Council of Science Editors:

Donaldson SR. Global optimisation of communication protocols for bulk synchronous parallel computation. [Doctoral Dissertation]. University of Oxford; 1999. Available from: http://ora.ox.ac.uk/objects/uuid:5bb12320-92ac-4e9f-a9f1-b9b23947c8ae ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.325625

18. Larrabee, Alan Roger. Adaptation of a large-scale computational chemistry program to the iPSC concurrent computer.

Degree: MS, 1986, Oregon Health Sciences University

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

Larrabee, A. R. (1986). Adaptation of a large-scale computational chemistry program to the iPSC concurrent computer. (Thesis). Oregon Health Sciences University. Retrieved from doi:10.6083/M4G44N72 ; http://digitalcommons.ohsu.edu/etd/213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Larrabee, Alan Roger. “Adaptation of a large-scale computational chemistry program to the iPSC concurrent computer.” 1986. Thesis, Oregon Health Sciences University. Accessed September 21, 2019. doi:10.6083/M4G44N72 ; http://digitalcommons.ohsu.edu/etd/213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Larrabee, Alan Roger. “Adaptation of a large-scale computational chemistry program to the iPSC concurrent computer.” 1986. Web. 21 Sep 2019.

Vancouver:

Larrabee AR. Adaptation of a large-scale computational chemistry program to the iPSC concurrent computer. [Internet] [Thesis]. Oregon Health Sciences University; 1986. [cited 2019 Sep 21]. Available from: doi:10.6083/M4G44N72 ; http://digitalcommons.ohsu.edu/etd/213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Larrabee AR. Adaptation of a large-scale computational chemistry program to the iPSC concurrent computer. [Thesis]. Oregon Health Sciences University; 1986. Available from: doi:10.6083/M4G44N72 ; http://digitalcommons.ohsu.edu/etd/213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

19. Gazaly, Mohammed. Specification of parallel processing using production systems.

Degree: PhD, Computer Science, 1981, Oregon State University

 This research work investigates the use of production systems as a model of parallel processing. The purpose of the model is to provide a suitable… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

Gazaly, M. (1981). Specification of parallel processing using production systems. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/42163

Chicago Manual of Style (16th Edition):

Gazaly, Mohammed. “Specification of parallel processing using production systems.” 1981. Doctoral Dissertation, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/42163.

MLA Handbook (7th Edition):

Gazaly, Mohammed. “Specification of parallel processing using production systems.” 1981. Web. 21 Sep 2019.

Vancouver:

Gazaly M. Specification of parallel processing using production systems. [Internet] [Doctoral dissertation]. Oregon State University; 1981. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/42163.

Council of Science Editors:

Gazaly M. Specification of parallel processing using production systems. [Doctoral Dissertation]. Oregon State University; 1981. Available from: http://hdl.handle.net/1957/42163


Oregon State University

20. Kruatrachue, Boontee. Static task scheduling and grain packing in parallel processing systems.

Degree: PhD, Electrical and Computer Engineering, 1987, Oregon State University

 We extend previous results for optimally scheduling concurrent program modules, called tasks, on a fixed, finite number of parallel processors in two fundamental ways: (1)… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

Kruatrachue, B. (1987). Static task scheduling and grain packing in parallel processing systems. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/40407

Chicago Manual of Style (16th Edition):

Kruatrachue, Boontee. “Static task scheduling and grain packing in parallel processing systems.” 1987. Doctoral Dissertation, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/40407.

MLA Handbook (7th Edition):

Kruatrachue, Boontee. “Static task scheduling and grain packing in parallel processing systems.” 1987. Web. 21 Sep 2019.

Vancouver:

Kruatrachue B. Static task scheduling and grain packing in parallel processing systems. [Internet] [Doctoral dissertation]. Oregon State University; 1987. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/40407.

Council of Science Editors:

Kruatrachue B. Static task scheduling and grain packing in parallel processing systems. [Doctoral Dissertation]. Oregon State University; 1987. Available from: http://hdl.handle.net/1957/40407


Oregon State University

21. Choi, Jangmin. Simulation studies of routing algorithms for multicomputer systems.

Degree: MS, Electrical and Computer Engineering, 1995, Oregon State University

 Efficient routing of messages is critical to the performance of multicomputers. Many adaptive routing algorithms have been proposed to improve the network efficiency; however, they… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

Choi, J. (1995). Simulation studies of routing algorithms for multicomputer systems. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/34987

Chicago Manual of Style (16th Edition):

Choi, Jangmin. “Simulation studies of routing algorithms for multicomputer systems.” 1995. Masters Thesis, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/34987.

MLA Handbook (7th Edition):

Choi, Jangmin. “Simulation studies of routing algorithms for multicomputer systems.” 1995. Web. 21 Sep 2019.

Vancouver:

Choi J. Simulation studies of routing algorithms for multicomputer systems. [Internet] [Masters thesis]. Oregon State University; 1995. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/34987.

Council of Science Editors:

Choi J. Simulation studies of routing algorithms for multicomputer systems. [Masters Thesis]. Oregon State University; 1995. Available from: http://hdl.handle.net/1957/34987


Oregon State University

22. El-Rewini, Hesham. Task partitioning and scheduling on arbitrary parallel processing systems.

Degree: PhD, Computer Science, 1989, Oregon State University

Parallel programming is the major stumbling block preventing the parallel processing industry from quickly satisfying the demand for parallel computer software. This research is aimed… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

El-Rewini, H. (1989). Task partitioning and scheduling on arbitrary parallel processing systems. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/38396

Chicago Manual of Style (16th Edition):

El-Rewini, Hesham. “Task partitioning and scheduling on arbitrary parallel processing systems.” 1989. Doctoral Dissertation, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/38396.

MLA Handbook (7th Edition):

El-Rewini, Hesham. “Task partitioning and scheduling on arbitrary parallel processing systems.” 1989. Web. 21 Sep 2019.

Vancouver:

El-Rewini H. Task partitioning and scheduling on arbitrary parallel processing systems. [Internet] [Doctoral dissertation]. Oregon State University; 1989. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/38396.

Council of Science Editors:

El-Rewini H. Task partitioning and scheduling on arbitrary parallel processing systems. [Doctoral Dissertation]. Oregon State University; 1989. Available from: http://hdl.handle.net/1957/38396


University of Hong Kong

23. 歐陽春根.; Au Yeung, Chun-kan. Solutions for some problems in star graphs.

Degree: PhD, 2005, University of Hong Kong

published_or_final_version

Computer Science

Doctoral

Doctor of Philosophy

Subjects/Keywords: Algorithms.; Parallel processing (Electronic computers)

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APA (6th Edition):

歐陽春根.; Au Yeung, C. (2005). Solutions for some problems in star graphs. (Doctoral Dissertation). University of Hong Kong. Retrieved from Au Yeung, C. [歐陽春根]. (2005). Solutions for some problems in star graphs. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4501464 ; http://dx.doi.org/10.5353/th_b4501464 ; http://hdl.handle.net/10722/134021

Chicago Manual of Style (16th Edition):

歐陽春根.; Au Yeung, Chun-kan. “Solutions for some problems in star graphs.” 2005. Doctoral Dissertation, University of Hong Kong. Accessed September 21, 2019. Au Yeung, C. [歐陽春根]. (2005). Solutions for some problems in star graphs. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4501464 ; http://dx.doi.org/10.5353/th_b4501464 ; http://hdl.handle.net/10722/134021.

MLA Handbook (7th Edition):

歐陽春根.; Au Yeung, Chun-kan. “Solutions for some problems in star graphs.” 2005. Web. 21 Sep 2019.

Vancouver:

歐陽春根.; Au Yeung C. Solutions for some problems in star graphs. [Internet] [Doctoral dissertation]. University of Hong Kong; 2005. [cited 2019 Sep 21]. Available from: Au Yeung, C. [歐陽春根]. (2005). Solutions for some problems in star graphs. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4501464 ; http://dx.doi.org/10.5353/th_b4501464 ; http://hdl.handle.net/10722/134021.

Council of Science Editors:

歐陽春根.; Au Yeung C. Solutions for some problems in star graphs. [Doctoral Dissertation]. University of Hong Kong; 2005. Available from: Au Yeung, C. [歐陽春根]. (2005). Solutions for some problems in star graphs. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4501464 ; http://dx.doi.org/10.5353/th_b4501464 ; http://hdl.handle.net/10722/134021


University of Victoria

24. Uhl, James S. Flow grammars: a methodology for automatically constructing static analyzers.

Degree: Department of Computer Science, 2018, University of Victoria

 A new control flow model called flow grammars is introduced which unifies the treatment of intraprocedural and interprocedural control flow. This model provides excellent support… (more)

Subjects/Keywords: Data flow computing; Computer programming; Computer architecture; Parallel processing (Electronic computers)

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APA (6th Edition):

Uhl, J. S. (2018). Flow grammars: a methodology for automatically constructing static analyzers. (Thesis). University of Victoria. Retrieved from https://dspace.library.uvic.ca//handle/1828/9436

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Uhl, James S. “Flow grammars: a methodology for automatically constructing static analyzers.” 2018. Thesis, University of Victoria. Accessed September 21, 2019. https://dspace.library.uvic.ca//handle/1828/9436.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Uhl, James S. “Flow grammars: a methodology for automatically constructing static analyzers.” 2018. Web. 21 Sep 2019.

Vancouver:

Uhl JS. Flow grammars: a methodology for automatically constructing static analyzers. [Internet] [Thesis]. University of Victoria; 2018. [cited 2019 Sep 21]. Available from: https://dspace.library.uvic.ca//handle/1828/9436.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Uhl JS. Flow grammars: a methodology for automatically constructing static analyzers. [Thesis]. University of Victoria; 2018. Available from: https://dspace.library.uvic.ca//handle/1828/9436

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

25. Larsen, Steen K. Master/slave parallel processing.

Degree: MS, Computer Engineering, 1999, Oregon State University

 An 8 bit microcontroller slave unit was designed, constructed, and tested to demonstrate advantages and feasibility of master/slave parallel processing using conventional processors and relatively… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

Larsen, S. K. (1999). Master/slave parallel processing. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/33358

Chicago Manual of Style (16th Edition):

Larsen, Steen K. “Master/slave parallel processing.” 1999. Masters Thesis, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/33358.

MLA Handbook (7th Edition):

Larsen, Steen K. “Master/slave parallel processing.” 1999. Web. 21 Sep 2019.

Vancouver:

Larsen SK. Master/slave parallel processing. [Internet] [Masters thesis]. Oregon State University; 1999. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/33358.

Council of Science Editors:

Larsen SK. Master/slave parallel processing. [Masters Thesis]. Oregon State University; 1999. Available from: http://hdl.handle.net/1957/33358


Oregon State University

26. AlMohammad, Bader Fahed AlBedaiwi. On resource placements and fault-tolerant broadcasting in toroidal networks.

Degree: PhD, Computer Science, 1997, Oregon State University

Parallel computers are classified into: Multiprocessors, and multicomputers. A multiprocessor system usually has a shared memory through which its processors can communicate. On the other… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

AlMohammad, B. F. A. (1997). On resource placements and fault-tolerant broadcasting in toroidal networks. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/33680

Chicago Manual of Style (16th Edition):

AlMohammad, Bader Fahed AlBedaiwi. “On resource placements and fault-tolerant broadcasting in toroidal networks.” 1997. Doctoral Dissertation, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/33680.

MLA Handbook (7th Edition):

AlMohammad, Bader Fahed AlBedaiwi. “On resource placements and fault-tolerant broadcasting in toroidal networks.” 1997. Web. 21 Sep 2019.

Vancouver:

AlMohammad BFA. On resource placements and fault-tolerant broadcasting in toroidal networks. [Internet] [Doctoral dissertation]. Oregon State University; 1997. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/33680.

Council of Science Editors:

AlMohammad BFA. On resource placements and fault-tolerant broadcasting in toroidal networks. [Doctoral Dissertation]. Oregon State University; 1997. Available from: http://hdl.handle.net/1957/33680


Oregon State University

27. Miller, Michael F., (Michael Frederic). CounterDataFlow architecture : design and performance.

Degree: MS, Electrical and Computer Engineering, 1997, Oregon State University

 The counterflow pipeline concept was originated by Sproull and Sutherland to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making and… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

Miller, Michael F., (. F. (1997). CounterDataFlow architecture : design and performance. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/33765

Chicago Manual of Style (16th Edition):

Miller, Michael F., (Michael Frederic). “CounterDataFlow architecture : design and performance.” 1997. Masters Thesis, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/33765.

MLA Handbook (7th Edition):

Miller, Michael F., (Michael Frederic). “CounterDataFlow architecture : design and performance.” 1997. Web. 21 Sep 2019.

Vancouver:

Miller, Michael F. (F. CounterDataFlow architecture : design and performance. [Internet] [Masters thesis]. Oregon State University; 1997. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/33765.

Council of Science Editors:

Miller, Michael F. (F. CounterDataFlow architecture : design and performance. [Masters Thesis]. Oregon State University; 1997. Available from: http://hdl.handle.net/1957/33765


Oregon State University

28. Jacob, Joseph, 1971-. Automatic scheduling and dynamic load sharing of parallel computations on heterogeneous workstation clusters.

Degree: MS, Computer Science, 1995, Oregon State University

Parallel computing on heterogeneous workstation clusters has proved to be a very efficient use of available resources, increasing their overall utilization. However, for it to… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA (6th Edition):

Jacob, Joseph, 1. (1995). Automatic scheduling and dynamic load sharing of parallel computations on heterogeneous workstation clusters. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/34688

Chicago Manual of Style (16th Edition):

Jacob, Joseph, 1971-. “Automatic scheduling and dynamic load sharing of parallel computations on heterogeneous workstation clusters.” 1995. Masters Thesis, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/34688.

MLA Handbook (7th Edition):

Jacob, Joseph, 1971-. “Automatic scheduling and dynamic load sharing of parallel computations on heterogeneous workstation clusters.” 1995. Web. 21 Sep 2019.

Vancouver:

Jacob, Joseph 1. Automatic scheduling and dynamic load sharing of parallel computations on heterogeneous workstation clusters. [Internet] [Masters thesis]. Oregon State University; 1995. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/34688.

Council of Science Editors:

Jacob, Joseph 1. Automatic scheduling and dynamic load sharing of parallel computations on heterogeneous workstation clusters. [Masters Thesis]. Oregon State University; 1995. Available from: http://hdl.handle.net/1957/34688


Oregon State University

29. Metz, David. Interface design and system impact analysis of a message-handling processor for fine-grain multithreading.

Degree: MS, Electrical and Computer Engineering, 1995, Oregon State University

 There appears to be a broad agreement that high-performance computers of the future will be Massively Parallel Architectures (MPAs), where all processors are interconnected by… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Metz, D. (1995). Interface design and system impact analysis of a message-handling processor for fine-grain multithreading. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/35173

Chicago Manual of Style (16th Edition):

Metz, David. “Interface design and system impact analysis of a message-handling processor for fine-grain multithreading.” 1995. Masters Thesis, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/35173.

MLA Handbook (7th Edition):

Metz, David. “Interface design and system impact analysis of a message-handling processor for fine-grain multithreading.” 1995. Web. 21 Sep 2019.

Vancouver:

Metz D. Interface design and system impact analysis of a message-handling processor for fine-grain multithreading. [Internet] [Masters thesis]. Oregon State University; 1995. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/35173.

Council of Science Editors:

Metz D. Interface design and system impact analysis of a message-handling processor for fine-grain multithreading. [Masters Thesis]. Oregon State University; 1995. Available from: http://hdl.handle.net/1957/35173


Oregon State University

30. Kotikalapoodi, Sridhar V. Fine-grain parallelism on sequential processors.

Degree: MS, Electrical and Computer Engineering, 1994, Oregon State University

 There seems to be a consensus that future Massively Parallel Architectures will consist of a number nodes, or processors, interconnected by high-speed network. Using a… (more)

Subjects/Keywords: Parallel processing (Electronic computers)

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kotikalapoodi, S. V. (1994). Fine-grain parallelism on sequential processors. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/35231

Chicago Manual of Style (16th Edition):

Kotikalapoodi, Sridhar V. “Fine-grain parallelism on sequential processors.” 1994. Masters Thesis, Oregon State University. Accessed September 21, 2019. http://hdl.handle.net/1957/35231.

MLA Handbook (7th Edition):

Kotikalapoodi, Sridhar V. “Fine-grain parallelism on sequential processors.” 1994. Web. 21 Sep 2019.

Vancouver:

Kotikalapoodi SV. Fine-grain parallelism on sequential processors. [Internet] [Masters thesis]. Oregon State University; 1994. [cited 2019 Sep 21]. Available from: http://hdl.handle.net/1957/35231.

Council of Science Editors:

Kotikalapoodi SV. Fine-grain parallelism on sequential processors. [Masters Thesis]. Oregon State University; 1994. Available from: http://hdl.handle.net/1957/35231

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