Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for subject:(Oxide TFTs circuit integration). Showing records 1 – 30 of 23336 total matches.

[1] [2] [3] [4] [5] … [778]

Search Limiters

Last 2 Years | English Only

Degrees

Languages

Country

▼ Search Limiters


University of Manchester

1. Jin, Jidong. Metal-oxide-based electronic devices.

Degree: PhD, 2013, University of Manchester

 Metal oxides exhibit a wide range of chemical and electronic properties, making them an extremely interesting subject for numerous applications in modern electronics. The primary… (more)

Subjects/Keywords: 621.39732; metal oxide; TFTs; ZnO; Tin oxide; RRAM; SSD; SGT

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jin, J. (2013). Metal-oxide-based electronic devices. (Doctoral Dissertation). University of Manchester. Retrieved from https://www.research.manchester.ac.uk/portal/en/theses/metaloxidebased-electronic-devices(2ccabdd1-398b-4787-9455-e034f9001867).html ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.574311

Chicago Manual of Style (16th Edition):

Jin, Jidong. “Metal-oxide-based electronic devices.” 2013. Doctoral Dissertation, University of Manchester. Accessed March 01, 2021. https://www.research.manchester.ac.uk/portal/en/theses/metaloxidebased-electronic-devices(2ccabdd1-398b-4787-9455-e034f9001867).html ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.574311.

MLA Handbook (7th Edition):

Jin, Jidong. “Metal-oxide-based electronic devices.” 2013. Web. 01 Mar 2021.

Vancouver:

Jin J. Metal-oxide-based electronic devices. [Internet] [Doctoral dissertation]. University of Manchester; 2013. [cited 2021 Mar 01]. Available from: https://www.research.manchester.ac.uk/portal/en/theses/metaloxidebased-electronic-devices(2ccabdd1-398b-4787-9455-e034f9001867).html ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.574311.

Council of Science Editors:

Jin J. Metal-oxide-based electronic devices. [Doctoral Dissertation]. University of Manchester; 2013. Available from: https://www.research.manchester.ac.uk/portal/en/theses/metaloxidebased-electronic-devices(2ccabdd1-398b-4787-9455-e034f9001867).html ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.574311


Universidade Nova

2. Santos, Ângelo Emanuel Neves dos. Design and simulation of a smart bottle with fill-level sensing based on oxide TFT technology.

Degree: 2016, Universidade Nova

 Packaging is an important element responsible for brand growth and one of the main rea-sons for producers to gain competitive advantages through technological innovation. In… (more)

Subjects/Keywords: Packaging is an important element responsible for brand growth and one of the main rea-sons for producers to gain competitive advantages through technological innovation. In this re-gard, the aim of this work is to design a fully autonomous electronic system for a smart bottle packaging, being integrated in a European project named ROLL-OUT. The desired application for the smart bottle is to act as a fill-level sensor system in order to determine the liquid content level that exists inside an opaque bottle, so the consumer can exactly know the remaining quantity of the product inside. An in-house amorphous indium–gallium–zinc oxide thin-film transistor (a-IGZO TFT) model, previously developed, was used for circuit designing purposes. This model was based in an artificial neural network (ANN) equivalent circuit approach. Taking into account that only n-type oxide TFTs were used, plenty of electronic building-blocks have been designed: clock generator, non-overlapping phase generator, a capacitance-to-voltage converter and a comparator. As it was demonstrated by electrical simulations, it has been achieved good functionality for each block, having a final system with a power dissipation of 2.3 mW (VDD=10 V) not considering the clock generator. Four printed circuit boards (PCBs) have been also designed in order to help in the testing phase. Mask layouts were already designed and are currently in fabrication, foreseeing a suc-cessful circuit fabrication, and a major step towards the design and integration of complex trans-ducer systems using oxide TFTs technology; Capacitance-to-voltage converter; Comparator; Oxide TFTs circuit integration; Domínio/Área Científica::Engenharia e Tecnologia::Engenharia dos Materiais

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Santos, . E. N. d. (2016). Design and simulation of a smart bottle with fill-level sensing based on oxide TFT technology. (Thesis). Universidade Nova. Retrieved from http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/19593

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Santos, Ângelo Emanuel Neves dos. “Design and simulation of a smart bottle with fill-level sensing based on oxide TFT technology.” 2016. Thesis, Universidade Nova. Accessed March 01, 2021. http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/19593.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Santos, Ângelo Emanuel Neves dos. “Design and simulation of a smart bottle with fill-level sensing based on oxide TFT technology.” 2016. Web. 01 Mar 2021.

Vancouver:

Santos ENd. Design and simulation of a smart bottle with fill-level sensing based on oxide TFT technology. [Internet] [Thesis]. Universidade Nova; 2016. [cited 2021 Mar 01]. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/19593.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Santos ENd. Design and simulation of a smart bottle with fill-level sensing based on oxide TFT technology. [Thesis]. Universidade Nova; 2016. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/19593

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

3. Liu, Yi-chun. Experimentally Calibrated Simulation Of Zno Thin Film Transistors Including Traps.

Degree: 2014, Penn State University

Oxide based semiconductor thin film transistors are of interest because of their high mobility, and compatibility with flexible substrates. The role of contact barriers and… (more)

Subjects/Keywords: Thin film transistor simulation; oxide TFT simulation; oxide thin film transistor; oxide TFTs; oxide semiconductor traps.

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liu, Y. (2014). Experimentally Calibrated Simulation Of Zno Thin Film Transistors Including Traps. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/21318

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Yi-chun. “Experimentally Calibrated Simulation Of Zno Thin Film Transistors Including Traps.” 2014. Thesis, Penn State University. Accessed March 01, 2021. https://submit-etda.libraries.psu.edu/catalog/21318.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Yi-chun. “Experimentally Calibrated Simulation Of Zno Thin Film Transistors Including Traps.” 2014. Web. 01 Mar 2021.

Vancouver:

Liu Y. Experimentally Calibrated Simulation Of Zno Thin Film Transistors Including Traps. [Internet] [Thesis]. Penn State University; 2014. [cited 2021 Mar 01]. Available from: https://submit-etda.libraries.psu.edu/catalog/21318.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu Y. Experimentally Calibrated Simulation Of Zno Thin Film Transistors Including Traps. [Thesis]. Penn State University; 2014. Available from: https://submit-etda.libraries.psu.edu/catalog/21318

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

4. Chen, Min-Chen. Study on the Fabrication and Electrical Characteristics of the Advanced Metal-oxide-based Resistive Random Access Memory and Thin-Film Transistors Devices.

Degree: PhD, Physics, 2011, NSYSU

 In first part, the supercritical CO2 (SCCO2) fluid technology is employed to improve the device properties of ZnO TFT. The SCCO2 fluid exhibits liquid-like property,… (more)

Subjects/Keywords: Thin-Film Transistors (TFTs); Oxide thin film; Resistive Random Access Memory (RRAM)

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, M. (2011). Study on the Fabrication and Electrical Characteristics of the Advanced Metal-oxide-based Resistive Random Access Memory and Thin-Film Transistors Devices. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714111-132055

Chicago Manual of Style (16th Edition):

Chen, Min-Chen. “Study on the Fabrication and Electrical Characteristics of the Advanced Metal-oxide-based Resistive Random Access Memory and Thin-Film Transistors Devices.” 2011. Doctoral Dissertation, NSYSU. Accessed March 01, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714111-132055.

MLA Handbook (7th Edition):

Chen, Min-Chen. “Study on the Fabrication and Electrical Characteristics of the Advanced Metal-oxide-based Resistive Random Access Memory and Thin-Film Transistors Devices.” 2011. Web. 01 Mar 2021.

Vancouver:

Chen M. Study on the Fabrication and Electrical Characteristics of the Advanced Metal-oxide-based Resistive Random Access Memory and Thin-Film Transistors Devices. [Internet] [Doctoral dissertation]. NSYSU; 2011. [cited 2021 Mar 01]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714111-132055.

Council of Science Editors:

Chen M. Study on the Fabrication and Electrical Characteristics of the Advanced Metal-oxide-based Resistive Random Access Memory and Thin-Film Transistors Devices. [Doctoral Dissertation]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714111-132055

5. 乾, 京介. 液相法による低温酸化物TFTを用いたデバイスに関する研究.

Degree: Japan Advanced Institute of Science and Technology / 北陸先端科学技術大学院大学

Supervisor:下田 達也

先端科学技術研究科

修士(マテリアルサイエンス)

Subjects/Keywords: 酸化物TFT; oxide-TFTs

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

乾, . (n.d.). 液相法による低温酸化物TFTを用いたデバイスに関する研究. (Thesis). Japan Advanced Institute of Science and Technology / 北陸先端科学技術大学院大学. Retrieved from http://hdl.handle.net/10119/15218

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

乾, 京介. “液相法による低温酸化物TFTを用いたデバイスに関する研究.” Thesis, Japan Advanced Institute of Science and Technology / 北陸先端科学技術大学院大学. Accessed March 01, 2021. http://hdl.handle.net/10119/15218.

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

乾, 京介. “液相法による低温酸化物TFTを用いたデバイスに関する研究.” Web. 01 Mar 2021.

Note: this citation may be lacking information needed for this citation format:
No year of publication.

Vancouver:

乾 . 液相法による低温酸化物TFTを用いたデバイスに関する研究. [Internet] [Thesis]. Japan Advanced Institute of Science and Technology / 北陸先端科学技術大学院大学; [cited 2021 Mar 01]. Available from: http://hdl.handle.net/10119/15218.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.

Council of Science Editors:

乾 . 液相法による低温酸化物TFTを用いたデバイスに関する研究. [Thesis]. Japan Advanced Institute of Science and Technology / 北陸先端科学技術大学院大学; Available from: http://hdl.handle.net/10119/15218

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.


Penn State University

6. Li, Haoyu. Functional Flexible Thin Film Electronics.

Degree: 2015, Penn State University

 The field of flexible electronics has advanced rapidly in recent years. This dissertation reports progress on a few components for flexible electronics with a special… (more)

Subjects/Keywords: Flexible electronics; thin film transistors (TFTs); oxide semiconductors; polymeric substrate; mechanical flexibility; VOx; OLED

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, H. (2015). Functional Flexible Thin Film Electronics. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/27080

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Haoyu. “Functional Flexible Thin Film Electronics.” 2015. Thesis, Penn State University. Accessed March 01, 2021. https://submit-etda.libraries.psu.edu/catalog/27080.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Haoyu. “Functional Flexible Thin Film Electronics.” 2015. Web. 01 Mar 2021.

Vancouver:

Li H. Functional Flexible Thin Film Electronics. [Internet] [Thesis]. Penn State University; 2015. [cited 2021 Mar 01]. Available from: https://submit-etda.libraries.psu.edu/catalog/27080.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li H. Functional Flexible Thin Film Electronics. [Thesis]. Penn State University; 2015. Available from: https://submit-etda.libraries.psu.edu/catalog/27080

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Indian Institute of Science

7. Raghuraman, Mathangi. Threshold Voltage Shift Compensating Circuits in Non-Crystalline Semiconductors for Large Area Sensor Actuator Interface.

Degree: MSc Engg, Faculty of Engineering, 2018, Indian Institute of Science

 Thin Film Transistors (TFTs) are widely used in large area electronics because they offer the advantage of low cost fabrication and wide substrate choice. TFTs(more)

Subjects/Keywords: Sensor Actuator Interface; Non-Crystalline Semiconductors; Thin Film Transistor (TFT); Semiconductors; Threshold Voltage Shift (VT); Circuit Simulators; Tin Doped Zinc Oxide Thin Film Transistors; Copper Phthalocyanine Thin Film Transistors; Sensors and Actuators; Interface Circuits; VT Shift Model; Thin Film Transistors (TFTs); Sensor Actuator System; Threshold Voltage (VT); VT Shift Model; Electronics Engineering

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Raghuraman, M. (2018). Threshold Voltage Shift Compensating Circuits in Non-Crystalline Semiconductors for Large Area Sensor Actuator Interface. (Masters Thesis). Indian Institute of Science. Retrieved from http://etd.iisc.ac.in/handle/2005/3176

Chicago Manual of Style (16th Edition):

Raghuraman, Mathangi. “Threshold Voltage Shift Compensating Circuits in Non-Crystalline Semiconductors for Large Area Sensor Actuator Interface.” 2018. Masters Thesis, Indian Institute of Science. Accessed March 01, 2021. http://etd.iisc.ac.in/handle/2005/3176.

MLA Handbook (7th Edition):

Raghuraman, Mathangi. “Threshold Voltage Shift Compensating Circuits in Non-Crystalline Semiconductors for Large Area Sensor Actuator Interface.” 2018. Web. 01 Mar 2021.

Vancouver:

Raghuraman M. Threshold Voltage Shift Compensating Circuits in Non-Crystalline Semiconductors for Large Area Sensor Actuator Interface. [Internet] [Masters thesis]. Indian Institute of Science; 2018. [cited 2021 Mar 01]. Available from: http://etd.iisc.ac.in/handle/2005/3176.

Council of Science Editors:

Raghuraman M. Threshold Voltage Shift Compensating Circuits in Non-Crystalline Semiconductors for Large Area Sensor Actuator Interface. [Masters Thesis]. Indian Institute of Science; 2018. Available from: http://etd.iisc.ac.in/handle/2005/3176


NSYSU

8. Tsao, Shu-Wei. Electrical Analysis & Fabricated Investigation of Amorphous Active Layer Thin Film Transistor for Large Size Display Application.

Degree: PhD, Electro-Optical Engineering, 2010, NSYSU

 In this dissertation, the electrical characteristics of generally used hydrogenated amorphous silicon (a-Si:H) TFTs in LCD and newly risen amorphous indium-gallium-zinc oxide (a-IGZO) TFTs were… (more)

Subjects/Keywords: Mechanical Strain; UV Irradiation; amorphous indium-gallium-zinc oxide (a-IGZO) TFTs; Photo-leakage-current; Hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs)

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tsao, S. (2010). Electrical Analysis & Fabricated Investigation of Amorphous Active Layer Thin Film Transistor for Large Size Display Application. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1019110-225810

Chicago Manual of Style (16th Edition):

Tsao, Shu-Wei. “Electrical Analysis & Fabricated Investigation of Amorphous Active Layer Thin Film Transistor for Large Size Display Application.” 2010. Doctoral Dissertation, NSYSU. Accessed March 01, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1019110-225810.

MLA Handbook (7th Edition):

Tsao, Shu-Wei. “Electrical Analysis & Fabricated Investigation of Amorphous Active Layer Thin Film Transistor for Large Size Display Application.” 2010. Web. 01 Mar 2021.

Vancouver:

Tsao S. Electrical Analysis & Fabricated Investigation of Amorphous Active Layer Thin Film Transistor for Large Size Display Application. [Internet] [Doctoral dissertation]. NSYSU; 2010. [cited 2021 Mar 01]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1019110-225810.

Council of Science Editors:

Tsao S. Electrical Analysis & Fabricated Investigation of Amorphous Active Layer Thin Film Transistor for Large Size Display Application. [Doctoral Dissertation]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1019110-225810


Penn State University

9. Ramirez, Jose Israel. Zno Thin Film Electronics For More Than Displays.

Degree: 2015, Penn State University

 Zinc oxide thin film transistors (TFTs) are investigated in this work for large-area electronic applications outside of display technology. A constant pressure, constant flow, showerhead,… (more)

Subjects/Keywords: zno; thin film transistors (TFT); large-area electronics; radiation-hard ZnO TFTs; integration of ZnO electronics with PZT films

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ramirez, J. I. (2015). Zno Thin Film Electronics For More Than Displays. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/26550

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ramirez, Jose Israel. “Zno Thin Film Electronics For More Than Displays.” 2015. Thesis, Penn State University. Accessed March 01, 2021. https://submit-etda.libraries.psu.edu/catalog/26550.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ramirez, Jose Israel. “Zno Thin Film Electronics For More Than Displays.” 2015. Web. 01 Mar 2021.

Vancouver:

Ramirez JI. Zno Thin Film Electronics For More Than Displays. [Internet] [Thesis]. Penn State University; 2015. [cited 2021 Mar 01]. Available from: https://submit-etda.libraries.psu.edu/catalog/26550.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ramirez JI. Zno Thin Film Electronics For More Than Displays. [Thesis]. Penn State University; 2015. Available from: https://submit-etda.libraries.psu.edu/catalog/26550

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Jin, Jidong. METAL-OXIDE-BASED ELECTRONIC DEVICES.

Degree: 2013, University of Manchester

 Metal oxides exhibit a wide range of chemical and electronic properties, making them an extremely interesting subject for numerous applications in modern electronics. The primary… (more)

Subjects/Keywords: metal oxide; TFTs; ZnO; Tin oxide; RRAM; SSD; SGT

…develop metal-oxide-based electronic devices, including thin-film transistors (TFTs)… …undoubtedly the most important material in electronics so far. Recently, other circuit integration… …x5B;6, 8, 9]. Metal-oxide-based TFTs typically have a higher field-effect 18 Chapter… …including TFTs, RRAM and planar nano-devices. The successful implementation of metal-oxide-based… …but these devices showed very poor performance. Intensive research on metal-oxide-based TFTs… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jin, J. (2013). METAL-OXIDE-BASED ELECTRONIC DEVICES. (Doctoral Dissertation). University of Manchester. Retrieved from http://www.manchester.ac.uk/escholar/uk-ac-man-scw:192842

Chicago Manual of Style (16th Edition):

Jin, Jidong. “METAL-OXIDE-BASED ELECTRONIC DEVICES.” 2013. Doctoral Dissertation, University of Manchester. Accessed March 01, 2021. http://www.manchester.ac.uk/escholar/uk-ac-man-scw:192842.

MLA Handbook (7th Edition):

Jin, Jidong. “METAL-OXIDE-BASED ELECTRONIC DEVICES.” 2013. Web. 01 Mar 2021.

Vancouver:

Jin J. METAL-OXIDE-BASED ELECTRONIC DEVICES. [Internet] [Doctoral dissertation]. University of Manchester; 2013. [cited 2021 Mar 01]. Available from: http://www.manchester.ac.uk/escholar/uk-ac-man-scw:192842.

Council of Science Editors:

Jin J. METAL-OXIDE-BASED ELECTRONIC DEVICES. [Doctoral Dissertation]. University of Manchester; 2013. Available from: http://www.manchester.ac.uk/escholar/uk-ac-man-scw:192842


Universidade Nova

11. Carlos, Emanuel Abreu Antunes. Oxide transistors produced by solution: Influence of annealing parameters on properties of the insulator.

Degree: 2017, Universidade Nova

 Solution processing of amorphous metal oxides has been lately used as an option to implement in flexible electronics allowing to reduce the associated costs and… (more)

Subjects/Keywords: Aluminum oxide; Combustion reaction; FUV irradiation; Low temperature; Solution TFTs; Low operating voltage; Domínio/Área Científica::Engenharia e Tecnologia::Engenharia dos Materiais

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Carlos, E. A. A. (2017). Oxide transistors produced by solution: Influence of annealing parameters on properties of the insulator. (Thesis). Universidade Nova. Retrieved from http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/19799

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Carlos, Emanuel Abreu Antunes. “Oxide transistors produced by solution: Influence of annealing parameters on properties of the insulator.” 2017. Thesis, Universidade Nova. Accessed March 01, 2021. http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/19799.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Carlos, Emanuel Abreu Antunes. “Oxide transistors produced by solution: Influence of annealing parameters on properties of the insulator.” 2017. Web. 01 Mar 2021.

Vancouver:

Carlos EAA. Oxide transistors produced by solution: Influence of annealing parameters on properties of the insulator. [Internet] [Thesis]. Universidade Nova; 2017. [cited 2021 Mar 01]. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/19799.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Carlos EAA. Oxide transistors produced by solution: Influence of annealing parameters on properties of the insulator. [Thesis]. Universidade Nova; 2017. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/19799

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade Nova

12. Trigo, Pedro Gil Dias. Oxide transistors produced by Combustion Synthesis: Influence of the PVP on the properties of the insulator.

Degree: 2017, Universidade Nova

 Solution processing of amorphous metal oxides has been used as an option to implement in flexible electronics, allowing to reduce the associated costs, when compared… (more)

Subjects/Keywords: aluminium oxide; polyvinylpyrrolidone; hybrid dielectrics; solution combustion synthesis; solution TFTs; low operating voltage; Domínio/Área Científica::Engenharia e Tecnologia::Engenharia dos Materiais

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Trigo, P. G. D. (2017). Oxide transistors produced by Combustion Synthesis: Influence of the PVP on the properties of the insulator. (Thesis). Universidade Nova. Retrieved from https://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/42277

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Trigo, Pedro Gil Dias. “Oxide transistors produced by Combustion Synthesis: Influence of the PVP on the properties of the insulator.” 2017. Thesis, Universidade Nova. Accessed March 01, 2021. https://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/42277.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Trigo, Pedro Gil Dias. “Oxide transistors produced by Combustion Synthesis: Influence of the PVP on the properties of the insulator.” 2017. Web. 01 Mar 2021.

Vancouver:

Trigo PGD. Oxide transistors produced by Combustion Synthesis: Influence of the PVP on the properties of the insulator. [Internet] [Thesis]. Universidade Nova; 2017. [cited 2021 Mar 01]. Available from: https://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/42277.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Trigo PGD. Oxide transistors produced by Combustion Synthesis: Influence of the PVP on the properties of the insulator. [Thesis]. Universidade Nova; 2017. Available from: https://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/42277

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

13. Sun, Jie. PECVD, SPATIAL ALD, AND PEALD ZINC OXIDE THIN FILM TRANSISTORS .

Degree: 2008, Penn State University

 This thesis describes low-temperature ZnO deposition and thin film transistor (TFT) fabrication for the fastest ZnO circuits reported to date. Using both plasma enhanced atomic… (more)

Subjects/Keywords: Plasma Enhanced Atomic Layer Deposition; Atomic Layer Deposition; Plasma Enhanced Chemical Vapor Depostion; Thin Film Transistors (TFTs); Zinc Oxide (ZnO); ZnO TFTs Circuits

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sun, J. (2008). PECVD, SPATIAL ALD, AND PEALD ZINC OXIDE THIN FILM TRANSISTORS . (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/8818

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sun, Jie. “PECVD, SPATIAL ALD, AND PEALD ZINC OXIDE THIN FILM TRANSISTORS .” 2008. Thesis, Penn State University. Accessed March 01, 2021. https://submit-etda.libraries.psu.edu/catalog/8818.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sun, Jie. “PECVD, SPATIAL ALD, AND PEALD ZINC OXIDE THIN FILM TRANSISTORS .” 2008. Web. 01 Mar 2021.

Vancouver:

Sun J. PECVD, SPATIAL ALD, AND PEALD ZINC OXIDE THIN FILM TRANSISTORS . [Internet] [Thesis]. Penn State University; 2008. [cited 2021 Mar 01]. Available from: https://submit-etda.libraries.psu.edu/catalog/8818.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sun J. PECVD, SPATIAL ALD, AND PEALD ZINC OXIDE THIN FILM TRANSISTORS . [Thesis]. Penn State University; 2008. Available from: https://submit-etda.libraries.psu.edu/catalog/8818

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

14. Raju, Salahuddin. Integration of low loss interconnects in CMOS.

Degree: 2016, Hong Kong University of Science and Technology

 In this work, an interlayer dielectric with an extremely low dielectric constant of 1.96 is achieved using SiO2 with vertically aligned cylindrical pores. Vertically grown… (more)

Subjects/Keywords: Interconnects (Integrated circuit technology) ; Antennas (Electronics) ; Metal oxide semiconductors, Complementary

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Raju, S. (2016). Integration of low loss interconnects in CMOS. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-86942 ; https://doi.org/10.14711/thesis-b1627112 ; http://repository.ust.hk/ir/bitstream/1783.1-86942/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Raju, Salahuddin. “Integration of low loss interconnects in CMOS.” 2016. Thesis, Hong Kong University of Science and Technology. Accessed March 01, 2021. http://repository.ust.hk/ir/Record/1783.1-86942 ; https://doi.org/10.14711/thesis-b1627112 ; http://repository.ust.hk/ir/bitstream/1783.1-86942/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Raju, Salahuddin. “Integration of low loss interconnects in CMOS.” 2016. Web. 01 Mar 2021.

Vancouver:

Raju S. Integration of low loss interconnects in CMOS. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2016. [cited 2021 Mar 01]. Available from: http://repository.ust.hk/ir/Record/1783.1-86942 ; https://doi.org/10.14711/thesis-b1627112 ; http://repository.ust.hk/ir/bitstream/1783.1-86942/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Raju S. Integration of low loss interconnects in CMOS. [Thesis]. Hong Kong University of Science and Technology; 2016. Available from: http://repository.ust.hk/ir/Record/1783.1-86942 ; https://doi.org/10.14711/thesis-b1627112 ; http://repository.ust.hk/ir/bitstream/1783.1-86942/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

15. Lin, Chun-Shou. Design and verification of an ARM10-like Processor and its System Integration.

Degree: Master, Computer Science and Engineering, 2012, NSYSU

 With the advanced of the technique, we can design more IP in the same area space chip. The embedded system has more powerful about its… (more)

Subjects/Keywords: Integration; Embedded in circuit emulator (EICE); Microprocessor; Verification; Cache/MMU; Coprocessor

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, C. (2012). Design and verification of an ARM10-like Processor and its System Integration. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0207112-161403

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Chun-Shou. “Design and verification of an ARM10-like Processor and its System Integration.” 2012. Thesis, NSYSU. Accessed March 01, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0207112-161403.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Chun-Shou. “Design and verification of an ARM10-like Processor and its System Integration.” 2012. Web. 01 Mar 2021.

Vancouver:

Lin C. Design and verification of an ARM10-like Processor and its System Integration. [Internet] [Thesis]. NSYSU; 2012. [cited 2021 Mar 01]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0207112-161403.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin C. Design and verification of an ARM10-like Processor and its System Integration. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0207112-161403

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Ottawa

16. Lin, Yaoyao. Improvements in Obreshkov-based High-Order Circuit Simulation Method .

Degree: 2015, University of Ottawa

 The transient time-domain simulation, of the circuit response, is a fundamental component in the Computer-Aided Design tools of all integrated circuit and systems. It is… (more)

Subjects/Keywords: A-stable; Circuit simulation; Nonlinear memory elements; High-order integration methods

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, Y. (2015). Improvements in Obreshkov-based High-Order Circuit Simulation Method . (Thesis). University of Ottawa. Retrieved from http://hdl.handle.net/10393/32090

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Yaoyao. “Improvements in Obreshkov-based High-Order Circuit Simulation Method .” 2015. Thesis, University of Ottawa. Accessed March 01, 2021. http://hdl.handle.net/10393/32090.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Yaoyao. “Improvements in Obreshkov-based High-Order Circuit Simulation Method .” 2015. Web. 01 Mar 2021.

Vancouver:

Lin Y. Improvements in Obreshkov-based High-Order Circuit Simulation Method . [Internet] [Thesis]. University of Ottawa; 2015. [cited 2021 Mar 01]. Available from: http://hdl.handle.net/10393/32090.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin Y. Improvements in Obreshkov-based High-Order Circuit Simulation Method . [Thesis]. University of Ottawa; 2015. Available from: http://hdl.handle.net/10393/32090

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Colorado State University

17. Tedjo, William. Biosensor system with an integrated CMOS microelectrode array for high spatio-temporal electrochemical imaging, A.

Degree: PhD, Electrical and Computer Engineering, 2019, Colorado State University

 The ability to view biological events in real time has contributed significantly to research in life sciences. While optical microscopy is important to observe anatomical… (more)

Subjects/Keywords: CMOS circuit design; instrumentation integration; biosensor system; microelectrode array; electrochemical sensor

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tedjo, W. (2019). Biosensor system with an integrated CMOS microelectrode array for high spatio-temporal electrochemical imaging, A. (Doctoral Dissertation). Colorado State University. Retrieved from http://hdl.handle.net/10217/199766

Chicago Manual of Style (16th Edition):

Tedjo, William. “Biosensor system with an integrated CMOS microelectrode array for high spatio-temporal electrochemical imaging, A.” 2019. Doctoral Dissertation, Colorado State University. Accessed March 01, 2021. http://hdl.handle.net/10217/199766.

MLA Handbook (7th Edition):

Tedjo, William. “Biosensor system with an integrated CMOS microelectrode array for high spatio-temporal electrochemical imaging, A.” 2019. Web. 01 Mar 2021.

Vancouver:

Tedjo W. Biosensor system with an integrated CMOS microelectrode array for high spatio-temporal electrochemical imaging, A. [Internet] [Doctoral dissertation]. Colorado State University; 2019. [cited 2021 Mar 01]. Available from: http://hdl.handle.net/10217/199766.

Council of Science Editors:

Tedjo W. Biosensor system with an integrated CMOS microelectrode array for high spatio-temporal electrochemical imaging, A. [Doctoral Dissertation]. Colorado State University; 2019. Available from: http://hdl.handle.net/10217/199766

18. Liu, Ting. Stability of Amorphous Silicon Thin Film Transistors and Circuits .

Degree: PhD, 2013, Princeton University

 Hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) have been widely used for the active-matrix addressing of flat panel displays, optical scanners and sensors. Extending the… (more)

Subjects/Keywords: a-Si TFTs; fabrication conditions; stability; two-stage model; voltage-programmed pixel circuit

…or rganic and metal m oxide TFTs T (F Fig. 1.3) [14 4] and make e a-Si… …circuit compensation for aSi TFTs. Chapter 2 introduces a basic knowledge of a-Si and a-Si TFTs… …Si TFTs ..................... 45 4.1. Instability mechanisms in a-Si TFTs… …52 4.1.3 Summary of instability models for a-Si TFTs… …65 Chapter 5 Optimization of Fabrication Conditions for Highly Stable a-Si TFTs… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liu, T. (2013). Stability of Amorphous Silicon Thin Film Transistors and Circuits . (Doctoral Dissertation). Princeton University. Retrieved from http://arks.princeton.edu/ark:/88435/dsp01xs55mc14f

Chicago Manual of Style (16th Edition):

Liu, Ting. “Stability of Amorphous Silicon Thin Film Transistors and Circuits .” 2013. Doctoral Dissertation, Princeton University. Accessed March 01, 2021. http://arks.princeton.edu/ark:/88435/dsp01xs55mc14f.

MLA Handbook (7th Edition):

Liu, Ting. “Stability of Amorphous Silicon Thin Film Transistors and Circuits .” 2013. Web. 01 Mar 2021.

Vancouver:

Liu T. Stability of Amorphous Silicon Thin Film Transistors and Circuits . [Internet] [Doctoral dissertation]. Princeton University; 2013. [cited 2021 Mar 01]. Available from: http://arks.princeton.edu/ark:/88435/dsp01xs55mc14f.

Council of Science Editors:

Liu T. Stability of Amorphous Silicon Thin Film Transistors and Circuits . [Doctoral Dissertation]. Princeton University; 2013. Available from: http://arks.princeton.edu/ark:/88435/dsp01xs55mc14f


Brno University of Technology

19. Chyťa, Filip. Optimalizace technologie a detekce defektů keramických struktur: Optimization of fabrication technology and defect detection for ceramics structures.

Degree: 2019, Brno University of Technology

 This work deals with the problems of defects in ceramics structures and packages, their detection and subsequent optimization of the manufacturing process in order to… (more)

Subjects/Keywords: Pouzdro; oxidová keramika; čip; pouzdření; integrovaný obvod; oxid hlinitý; Package; oxide ceramics; chip; packaging; integrated circuit; aluminum oxide

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chyťa, F. (2019). Optimalizace technologie a detekce defektů keramických struktur: Optimization of fabrication technology and defect detection for ceramics structures. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/81622

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chyťa, Filip. “Optimalizace technologie a detekce defektů keramických struktur: Optimization of fabrication technology and defect detection for ceramics structures.” 2019. Thesis, Brno University of Technology. Accessed March 01, 2021. http://hdl.handle.net/11012/81622.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chyťa, Filip. “Optimalizace technologie a detekce defektů keramických struktur: Optimization of fabrication technology and defect detection for ceramics structures.” 2019. Web. 01 Mar 2021.

Vancouver:

Chyťa F. Optimalizace technologie a detekce defektů keramických struktur: Optimization of fabrication technology and defect detection for ceramics structures. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Mar 01]. Available from: http://hdl.handle.net/11012/81622.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chyťa F. Optimalizace technologie a detekce defektů keramických struktur: Optimization of fabrication technology and defect detection for ceramics structures. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/81622

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Michigan State University

20. Li, Lin (Electrical engineer). Development of epoxy chip-in-carrier integration for lab-on-CMOS electrochemical microsystem.

Degree: 2017, Michigan State University

Thesis Ph. D. Michigan State University. Electrical Engineering 2017

"Miniaturized biosensor arrays are attractive for parallel analysis of multiple parameters and targets. Overcoming the need… (more)

Subjects/Keywords: Metal oxide semiconductors, Complementary; Interconnects (Integrated circuit technology); Metal oxide semiconductors, Complementary – Design and construction; Biosensors; Electrical engineering

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, L. (. e. (2017). Development of epoxy chip-in-carrier integration for lab-on-CMOS electrochemical microsystem. (Thesis). Michigan State University. Retrieved from http://etd.lib.msu.edu/islandora/object/etd:4572

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Lin (Electrical engineer). “Development of epoxy chip-in-carrier integration for lab-on-CMOS electrochemical microsystem.” 2017. Thesis, Michigan State University. Accessed March 01, 2021. http://etd.lib.msu.edu/islandora/object/etd:4572.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Lin (Electrical engineer). “Development of epoxy chip-in-carrier integration for lab-on-CMOS electrochemical microsystem.” 2017. Web. 01 Mar 2021.

Vancouver:

Li L(e. Development of epoxy chip-in-carrier integration for lab-on-CMOS electrochemical microsystem. [Internet] [Thesis]. Michigan State University; 2017. [cited 2021 Mar 01]. Available from: http://etd.lib.msu.edu/islandora/object/etd:4572.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li L(e. Development of epoxy chip-in-carrier integration for lab-on-CMOS electrochemical microsystem. [Thesis]. Michigan State University; 2017. Available from: http://etd.lib.msu.edu/islandora/object/etd:4572

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

21. Neveu, Florian. Design and implementation of high frequency 3D DC-DC converter : Conception et implémentation d'un convertisseur 3D DC-DC à haute fréquence.

Degree: Docteur es, Génie électrique, 2015, INSA Lyon

L’intégration ultime de convertisseurs à découpage repose sur deux axes de recherche. Le premier axe est de développer les convertisseurs à capacités commutées. Cette approche… (more)

Subjects/Keywords: Electronique de puissance; Convertisseur DC-DC; Haute fréquence; Système embarqué; Circuit intégré Complementary Metal Oxide SemiConductor - CMOS; Power Electronics; DC-DC converters; High fraquency; Integrated circuit; CMOS circuit; 621.317 072

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Neveu, F. (2015). Design and implementation of high frequency 3D DC-DC converter : Conception et implémentation d'un convertisseur 3D DC-DC à haute fréquence. (Doctoral Dissertation). INSA Lyon. Retrieved from http://www.theses.fr/2015ISAL0133

Chicago Manual of Style (16th Edition):

Neveu, Florian. “Design and implementation of high frequency 3D DC-DC converter : Conception et implémentation d'un convertisseur 3D DC-DC à haute fréquence.” 2015. Doctoral Dissertation, INSA Lyon. Accessed March 01, 2021. http://www.theses.fr/2015ISAL0133.

MLA Handbook (7th Edition):

Neveu, Florian. “Design and implementation of high frequency 3D DC-DC converter : Conception et implémentation d'un convertisseur 3D DC-DC à haute fréquence.” 2015. Web. 01 Mar 2021.

Vancouver:

Neveu F. Design and implementation of high frequency 3D DC-DC converter : Conception et implémentation d'un convertisseur 3D DC-DC à haute fréquence. [Internet] [Doctoral dissertation]. INSA Lyon; 2015. [cited 2021 Mar 01]. Available from: http://www.theses.fr/2015ISAL0133.

Council of Science Editors:

Neveu F. Design and implementation of high frequency 3D DC-DC converter : Conception et implémentation d'un convertisseur 3D DC-DC à haute fréquence. [Doctoral Dissertation]. INSA Lyon; 2015. Available from: http://www.theses.fr/2015ISAL0133


Indian Institute of Science

22. Harish, B P. Process Variability-Aware Performance Modeling In 65 nm CMOS.

Degree: PhD, Faculty of Engineering, 2011, Indian Institute of Science

 With the continued and successful scaling of CMOS, process, voltage, and temperature (PVT), variations are increasing with each technology generation. The process variability impacts all… (more)

Subjects/Keywords: Complementary Metal Oxide Semiconductors; Semiconductors; NAND Gate; Gate Delay Models; CMOS Digital Circuits; Circuit Design; Circuit Delay Performance; Circuit Delay Distribution; CMOS Designs; 65nm CMOS; Electronic Engineering

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Harish, B. P. (2011). Process Variability-Aware Performance Modeling In 65 nm CMOS. (Doctoral Dissertation). Indian Institute of Science. Retrieved from http://etd.iisc.ac.in/handle/2005/1080

Chicago Manual of Style (16th Edition):

Harish, B P. “Process Variability-Aware Performance Modeling In 65 nm CMOS.” 2011. Doctoral Dissertation, Indian Institute of Science. Accessed March 01, 2021. http://etd.iisc.ac.in/handle/2005/1080.

MLA Handbook (7th Edition):

Harish, B P. “Process Variability-Aware Performance Modeling In 65 nm CMOS.” 2011. Web. 01 Mar 2021.

Vancouver:

Harish BP. Process Variability-Aware Performance Modeling In 65 nm CMOS. [Internet] [Doctoral dissertation]. Indian Institute of Science; 2011. [cited 2021 Mar 01]. Available from: http://etd.iisc.ac.in/handle/2005/1080.

Council of Science Editors:

Harish BP. Process Variability-Aware Performance Modeling In 65 nm CMOS. [Doctoral Dissertation]. Indian Institute of Science; 2011. Available from: http://etd.iisc.ac.in/handle/2005/1080


Hong Kong University of Science and Technology

23. Li, Suwen ECE. CMOS-compatible carbon nanotube via technology.

Degree: 2017, Hong Kong University of Science and Technology

 The continuous scaling of integrated circuit technology is challenging the Cu interconnect’s physical limit. The resistivity of Cu increases rapidly due to scattering, leading to… (more)

Subjects/Keywords: Carbon nanotubes ; Interconnects (Integrated circuit technology) ; Metal oxide semiconductors, Complementary ; Design and construction

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, S. E. (2017). CMOS-compatible carbon nanotube via technology. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-91057 ; https://doi.org/10.14711/thesis-991012554660903412 ; http://repository.ust.hk/ir/bitstream/1783.1-91057/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Suwen ECE. “CMOS-compatible carbon nanotube via technology.” 2017. Thesis, Hong Kong University of Science and Technology. Accessed March 01, 2021. http://repository.ust.hk/ir/Record/1783.1-91057 ; https://doi.org/10.14711/thesis-991012554660903412 ; http://repository.ust.hk/ir/bitstream/1783.1-91057/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Suwen ECE. “CMOS-compatible carbon nanotube via technology.” 2017. Web. 01 Mar 2021.

Vancouver:

Li SE. CMOS-compatible carbon nanotube via technology. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2017. [cited 2021 Mar 01]. Available from: http://repository.ust.hk/ir/Record/1783.1-91057 ; https://doi.org/10.14711/thesis-991012554660903412 ; http://repository.ust.hk/ir/bitstream/1783.1-91057/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li SE. CMOS-compatible carbon nanotube via technology. [Thesis]. Hong Kong University of Science and Technology; 2017. Available from: http://repository.ust.hk/ir/Record/1783.1-91057 ; https://doi.org/10.14711/thesis-991012554660903412 ; http://repository.ust.hk/ir/bitstream/1783.1-91057/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Iowa State University

24. Zhang, Xu. An integrated circuit solution to Johnson noise thermometry and high-speed three-stage amplifier design.

Degree: 2019, Iowa State University

 Temperature is fundamentally important not only to physics, but also to all sciences, industry, commerce, and everyday life. As a phenomenon related to the absolute… (more)

Subjects/Keywords: Complementary metal–oxide–semiconductor; Integrated circuit; Johnson noise thermometry; Three-stage amplifier; Electrical and Electronics

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhang, X. (2019). An integrated circuit solution to Johnson noise thermometry and high-speed three-stage amplifier design. (Thesis). Iowa State University. Retrieved from https://lib.dr.iastate.edu/etd/17816

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhang, Xu. “An integrated circuit solution to Johnson noise thermometry and high-speed three-stage amplifier design.” 2019. Thesis, Iowa State University. Accessed March 01, 2021. https://lib.dr.iastate.edu/etd/17816.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhang, Xu. “An integrated circuit solution to Johnson noise thermometry and high-speed three-stage amplifier design.” 2019. Web. 01 Mar 2021.

Vancouver:

Zhang X. An integrated circuit solution to Johnson noise thermometry and high-speed three-stage amplifier design. [Internet] [Thesis]. Iowa State University; 2019. [cited 2021 Mar 01]. Available from: https://lib.dr.iastate.edu/etd/17816.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhang X. An integrated circuit solution to Johnson noise thermometry and high-speed three-stage amplifier design. [Thesis]. Iowa State University; 2019. Available from: https://lib.dr.iastate.edu/etd/17816

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of California – San Diego

25. Zhuang, Hao. Exponential Time Integration for Transient Analysis of Large-Scale Circuits.

Degree: Computer Science, 2016, University of California – San Diego

 Transient analysis of large-scale circuits relies on efficient numerical time integration algorithms. In this thesis, we focus on the high-order exponential integration and the explicit… (more)

Subjects/Keywords: Computer science; Applied mathematics; Electrical engineering; circuit simulation; dynamical systems; exponential time integration; Krylov subspace; numerical integration; power network

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhuang, H. (2016). Exponential Time Integration for Transient Analysis of Large-Scale Circuits. (Thesis). University of California – San Diego. Retrieved from http://www.escholarship.org/uc/item/60d8c2r6

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhuang, Hao. “Exponential Time Integration for Transient Analysis of Large-Scale Circuits.” 2016. Thesis, University of California – San Diego. Accessed March 01, 2021. http://www.escholarship.org/uc/item/60d8c2r6.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhuang, Hao. “Exponential Time Integration for Transient Analysis of Large-Scale Circuits.” 2016. Web. 01 Mar 2021.

Vancouver:

Zhuang H. Exponential Time Integration for Transient Analysis of Large-Scale Circuits. [Internet] [Thesis]. University of California – San Diego; 2016. [cited 2021 Mar 01]. Available from: http://www.escholarship.org/uc/item/60d8c2r6.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhuang H. Exponential Time Integration for Transient Analysis of Large-Scale Circuits. [Thesis]. University of California – San Diego; 2016. Available from: http://www.escholarship.org/uc/item/60d8c2r6

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Columbia University

26. Li, Jiangyi. Very-Large-Scale-Integration Circuit Techniques in Internet-of-Things Applications.

Degree: 2018, Columbia University

 Heading towards the era of Internet-of-things (IoT) means both opportunity and challenge for the circuit-design community. In a system where billions of devices are equipped… (more)

Subjects/Keywords: Electrical engineering; Internet of things; Electronic circuit design; Integrated circuits – Very large scale integration

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, J. (2018). Very-Large-Scale-Integration Circuit Techniques in Internet-of-Things Applications. (Doctoral Dissertation). Columbia University. Retrieved from https://doi.org/10.7916/D8BG45XN

Chicago Manual of Style (16th Edition):

Li, Jiangyi. “Very-Large-Scale-Integration Circuit Techniques in Internet-of-Things Applications.” 2018. Doctoral Dissertation, Columbia University. Accessed March 01, 2021. https://doi.org/10.7916/D8BG45XN.

MLA Handbook (7th Edition):

Li, Jiangyi. “Very-Large-Scale-Integration Circuit Techniques in Internet-of-Things Applications.” 2018. Web. 01 Mar 2021.

Vancouver:

Li J. Very-Large-Scale-Integration Circuit Techniques in Internet-of-Things Applications. [Internet] [Doctoral dissertation]. Columbia University; 2018. [cited 2021 Mar 01]. Available from: https://doi.org/10.7916/D8BG45XN.

Council of Science Editors:

Li J. Very-Large-Scale-Integration Circuit Techniques in Internet-of-Things Applications. [Doctoral Dissertation]. Columbia University; 2018. Available from: https://doi.org/10.7916/D8BG45XN


The Ohio State University

27. Bonavita, Peter J. A Multiscale Finite Element Modeling Approach for Thermal Management in Heterogeneous Integrated Circuits.

Degree: MS, Mechanical Engineering, 2019, The Ohio State University

 Modern radio frequency (RF) microsystems are challenged to deliver improved performance across an ever-changing landscape of applications and requirements. As the demand for high-power and… (more)

Subjects/Keywords: Engineering; Electrical Engineering; Mechanical Engineering; heterogeneous integration; thermal; simulation; multiscale; integrated circuit; finite element; submodel

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Bonavita, P. J. (2019). A Multiscale Finite Element Modeling Approach for Thermal Management in Heterogeneous Integrated Circuits. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu155507820020889

Chicago Manual of Style (16th Edition):

Bonavita, Peter J. “A Multiscale Finite Element Modeling Approach for Thermal Management in Heterogeneous Integrated Circuits.” 2019. Masters Thesis, The Ohio State University. Accessed March 01, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=osu155507820020889.

MLA Handbook (7th Edition):

Bonavita, Peter J. “A Multiscale Finite Element Modeling Approach for Thermal Management in Heterogeneous Integrated Circuits.” 2019. Web. 01 Mar 2021.

Vancouver:

Bonavita PJ. A Multiscale Finite Element Modeling Approach for Thermal Management in Heterogeneous Integrated Circuits. [Internet] [Masters thesis]. The Ohio State University; 2019. [cited 2021 Mar 01]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu155507820020889.

Council of Science Editors:

Bonavita PJ. A Multiscale Finite Element Modeling Approach for Thermal Management in Heterogeneous Integrated Circuits. [Masters Thesis]. The Ohio State University; 2019. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu155507820020889

28. Michard, Audrey. Conception et caractérisation d’un transmetteur électro-optique dans une plateforme photonique sur silicium visant des communications très haut débit : Design and characterization of an electro-optic transmitter in a silicon photonics platform for high data rate communications.

Degree: Docteur es, Electronique et Optoélectronique, Nano- et Microtechnologies, 2018, Université Paris-Saclay (ComUE)

La photonique sur silicium connaît depuis plusieurs années un fort développement avec la démonstration d’importants résultats concernant les interconnexions optiques. En effet, l’explosion du trafic… (more)

Subjects/Keywords: Photonique sur silicium; Circuit de qualification; Microélectronique; Intégration hybride; Silicon photonics; Testchip; Microelectronics; Hybrid integration

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Michard, A. (2018). Conception et caractérisation d’un transmetteur électro-optique dans une plateforme photonique sur silicium visant des communications très haut débit : Design and characterization of an electro-optic transmitter in a silicon photonics platform for high data rate communications. (Doctoral Dissertation). Université Paris-Saclay (ComUE). Retrieved from http://www.theses.fr/2018SACLC087

Chicago Manual of Style (16th Edition):

Michard, Audrey. “Conception et caractérisation d’un transmetteur électro-optique dans une plateforme photonique sur silicium visant des communications très haut débit : Design and characterization of an electro-optic transmitter in a silicon photonics platform for high data rate communications.” 2018. Doctoral Dissertation, Université Paris-Saclay (ComUE). Accessed March 01, 2021. http://www.theses.fr/2018SACLC087.

MLA Handbook (7th Edition):

Michard, Audrey. “Conception et caractérisation d’un transmetteur électro-optique dans une plateforme photonique sur silicium visant des communications très haut débit : Design and characterization of an electro-optic transmitter in a silicon photonics platform for high data rate communications.” 2018. Web. 01 Mar 2021.

Vancouver:

Michard A. Conception et caractérisation d’un transmetteur électro-optique dans une plateforme photonique sur silicium visant des communications très haut débit : Design and characterization of an electro-optic transmitter in a silicon photonics platform for high data rate communications. [Internet] [Doctoral dissertation]. Université Paris-Saclay (ComUE); 2018. [cited 2021 Mar 01]. Available from: http://www.theses.fr/2018SACLC087.

Council of Science Editors:

Michard A. Conception et caractérisation d’un transmetteur électro-optique dans une plateforme photonique sur silicium visant des communications très haut débit : Design and characterization of an electro-optic transmitter in a silicon photonics platform for high data rate communications. [Doctoral Dissertation]. Université Paris-Saclay (ComUE); 2018. Available from: http://www.theses.fr/2018SACLC087


Anna University

29. Suveetha dhanaselvam P. Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;.

Degree: Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects, 2015, Anna University

The steady down scaling of complementary metal oxide newlinesemiconductor CMOS device dimensions have lifted the era of micro newlineelectronics and computer aided ultra large scale… (more)

Subjects/Keywords: Complementary metal oxide semiconductor; Ultra large scale integration

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

P, S. d. (2015). Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/43541

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

P, Suveetha dhanaselvam. “Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;.” 2015. Thesis, Anna University. Accessed March 01, 2021. http://shodhganga.inflibnet.ac.in/handle/10603/43541.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

P, Suveetha dhanaselvam. “Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;.” 2015. Web. 01 Mar 2021.

Vancouver:

P Sd. Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;. [Internet] [Thesis]. Anna University; 2015. [cited 2021 Mar 01]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/43541.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

P Sd. Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;. [Thesis]. Anna University; 2015. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/43541

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Indian Institute of Science

30. Ajayan, K R. Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology.

Degree: PhD, Faculty of Engineering, 2018, Indian Institute of Science

 Process variability is a major challenge for the design of nano scale MOSFETs due to fundamental physical limits as well as process control limitations. As… (more)

Subjects/Keywords: Metal Oxide Semiconductors (MOS); Digital Integrated Circuits; Complementary Metal Oxide Semiconductors (CMOS); N-type Metal-Oxide Semiconductors (NMOS); P-type Metal-Oxide Semiconductors (PMOS); Metal Oxode Semiconductor Device Modeling; Look Up Table Model (LUT); Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET); MOSFET Models; BSIM Models; Variability Aware Device Modeling; Integrated Circuit Modeling; Circuit Design; 45nm Analog CMOS Technology; Electrical Communication Engineering

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ajayan, K. R. (2018). Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology. (Doctoral Dissertation). Indian Institute of Science. Retrieved from http://etd.iisc.ac.in/handle/2005/3516

Chicago Manual of Style (16th Edition):

Ajayan, K R. “Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology.” 2018. Doctoral Dissertation, Indian Institute of Science. Accessed March 01, 2021. http://etd.iisc.ac.in/handle/2005/3516.

MLA Handbook (7th Edition):

Ajayan, K R. “Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology.” 2018. Web. 01 Mar 2021.

Vancouver:

Ajayan KR. Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology. [Internet] [Doctoral dissertation]. Indian Institute of Science; 2018. [cited 2021 Mar 01]. Available from: http://etd.iisc.ac.in/handle/2005/3516.

Council of Science Editors:

Ajayan KR. Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology. [Doctoral Dissertation]. Indian Institute of Science; 2018. Available from: http://etd.iisc.ac.in/handle/2005/3516

[1] [2] [3] [4] [5] … [778]

.