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You searched for subject:(Non volatile memory). Showing records 1 – 30 of 143 total matches.

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Penn State University

1. Niu, Dimin. Modeling and Architecting Emerging Non-volatile Resistive Random Access Memory for Future Computer System.

Degree: 2013, Penn State University

 As leakage power and fabrication difficulty have become major obstacles of DRAM scaling, the search for new technologies as DRAM alternative has gained increased attention.… (more)

Subjects/Keywords: Memory System; Non-Volatile Memory; Resistive Memory

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APA (6th Edition):

Niu, D. (2013). Modeling and Architecting Emerging Non-volatile Resistive Random Access Memory for Future Computer System. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/19113

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Niu, Dimin. “Modeling and Architecting Emerging Non-volatile Resistive Random Access Memory for Future Computer System.” 2013. Thesis, Penn State University. Accessed April 18, 2021. https://submit-etda.libraries.psu.edu/catalog/19113.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Niu, Dimin. “Modeling and Architecting Emerging Non-volatile Resistive Random Access Memory for Future Computer System.” 2013. Web. 18 Apr 2021.

Vancouver:

Niu D. Modeling and Architecting Emerging Non-volatile Resistive Random Access Memory for Future Computer System. [Internet] [Thesis]. Penn State University; 2013. [cited 2021 Apr 18]. Available from: https://submit-etda.libraries.psu.edu/catalog/19113.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Niu D. Modeling and Architecting Emerging Non-volatile Resistive Random Access Memory for Future Computer System. [Thesis]. Penn State University; 2013. Available from: https://submit-etda.libraries.psu.edu/catalog/19113

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

2. Murali, Santosh. Investigation of bipolar resistive switching in zinc-tin-oxide for resistive random access memory.

Degree: MS, Electrical and Computer Engineering, 2011, Oregon State University

 Resistive random access memory (RRAM) is a non-volatile memory technology based on resistive switching in a dielectric or semiconductor sandwiched between two different metals. Also… (more)

Subjects/Keywords: Non-volatile memory; Random access memory

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APA (6th Edition):

Murali, S. (2011). Investigation of bipolar resistive switching in zinc-tin-oxide for resistive random access memory. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/26622

Chicago Manual of Style (16th Edition):

Murali, Santosh. “Investigation of bipolar resistive switching in zinc-tin-oxide for resistive random access memory.” 2011. Masters Thesis, Oregon State University. Accessed April 18, 2021. http://hdl.handle.net/1957/26622.

MLA Handbook (7th Edition):

Murali, Santosh. “Investigation of bipolar resistive switching in zinc-tin-oxide for resistive random access memory.” 2011. Web. 18 Apr 2021.

Vancouver:

Murali S. Investigation of bipolar resistive switching in zinc-tin-oxide for resistive random access memory. [Internet] [Masters thesis]. Oregon State University; 2011. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1957/26622.

Council of Science Editors:

Murali S. Investigation of bipolar resistive switching in zinc-tin-oxide for resistive random access memory. [Masters Thesis]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/26622


Cornell University

3. Yu, Wing-kei. Hybrid Memories For Energy Efficient Computing Systems.

Degree: PhD, Electrical Engineering, 2016, Cornell University

 To sustain processor performance, demand for memory capacity and bandwidth continues to grow. Computer architects use different memories, structured in a hierarchy, to build memory(more)

Subjects/Keywords: computer architecture; non-volatile memory; hybrid memory

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APA (6th Edition):

Yu, W. (2016). Hybrid Memories For Energy Efficient Computing Systems. (Doctoral Dissertation). Cornell University. Retrieved from http://hdl.handle.net/1813/43729

Chicago Manual of Style (16th Edition):

Yu, Wing-kei. “Hybrid Memories For Energy Efficient Computing Systems.” 2016. Doctoral Dissertation, Cornell University. Accessed April 18, 2021. http://hdl.handle.net/1813/43729.

MLA Handbook (7th Edition):

Yu, Wing-kei. “Hybrid Memories For Energy Efficient Computing Systems.” 2016. Web. 18 Apr 2021.

Vancouver:

Yu W. Hybrid Memories For Energy Efficient Computing Systems. [Internet] [Doctoral dissertation]. Cornell University; 2016. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1813/43729.

Council of Science Editors:

Yu W. Hybrid Memories For Energy Efficient Computing Systems. [Doctoral Dissertation]. Cornell University; 2016. Available from: http://hdl.handle.net/1813/43729


University of Texas – Austin

4. Kwon, Youngjin, Ph. D. Designing systems for emerging memory technologies.

Degree: PhD, Computer Science, 2018, University of Texas – Austin

 Emerging memory technologies open new challenges in system software: diversity and large capacity. Non-volatile memory (NVM) technologies will have excellent performance, byte- addressability, and large… (more)

Subjects/Keywords: Non-volatile memory; File system; Memory system

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APA (6th Edition):

Kwon, Youngjin, P. D. (2018). Designing systems for emerging memory technologies. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/68486

Chicago Manual of Style (16th Edition):

Kwon, Youngjin, Ph D. “Designing systems for emerging memory technologies.” 2018. Doctoral Dissertation, University of Texas – Austin. Accessed April 18, 2021. http://hdl.handle.net/2152/68486.

MLA Handbook (7th Edition):

Kwon, Youngjin, Ph D. “Designing systems for emerging memory technologies.” 2018. Web. 18 Apr 2021.

Vancouver:

Kwon, Youngjin PD. Designing systems for emerging memory technologies. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2018. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/2152/68486.

Council of Science Editors:

Kwon, Youngjin PD. Designing systems for emerging memory technologies. [Doctoral Dissertation]. University of Texas – Austin; 2018. Available from: http://hdl.handle.net/2152/68486


Australian National University

5. Nandi, Sanjoy Kumar. Resistive Switching in Transition Metal Oxides for Integrated Non-volatile Memory .

Degree: 2017, Australian National University

 Transition metal oxides (TMOs) exhibit characteristic resistance changes when subjected to high electric fields due to the creation, drift and diffusion of defects, and this… (more)

Subjects/Keywords: Resistive switching; non-volatile memory; volatile memory; transitional metal oxides

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APA (6th Edition):

Nandi, S. K. (2017). Resistive Switching in Transition Metal Oxides for Integrated Non-volatile Memory . (Thesis). Australian National University. Retrieved from http://hdl.handle.net/1885/116869

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Nandi, Sanjoy Kumar. “Resistive Switching in Transition Metal Oxides for Integrated Non-volatile Memory .” 2017. Thesis, Australian National University. Accessed April 18, 2021. http://hdl.handle.net/1885/116869.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Nandi, Sanjoy Kumar. “Resistive Switching in Transition Metal Oxides for Integrated Non-volatile Memory .” 2017. Web. 18 Apr 2021.

Vancouver:

Nandi SK. Resistive Switching in Transition Metal Oxides for Integrated Non-volatile Memory . [Internet] [Thesis]. Australian National University; 2017. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1885/116869.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Nandi SK. Resistive Switching in Transition Metal Oxides for Integrated Non-volatile Memory . [Thesis]. Australian National University; 2017. Available from: http://hdl.handle.net/1885/116869

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

6. Nail, Cécile. Etude de mémoire non-volatile hybride CBRAM OXRAM pour faible consommation et forte fiabilité : Investigation of hybrid CBRAM/OXRAM non-volatile memories for low consumption and high reliability.

Degree: Docteur es, Nano electronique et nano technologies, 2018, Université Grenoble Alpes (ComUE)

À mesure que les technologies de l'information (IT) continuent de croître, les dispositifs mémoires doivent évoluer pour répondre aux exigences du marché informatique. De nos… (more)

Subjects/Keywords: Mémoire; Non-Volatile; Cbram; Oxram; Memory; Non-Volatile; Cbram; Oxram; 620

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APA (6th Edition):

Nail, C. (2018). Etude de mémoire non-volatile hybride CBRAM OXRAM pour faible consommation et forte fiabilité : Investigation of hybrid CBRAM/OXRAM non-volatile memories for low consumption and high reliability. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2018GREAT010

Chicago Manual of Style (16th Edition):

Nail, Cécile. “Etude de mémoire non-volatile hybride CBRAM OXRAM pour faible consommation et forte fiabilité : Investigation of hybrid CBRAM/OXRAM non-volatile memories for low consumption and high reliability.” 2018. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed April 18, 2021. http://www.theses.fr/2018GREAT010.

MLA Handbook (7th Edition):

Nail, Cécile. “Etude de mémoire non-volatile hybride CBRAM OXRAM pour faible consommation et forte fiabilité : Investigation of hybrid CBRAM/OXRAM non-volatile memories for low consumption and high reliability.” 2018. Web. 18 Apr 2021.

Vancouver:

Nail C. Etude de mémoire non-volatile hybride CBRAM OXRAM pour faible consommation et forte fiabilité : Investigation of hybrid CBRAM/OXRAM non-volatile memories for low consumption and high reliability. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2018. [cited 2021 Apr 18]. Available from: http://www.theses.fr/2018GREAT010.

Council of Science Editors:

Nail C. Etude de mémoire non-volatile hybride CBRAM OXRAM pour faible consommation et forte fiabilité : Investigation of hybrid CBRAM/OXRAM non-volatile memories for low consumption and high reliability. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2018. Available from: http://www.theses.fr/2018GREAT010


Penn State University

7. Zheng, Yang. Modeling And Design Analysis Of Emerging Non-volatile Memories For Future Computer Systems.

Degree: 2015, Penn State University

 As traditional SRAM and DRAM are facing leakage power and fabrication difficulties beyond 22nm technology, emerging memory technologies such as spin transfer-torque RAM (STT-RAM), phase-change… (more)

Subjects/Keywords: STT-RAM; ReRAM; Non-volatile Memory

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APA (6th Edition):

Zheng, Y. (2015). Modeling And Design Analysis Of Emerging Non-volatile Memories For Future Computer Systems. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/24974

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zheng, Yang. “Modeling And Design Analysis Of Emerging Non-volatile Memories For Future Computer Systems.” 2015. Thesis, Penn State University. Accessed April 18, 2021. https://submit-etda.libraries.psu.edu/catalog/24974.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zheng, Yang. “Modeling And Design Analysis Of Emerging Non-volatile Memories For Future Computer Systems.” 2015. Web. 18 Apr 2021.

Vancouver:

Zheng Y. Modeling And Design Analysis Of Emerging Non-volatile Memories For Future Computer Systems. [Internet] [Thesis]. Penn State University; 2015. [cited 2021 Apr 18]. Available from: https://submit-etda.libraries.psu.edu/catalog/24974.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zheng Y. Modeling And Design Analysis Of Emerging Non-volatile Memories For Future Computer Systems. [Thesis]. Penn State University; 2015. Available from: https://submit-etda.libraries.psu.edu/catalog/24974

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

8. Neely, Brian. Improving Non-Volatile Memory Lifetime through Temporal Wear-Limiting.

Degree: 2014, University of California – eScholarship, University of California

Non-volatile memory technologies provide a low-power, high-density alternative to traditional DRAM main memories, yet all suffer from some degree of limited write endurance. The non-uniformity… (more)

Subjects/Keywords: Computer science; Endurance; Non-volatile memory

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APA (6th Edition):

Neely, B. (2014). Improving Non-Volatile Memory Lifetime through Temporal Wear-Limiting. (Thesis). University of California – eScholarship, University of California. Retrieved from http://www.escholarship.org/uc/item/2mf1f983

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Neely, Brian. “Improving Non-Volatile Memory Lifetime through Temporal Wear-Limiting.” 2014. Thesis, University of California – eScholarship, University of California. Accessed April 18, 2021. http://www.escholarship.org/uc/item/2mf1f983.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Neely, Brian. “Improving Non-Volatile Memory Lifetime through Temporal Wear-Limiting.” 2014. Web. 18 Apr 2021.

Vancouver:

Neely B. Improving Non-Volatile Memory Lifetime through Temporal Wear-Limiting. [Internet] [Thesis]. University of California – eScholarship, University of California; 2014. [cited 2021 Apr 18]. Available from: http://www.escholarship.org/uc/item/2mf1f983.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Neely B. Improving Non-Volatile Memory Lifetime through Temporal Wear-Limiting. [Thesis]. University of California – eScholarship, University of California; 2014. Available from: http://www.escholarship.org/uc/item/2mf1f983

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Texas – Austin

9. Chen, Ying-Chen. Selector-less resistive random access memory (RRAM) with intrinsic nonlinearity for crossbar array applications.

Degree: PhD, Electrical and Computer Engineering, 2019, University of Texas – Austin

 With increasing demand for high-density memory applications, alternative memory technology has been intensively investigated for replacing conventional charge-based flash memory. Among the emerging memory technology,… (more)

Subjects/Keywords: RRAM; Non-volatile memory; Nonlinearity; Selectorless

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APA (6th Edition):

Chen, Y. (2019). Selector-less resistive random access memory (RRAM) with intrinsic nonlinearity for crossbar array applications. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://dx.doi.org/10.26153/tsw/5799

Chicago Manual of Style (16th Edition):

Chen, Ying-Chen. “Selector-less resistive random access memory (RRAM) with intrinsic nonlinearity for crossbar array applications.” 2019. Doctoral Dissertation, University of Texas – Austin. Accessed April 18, 2021. http://dx.doi.org/10.26153/tsw/5799.

MLA Handbook (7th Edition):

Chen, Ying-Chen. “Selector-less resistive random access memory (RRAM) with intrinsic nonlinearity for crossbar array applications.” 2019. Web. 18 Apr 2021.

Vancouver:

Chen Y. Selector-less resistive random access memory (RRAM) with intrinsic nonlinearity for crossbar array applications. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2019. [cited 2021 Apr 18]. Available from: http://dx.doi.org/10.26153/tsw/5799.

Council of Science Editors:

Chen Y. Selector-less resistive random access memory (RRAM) with intrinsic nonlinearity for crossbar array applications. [Doctoral Dissertation]. University of Texas – Austin; 2019. Available from: http://dx.doi.org/10.26153/tsw/5799


Southern Illinois University

10. Sahebkarkhorasani, Seyedmorteza. A Non-destructive Crossbar Architecture of Multi-Level Memory-Based Resistor.

Degree: MS, Electrical and Computer Engineering, 2015, Southern Illinois University

  Nowadays, researchers are trying to shrink the memory cell in order to increase the capacity of the memory system and reduce the hardware costs.… (more)

Subjects/Keywords: crossbar architecture; Memristors; multi-level memory; Non-destructive; Non-Volatile Memory

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sahebkarkhorasani, S. (2015). A Non-destructive Crossbar Architecture of Multi-Level Memory-Based Resistor. (Masters Thesis). Southern Illinois University. Retrieved from https://opensiuc.lib.siu.edu/theses/1629

Chicago Manual of Style (16th Edition):

Sahebkarkhorasani, Seyedmorteza. “A Non-destructive Crossbar Architecture of Multi-Level Memory-Based Resistor.” 2015. Masters Thesis, Southern Illinois University. Accessed April 18, 2021. https://opensiuc.lib.siu.edu/theses/1629.

MLA Handbook (7th Edition):

Sahebkarkhorasani, Seyedmorteza. “A Non-destructive Crossbar Architecture of Multi-Level Memory-Based Resistor.” 2015. Web. 18 Apr 2021.

Vancouver:

Sahebkarkhorasani S. A Non-destructive Crossbar Architecture of Multi-Level Memory-Based Resistor. [Internet] [Masters thesis]. Southern Illinois University; 2015. [cited 2021 Apr 18]. Available from: https://opensiuc.lib.siu.edu/theses/1629.

Council of Science Editors:

Sahebkarkhorasani S. A Non-destructive Crossbar Architecture of Multi-Level Memory-Based Resistor. [Masters Thesis]. Southern Illinois University; 2015. Available from: https://opensiuc.lib.siu.edu/theses/1629


Virginia Tech

11. Verma, Mohini. Formation and Rupture of Nanofilaments in Metal/TaOx/Metal Resistive Switches.

Degree: MS, Electrical and Computer Engineering, 2012, Virginia Tech

 There is an increased interest in the Conductive Bridge Random Access Memory (CBRAM) and Resistive Random Access Memory (RRAM) because of their excellent scaling potential,… (more)

Subjects/Keywords: resistive switch; non-volatile memory; volatile switching; memristor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Verma, M. (2012). Formation and Rupture of Nanofilaments in Metal/TaOx/Metal Resistive Switches. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/44726

Chicago Manual of Style (16th Edition):

Verma, Mohini. “Formation and Rupture of Nanofilaments in Metal/TaOx/Metal Resistive Switches.” 2012. Masters Thesis, Virginia Tech. Accessed April 18, 2021. http://hdl.handle.net/10919/44726.

MLA Handbook (7th Edition):

Verma, Mohini. “Formation and Rupture of Nanofilaments in Metal/TaOx/Metal Resistive Switches.” 2012. Web. 18 Apr 2021.

Vancouver:

Verma M. Formation and Rupture of Nanofilaments in Metal/TaOx/Metal Resistive Switches. [Internet] [Masters thesis]. Virginia Tech; 2012. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10919/44726.

Council of Science Editors:

Verma M. Formation and Rupture of Nanofilaments in Metal/TaOx/Metal Resistive Switches. [Masters Thesis]. Virginia Tech; 2012. Available from: http://hdl.handle.net/10919/44726


University of North Texas

12. Islam, Mahzabeen. A Study on Flat-Address-Space Heterogeneous Memory Architectures.

Degree: 2019, University of North Texas

 In this dissertation, we present a number of studies that primarily focus on data movement challenges among different types of memories (viz., 3D-DRAM, DDRx DRAM… (more)

Subjects/Keywords: heterogeneous memory; flat-address memory; non-volatile memory; prefetching; page migration

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APA (6th Edition):

Islam, M. (2019). A Study on Flat-Address-Space Heterogeneous Memory Architectures. (Thesis). University of North Texas. Retrieved from https://digital.library.unt.edu/ark:/67531/metadc1505134/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Islam, Mahzabeen. “A Study on Flat-Address-Space Heterogeneous Memory Architectures.” 2019. Thesis, University of North Texas. Accessed April 18, 2021. https://digital.library.unt.edu/ark:/67531/metadc1505134/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Islam, Mahzabeen. “A Study on Flat-Address-Space Heterogeneous Memory Architectures.” 2019. Web. 18 Apr 2021.

Vancouver:

Islam M. A Study on Flat-Address-Space Heterogeneous Memory Architectures. [Internet] [Thesis]. University of North Texas; 2019. [cited 2021 Apr 18]. Available from: https://digital.library.unt.edu/ark:/67531/metadc1505134/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Islam M. A Study on Flat-Address-Space Heterogeneous Memory Architectures. [Thesis]. University of North Texas; 2019. Available from: https://digital.library.unt.edu/ark:/67531/metadc1505134/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

13. Poremba, Matthew Raymond. Architecting Byte-addressable Non-volatile Memories for Main Memory.

Degree: 2015, Penn State University

 New breakthroughs in memory technology in recent years has lead to increased research efforts in so-called byte-addressable non-volatile memories (NVM). As a result, questions of… (more)

Subjects/Keywords: Computer Memory; Non-Volatile Memory; DRAM; Memory Scheduling; Memory Modeling; Memory Simulation

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Poremba, M. R. (2015). Architecting Byte-addressable Non-volatile Memories for Main Memory. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/25034

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Poremba, Matthew Raymond. “Architecting Byte-addressable Non-volatile Memories for Main Memory.” 2015. Thesis, Penn State University. Accessed April 18, 2021. https://submit-etda.libraries.psu.edu/catalog/25034.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Poremba, Matthew Raymond. “Architecting Byte-addressable Non-volatile Memories for Main Memory.” 2015. Web. 18 Apr 2021.

Vancouver:

Poremba MR. Architecting Byte-addressable Non-volatile Memories for Main Memory. [Internet] [Thesis]. Penn State University; 2015. [cited 2021 Apr 18]. Available from: https://submit-etda.libraries.psu.edu/catalog/25034.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Poremba MR. Architecting Byte-addressable Non-volatile Memories for Main Memory. [Thesis]. Penn State University; 2015. Available from: https://submit-etda.libraries.psu.edu/catalog/25034

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

14. Xu, Cong. Modeling, Circuit Design, and Microarchitectural Optimization of Emerging Resistive Memory.

Degree: 2014, Penn State University

 Conventional memories technologies such as SRAM, DRAM, and NAND flash are facing formidable device scaling challenges. Various new non-volatile memory (NVM) technologies have emerged recently,… (more)

Subjects/Keywords: Non-Volatile Memory; ReRAM; Computer Architecture; Memory System

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Xu, C. (2014). Modeling, Circuit Design, and Microarchitectural Optimization of Emerging Resistive Memory. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/23577

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Xu, Cong. “Modeling, Circuit Design, and Microarchitectural Optimization of Emerging Resistive Memory.” 2014. Thesis, Penn State University. Accessed April 18, 2021. https://submit-etda.libraries.psu.edu/catalog/23577.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Xu, Cong. “Modeling, Circuit Design, and Microarchitectural Optimization of Emerging Resistive Memory.” 2014. Web. 18 Apr 2021.

Vancouver:

Xu C. Modeling, Circuit Design, and Microarchitectural Optimization of Emerging Resistive Memory. [Internet] [Thesis]. Penn State University; 2014. [cited 2021 Apr 18]. Available from: https://submit-etda.libraries.psu.edu/catalog/23577.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Xu C. Modeling, Circuit Design, and Microarchitectural Optimization of Emerging Resistive Memory. [Thesis]. Penn State University; 2014. Available from: https://submit-etda.libraries.psu.edu/catalog/23577

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Chicago

15. Porush, Vivek. Architectural Support For Unified Memory Controller.

Degree: 2016, University of Illinois – Chicago

 Advances in semiconductor fabrication technology and processor architecture has resulted in development of high performance processors. These processors have multi – core, thread architecture that… (more)

Subjects/Keywords: Memory architecture; Memory Controller; UniMA; Non - Volatile Memories

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Porush, V. (2016). Architectural Support For Unified Memory Controller. (Thesis). University of Illinois – Chicago. Retrieved from http://hdl.handle.net/10027/20814

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Porush, Vivek. “Architectural Support For Unified Memory Controller.” 2016. Thesis, University of Illinois – Chicago. Accessed April 18, 2021. http://hdl.handle.net/10027/20814.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Porush, Vivek. “Architectural Support For Unified Memory Controller.” 2016. Web. 18 Apr 2021.

Vancouver:

Porush V. Architectural Support For Unified Memory Controller. [Internet] [Thesis]. University of Illinois – Chicago; 2016. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10027/20814.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Porush V. Architectural Support For Unified Memory Controller. [Thesis]. University of Illinois – Chicago; 2016. Available from: http://hdl.handle.net/10027/20814

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

16. Shull, Thomas Edward. Making non-volatile memory programmable.

Degree: PhD, Computer Science, 2020, University of Illinois – Urbana-Champaign

 Byte-addressable, non-volatile memory (NVM) is emerging as a revolutionary memory technology that provides persistence, near-DRAM performance, and scalable capacity. By using NVM, applications can directly… (more)

Subjects/Keywords: non-volatile memory; java; instruction set architecture; memory models

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Shull, T. E. (2020). Making non-volatile memory programmable. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/108493

Chicago Manual of Style (16th Edition):

Shull, Thomas Edward. “Making non-volatile memory programmable.” 2020. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed April 18, 2021. http://hdl.handle.net/2142/108493.

MLA Handbook (7th Edition):

Shull, Thomas Edward. “Making non-volatile memory programmable.” 2020. Web. 18 Apr 2021.

Vancouver:

Shull TE. Making non-volatile memory programmable. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2020. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/2142/108493.

Council of Science Editors:

Shull TE. Making non-volatile memory programmable. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2020. Available from: http://hdl.handle.net/2142/108493


University of Texas – Austin

17. Hsieh, Cheng Chih. Cerium oxide based resistive random access memory devices.

Degree: PhD, Electrical and Computer Engineering, 2017, University of Texas – Austin

 Resistive Random Access Memory (RRAM) is an emerging technology of non-volatile memory (NVM). Although the observation of metal oxide that can undergo an abrupt insulator-metal… (more)

Subjects/Keywords: Non-volatile memory; Neuromorphic computing; Deep learning; Machine learning; Memory

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsieh, C. C. (2017). Cerium oxide based resistive random access memory devices. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/63012

Chicago Manual of Style (16th Edition):

Hsieh, Cheng Chih. “Cerium oxide based resistive random access memory devices.” 2017. Doctoral Dissertation, University of Texas – Austin. Accessed April 18, 2021. http://hdl.handle.net/2152/63012.

MLA Handbook (7th Edition):

Hsieh, Cheng Chih. “Cerium oxide based resistive random access memory devices.” 2017. Web. 18 Apr 2021.

Vancouver:

Hsieh CC. Cerium oxide based resistive random access memory devices. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2017. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/2152/63012.

Council of Science Editors:

Hsieh CC. Cerium oxide based resistive random access memory devices. [Doctoral Dissertation]. University of Texas – Austin; 2017. Available from: http://hdl.handle.net/2152/63012


Université de Sherbrooke

18. Rousseau, Alexandre. Nanofil de cuivre pour des applications de mémoire non-volatile contrôlés par électromigration: Copper nanowire for memristive application controled via electromigration.

Degree: 2019, Université de Sherbrooke

 Les mémoires non volatiles de type RRAM (Resistive Random Access Memory) font partie d'une catégorie de mémoire qui sont de bon candidat pour éventuellement remplacer… (more)

Subjects/Keywords: Électromigration; Mémoire résistive; RRAM; Nanodamascène; Mémoire non colatiles; Electromigration; Resistive memory; Non-volatile memory; Nanodamascene

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rousseau, A. (2019). Nanofil de cuivre pour des applications de mémoire non-volatile contrôlés par électromigration: Copper nanowire for memristive application controled via electromigration. (Masters Thesis). Université de Sherbrooke. Retrieved from http://hdl.handle.net/11143/16342

Chicago Manual of Style (16th Edition):

Rousseau, Alexandre. “Nanofil de cuivre pour des applications de mémoire non-volatile contrôlés par électromigration: Copper nanowire for memristive application controled via electromigration.” 2019. Masters Thesis, Université de Sherbrooke. Accessed April 18, 2021. http://hdl.handle.net/11143/16342.

MLA Handbook (7th Edition):

Rousseau, Alexandre. “Nanofil de cuivre pour des applications de mémoire non-volatile contrôlés par électromigration: Copper nanowire for memristive application controled via electromigration.” 2019. Web. 18 Apr 2021.

Vancouver:

Rousseau A. Nanofil de cuivre pour des applications de mémoire non-volatile contrôlés par électromigration: Copper nanowire for memristive application controled via electromigration. [Internet] [Masters thesis]. Université de Sherbrooke; 2019. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/11143/16342.

Council of Science Editors:

Rousseau A. Nanofil de cuivre pour des applications de mémoire non-volatile contrôlés par électromigration: Copper nanowire for memristive application controled via electromigration. [Masters Thesis]. Université de Sherbrooke; 2019. Available from: http://hdl.handle.net/11143/16342


Penn State University

19. Jadidi, Amin. ARCHITECTURAL TECHNIQUES TO ENABLE RELIABLE AND HIGH PERFORMANCE MEMORY HIERARCHY IN CHIP MULTI-PROCESSORS.

Degree: 2018, Penn State University

 Constant technology scaling has enabled modern computing systems to achieve high degrees of thread-level parallelism, making the design of a highly scalable and dense memory(more)

Subjects/Keywords: Memory Hierarchy; Non-volatile Memory Technologies; Hybrid Memory Hierarchy; Reliability; High Performance; Chip Multi-Processors

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jadidi, A. (2018). ARCHITECTURAL TECHNIQUES TO ENABLE RELIABLE AND HIGH PERFORMANCE MEMORY HIERARCHY IN CHIP MULTI-PROCESSORS. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/15383axj945

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jadidi, Amin. “ARCHITECTURAL TECHNIQUES TO ENABLE RELIABLE AND HIGH PERFORMANCE MEMORY HIERARCHY IN CHIP MULTI-PROCESSORS.” 2018. Thesis, Penn State University. Accessed April 18, 2021. https://submit-etda.libraries.psu.edu/catalog/15383axj945.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jadidi, Amin. “ARCHITECTURAL TECHNIQUES TO ENABLE RELIABLE AND HIGH PERFORMANCE MEMORY HIERARCHY IN CHIP MULTI-PROCESSORS.” 2018. Web. 18 Apr 2021.

Vancouver:

Jadidi A. ARCHITECTURAL TECHNIQUES TO ENABLE RELIABLE AND HIGH PERFORMANCE MEMORY HIERARCHY IN CHIP MULTI-PROCESSORS. [Internet] [Thesis]. Penn State University; 2018. [cited 2021 Apr 18]. Available from: https://submit-etda.libraries.psu.edu/catalog/15383axj945.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jadidi A. ARCHITECTURAL TECHNIQUES TO ENABLE RELIABLE AND HIGH PERFORMANCE MEMORY HIERARCHY IN CHIP MULTI-PROCESSORS. [Thesis]. Penn State University; 2018. Available from: https://submit-etda.libraries.psu.edu/catalog/15383axj945

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

20. Cheng, Hsiang-Yun. EXPLOITING AND ACCOMMODATING ASYMMETRIES IN MEMORY TO ENABLE EFFICIENT MULTI-CORE SYSTEMS.

Degree: 2016, Penn State University

 The memory hierarchy, including on-chip caches and off-chip main memory, is becoming the performance and energy bottleneck in multi-core systems, and architectural techniques are needed… (more)

Subjects/Keywords: Memory systems; Asymmetric access; Energy efficiency; Cache; Memory request scheduling; Power management; Non-volatile memory

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Cheng, H. (2016). EXPLOITING AND ACCOMMODATING ASYMMETRIES IN MEMORY TO ENABLE EFFICIENT MULTI-CORE SYSTEMS. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/0c483j36g

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Cheng, Hsiang-Yun. “EXPLOITING AND ACCOMMODATING ASYMMETRIES IN MEMORY TO ENABLE EFFICIENT MULTI-CORE SYSTEMS.” 2016. Thesis, Penn State University. Accessed April 18, 2021. https://submit-etda.libraries.psu.edu/catalog/0c483j36g.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Cheng, Hsiang-Yun. “EXPLOITING AND ACCOMMODATING ASYMMETRIES IN MEMORY TO ENABLE EFFICIENT MULTI-CORE SYSTEMS.” 2016. Web. 18 Apr 2021.

Vancouver:

Cheng H. EXPLOITING AND ACCOMMODATING ASYMMETRIES IN MEMORY TO ENABLE EFFICIENT MULTI-CORE SYSTEMS. [Internet] [Thesis]. Penn State University; 2016. [cited 2021 Apr 18]. Available from: https://submit-etda.libraries.psu.edu/catalog/0c483j36g.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Cheng H. EXPLOITING AND ACCOMMODATING ASYMMETRIES IN MEMORY TO ENABLE EFFICIENT MULTI-CORE SYSTEMS. [Thesis]. Penn State University; 2016. Available from: https://submit-etda.libraries.psu.edu/catalog/0c483j36g

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

21. Chi, Ping. Facilitating Emerging Non-volatile Memories in Next-Generation Memory System Design: Architecture-Level and Application-Level Perspectives.

Degree: 2016, University of California – eScholarship, University of California

 This dissertation focuses on three types of emerging NVMs, spin-transfer torque RAM (STT-RAM), phase change memory (PCM), and metal-oxide resistive RAM (ReRAM). STT-RAM has been… (more)

Subjects/Keywords: Computer engineering; memory system design; non-volatile memory; phase change memory; ReRAM; STT-RAM

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APA (6th Edition):

Chi, P. (2016). Facilitating Emerging Non-volatile Memories in Next-Generation Memory System Design: Architecture-Level and Application-Level Perspectives. (Thesis). University of California – eScholarship, University of California. Retrieved from http://www.escholarship.org/uc/item/2g6962cg

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chi, Ping. “Facilitating Emerging Non-volatile Memories in Next-Generation Memory System Design: Architecture-Level and Application-Level Perspectives.” 2016. Thesis, University of California – eScholarship, University of California. Accessed April 18, 2021. http://www.escholarship.org/uc/item/2g6962cg.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chi, Ping. “Facilitating Emerging Non-volatile Memories in Next-Generation Memory System Design: Architecture-Level and Application-Level Perspectives.” 2016. Web. 18 Apr 2021.

Vancouver:

Chi P. Facilitating Emerging Non-volatile Memories in Next-Generation Memory System Design: Architecture-Level and Application-Level Perspectives. [Internet] [Thesis]. University of California – eScholarship, University of California; 2016. [cited 2021 Apr 18]. Available from: http://www.escholarship.org/uc/item/2g6962cg.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chi P. Facilitating Emerging Non-volatile Memories in Next-Generation Memory System Design: Architecture-Level and Application-Level Perspectives. [Thesis]. University of California – eScholarship, University of California; 2016. Available from: http://www.escholarship.org/uc/item/2g6962cg

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Boise State University

22. Wolf, Kasandra. Radiation-Induced Effects in Chalcogenide-Based Memory Devices and Films.

Degree: 2014, Boise State University

 Continued scaling of memory devices has produced many issues for the current foremost non-volatile memory—the flash memory—leading to the emergence of a wide variety of… (more)

Subjects/Keywords: chalcogenide glasses; non-volatile memory; radiation induced effects; Nanotechnology Fabrication

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APA (6th Edition):

Wolf, K. (2014). Radiation-Induced Effects in Chalcogenide-Based Memory Devices and Films. (Thesis). Boise State University. Retrieved from https://scholarworks.boisestate.edu/td/886

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wolf, Kasandra. “Radiation-Induced Effects in Chalcogenide-Based Memory Devices and Films.” 2014. Thesis, Boise State University. Accessed April 18, 2021. https://scholarworks.boisestate.edu/td/886.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wolf, Kasandra. “Radiation-Induced Effects in Chalcogenide-Based Memory Devices and Films.” 2014. Web. 18 Apr 2021.

Vancouver:

Wolf K. Radiation-Induced Effects in Chalcogenide-Based Memory Devices and Films. [Internet] [Thesis]. Boise State University; 2014. [cited 2021 Apr 18]. Available from: https://scholarworks.boisestate.edu/td/886.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wolf K. Radiation-Induced Effects in Chalcogenide-Based Memory Devices and Films. [Thesis]. Boise State University; 2014. Available from: https://scholarworks.boisestate.edu/td/886

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

23. Chen, Yan-yu. Study on the Fabrication of Non-volatile memory with Metal Nanocrystals.

Degree: Master, Electro-Optical Engineering, 2005, NSYSU

 In recent years, the fundamental researches on nanocrystals have been received increasing attentions for the novel applications, especially the nonvolatile memory technology. Adoption of nanocrystals… (more)

Subjects/Keywords: Metal Nanocrystals; Non-volatile memory

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APA (6th Edition):

Chen, Y. (2005). Study on the Fabrication of Non-volatile memory with Metal Nanocrystals. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907105-015542

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Yan-yu. “Study on the Fabrication of Non-volatile memory with Metal Nanocrystals.” 2005. Thesis, NSYSU. Accessed April 18, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907105-015542.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Yan-yu. “Study on the Fabrication of Non-volatile memory with Metal Nanocrystals.” 2005. Web. 18 Apr 2021.

Vancouver:

Chen Y. Study on the Fabrication of Non-volatile memory with Metal Nanocrystals. [Internet] [Thesis]. NSYSU; 2005. [cited 2021 Apr 18]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907105-015542.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen Y. Study on the Fabrication of Non-volatile memory with Metal Nanocrystals. [Thesis]. NSYSU; 2005. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907105-015542

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

24. Huang, Jian-bing. The research of Silicon-Germanium-Oxide thin film in nonvolatile memory application.

Degree: Master, Materials and Optoelectronic Science, 2012, NSYSU

 The operating characteristics of non-volatile memory for modern requirement are high-density , low power consumption, fast read and write speed, and good reliability. The floating… (more)

Subjects/Keywords: stability; non-volatile memory; Si-Ge-O; nitrogen doping; RRAM

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APA (6th Edition):

Huang, J. (2012). The research of Silicon-Germanium-Oxide thin film in nonvolatile memory application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629112-092948

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Jian-bing. “The research of Silicon-Germanium-Oxide thin film in nonvolatile memory application.” 2012. Thesis, NSYSU. Accessed April 18, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629112-092948.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Jian-bing. “The research of Silicon-Germanium-Oxide thin film in nonvolatile memory application.” 2012. Web. 18 Apr 2021.

Vancouver:

Huang J. The research of Silicon-Germanium-Oxide thin film in nonvolatile memory application. [Internet] [Thesis]. NSYSU; 2012. [cited 2021 Apr 18]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629112-092948.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang J. The research of Silicon-Germanium-Oxide thin film in nonvolatile memory application. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629112-092948

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of California – San Diego

25. Bhaskaran, Meenakshi Sundaram. Micro-Architecture and Systems Support for Emerging Non-Volatile Memories.

Degree: Computer Science, 2016, University of California – San Diego

 Emerging non-volatile memory technologies such as phase-change memory, resistive random access memory, spin-torque transfer memory and 3D XPoint memory promise to significantly increase the I/O… (more)

Subjects/Keywords: Computer science; Hardware/Software Design; Microarchitecture; Non-Volatile Memory; Storage Systems

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APA (6th Edition):

Bhaskaran, M. S. (2016). Micro-Architecture and Systems Support for Emerging Non-Volatile Memories. (Thesis). University of California – San Diego. Retrieved from http://www.escholarship.org/uc/item/07c1z320

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Bhaskaran, Meenakshi Sundaram. “Micro-Architecture and Systems Support for Emerging Non-Volatile Memories.” 2016. Thesis, University of California – San Diego. Accessed April 18, 2021. http://www.escholarship.org/uc/item/07c1z320.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Bhaskaran, Meenakshi Sundaram. “Micro-Architecture and Systems Support for Emerging Non-Volatile Memories.” 2016. Web. 18 Apr 2021.

Vancouver:

Bhaskaran MS. Micro-Architecture and Systems Support for Emerging Non-Volatile Memories. [Internet] [Thesis]. University of California – San Diego; 2016. [cited 2021 Apr 18]. Available from: http://www.escholarship.org/uc/item/07c1z320.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Bhaskaran MS. Micro-Architecture and Systems Support for Emerging Non-Volatile Memories. [Thesis]. University of California – San Diego; 2016. Available from: http://www.escholarship.org/uc/item/07c1z320

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

26. Προδρομάκης, Αντώνιος. Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών.

Degree: 2015, University of Patras

 Τις τελευταίες δεκαετίες, η ανάπτυξη των non-volatile μνημών (NVMs) κατέστησε ικανή την αντικατάσταση volatile μνημών, όπως των DRAMs και των μαγνητικών σκληρών δίσκων (HDDs), σε… (more)

Subjects/Keywords: Εξομοίωση; Γήρανση; 621.397; NAND flash; PCM; Non-volatile memory (NVM); FPGA

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APA (6th Edition):

Προδρομάκης, . (2015). Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών. (Masters Thesis). University of Patras. Retrieved from http://hdl.handle.net/10889/8815

Chicago Manual of Style (16th Edition):

Προδρομάκης, Αντώνιος. “Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών.” 2015. Masters Thesis, University of Patras. Accessed April 18, 2021. http://hdl.handle.net/10889/8815.

MLA Handbook (7th Edition):

Προδρομάκης, Αντώνιος. “Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών.” 2015. Web. 18 Apr 2021.

Vancouver:

Προδρομάκης . Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών. [Internet] [Masters thesis]. University of Patras; 2015. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10889/8815.

Council of Science Editors:

Προδρομάκης . Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών. [Masters Thesis]. University of Patras; 2015. Available from: http://hdl.handle.net/10889/8815


Oregon State University

27. Rajachidambaram, Jaana Saranya. Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications.

Degree: MS, Chemical Engineering, 2011, Oregon State University

 Thin-film transistors (TFTs) are primarily used as a switching element in liquid crystal displays. Currently, amorphous silicon is the dominant TFT technology for displays, but… (more)

Subjects/Keywords: non volatile memory; High-resistance states; Thin film transistors

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APA (6th Edition):

Rajachidambaram, J. S. (2011). Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/26517

Chicago Manual of Style (16th Edition):

Rajachidambaram, Jaana Saranya. “Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications.” 2011. Masters Thesis, Oregon State University. Accessed April 18, 2021. http://hdl.handle.net/1957/26517.

MLA Handbook (7th Edition):

Rajachidambaram, Jaana Saranya. “Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications.” 2011. Web. 18 Apr 2021.

Vancouver:

Rajachidambaram JS. Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications. [Internet] [Masters thesis]. Oregon State University; 2011. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1957/26517.

Council of Science Editors:

Rajachidambaram JS. Evaluation of amorphous oxide semiconductors for thin film transistors (TFTs) and resistive random access memory (RRAM) applications. [Masters Thesis]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/26517


Texas A&M University

28. Zhang, Shumao. Doped Metal Oxide High-K Gate Dielectric for Nonvolatile Memory and Light Emitting Applications.

Degree: PhD, Chemical Engineering, 2017, Texas A&M University

 The zirconium-doped hafnium oxide (ZrHfO) high-k thin film has excellent gate dielectric properties, such as a higher crystallization temperature, a lower defect density, and a… (more)

Subjects/Keywords: high-k material; non-volatile memory; LED; dielectric breakdown; reliability.

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhang, S. (2017). Doped Metal Oxide High-K Gate Dielectric for Nonvolatile Memory and Light Emitting Applications. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/187306

Chicago Manual of Style (16th Edition):

Zhang, Shumao. “Doped Metal Oxide High-K Gate Dielectric for Nonvolatile Memory and Light Emitting Applications.” 2017. Doctoral Dissertation, Texas A&M University. Accessed April 18, 2021. http://hdl.handle.net/1969.1/187306.

MLA Handbook (7th Edition):

Zhang, Shumao. “Doped Metal Oxide High-K Gate Dielectric for Nonvolatile Memory and Light Emitting Applications.” 2017. Web. 18 Apr 2021.

Vancouver:

Zhang S. Doped Metal Oxide High-K Gate Dielectric for Nonvolatile Memory and Light Emitting Applications. [Internet] [Doctoral dissertation]. Texas A&M University; 2017. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1969.1/187306.

Council of Science Editors:

Zhang S. Doped Metal Oxide High-K Gate Dielectric for Nonvolatile Memory and Light Emitting Applications. [Doctoral Dissertation]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/187306


Penn State University

29. Dong, Xiangyu. Modeling and Leveraging Emerging Non-Volatile Memories for Future Computer Designs .

Degree: 2011, Penn State University

 Energy efficiency has become a major constraint in the design of computing systems today. As CMOS continues scaling down, traditional CMOS scaling theory requires to… (more)

Subjects/Keywords: application; architecture; circuit; non-volatile memory; STTRAM; PCRAM; ReRAM

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Dong, X. (2011). Modeling and Leveraging Emerging Non-Volatile Memories for Future Computer Designs . (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/12462

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Dong, Xiangyu. “Modeling and Leveraging Emerging Non-Volatile Memories for Future Computer Designs .” 2011. Thesis, Penn State University. Accessed April 18, 2021. https://submit-etda.libraries.psu.edu/catalog/12462.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Dong, Xiangyu. “Modeling and Leveraging Emerging Non-Volatile Memories for Future Computer Designs .” 2011. Web. 18 Apr 2021.

Vancouver:

Dong X. Modeling and Leveraging Emerging Non-Volatile Memories for Future Computer Designs . [Internet] [Thesis]. Penn State University; 2011. [cited 2021 Apr 18]. Available from: https://submit-etda.libraries.psu.edu/catalog/12462.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Dong X. Modeling and Leveraging Emerging Non-Volatile Memories for Future Computer Designs . [Thesis]. Penn State University; 2011. Available from: https://submit-etda.libraries.psu.edu/catalog/12462

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Toronto

30. Huda, Safeen. Modeling and Design of Spin Torque Transfer Magnetoresistive Random Access Memory.

Degree: 2012, University of Toronto

This thesis presents the modeling and design of memory cells for Spin Torque Transfer Magnetoresistive Random Access Memory (STT-MRAM). The theory of operation of STT-MRAM… (more)

Subjects/Keywords: Computer Hardware; Random Access Memory; Spintronics; Non-volatile; MRAM; 0544

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huda, S. (2012). Modeling and Design of Spin Torque Transfer Magnetoresistive Random Access Memory. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/42393

Chicago Manual of Style (16th Edition):

Huda, Safeen. “Modeling and Design of Spin Torque Transfer Magnetoresistive Random Access Memory.” 2012. Masters Thesis, University of Toronto. Accessed April 18, 2021. http://hdl.handle.net/1807/42393.

MLA Handbook (7th Edition):

Huda, Safeen. “Modeling and Design of Spin Torque Transfer Magnetoresistive Random Access Memory.” 2012. Web. 18 Apr 2021.

Vancouver:

Huda S. Modeling and Design of Spin Torque Transfer Magnetoresistive Random Access Memory. [Internet] [Masters thesis]. University of Toronto; 2012. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1807/42393.

Council of Science Editors:

Huda S. Modeling and Design of Spin Torque Transfer Magnetoresistive Random Access Memory. [Masters Thesis]. University of Toronto; 2012. Available from: http://hdl.handle.net/1807/42393

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