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You searched for subject:(Mixed analog digital integrated circuits). Showing records 1 – 30 of 34035 total matches.

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University of Pretoria

1. Reddy, Reeshen. Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology.

Degree: MEng, Electrical, Electronic and Computer Engineering, 2015, University of Pretoria

 High-speed digital to analogue converters (DAC), which are optimised for large bandwidth signal synthesis applications, are a fundamental building block and enabling technology in industrial… (more)

Subjects/Keywords: Microelectronic; Digital-analogue conversion; BiCMOS integrated circuits; Dynamic range; Analogue-digital integrated circuits; Mixed analogue digital integrated circuits; UCTD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Reddy, R. (2015). Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology. (Masters Thesis). University of Pretoria. Retrieved from http://hdl.handle.net/2263/48947

Chicago Manual of Style (16th Edition):

Reddy, Reeshen. “Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology.” 2015. Masters Thesis, University of Pretoria. Accessed August 19, 2019. http://hdl.handle.net/2263/48947.

MLA Handbook (7th Edition):

Reddy, Reeshen. “Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology.” 2015. Web. 19 Aug 2019.

Vancouver:

Reddy R. Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology. [Internet] [Masters thesis]. University of Pretoria; 2015. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/2263/48947.

Council of Science Editors:

Reddy R. Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology. [Masters Thesis]. University of Pretoria; 2015. Available from: http://hdl.handle.net/2263/48947


University of Oulu

2. Korhonen, E. (Esa). On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus.

Degree: 2010, University of Oulu

 Abstract The static linearity testing of analog-to-digital and digital-to-analog converters (ADCs and DACs) has traditionally required test instruments with higher linearity and resolution than that… (more)

Subjects/Keywords: algorithms; analog-digital conversion; built-in testing; digital-analog conversion; manufacturing testing; mixed analog-digital integrated circuits; self-testing

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APA (6th Edition):

Korhonen, E. (. (2010). On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus. (Doctoral Dissertation). University of Oulu. Retrieved from http://urn.fi/urn:isbn:9789514263064

Chicago Manual of Style (16th Edition):

Korhonen, E (Esa). “On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus.” 2010. Doctoral Dissertation, University of Oulu. Accessed August 19, 2019. http://urn.fi/urn:isbn:9789514263064.

MLA Handbook (7th Edition):

Korhonen, E (Esa). “On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus.” 2010. Web. 19 Aug 2019.

Vancouver:

Korhonen E(. On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus. [Internet] [Doctoral dissertation]. University of Oulu; 2010. [cited 2019 Aug 19]. Available from: http://urn.fi/urn:isbn:9789514263064.

Council of Science Editors:

Korhonen E(. On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus. [Doctoral Dissertation]. University of Oulu; 2010. Available from: http://urn.fi/urn:isbn:9789514263064


Texas A&M University

3. Mukherjee, Parijat. Detection and Diagnosis of Out-of-Specification Failures in Mixed-Signal Circuits.

Degree: 2014, Texas A&M University

 Verifying whether a circuit meets its intended specifications, as well as diagnosing the circuits that do not, is indispensable at every stage of integrated circuit… (more)

Subjects/Keywords: Model checking; Integrated circuit testing; Integrated circuit yield; Yield estimation; Circuit optimization; Statistical analysis; Sampling methods; Monte carlo methods; Machine learning; Analog circuits; Mixed analog digital integrated circuits

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APA (6th Edition):

Mukherjee, P. (2014). Detection and Diagnosis of Out-of-Specification Failures in Mixed-Signal Circuits. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/154004

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mukherjee, Parijat. “Detection and Diagnosis of Out-of-Specification Failures in Mixed-Signal Circuits.” 2014. Thesis, Texas A&M University. Accessed August 19, 2019. http://hdl.handle.net/1969.1/154004.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mukherjee, Parijat. “Detection and Diagnosis of Out-of-Specification Failures in Mixed-Signal Circuits.” 2014. Web. 19 Aug 2019.

Vancouver:

Mukherjee P. Detection and Diagnosis of Out-of-Specification Failures in Mixed-Signal Circuits. [Internet] [Thesis]. Texas A&M University; 2014. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/1969.1/154004.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mukherjee P. Detection and Diagnosis of Out-of-Specification Failures in Mixed-Signal Circuits. [Thesis]. Texas A&M University; 2014. Available from: http://hdl.handle.net/1969.1/154004

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

4. Jin, Jiayi. Analog and Mixed Signal Design towards a Miniaturized Sleep Apnea Monitoring Device.

Degree: 2014, Texas A&M University

 Sleep apnea is a sleep-induced breathing disorder with symptoms of momentary and often repetitive cessations in breathing rhythm or sustained reductions in breathing amplitude. The… (more)

Subjects/Keywords: apnea monitoring; miniaturized medical device; analog and mixed signal design; integrated circuits; analog-to-digital converter; ultra-low power circuits; medical instrumentation

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APA (6th Edition):

Jin, J. (2014). Analog and Mixed Signal Design towards a Miniaturized Sleep Apnea Monitoring Device. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/153382

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jin, Jiayi. “Analog and Mixed Signal Design towards a Miniaturized Sleep Apnea Monitoring Device.” 2014. Thesis, Texas A&M University. Accessed August 19, 2019. http://hdl.handle.net/1969.1/153382.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jin, Jiayi. “Analog and Mixed Signal Design towards a Miniaturized Sleep Apnea Monitoring Device.” 2014. Web. 19 Aug 2019.

Vancouver:

Jin J. Analog and Mixed Signal Design towards a Miniaturized Sleep Apnea Monitoring Device. [Internet] [Thesis]. Texas A&M University; 2014. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/1969.1/153382.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jin J. Analog and Mixed Signal Design towards a Miniaturized Sleep Apnea Monitoring Device. [Thesis]. Texas A&M University; 2014. Available from: http://hdl.handle.net/1969.1/153382

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


UCLA

5. Xu, Hao. Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs.

Degree: Electrical Engineering, 2018, UCLA

Mixed signal circuit design often involves circuits that are time-varying or highly non-linear, which further results in systems that are difficult to characterize using established… (more)

Subjects/Keywords: Electrical engineering; ADC; Analog; comparator; Integrated circuits; mixed signal; PLL

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APA (6th Edition):

Xu, H. (2018). Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs. (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/88h8b5t3

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Xu, Hao. “Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs.” 2018. Thesis, UCLA. Accessed August 19, 2019. http://www.escholarship.org/uc/item/88h8b5t3.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Xu, Hao. “Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs.” 2018. Web. 19 Aug 2019.

Vancouver:

Xu H. Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs. [Internet] [Thesis]. UCLA; 2018. [cited 2019 Aug 19]. Available from: http://www.escholarship.org/uc/item/88h8b5t3.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Xu H. Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs. [Thesis]. UCLA; 2018. Available from: http://www.escholarship.org/uc/item/88h8b5t3

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Anna University

6. Hariharan K. Design and implementation of novel methods for testing static and dynamic errors in mixed signal circuits.

Degree: 2013, Anna University

Integrated Circuits (IC) with analog and digital functions have become increasingly prevalent in the semiconductor industry. Complex digital circuits are now commonly combined with analog(more)

Subjects/Keywords: Novel methods; testing static and dynamic errors; mixed signal circuits; analog to digital converters; integrated circuits; built in self test; time tick BIST

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APA (6th Edition):

K, H. (2013). Design and implementation of novel methods for testing static and dynamic errors in mixed signal circuits. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/11689

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

K, Hariharan. “Design and implementation of novel methods for testing static and dynamic errors in mixed signal circuits.” 2013. Thesis, Anna University. Accessed August 19, 2019. http://shodhganga.inflibnet.ac.in/handle/10603/11689.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

K, Hariharan. “Design and implementation of novel methods for testing static and dynamic errors in mixed signal circuits.” 2013. Web. 19 Aug 2019.

Vancouver:

K H. Design and implementation of novel methods for testing static and dynamic errors in mixed signal circuits. [Internet] [Thesis]. Anna University; 2013. [cited 2019 Aug 19]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/11689.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

K H. Design and implementation of novel methods for testing static and dynamic errors in mixed signal circuits. [Thesis]. Anna University; 2013. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/11689

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Carnegie Mellon University

7. Liu, Shaolong. SAR ADCs Design and Calibration in Nano-scaled Technologies.

Degree: 2017, Carnegie Mellon University

 The rapid progress of scaling and integration of modern complimentary metal oxide semiconductor (CMOS) technology motivates the replacement of traditional analog signal processing by digital(more)

Subjects/Keywords: ADC; analog-to-digital converter; Calibration; Integrated circuits; Low power; Offset

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APA (6th Edition):

Liu, S. (2017). SAR ADCs Design and Calibration in Nano-scaled Technologies. (Thesis). Carnegie Mellon University. Retrieved from http://repository.cmu.edu/dissertations/1073

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Shaolong. “SAR ADCs Design and Calibration in Nano-scaled Technologies.” 2017. Thesis, Carnegie Mellon University. Accessed August 19, 2019. http://repository.cmu.edu/dissertations/1073.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Shaolong. “SAR ADCs Design and Calibration in Nano-scaled Technologies.” 2017. Web. 19 Aug 2019.

Vancouver:

Liu S. SAR ADCs Design and Calibration in Nano-scaled Technologies. [Internet] [Thesis]. Carnegie Mellon University; 2017. [cited 2019 Aug 19]. Available from: http://repository.cmu.edu/dissertations/1073.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu S. SAR ADCs Design and Calibration in Nano-scaled Technologies. [Thesis]. Carnegie Mellon University; 2017. Available from: http://repository.cmu.edu/dissertations/1073

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Oxford

8. Chitnis, Danial. Single photon avalanche diodes for optical communications.

Degree: PhD, 2013, University of Oxford

 In order to improve the sensitivity of an optical receiver, the gain and the collection area of the photo-detectors within the receiver should be increased.… (more)

Subjects/Keywords: 621.382; Communications engineering (optical,microwave and radio); Electronics; Sensors; mixed analog digital integrated circuits; optical receivers; poisson channels; single photon avalanche diode

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APA (6th Edition):

Chitnis, D. (2013). Single photon avalanche diodes for optical communications. (Doctoral Dissertation). University of Oxford. Retrieved from http://ora.ox.ac.uk/objects/uuid:5fd582dd-8167-4fe4-88f8-871ba905ade1 ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.618386

Chicago Manual of Style (16th Edition):

Chitnis, Danial. “Single photon avalanche diodes for optical communications.” 2013. Doctoral Dissertation, University of Oxford. Accessed August 19, 2019. http://ora.ox.ac.uk/objects/uuid:5fd582dd-8167-4fe4-88f8-871ba905ade1 ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.618386.

MLA Handbook (7th Edition):

Chitnis, Danial. “Single photon avalanche diodes for optical communications.” 2013. Web. 19 Aug 2019.

Vancouver:

Chitnis D. Single photon avalanche diodes for optical communications. [Internet] [Doctoral dissertation]. University of Oxford; 2013. [cited 2019 Aug 19]. Available from: http://ora.ox.ac.uk/objects/uuid:5fd582dd-8167-4fe4-88f8-871ba905ade1 ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.618386.

Council of Science Editors:

Chitnis D. Single photon avalanche diodes for optical communications. [Doctoral Dissertation]. University of Oxford; 2013. Available from: http://ora.ox.ac.uk/objects/uuid:5fd582dd-8167-4fe4-88f8-871ba905ade1 ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.618386


Ryerson University

9. Parekh, Parth. All-digital ΔΣ time-to-digital converter with bi-directional gated delay line time integrator.

Degree: 2017, Ryerson University

 This report presents a low-power time integrator and its applications in an all-digital first-order ΔΣ time-to-digital converter (TDC). Time-to-Digital Converter (TDC) that map a time… (more)

Subjects/Keywords: Metal oxide semiconductors, Complementary.; Signal processing  – Digital techniques.; Analog-to-digital converters.; Integrated circuits.

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APA (6th Edition):

Parekh, P. (2017). All-digital ΔΣ time-to-digital converter with bi-directional gated delay line time integrator. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A6877

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Parekh, Parth. “All-digital ΔΣ time-to-digital converter with bi-directional gated delay line time integrator.” 2017. Thesis, Ryerson University. Accessed August 19, 2019. https://digital.library.ryerson.ca/islandora/object/RULA%3A6877.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Parekh, Parth. “All-digital ΔΣ time-to-digital converter with bi-directional gated delay line time integrator.” 2017. Web. 19 Aug 2019.

Vancouver:

Parekh P. All-digital ΔΣ time-to-digital converter with bi-directional gated delay line time integrator. [Internet] [Thesis]. Ryerson University; 2017. [cited 2019 Aug 19]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A6877.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Parekh P. All-digital ΔΣ time-to-digital converter with bi-directional gated delay line time integrator. [Thesis]. Ryerson University; 2017. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A6877

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Arizona State University

10. Anabtawi, Nijad. Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments.

Degree: PhD, Electrical Engineering, 2011, Arizona State University

 In this work, a high resolution analog-to-digital converter (ADC) for use in harsh environments is presented. The ADC is implemented in bulk CMOS technology and… (more)

Subjects/Keywords: Electrical Engineering; Analog Integrated Circuits

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APA (6th Edition):

Anabtawi, N. (2011). Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments. (Doctoral Dissertation). Arizona State University. Retrieved from http://repository.asu.edu/items/8842

Chicago Manual of Style (16th Edition):

Anabtawi, Nijad. “Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments.” 2011. Doctoral Dissertation, Arizona State University. Accessed August 19, 2019. http://repository.asu.edu/items/8842.

MLA Handbook (7th Edition):

Anabtawi, Nijad. “Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments.” 2011. Web. 19 Aug 2019.

Vancouver:

Anabtawi N. Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments. [Internet] [Doctoral dissertation]. Arizona State University; 2011. [cited 2019 Aug 19]. Available from: http://repository.asu.edu/items/8842.

Council of Science Editors:

Anabtawi N. Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments. [Doctoral Dissertation]. Arizona State University; 2011. Available from: http://repository.asu.edu/items/8842


Indian Institute of Science

11. Lata, Kusum. Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces.

Degree: 2010, Indian Institute of Science

 The conventional approach to validate the analog and mixed signal designs utilizes extensive SPICE-level simulations. The main challenge in this approach is to know when… (more)

Subjects/Keywords: Signal Processing - Simulation; Hybrid System Verification; Analog and Mixed Signal Design Verification; Formal Verification; Checkmate Formal Verification; Integrated Circuits - Simulation; Digital Simulation; Automata; Hybrid Automata; Hybrid Systems; AMS Designs; Analog and Mixed Signal Designs; Communication Engineering

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APA (6th Edition):

Lata, K. (2010). Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces. (Thesis). Indian Institute of Science. Retrieved from http://hdl.handle.net/2005/1271

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lata, Kusum. “Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces.” 2010. Thesis, Indian Institute of Science. Accessed August 19, 2019. http://hdl.handle.net/2005/1271.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lata, Kusum. “Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces.” 2010. Web. 19 Aug 2019.

Vancouver:

Lata K. Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces. [Internet] [Thesis]. Indian Institute of Science; 2010. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/2005/1271.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lata K. Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces. [Thesis]. Indian Institute of Science; 2010. Available from: http://hdl.handle.net/2005/1271

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Indian Institute of Science

12. Lata, Kusum. Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces.

Degree: 2010, Indian Institute of Science

 The conventional approach to validate the analog and mixed signal designs utilizes extensive SPICE-level simulations. The main challenge in this approach is to know when… (more)

Subjects/Keywords: Signal Processing - Simulation; Hybrid System Verification; Analog and Mixed Signal Design Verification; Formal Verification; Checkmate Formal Verification; Integrated Circuits - Simulation; Digital Simulation; Automata; Hybrid Automata; Hybrid Systems; AMS Designs; Analog and Mixed Signal Designs; Communication Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lata, K. (2010). Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces. (Thesis). Indian Institute of Science. Retrieved from http://etd.iisc.ernet.in/handle/2005/1271 ; http://etd.ncsi.iisc.ernet.in/abstracts/1652/G23821-Abs.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lata, Kusum. “Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces.” 2010. Thesis, Indian Institute of Science. Accessed August 19, 2019. http://etd.iisc.ernet.in/handle/2005/1271 ; http://etd.ncsi.iisc.ernet.in/abstracts/1652/G23821-Abs.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lata, Kusum. “Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces.” 2010. Web. 19 Aug 2019.

Vancouver:

Lata K. Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces. [Internet] [Thesis]. Indian Institute of Science; 2010. [cited 2019 Aug 19]. Available from: http://etd.iisc.ernet.in/handle/2005/1271 ; http://etd.ncsi.iisc.ernet.in/abstracts/1652/G23821-Abs.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lata K. Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces. [Thesis]. Indian Institute of Science; 2010. Available from: http://etd.iisc.ernet.in/handle/2005/1271 ; http://etd.ncsi.iisc.ernet.in/abstracts/1652/G23821-Abs.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Delft University of Technology

13. Mahmoud, K.E.M. Non-Linear A/D Converters for Integrated Silicon Smart Sensors.

Degree: 1994, Delft University of Technology

Subjects/Keywords: analogue-digital conversion; bipolar integrated circuits; integrated smart sensors

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APA (6th Edition):

Mahmoud, K. E. M. (1994). Non-Linear A/D Converters for Integrated Silicon Smart Sensors. (Doctoral Dissertation). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; urn:NBN:nl:ui:24-uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; urn:NBN:nl:ui:24-uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; http://resolver.tudelft.nl/uuid:4e51048c-9520-4f46-992b-5260dee0ee01

Chicago Manual of Style (16th Edition):

Mahmoud, K E M. “Non-Linear A/D Converters for Integrated Silicon Smart Sensors.” 1994. Doctoral Dissertation, Delft University of Technology. Accessed August 19, 2019. http://resolver.tudelft.nl/uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; urn:NBN:nl:ui:24-uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; urn:NBN:nl:ui:24-uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; http://resolver.tudelft.nl/uuid:4e51048c-9520-4f46-992b-5260dee0ee01.

MLA Handbook (7th Edition):

Mahmoud, K E M. “Non-Linear A/D Converters for Integrated Silicon Smart Sensors.” 1994. Web. 19 Aug 2019.

Vancouver:

Mahmoud KEM. Non-Linear A/D Converters for Integrated Silicon Smart Sensors. [Internet] [Doctoral dissertation]. Delft University of Technology; 1994. [cited 2019 Aug 19]. Available from: http://resolver.tudelft.nl/uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; urn:NBN:nl:ui:24-uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; urn:NBN:nl:ui:24-uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; http://resolver.tudelft.nl/uuid:4e51048c-9520-4f46-992b-5260dee0ee01.

Council of Science Editors:

Mahmoud KEM. Non-Linear A/D Converters for Integrated Silicon Smart Sensors. [Doctoral Dissertation]. Delft University of Technology; 1994. Available from: http://resolver.tudelft.nl/uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; urn:NBN:nl:ui:24-uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; urn:NBN:nl:ui:24-uuid:4e51048c-9520-4f46-992b-5260dee0ee01 ; http://resolver.tudelft.nl/uuid:4e51048c-9520-4f46-992b-5260dee0ee01


Indian Institute of Science

14. Vasudevamurthy, Rajath. Time-based All-Digital Technique for Analog Built-in Self Test.

Degree: 2013, Indian Institute of Science

 A scheme for Built-in-Self-Test (BIST) of analog signals with minimal area overhead, for measuring on-chip voltages in an all-digital manner is presented in this thesis.… (more)

Subjects/Keywords: Electronic Circuits; On-Chip Analog Test Voltages; Electronic Circuit Design; Analog Circuits; Built-in Self Test (BIST); Time-to-Digital Converters; Analog Routing; Analog Built-in Self Test; Time Based Analog-to-Digital Converter; Analog-to-Digital Converters; Integrated Circuit; Analog IP Test; Electronic Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Vasudevamurthy, R. (2013). Time-based All-Digital Technique for Analog Built-in Self Test. (Thesis). Indian Institute of Science. Retrieved from http://hdl.handle.net/2005/2841

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vasudevamurthy, Rajath. “Time-based All-Digital Technique for Analog Built-in Self Test.” 2013. Thesis, Indian Institute of Science. Accessed August 19, 2019. http://hdl.handle.net/2005/2841.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vasudevamurthy, Rajath. “Time-based All-Digital Technique for Analog Built-in Self Test.” 2013. Web. 19 Aug 2019.

Vancouver:

Vasudevamurthy R. Time-based All-Digital Technique for Analog Built-in Self Test. [Internet] [Thesis]. Indian Institute of Science; 2013. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/2005/2841.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vasudevamurthy R. Time-based All-Digital Technique for Analog Built-in Self Test. [Thesis]. Indian Institute of Science; 2013. Available from: http://hdl.handle.net/2005/2841

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Northeastern University

15. Zhu, Haiyang. Design techniques to improve noise and linearity of data converters.

Degree: PhD, Department of Electrical and Computer Engineering, 2016, Northeastern University

 The data converters including analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) act as interfaces between a DSP-based system and the physical analog world. They are… (more)

Subjects/Keywords: data converter; integrated circuit; linearity; noise; Analog-to-digital converters; Design and construction; Digital-to-analog converters; Design and construction; Switched capacitor circuits; Amplifiers (Electronics); Integrated circuits; Electronic noise

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhu, H. (2016). Design techniques to improve noise and linearity of data converters. (Doctoral Dissertation). Northeastern University. Retrieved from http://hdl.handle.net/2047/D20214142

Chicago Manual of Style (16th Edition):

Zhu, Haiyang. “Design techniques to improve noise and linearity of data converters.” 2016. Doctoral Dissertation, Northeastern University. Accessed August 19, 2019. http://hdl.handle.net/2047/D20214142.

MLA Handbook (7th Edition):

Zhu, Haiyang. “Design techniques to improve noise and linearity of data converters.” 2016. Web. 19 Aug 2019.

Vancouver:

Zhu H. Design techniques to improve noise and linearity of data converters. [Internet] [Doctoral dissertation]. Northeastern University; 2016. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/2047/D20214142.

Council of Science Editors:

Zhu H. Design techniques to improve noise and linearity of data converters. [Doctoral Dissertation]. Northeastern University; 2016. Available from: http://hdl.handle.net/2047/D20214142


Columbia University

16. Guo, Ning. Investigation of Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time.

Degree: 2017, Columbia University

 This work investigates energy-efficient approximate computation for solving differential equations. It extends the analog computing techniques to a new paradigm: continuous-time hybrid computation, where both… (more)

Subjects/Keywords: Digital electronics; Mixed signal circuits; Electronic analog computers – Circuits; Differential equations, Nonlinear; Electrical engineering – Mathematics; Differential equations; Electrical engineering

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APA (6th Edition):

Guo, N. (2017). Investigation of Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time. (Doctoral Dissertation). Columbia University. Retrieved from https://doi.org/10.7916/D86W9GRX

Chicago Manual of Style (16th Edition):

Guo, Ning. “Investigation of Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time.” 2017. Doctoral Dissertation, Columbia University. Accessed August 19, 2019. https://doi.org/10.7916/D86W9GRX.

MLA Handbook (7th Edition):

Guo, Ning. “Investigation of Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time.” 2017. Web. 19 Aug 2019.

Vancouver:

Guo N. Investigation of Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time. [Internet] [Doctoral dissertation]. Columbia University; 2017. [cited 2019 Aug 19]. Available from: https://doi.org/10.7916/D86W9GRX.

Council of Science Editors:

Guo N. Investigation of Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time. [Doctoral Dissertation]. Columbia University; 2017. Available from: https://doi.org/10.7916/D86W9GRX


Northeastern University

17. Jung, Inseok. Self-calibration approach for mixed signal circuits in systems-on-chip.

Degree: PhD, Department of Electrical and Computer Engineering, 2015, Northeastern University

 MOSFET scaling has served industry very well for a few decades by proving improvements in transistor performance, power, and cost. However, they require high test… (more)

Subjects/Keywords: ADC; circuit; Mixed circuit; Electrical and Computer Engineering; Mixed signal circuits; Mixed signal circuits; Systems on a chip; Analog-to-digital converters; Metal oxide semiconductor field-effect transistors

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jung, I. (2015). Self-calibration approach for mixed signal circuits in systems-on-chip. (Doctoral Dissertation). Northeastern University. Retrieved from http://hdl.handle.net/2047/d20009298

Chicago Manual of Style (16th Edition):

Jung, Inseok. “Self-calibration approach for mixed signal circuits in systems-on-chip.” 2015. Doctoral Dissertation, Northeastern University. Accessed August 19, 2019. http://hdl.handle.net/2047/d20009298.

MLA Handbook (7th Edition):

Jung, Inseok. “Self-calibration approach for mixed signal circuits in systems-on-chip.” 2015. Web. 19 Aug 2019.

Vancouver:

Jung I. Self-calibration approach for mixed signal circuits in systems-on-chip. [Internet] [Doctoral dissertation]. Northeastern University; 2015. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/2047/d20009298.

Council of Science Editors:

Jung I. Self-calibration approach for mixed signal circuits in systems-on-chip. [Doctoral Dissertation]. Northeastern University; 2015. Available from: http://hdl.handle.net/2047/d20009298


Iowa State University

18. Liu, Zhiqiang. Design and verification approaches for reliability and functional safety of analog integrated circuits.

Degree: 2018, Iowa State University

 New breakthroughs in semiconductor design have enabled a rapid integration of semiconductor chips into systems that affect all aspects of the society. Examples of emerging… (more)

Subjects/Keywords: Analog Design; Analog Integrated Circuits; Analog Verification; Electrical and Electronics

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APA (6th Edition):

Liu, Z. (2018). Design and verification approaches for reliability and functional safety of analog integrated circuits. (Thesis). Iowa State University. Retrieved from https://lib.dr.iastate.edu/etd/17246

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Zhiqiang. “Design and verification approaches for reliability and functional safety of analog integrated circuits.” 2018. Thesis, Iowa State University. Accessed August 19, 2019. https://lib.dr.iastate.edu/etd/17246.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Zhiqiang. “Design and verification approaches for reliability and functional safety of analog integrated circuits.” 2018. Web. 19 Aug 2019.

Vancouver:

Liu Z. Design and verification approaches for reliability and functional safety of analog integrated circuits. [Internet] [Thesis]. Iowa State University; 2018. [cited 2019 Aug 19]. Available from: https://lib.dr.iastate.edu/etd/17246.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu Z. Design and verification approaches for reliability and functional safety of analog integrated circuits. [Thesis]. Iowa State University; 2018. Available from: https://lib.dr.iastate.edu/etd/17246

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Pennsylvania

19. Liu, Xilin. A Closed-Loop Bidirectional Brain-Machine Interface System For Freely Behaving Animals.

Degree: 2017, University of Pennsylvania

 A brain-machine interface (BMI) creates an artificial pathway between the brain and the external world. The research and applications of BMI have received enormous attention… (more)

Subjects/Keywords: Analog and Mixed-Signal; Bidirectional Neural Interface; Brain-Machine Interface; CMOS Integrated Circuits; Electrical and Electronics

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APA (6th Edition):

Liu, X. (2017). A Closed-Loop Bidirectional Brain-Machine Interface System For Freely Behaving Animals. (Thesis). University of Pennsylvania. Retrieved from https://repository.upenn.edu/edissertations/2433

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Xilin. “A Closed-Loop Bidirectional Brain-Machine Interface System For Freely Behaving Animals.” 2017. Thesis, University of Pennsylvania. Accessed August 19, 2019. https://repository.upenn.edu/edissertations/2433.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Xilin. “A Closed-Loop Bidirectional Brain-Machine Interface System For Freely Behaving Animals.” 2017. Web. 19 Aug 2019.

Vancouver:

Liu X. A Closed-Loop Bidirectional Brain-Machine Interface System For Freely Behaving Animals. [Internet] [Thesis]. University of Pennsylvania; 2017. [cited 2019 Aug 19]. Available from: https://repository.upenn.edu/edissertations/2433.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu X. A Closed-Loop Bidirectional Brain-Machine Interface System For Freely Behaving Animals. [Thesis]. University of Pennsylvania; 2017. Available from: https://repository.upenn.edu/edissertations/2433

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Iowa State University

20. Li, You. Low-cost, high-precision DAC design based on ordered element matching and verification against undesired operating points for analog circuits.

Degree: 2017, Iowa State University

 Over the past 50 years, the integrated circuit (IC) industry has grown rapidly, following the famous ``Moore's law." The process feature size keeps shrinking, whereby… (more)

Subjects/Keywords: analog circuit verification; DAC design; high-precision; integrated circuits; low-cost; mixed-signal circuit design; Electrical and Electronics

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APA (6th Edition):

Li, Y. (2017). Low-cost, high-precision DAC design based on ordered element matching and verification against undesired operating points for analog circuits. (Thesis). Iowa State University. Retrieved from https://lib.dr.iastate.edu/etd/17249

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, You. “Low-cost, high-precision DAC design based on ordered element matching and verification against undesired operating points for analog circuits.” 2017. Thesis, Iowa State University. Accessed August 19, 2019. https://lib.dr.iastate.edu/etd/17249.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, You. “Low-cost, high-precision DAC design based on ordered element matching and verification against undesired operating points for analog circuits.” 2017. Web. 19 Aug 2019.

Vancouver:

Li Y. Low-cost, high-precision DAC design based on ordered element matching and verification against undesired operating points for analog circuits. [Internet] [Thesis]. Iowa State University; 2017. [cited 2019 Aug 19]. Available from: https://lib.dr.iastate.edu/etd/17249.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li Y. Low-cost, high-precision DAC design based on ordered element matching and verification against undesired operating points for analog circuits. [Thesis]. Iowa State University; 2017. Available from: https://lib.dr.iastate.edu/etd/17249

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

21. Zheng, Jiawei ECE. Low noise CMOS circuit techniques for biopotential sensing.

Degree: 2018, Hong Kong University of Science and Technology

 Faithful recording of the biopotential signal is the prerequisite for the diagnosis and treatment of various diseases. Typical local field potentials of bio-signals such as… (more)

Subjects/Keywords: Analog CMOS integrated circuits; Integrated circuits; Electronic noise

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APA (6th Edition):

Zheng, J. E. (2018). Low noise CMOS circuit techniques for biopotential sensing. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zheng, Jiawei ECE. “Low noise CMOS circuit techniques for biopotential sensing.” 2018. Thesis, Hong Kong University of Science and Technology. Accessed August 19, 2019. https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zheng, Jiawei ECE. “Low noise CMOS circuit techniques for biopotential sensing.” 2018. Web. 19 Aug 2019.

Vancouver:

Zheng JE. Low noise CMOS circuit techniques for biopotential sensing. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2018. [cited 2019 Aug 19]. Available from: https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zheng JE. Low noise CMOS circuit techniques for biopotential sensing. [Thesis]. Hong Kong University of Science and Technology; 2018. Available from: https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

22. Douglas, Dale Scott. Flicker noise in cmos lc oscillators.

Degree: MS, Electrical and Computer Engineering, 2008, Georgia Tech

 Sources of flicker noise generation in the cross-coupled negative resistance oscillator (NMOS, PMOS, and CMOS) are explored. Also, prior and current work in the area… (more)

Subjects/Keywords: Adaptive systems; Oscillators; Voltage controlled oscillators; Phase noise; Mixed analog-digital integrated circuits; Oscillators, Electric; Oscillators, Audio-frequency; Wireless communication systems

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Douglas, D. S. (2008). Flicker noise in cmos lc oscillators. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/26550

Chicago Manual of Style (16th Edition):

Douglas, Dale Scott. “Flicker noise in cmos lc oscillators.” 2008. Masters Thesis, Georgia Tech. Accessed August 19, 2019. http://hdl.handle.net/1853/26550.

MLA Handbook (7th Edition):

Douglas, Dale Scott. “Flicker noise in cmos lc oscillators.” 2008. Web. 19 Aug 2019.

Vancouver:

Douglas DS. Flicker noise in cmos lc oscillators. [Internet] [Masters thesis]. Georgia Tech; 2008. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/1853/26550.

Council of Science Editors:

Douglas DS. Flicker noise in cmos lc oscillators. [Masters Thesis]. Georgia Tech; 2008. Available from: http://hdl.handle.net/1853/26550


University of Pretoria

23. Buttner, Werner Heinrich. Trellis decoding of Reed Solomon and related linear block codes.

Degree: Electrical, Electronic and Computer Engineering, 2006, University of Pretoria

Please read the abstract in the section 00front of this document Advisors/Committee Members: Prof L P Linde (advisor).

Subjects/Keywords: Linear integrated circuits; Modems; Analog-to-digital converters; UCTD

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APA (6th Edition):

Buttner, W. (2006). Trellis decoding of Reed Solomon and related linear block codes. (Masters Thesis). University of Pretoria. Retrieved from http://hdl.handle.net/2263/30447

Chicago Manual of Style (16th Edition):

Buttner, Werner. “Trellis decoding of Reed Solomon and related linear block codes.” 2006. Masters Thesis, University of Pretoria. Accessed August 19, 2019. http://hdl.handle.net/2263/30447.

MLA Handbook (7th Edition):

Buttner, Werner. “Trellis decoding of Reed Solomon and related linear block codes.” 2006. Web. 19 Aug 2019.

Vancouver:

Buttner W. Trellis decoding of Reed Solomon and related linear block codes. [Internet] [Masters thesis]. University of Pretoria; 2006. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/2263/30447.

Council of Science Editors:

Buttner W. Trellis decoding of Reed Solomon and related linear block codes. [Masters Thesis]. University of Pretoria; 2006. Available from: http://hdl.handle.net/2263/30447


University of Pretoria

24. [No author]. Trellis decoding of Reed Solomon and related linear block codes .

Degree: 2006, University of Pretoria

Please read the abstract in the section 00front of this document Advisors/Committee Members: Prof L P Linde (advisor).

Subjects/Keywords: Linear integrated circuits; Modems; Analog-to-digital converters; UCTD

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APA (6th Edition):

author], [. (2006). Trellis decoding of Reed Solomon and related linear block codes . (Masters Thesis). University of Pretoria. Retrieved from http://upetd.up.ac.za/thesis/available/etd-12202006-123325/

Chicago Manual of Style (16th Edition):

author], [No. “Trellis decoding of Reed Solomon and related linear block codes .” 2006. Masters Thesis, University of Pretoria. Accessed August 19, 2019. http://upetd.up.ac.za/thesis/available/etd-12202006-123325/.

MLA Handbook (7th Edition):

author], [No. “Trellis decoding of Reed Solomon and related linear block codes .” 2006. Web. 19 Aug 2019.

Vancouver:

author] [. Trellis decoding of Reed Solomon and related linear block codes . [Internet] [Masters thesis]. University of Pretoria; 2006. [cited 2019 Aug 19]. Available from: http://upetd.up.ac.za/thesis/available/etd-12202006-123325/.

Council of Science Editors:

author] [. Trellis decoding of Reed Solomon and related linear block codes . [Masters Thesis]. University of Pretoria; 2006. Available from: http://upetd.up.ac.za/thesis/available/etd-12202006-123325/


Texas A&M University

25. Edward, Alexander. Multi-Stage Noise-Shaping Continuous-Time Sigma-Delta Modulator.

Degree: PhD, Electrical Engineering, 2016, Texas A&M University

 The design of a single-loop continuous-time ∑∆ modulator (CT∑∆M) with high resolution, wide bandwidth, and low power consumption is very challenging. The multi-stage noise-shaping (MASH)… (more)

Subjects/Keywords: active filters; analog-digital conversion; calibration; CMOS integrated circuits; delta-sigma modulation; noise cancellation; operational amplifiers; sigma-delta modulation

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Edward, A. (2016). Multi-Stage Noise-Shaping Continuous-Time Sigma-Delta Modulator. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/158013

Chicago Manual of Style (16th Edition):

Edward, Alexander. “Multi-Stage Noise-Shaping Continuous-Time Sigma-Delta Modulator.” 2016. Doctoral Dissertation, Texas A&M University. Accessed August 19, 2019. http://hdl.handle.net/1969.1/158013.

MLA Handbook (7th Edition):

Edward, Alexander. “Multi-Stage Noise-Shaping Continuous-Time Sigma-Delta Modulator.” 2016. Web. 19 Aug 2019.

Vancouver:

Edward A. Multi-Stage Noise-Shaping Continuous-Time Sigma-Delta Modulator. [Internet] [Doctoral dissertation]. Texas A&M University; 2016. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/1969.1/158013.

Council of Science Editors:

Edward A. Multi-Stage Noise-Shaping Continuous-Time Sigma-Delta Modulator. [Doctoral Dissertation]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/158013


University of Rochester

26. Song, Yu (1980 - ). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.

Degree: PhD, 2011, University of Rochester

 We propose and verify the design of low-power, high-performance CMOS Switched-Capacitor (SC) circuits for analog and radio-frequency (RF) applications. In low-cost CMOS semiconductor processes, SC… (more)

Subjects/Keywords: Analog-to-digital converter; CMOS integrated circuits; Delta-sigma modulation; Phase-locked loop; Switched-capacitor circuit

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APA (6th Edition):

Song, Y. (. -. ). (2011). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. (Doctoral Dissertation). University of Rochester. Retrieved from http://hdl.handle.net/1802/16887

Chicago Manual of Style (16th Edition):

Song, Yu (1980 - ). “CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.” 2011. Doctoral Dissertation, University of Rochester. Accessed August 19, 2019. http://hdl.handle.net/1802/16887.

MLA Handbook (7th Edition):

Song, Yu (1980 - ). “CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.” 2011. Web. 19 Aug 2019.

Vancouver:

Song Y(-). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. [Internet] [Doctoral dissertation]. University of Rochester; 2011. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/1802/16887.

Council of Science Editors:

Song Y(-). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. [Doctoral Dissertation]. University of Rochester; 2011. Available from: http://hdl.handle.net/1802/16887


Columbia University

27. Kim, Seongjong. Variation-Tolerant and Voltage-Scalable Integrated Circuits Design.

Degree: 2016, Columbia University

 Ultra-low-voltage (ULV) operation where the supply voltage of the digital computing hardware is scaled down to the level near or below transistor threshold voltage (e.g.… (more)

Subjects/Keywords: Integrated circuits – Design and construction; Electrical engineering; Digital integrated circuits; Digital integrated circuits – Design and construction; Integrated circuits

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APA (6th Edition):

Kim, S. (2016). Variation-Tolerant and Voltage-Scalable Integrated Circuits Design. (Doctoral Dissertation). Columbia University. Retrieved from https://doi.org/10.7916/D8TM7BPF

Chicago Manual of Style (16th Edition):

Kim, Seongjong. “Variation-Tolerant and Voltage-Scalable Integrated Circuits Design.” 2016. Doctoral Dissertation, Columbia University. Accessed August 19, 2019. https://doi.org/10.7916/D8TM7BPF.

MLA Handbook (7th Edition):

Kim, Seongjong. “Variation-Tolerant and Voltage-Scalable Integrated Circuits Design.” 2016. Web. 19 Aug 2019.

Vancouver:

Kim S. Variation-Tolerant and Voltage-Scalable Integrated Circuits Design. [Internet] [Doctoral dissertation]. Columbia University; 2016. [cited 2019 Aug 19]. Available from: https://doi.org/10.7916/D8TM7BPF.

Council of Science Editors:

Kim S. Variation-Tolerant and Voltage-Scalable Integrated Circuits Design. [Doctoral Dissertation]. Columbia University; 2016. Available from: https://doi.org/10.7916/D8TM7BPF


Northeastern University

28. Chauhan, Hari. Digitally-assisted design, simulation and testing techniques for optimization of analog and RF integrated circuits.

Degree: PhD, Department of Electrical and Computer Engineering, 2016, Northeastern University

 High-performance low-cost radio frequency (RF) transceivers are essential in today's wireless systems. Contemporary manufacturing process technologies and device scaling have helped the integration of analog(more)

Subjects/Keywords: agilent ADS ptolmey; digitally-assisted; digital predistortion; hardware-software co-design; power amplifier; spectral analysis; Integrated circuits; Design and construction; Radio frequency integrated circuits; Design and construction; Analog integrated circuits; Design and construction; Electronic circuit design; Power amplifiers; Testing; Simulation methods; Spectrum analysis; Fourier transformations

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chauhan, H. (2016). Digitally-assisted design, simulation and testing techniques for optimization of analog and RF integrated circuits. (Doctoral Dissertation). Northeastern University. Retrieved from http://hdl.handle.net/2047/D20211253

Chicago Manual of Style (16th Edition):

Chauhan, Hari. “Digitally-assisted design, simulation and testing techniques for optimization of analog and RF integrated circuits.” 2016. Doctoral Dissertation, Northeastern University. Accessed August 19, 2019. http://hdl.handle.net/2047/D20211253.

MLA Handbook (7th Edition):

Chauhan, Hari. “Digitally-assisted design, simulation and testing techniques for optimization of analog and RF integrated circuits.” 2016. Web. 19 Aug 2019.

Vancouver:

Chauhan H. Digitally-assisted design, simulation and testing techniques for optimization of analog and RF integrated circuits. [Internet] [Doctoral dissertation]. Northeastern University; 2016. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/2047/D20211253.

Council of Science Editors:

Chauhan H. Digitally-assisted design, simulation and testing techniques for optimization of analog and RF integrated circuits. [Doctoral Dissertation]. Northeastern University; 2016. Available from: http://hdl.handle.net/2047/D20211253


Brno University of Technology

29. Soukup, Luděk. Návrh digitálně-analogového převodníku typu sigma-delta v technologii CMOS .

Degree: 2012, Brno University of Technology

 Tato diplomová práce se zabývá problematikou digitálně-analogového převodu a možnostmi jeho realizace prostřednictvím digitálních obvodových struktur. Cílem je navrhnout digitálně-analogový převodník typu sigma-delta s rozlišením… (more)

Subjects/Keywords: Číslicové zpracování signálu; interpolace; integrované obvody; aritmetické operace; převodník sigma-delta; digitálně-analogový převodník; Digital signal processing; interpolation; integrated circuits; arithmetic operations; sigma-delta converter; digital to analog converter

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Soukup, L. (2012). Návrh digitálně-analogového převodníku typu sigma-delta v technologii CMOS . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/11866

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Soukup, Luděk. “Návrh digitálně-analogového převodníku typu sigma-delta v technologii CMOS .” 2012. Thesis, Brno University of Technology. Accessed August 19, 2019. http://hdl.handle.net/11012/11866.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Soukup, Luděk. “Návrh digitálně-analogového převodníku typu sigma-delta v technologii CMOS .” 2012. Web. 19 Aug 2019.

Vancouver:

Soukup L. Návrh digitálně-analogového převodníku typu sigma-delta v technologii CMOS . [Internet] [Thesis]. Brno University of Technology; 2012. [cited 2019 Aug 19]. Available from: http://hdl.handle.net/11012/11866.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Soukup L. Návrh digitálně-analogového převodníku typu sigma-delta v technologii CMOS . [Thesis]. Brno University of Technology; 2012. Available from: http://hdl.handle.net/11012/11866

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Clemson University

30. Geng, Yongtao. Circuit Modules for CMOS High-Power Short Pulse Generators.

Degree: MS, Electrical Engineering, 2010, Clemson University

 High-power short electrical pulses are important for high-performance functionality integration, such as the development of microelectromechanical/nanoelectromechanical systems (MEMS/NEMS), system on chip (SoC) and lab on… (more)

Subjects/Keywords: Analog integrated circuits; Charge pump; CMOS integrated circuits; Pulse generator; Pulse power systems; Radiofrequency integrated circuits; Electrical and Computer Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Geng, Y. (2010). Circuit Modules for CMOS High-Power Short Pulse Generators. (Masters Thesis). Clemson University. Retrieved from https://tigerprints.clemson.edu/all_theses/1042

Chicago Manual of Style (16th Edition):

Geng, Yongtao. “Circuit Modules for CMOS High-Power Short Pulse Generators.” 2010. Masters Thesis, Clemson University. Accessed August 19, 2019. https://tigerprints.clemson.edu/all_theses/1042.

MLA Handbook (7th Edition):

Geng, Yongtao. “Circuit Modules for CMOS High-Power Short Pulse Generators.” 2010. Web. 19 Aug 2019.

Vancouver:

Geng Y. Circuit Modules for CMOS High-Power Short Pulse Generators. [Internet] [Masters thesis]. Clemson University; 2010. [cited 2019 Aug 19]. Available from: https://tigerprints.clemson.edu/all_theses/1042.

Council of Science Editors:

Geng Y. Circuit Modules for CMOS High-Power Short Pulse Generators. [Masters Thesis]. Clemson University; 2010. Available from: https://tigerprints.clemson.edu/all_theses/1042

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