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You searched for subject:(MOSFET transistor). Showing records 1 – 30 of 75 total matches.

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Rochester Institute of Technology

1. Nassar, Christopher. Compact modeling of thin-film silicon transistors fabricated on glass.

Degree: PhD, Microsystems Engineering, 2011, Rochester Institute of Technology

 The semiconductor industry, now entering its seventh decade, continues to innovate and evolve at a breakneck pace. E. O. Wilson, the famous Harvard biologist who… (more)

Subjects/Keywords: MOSFET; Silicon-on-glass; SiOG; Transistor

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APA (6th Edition):

Nassar, C. (2011). Compact modeling of thin-film silicon transistors fabricated on glass. (Doctoral Dissertation). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/16

Chicago Manual of Style (16th Edition):

Nassar, Christopher. “Compact modeling of thin-film silicon transistors fabricated on glass.” 2011. Doctoral Dissertation, Rochester Institute of Technology. Accessed October 30, 2020. https://scholarworks.rit.edu/theses/16.

MLA Handbook (7th Edition):

Nassar, Christopher. “Compact modeling of thin-film silicon transistors fabricated on glass.” 2011. Web. 30 Oct 2020.

Vancouver:

Nassar C. Compact modeling of thin-film silicon transistors fabricated on glass. [Internet] [Doctoral dissertation]. Rochester Institute of Technology; 2011. [cited 2020 Oct 30]. Available from: https://scholarworks.rit.edu/theses/16.

Council of Science Editors:

Nassar C. Compact modeling of thin-film silicon transistors fabricated on glass. [Doctoral Dissertation]. Rochester Institute of Technology; 2011. Available from: https://scholarworks.rit.edu/theses/16


University of Lund

2. Zota, Cezar. III-V MOSFETs for High-Frequency and Digital Applications.

Degree: 2017, University of Lund

 III-V compound semiconductors are used in, among many other things, high-frequency electronics. They are also considered as a replacement for silicon in CMOS technology. Yet,… (more)

Subjects/Keywords: Engineering and Technology; III-V; MOSFET; Transistor

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APA (6th Edition):

Zota, C. (2017). III-V MOSFETs for High-Frequency and Digital Applications. (Doctoral Dissertation). University of Lund. Retrieved from https://lup.lub.lu.se/record/bd0beb77-f687-476d-a7db-25bcc1d915d9 ; https://portal.research.lu.se/ws/files/23814249/CBZ_THESIS_20170410.pdf

Chicago Manual of Style (16th Edition):

Zota, Cezar. “III-V MOSFETs for High-Frequency and Digital Applications.” 2017. Doctoral Dissertation, University of Lund. Accessed October 30, 2020. https://lup.lub.lu.se/record/bd0beb77-f687-476d-a7db-25bcc1d915d9 ; https://portal.research.lu.se/ws/files/23814249/CBZ_THESIS_20170410.pdf.

MLA Handbook (7th Edition):

Zota, Cezar. “III-V MOSFETs for High-Frequency and Digital Applications.” 2017. Web. 30 Oct 2020.

Vancouver:

Zota C. III-V MOSFETs for High-Frequency and Digital Applications. [Internet] [Doctoral dissertation]. University of Lund; 2017. [cited 2020 Oct 30]. Available from: https://lup.lub.lu.se/record/bd0beb77-f687-476d-a7db-25bcc1d915d9 ; https://portal.research.lu.se/ws/files/23814249/CBZ_THESIS_20170410.pdf.

Council of Science Editors:

Zota C. III-V MOSFETs for High-Frequency and Digital Applications. [Doctoral Dissertation]. University of Lund; 2017. Available from: https://lup.lub.lu.se/record/bd0beb77-f687-476d-a7db-25bcc1d915d9 ; https://portal.research.lu.se/ws/files/23814249/CBZ_THESIS_20170410.pdf


Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ)

3. Karatsori, Theano. Electrical characterization and modeling of advanced nano-scale ultra thin body and buried oxide MOSFETs and application in circuit simulations.

Degree: 2017, Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ)

 Τhe motivation for this dissertation is two of the main issues brought up by the scaling of new-era devices in contemporary MOSFET design: the development… (more)

Subjects/Keywords: MOSFET τρανζίστορ; Ηλεκτρικός χαρακτηρισμός; Μοντελοποίηση; MOSFET transistor; Electrical characterization; Modeling

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APA (6th Edition):

Karatsori, T. (2017). Electrical characterization and modeling of advanced nano-scale ultra thin body and buried oxide MOSFETs and application in circuit simulations. (Thesis). Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ). Retrieved from http://hdl.handle.net/10442/hedi/42102

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Karatsori, Theano. “Electrical characterization and modeling of advanced nano-scale ultra thin body and buried oxide MOSFETs and application in circuit simulations.” 2017. Thesis, Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ). Accessed October 30, 2020. http://hdl.handle.net/10442/hedi/42102.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Karatsori, Theano. “Electrical characterization and modeling of advanced nano-scale ultra thin body and buried oxide MOSFETs and application in circuit simulations.” 2017. Web. 30 Oct 2020.

Vancouver:

Karatsori T. Electrical characterization and modeling of advanced nano-scale ultra thin body and buried oxide MOSFETs and application in circuit simulations. [Internet] [Thesis]. Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ); 2017. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/10442/hedi/42102.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Karatsori T. Electrical characterization and modeling of advanced nano-scale ultra thin body and buried oxide MOSFETs and application in circuit simulations. [Thesis]. Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ); 2017. Available from: http://hdl.handle.net/10442/hedi/42102

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

4. Vitek, Vojtech. Budicí obvody výkonového tranzistoru SiC MOSFET: Drivers for power SiC MOSFET transistors.

Degree: 2019, Brno University of Technology

 The bachelor thesis describes gate driving principles of power MOSFET transistors made of silicon carbide material. The autor's aim is describing a different types of… (more)

Subjects/Keywords: budič; tranzistor; MOSFET; karbid kremíka; gate driver; transistor; MOSFET; silicon carbide

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APA (6th Edition):

Vitek, V. (2019). Budicí obvody výkonového tranzistoru SiC MOSFET: Drivers for power SiC MOSFET transistors. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/24839

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vitek, Vojtech. “Budicí obvody výkonového tranzistoru SiC MOSFET: Drivers for power SiC MOSFET transistors.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/24839.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vitek, Vojtech. “Budicí obvody výkonového tranzistoru SiC MOSFET: Drivers for power SiC MOSFET transistors.” 2019. Web. 30 Oct 2020.

Vancouver:

Vitek V. Budicí obvody výkonového tranzistoru SiC MOSFET: Drivers for power SiC MOSFET transistors. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/24839.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vitek V. Budicí obvody výkonového tranzistoru SiC MOSFET: Drivers for power SiC MOSFET transistors. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/24839

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

5. Masante, Cédric. Transistors MOS en diamant pour l'électronique de puissance : Diamond MOSFET for power electronics.

Degree: Docteur es, Nanoélectronique et nanotechnologie, 2019, Université Grenoble Alpes (ComUE)

Dans le contexte d'un besoin croissant de dispositifs semi-conducteurs de puissance, étant donné que de plus en plus d'applications, des moteurs aux réseaux de ditribution… (more)

Subjects/Keywords: Diamant; Transistor; Électronique; Diamond; Transistor; Electronics; Mosfet; Deep depletion; 620

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APA (6th Edition):

Masante, C. (2019). Transistors MOS en diamant pour l'électronique de puissance : Diamond MOSFET for power electronics. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2019GREAT070

Chicago Manual of Style (16th Edition):

Masante, Cédric. “Transistors MOS en diamant pour l'électronique de puissance : Diamond MOSFET for power electronics.” 2019. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed October 30, 2020. http://www.theses.fr/2019GREAT070.

MLA Handbook (7th Edition):

Masante, Cédric. “Transistors MOS en diamant pour l'électronique de puissance : Diamond MOSFET for power electronics.” 2019. Web. 30 Oct 2020.

Vancouver:

Masante C. Transistors MOS en diamant pour l'électronique de puissance : Diamond MOSFET for power electronics. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2019. [cited 2020 Oct 30]. Available from: http://www.theses.fr/2019GREAT070.

Council of Science Editors:

Masante C. Transistors MOS en diamant pour l'électronique de puissance : Diamond MOSFET for power electronics. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2019. Available from: http://www.theses.fr/2019GREAT070


Université de Grenoble

6. Deshpande, Veeresh. Intégration de transistor mono-électronique et transistor à atome unique sur CMOS : Scaling Beyond Moore : Single Electron Transistor (SET) and Single Atom Transistor Integration on CMOS.

Degree: Docteur es, Physique, 2012, Université de Grenoble

 La réduction (« scaling ») continue des dimensions des transistors MOSFET nous a conduits à l'ère de la nanoélectronique. Le transistor à effet de champ… (more)

Subjects/Keywords: Transistor mono-électronique; MOSFET à nanofil; Température ambiante; Single Electron Transistor; Nanowire MOSFET; Room temperature; CMOS Technology; Single Atom Transistor

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APA (6th Edition):

Deshpande, V. (2012). Intégration de transistor mono-électronique et transistor à atome unique sur CMOS : Scaling Beyond Moore : Single Electron Transistor (SET) and Single Atom Transistor Integration on CMOS. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2012GRENY101

Chicago Manual of Style (16th Edition):

Deshpande, Veeresh. “Intégration de transistor mono-électronique et transistor à atome unique sur CMOS : Scaling Beyond Moore : Single Electron Transistor (SET) and Single Atom Transistor Integration on CMOS.” 2012. Doctoral Dissertation, Université de Grenoble. Accessed October 30, 2020. http://www.theses.fr/2012GRENY101.

MLA Handbook (7th Edition):

Deshpande, Veeresh. “Intégration de transistor mono-électronique et transistor à atome unique sur CMOS : Scaling Beyond Moore : Single Electron Transistor (SET) and Single Atom Transistor Integration on CMOS.” 2012. Web. 30 Oct 2020.

Vancouver:

Deshpande V. Intégration de transistor mono-électronique et transistor à atome unique sur CMOS : Scaling Beyond Moore : Single Electron Transistor (SET) and Single Atom Transistor Integration on CMOS. [Internet] [Doctoral dissertation]. Université de Grenoble; 2012. [cited 2020 Oct 30]. Available from: http://www.theses.fr/2012GRENY101.

Council of Science Editors:

Deshpande V. Intégration de transistor mono-électronique et transistor à atome unique sur CMOS : Scaling Beyond Moore : Single Electron Transistor (SET) and Single Atom Transistor Integration on CMOS. [Doctoral Dissertation]. Université de Grenoble; 2012. Available from: http://www.theses.fr/2012GRENY101


Indian Institute of Science

7. Srivatsava, J. Compact Modeling Of Asymmetric/Independent Double Gate MOSFET.

Degree: PhD, Faculty of Engineering, 2014, Indian Institute of Science

 For the past 40 years, relentless focus on Moore’s Law transistor scaling has provided ever-increasing transistor performance and density. In order to continue the technology… (more)

Subjects/Keywords: Asymmetric Double Gate MOSFET; Asymmetric Double Gate Transistor - Compact Modeling; Transistor Performance; Common-Gate Asymmetric Double Gate MOSFET; Independent-gate Asymmetric Double Gate MOSFET; DG MOSFET; Double Gate MOSFET; Metal Oxide Semiconductor Field Effect Transistor; Electronic Engineering

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APA (6th Edition):

Srivatsava, J. (2014). Compact Modeling Of Asymmetric/Independent Double Gate MOSFET. (Doctoral Dissertation). Indian Institute of Science. Retrieved from http://etd.iisc.ac.in/handle/2005/2346

Chicago Manual of Style (16th Edition):

Srivatsava, J. “Compact Modeling Of Asymmetric/Independent Double Gate MOSFET.” 2014. Doctoral Dissertation, Indian Institute of Science. Accessed October 30, 2020. http://etd.iisc.ac.in/handle/2005/2346.

MLA Handbook (7th Edition):

Srivatsava, J. “Compact Modeling Of Asymmetric/Independent Double Gate MOSFET.” 2014. Web. 30 Oct 2020.

Vancouver:

Srivatsava J. Compact Modeling Of Asymmetric/Independent Double Gate MOSFET. [Internet] [Doctoral dissertation]. Indian Institute of Science; 2014. [cited 2020 Oct 30]. Available from: http://etd.iisc.ac.in/handle/2005/2346.

Council of Science Editors:

Srivatsava J. Compact Modeling Of Asymmetric/Independent Double Gate MOSFET. [Doctoral Dissertation]. Indian Institute of Science; 2014. Available from: http://etd.iisc.ac.in/handle/2005/2346


NSYSU

8. Lu, Kuan-Yu. A Novel High Integration-Density CMOS Inverter with Unique Shared Contact.

Degree: Master, Electrical Engineering, 2011, NSYSU

 A novel CMOS inverter has been proposed. We utilize gated N-I-P transistor to replace the conventional PMOSFET for solving the problem of width compensation. Also,… (more)

Subjects/Keywords: TFET; JL MOSFET; UTB; SOI; CMOS; Gated N-I-P transistor

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APA (6th Edition):

Lu, K. (2011). A Novel High Integration-Density CMOS Inverter with Unique Shared Contact. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805111-101326

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lu, Kuan-Yu. “A Novel High Integration-Density CMOS Inverter with Unique Shared Contact.” 2011. Thesis, NSYSU. Accessed October 30, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805111-101326.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lu, Kuan-Yu. “A Novel High Integration-Density CMOS Inverter with Unique Shared Contact.” 2011. Web. 30 Oct 2020.

Vancouver:

Lu K. A Novel High Integration-Density CMOS Inverter with Unique Shared Contact. [Internet] [Thesis]. NSYSU; 2011. [cited 2020 Oct 30]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805111-101326.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lu K. A Novel High Integration-Density CMOS Inverter with Unique Shared Contact. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805111-101326

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of KwaZulu-Natal

9. Oyedeji, Okikioluwa Ezekiel. Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET.

Degree: 2018, University of KwaZulu-Natal

 Transistors are major components in designing and fabricating high-speed switching devices and micro-electronics. The Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is popular and highly… (more)

Subjects/Keywords: Transistors.; Switches.; Metal Oxide Semiconductor Field Effect Transistor.; MOSFET.; Thermal effects.

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APA (6th Edition):

Oyedeji, O. E. (2018). Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET. (Thesis). University of KwaZulu-Natal. Retrieved from https://researchspace.ukzn.ac.za/handle/10413/17474

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Oyedeji, Okikioluwa Ezekiel. “Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET.” 2018. Thesis, University of KwaZulu-Natal. Accessed October 30, 2020. https://researchspace.ukzn.ac.za/handle/10413/17474.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Oyedeji, Okikioluwa Ezekiel. “Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET.” 2018. Web. 30 Oct 2020.

Vancouver:

Oyedeji OE. Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET. [Internet] [Thesis]. University of KwaZulu-Natal; 2018. [cited 2020 Oct 30]. Available from: https://researchspace.ukzn.ac.za/handle/10413/17474.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Oyedeji OE. Improved parametric analysis of cylindrical surrounding double-gate (CSDG) MOSFET. [Thesis]. University of KwaZulu-Natal; 2018. Available from: https://researchspace.ukzn.ac.za/handle/10413/17474

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Université de Sherbrooke

10. Jouvet, Nicolas. Intégration hybride de transistors à un électron sur un noeud technologique CMOS.

Degree: 2012, Université de Sherbrooke

 Cette étude porte sur l'intégration hybride de transistors à un électron (single-electron transistor, SET) dans un noeud technologique CMOS. Les SETs présentent de forts potentiels,… (more)

Subjects/Keywords: Caractérisation électrique; Nanodamascène; Microfabrication; Nanotechnologie; Transistor à un électron (SET); MOSFET

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APA (6th Edition):

Jouvet, N. (2012). Intégration hybride de transistors à un électron sur un noeud technologique CMOS. (Doctoral Dissertation). Université de Sherbrooke. Retrieved from http://hdl.handle.net/11143/6131

Chicago Manual of Style (16th Edition):

Jouvet, Nicolas. “Intégration hybride de transistors à un électron sur un noeud technologique CMOS.” 2012. Doctoral Dissertation, Université de Sherbrooke. Accessed October 30, 2020. http://hdl.handle.net/11143/6131.

MLA Handbook (7th Edition):

Jouvet, Nicolas. “Intégration hybride de transistors à un électron sur un noeud technologique CMOS.” 2012. Web. 30 Oct 2020.

Vancouver:

Jouvet N. Intégration hybride de transistors à un électron sur un noeud technologique CMOS. [Internet] [Doctoral dissertation]. Université de Sherbrooke; 2012. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11143/6131.

Council of Science Editors:

Jouvet N. Intégration hybride de transistors à un électron sur un noeud technologique CMOS. [Doctoral Dissertation]. Université de Sherbrooke; 2012. Available from: http://hdl.handle.net/11143/6131


Brno University of Technology

11. Dvořák, Michal. Analýza modelování neshodností různých modelů tranzistorů ve slabé a silné inverzi: Analysis of mismatch modeling for various transistor models in weak and strong inversion.

Degree: 2020, Brno University of Technology

 This work maps mismatch modeling for CMOS transistor in strong and weak inversion region. The goal is to build sufficient theoretical background describing origins of… (more)

Subjects/Keywords: Neshodnost; CMOS; MOSFET; model tranzistoru; inverzní koeficient; odchylka; Mismatch; CMOS; MOSFET; transistor model; inversion factor; deviation

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APA (6th Edition):

Dvořák, M. (2020). Analýza modelování neshodností různých modelů tranzistorů ve slabé a silné inverzi: Analysis of mismatch modeling for various transistor models in weak and strong inversion. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/190392

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Dvořák, Michal. “Analýza modelování neshodností různých modelů tranzistorů ve slabé a silné inverzi: Analysis of mismatch modeling for various transistor models in weak and strong inversion.” 2020. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/190392.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Dvořák, Michal. “Analýza modelování neshodností různých modelů tranzistorů ve slabé a silné inverzi: Analysis of mismatch modeling for various transistor models in weak and strong inversion.” 2020. Web. 30 Oct 2020.

Vancouver:

Dvořák M. Analýza modelování neshodností různých modelů tranzistorů ve slabé a silné inverzi: Analysis of mismatch modeling for various transistor models in weak and strong inversion. [Internet] [Thesis]. Brno University of Technology; 2020. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/190392.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Dvořák M. Analýza modelování neshodností různých modelů tranzistorů ve slabé a silné inverzi: Analysis of mismatch modeling for various transistor models in weak and strong inversion. [Thesis]. Brno University of Technology; 2020. Available from: http://hdl.handle.net/11012/190392

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

12. Šimek, Dominik. Zesilovače s unipolárními tranzistory JFET a MOSFET pro laboratorní výuku: Single stage amplifiers employing JFET and MOSFET for educational laboratory purposes.

Degree: 2019, Brno University of Technology

 Bachelor thesis deals with design and construction of measuring box for amplifiers with unipolar transistors, which will be used within laboratory classes. The point of… (more)

Subjects/Keywords: Unipolární tranzistory; JFET; MOSFET; společný Drain; společný Source; společný Gate; Field-effect transistor; JFET; MOSFET; common Drain; common Source; common Gate

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APA (6th Edition):

Šimek, D. (2019). Zesilovače s unipolárními tranzistory JFET a MOSFET pro laboratorní výuku: Single stage amplifiers employing JFET and MOSFET for educational laboratory purposes. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/173667

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Šimek, Dominik. “Zesilovače s unipolárními tranzistory JFET a MOSFET pro laboratorní výuku: Single stage amplifiers employing JFET and MOSFET for educational laboratory purposes.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/173667.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Šimek, Dominik. “Zesilovače s unipolárními tranzistory JFET a MOSFET pro laboratorní výuku: Single stage amplifiers employing JFET and MOSFET for educational laboratory purposes.” 2019. Web. 30 Oct 2020.

Vancouver:

Šimek D. Zesilovače s unipolárními tranzistory JFET a MOSFET pro laboratorní výuku: Single stage amplifiers employing JFET and MOSFET for educational laboratory purposes. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/173667.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Šimek D. Zesilovače s unipolárními tranzistory JFET a MOSFET pro laboratorní výuku: Single stage amplifiers employing JFET and MOSFET for educational laboratory purposes. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/173667

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

13. Soukal, Pavel. Model stárnutí unipolárního tranzistoru: Age effect modeling of the unipolar transistor.

Degree: 2019, Brno University of Technology

 According to non-stopable progress in wireless communications, it is desirable to integrate the RF front-end with the baseband building blocks of communication circuits into a… (more)

Subjects/Keywords: Stárnutí tranzistoru; NBTI; HCI; MOSFET; Extrakce parametrů; Systémová Optimalizace; Transistor age effect; NBTI; HCI; MOSFET; Parameter Extraction; System Optimization

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APA (6th Edition):

Soukal, P. (2019). Model stárnutí unipolárního tranzistoru: Age effect modeling of the unipolar transistor. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/25419

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Soukal, Pavel. “Model stárnutí unipolárního tranzistoru: Age effect modeling of the unipolar transistor.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/25419.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Soukal, Pavel. “Model stárnutí unipolárního tranzistoru: Age effect modeling of the unipolar transistor.” 2019. Web. 30 Oct 2020.

Vancouver:

Soukal P. Model stárnutí unipolárního tranzistoru: Age effect modeling of the unipolar transistor. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/25419.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Soukal P. Model stárnutí unipolárního tranzistoru: Age effect modeling of the unipolar transistor. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/25419

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

14. Gajdoš, Adam. Návrh lineárních struktur na tranzistorové úrovni: Design of linear structures on transistor level.

Degree: 2019, Brno University of Technology

 Bachelor thesis deals with the development of software for automated design frequency filters using active elements instead of inductors. The first part deals with the… (more)

Subjects/Keywords: Wolfram Mathematica; MOSFET tranzistor; kondezátor; aplikace; autonomní obvod; filtr; Wolfram Mathematica; MOSFET transistor; capacitor; application; autonomous circuit; filter

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APA (6th Edition):

Gajdoš, A. (2019). Návrh lineárních struktur na tranzistorové úrovni: Design of linear structures on transistor level. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/71522

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gajdoš, Adam. “Návrh lineárních struktur na tranzistorové úrovni: Design of linear structures on transistor level.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/71522.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gajdoš, Adam. “Návrh lineárních struktur na tranzistorové úrovni: Design of linear structures on transistor level.” 2019. Web. 30 Oct 2020.

Vancouver:

Gajdoš A. Návrh lineárních struktur na tranzistorové úrovni: Design of linear structures on transistor level. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/71522.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gajdoš A. Návrh lineárních struktur na tranzistorové úrovni: Design of linear structures on transistor level. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/71522

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

15. Kharchenko, Vadym. Návrh měniče s použitím polovodičů na bázi SiC: Design inverter using semiconductor on based SiC.

Degree: 2019, Brno University of Technology

 This work builds on a semester project 2. from the winter semester of this academic year. The aim of this thesis is the design of… (more)

Subjects/Keywords: DC/DC Měnič; SiC; MOSFET-tranzistor; VF transformátor; MATLAB-Simulink; DC/DC Converter; SiC; MOSFET-transistor; HF transformer; MATLAB-Simulink

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APA (6th Edition):

Kharchenko, V. (2019). Návrh měniče s použitím polovodičů na bázi SiC: Design inverter using semiconductor on based SiC. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/71169

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kharchenko, Vadym. “Návrh měniče s použitím polovodičů na bázi SiC: Design inverter using semiconductor on based SiC.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/71169.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kharchenko, Vadym. “Návrh měniče s použitím polovodičů na bázi SiC: Design inverter using semiconductor on based SiC.” 2019. Web. 30 Oct 2020.

Vancouver:

Kharchenko V. Návrh měniče s použitím polovodičů na bázi SiC: Design inverter using semiconductor on based SiC. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/71169.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kharchenko V. Návrh měniče s použitím polovodičů na bázi SiC: Design inverter using semiconductor on based SiC. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/71169

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

16. Chabak, Kelson D. Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels.

Degree: PhD, Electrical & Computer Engr, 2016, University of Illinois – Urbana-Champaign

 This dissertation research effort explores new transistor topologies using three-dimensional nanowire (NW)-array channels formed by both bottom-up and top-down synthesis. The bottom-up NW research centers… (more)

Subjects/Keywords: nanowire transistor; High-electron-mobility transistor (HEMT); Fin field effect transistor (finFET); vapor-liquid-solid; gallium oxide; Metal–oxide–semiconductor field-effect transistor (MOSFET); wrap-gate

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APA (6th Edition):

Chabak, K. D. (2016). Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels. (Doctoral Dissertation). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/95466

Chicago Manual of Style (16th Edition):

Chabak, Kelson D. “Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels.” 2016. Doctoral Dissertation, University of Illinois – Urbana-Champaign. Accessed October 30, 2020. http://hdl.handle.net/2142/95466.

MLA Handbook (7th Edition):

Chabak, Kelson D. “Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels.” 2016. Web. 30 Oct 2020.

Vancouver:

Chabak KD. Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels. [Internet] [Doctoral dissertation]. University of Illinois – Urbana-Champaign; 2016. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/2142/95466.

Council of Science Editors:

Chabak KD. Three-dimensional field-effect transistors with top-down and bottom-up nanowire-array channels. [Doctoral Dissertation]. University of Illinois – Urbana-Champaign; 2016. Available from: http://hdl.handle.net/2142/95466


Texas Tech University

17. Lawson, Kevin J. Pulsed evaluation of silicon carbide majority carrier devices.

Degree: Electrical Engineering, 2011, Texas Tech University

 In the power electronics industry power converters are reaching their physical limits for efficiency, power density, and output power. This is due to the fact… (more)

Subjects/Keywords: Metal–oxide–semiconductor field-effect transistor (MOSFET); Junction gate field-effect transistor (JFET); Silicon carbide; Pulsed power

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APA (6th Edition):

Lawson, K. J. (2011). Pulsed evaluation of silicon carbide majority carrier devices. (Thesis). Texas Tech University. Retrieved from http://hdl.handle.net/2346/ETD-TTU-2011-08-1720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lawson, Kevin J. “Pulsed evaluation of silicon carbide majority carrier devices.” 2011. Thesis, Texas Tech University. Accessed October 30, 2020. http://hdl.handle.net/2346/ETD-TTU-2011-08-1720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lawson, Kevin J. “Pulsed evaluation of silicon carbide majority carrier devices.” 2011. Web. 30 Oct 2020.

Vancouver:

Lawson KJ. Pulsed evaluation of silicon carbide majority carrier devices. [Internet] [Thesis]. Texas Tech University; 2011. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/2346/ETD-TTU-2011-08-1720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lawson KJ. Pulsed evaluation of silicon carbide majority carrier devices. [Thesis]. Texas Tech University; 2011. Available from: http://hdl.handle.net/2346/ETD-TTU-2011-08-1720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

18. Nevoral, Jan. Nový přístup k polymorfismu číslicových obvodů na úrovni hradel: Novel approach to polymorphism in gate-level digital circuits.

Degree: 2020, Brno University of Technology

 Nearly twenty years ago, a non-conventional approach to implementation of multifunctional circuits called polymorphic electronics was proposed. The concept of polymorphic electronics allows to implement… (more)

Subjects/Keywords: Polymorfní elektronika; multifunkční hradlo; polymorfní hradlo; ambipolární transistor; MOSFET; číslicový obvod; PoLibSi; Polymorphic electronics; multifunctional gate; polymorphic gate; ambipolar transistor; MOSFET; digital circuit; PoLibSi

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Nevoral, J. (2020). Nový přístup k polymorfismu číslicových obvodů na úrovni hradel: Novel approach to polymorphism in gate-level digital circuits. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/191392

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Nevoral, Jan. “Nový přístup k polymorfismu číslicových obvodů na úrovni hradel: Novel approach to polymorphism in gate-level digital circuits.” 2020. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/191392.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Nevoral, Jan. “Nový přístup k polymorfismu číslicových obvodů na úrovni hradel: Novel approach to polymorphism in gate-level digital circuits.” 2020. Web. 30 Oct 2020.

Vancouver:

Nevoral J. Nový přístup k polymorfismu číslicových obvodů na úrovni hradel: Novel approach to polymorphism in gate-level digital circuits. [Internet] [Thesis]. Brno University of Technology; 2020. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/191392.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Nevoral J. Nový přístup k polymorfismu číslicových obvodů na úrovni hradel: Novel approach to polymorphism in gate-level digital circuits. [Thesis]. Brno University of Technology; 2020. Available from: http://hdl.handle.net/11012/191392

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

19. Langer, Lukáš. Vlastnosti spínaných DC/DC měničů pro automobilové LED aplikace. Parametry vhodných výkonových MOSFETů, možnosti zatlumení, vliv na chování obvodů.: Specifications of swithced DC/DC convertors used for automotive applications. Parameters of suitable MOSFETs, option fo partials damping of their switching operation.

Degree: 2019, Brno University of Technology

 The main topic of this bachelor thesis is an introduction to the usage of a new device for automotive lights, mainly LED lights. The thesis… (more)

Subjects/Keywords: budiče LED; LED; MOSFET; spínání; světlomety; tlumení; transistor; osvětlení; ztráty; automotive lights; damping; LED; LED drivers; lighting; losses; MOSFET; switching operation; transistor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Langer, L. (2019). Vlastnosti spínaných DC/DC měničů pro automobilové LED aplikace. Parametry vhodných výkonových MOSFETů, možnosti zatlumení, vliv na chování obvodů.: Specifications of swithced DC/DC convertors used for automotive applications. Parameters of suitable MOSFETs, option fo partials damping of their switching operation. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/39054

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Langer, Lukáš. “Vlastnosti spínaných DC/DC měničů pro automobilové LED aplikace. Parametry vhodných výkonových MOSFETů, možnosti zatlumení, vliv na chování obvodů.: Specifications of swithced DC/DC convertors used for automotive applications. Parameters of suitable MOSFETs, option fo partials damping of their switching operation.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/39054.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Langer, Lukáš. “Vlastnosti spínaných DC/DC měničů pro automobilové LED aplikace. Parametry vhodných výkonových MOSFETů, možnosti zatlumení, vliv na chování obvodů.: Specifications of swithced DC/DC convertors used for automotive applications. Parameters of suitable MOSFETs, option fo partials damping of their switching operation.” 2019. Web. 30 Oct 2020.

Vancouver:

Langer L. Vlastnosti spínaných DC/DC měničů pro automobilové LED aplikace. Parametry vhodných výkonových MOSFETů, možnosti zatlumení, vliv na chování obvodů.: Specifications of swithced DC/DC convertors used for automotive applications. Parameters of suitable MOSFETs, option fo partials damping of their switching operation. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/39054.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Langer L. Vlastnosti spínaných DC/DC měničů pro automobilové LED aplikace. Parametry vhodných výkonových MOSFETů, možnosti zatlumení, vliv na chování obvodů.: Specifications of swithced DC/DC convertors used for automotive applications. Parameters of suitable MOSFETs, option fo partials damping of their switching operation. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/39054

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

20. Jo, Michael. Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET.

Degree: MS, 1200, 2013, University of Illinois – Urbana-Champaign

 This thesis introduces a Monte Carlo simulation of intrinsic electronic noise in MOSFETs. Brief reviews of the important aspects of carrier transport, band structure, and… (more)

Subjects/Keywords: Monte Carlo simulation; intrinsic noise; metal–oxide–semiconductor field-effect transistor (MOSFET)

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APA (6th Edition):

Jo, M. (2013). Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/45626

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jo, Michael. “Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET.” 2013. Thesis, University of Illinois – Urbana-Champaign. Accessed October 30, 2020. http://hdl.handle.net/2142/45626.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jo, Michael. “Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET.” 2013. Web. 30 Oct 2020.

Vancouver:

Jo M. Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2013. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/2142/45626.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jo M. Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET. [Thesis]. University of Illinois – Urbana-Champaign; 2013. Available from: http://hdl.handle.net/2142/45626

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

21. Mrázek, Vojtěch. Akcelerace evolučního návrhu obvodů na úrovni tranzistorů na platformě Zynq: Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq.

Degree: 2018, Brno University of Technology

 The goal of this project is to design a hardware unit that is designed to accelerate evolutionary design of digital circuits on transistor level. The… (more)

Subjects/Keywords: evoluční algoritmy; kartézské genetické programování; MOSFET tranzistory; transistorová úroveň; akcelerace; Zynq; ARM; evolutionary algorithms; cartesian genetic programming; MOSFET tranzistors; transistor level; acceleration; Zynq; ARM

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mrázek, V. (2018). Akcelerace evolučního návrhu obvodů na úrovni tranzistorů na platformě Zynq: Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/53266

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mrázek, Vojtěch. “Akcelerace evolučního návrhu obvodů na úrovni tranzistorů na platformě Zynq: Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq.” 2018. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/53266.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mrázek, Vojtěch. “Akcelerace evolučního návrhu obvodů na úrovni tranzistorů na platformě Zynq: Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq.” 2018. Web. 30 Oct 2020.

Vancouver:

Mrázek V. Akcelerace evolučního návrhu obvodů na úrovni tranzistorů na platformě Zynq: Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq. [Internet] [Thesis]. Brno University of Technology; 2018. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/53266.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mrázek V. Akcelerace evolučního návrhu obvodů na úrovni tranzistorů na platformě Zynq: Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq. [Thesis]. Brno University of Technology; 2018. Available from: http://hdl.handle.net/11012/53266

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

22. Šandera, Tomáš. Třífázový střídač pro napájení vysokootáčkového asynchronního motoru: Three-phase converter for high-speed induction motor.

Degree: 2019, Brno University of Technology

 The master’s thesis deals with design and realization of three-phase inverter for experimental high speed asynchronous motor with a mechanical power of 6 kW. The… (more)

Subjects/Keywords: Třífázový střídač; SiC MOSFET tranzistor; vysokootáčkový asynchronní motor; napěťový meziobvod; elektrolytický kondenzátor; skalární řízení; Three-phase inverter; SiC MOSFET transistor; high speed asynchronous motor; DC link; electrolytic capacitor; scalar control

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APA (6th Edition):

Šandera, T. (2019). Třífázový střídač pro napájení vysokootáčkového asynchronního motoru: Three-phase converter for high-speed induction motor. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/66016

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Šandera, Tomáš. “Třífázový střídač pro napájení vysokootáčkového asynchronního motoru: Three-phase converter for high-speed induction motor.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/66016.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Šandera, Tomáš. “Třífázový střídač pro napájení vysokootáčkového asynchronního motoru: Three-phase converter for high-speed induction motor.” 2019. Web. 30 Oct 2020.

Vancouver:

Šandera T. Třífázový střídač pro napájení vysokootáčkového asynchronního motoru: Three-phase converter for high-speed induction motor. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/66016.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Šandera T. Třífázový střídač pro napájení vysokootáčkového asynchronního motoru: Three-phase converter for high-speed induction motor. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/66016

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

23. Chvátal, Miloš. Transportní a šumové charakteristiky tranzistorů MOSFET: Transport and Noise Characteristics of MOSFET Transistors.

Degree: 2019, Brno University of Technology

 This doctoral thesis is focused on the analysis of transport characteristics of submicron and micron transistors MOSFET. The assumption is a constant gradient of concentration,… (more)

Subjects/Keywords: Tranzistor MOSFET; transport náboje; RTS šum; héliový kryostat; určení polohy aktivní pasti.; MOSFET transistor; charge transport; RTS noise; helium cryostat; active trap localization.

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chvátal, M. (2019). Transportní a šumové charakteristiky tranzistorů MOSFET: Transport and Noise Characteristics of MOSFET Transistors. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/35856

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chvátal, Miloš. “Transportní a šumové charakteristiky tranzistorů MOSFET: Transport and Noise Characteristics of MOSFET Transistors.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/35856.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chvátal, Miloš. “Transportní a šumové charakteristiky tranzistorů MOSFET: Transport and Noise Characteristics of MOSFET Transistors.” 2019. Web. 30 Oct 2020.

Vancouver:

Chvátal M. Transportní a šumové charakteristiky tranzistorů MOSFET: Transport and Noise Characteristics of MOSFET Transistors. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/35856.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chvátal M. Transportní a šumové charakteristiky tranzistorů MOSFET: Transport and Noise Characteristics of MOSFET Transistors. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/35856

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

24. Major, Jan. Počítačové modelování MOSFET tranzistoru: Computer modeling of MOSFET transistor.

Degree: 2019, Brno University of Technology

 Work is focused on computer modeling of PN junction and MOSFET transistor in the program COMSOL Multiphysics and in program TiberCAD. The text is discussed… (more)

Subjects/Keywords: MOSFET; tranzistor; COMSOL Multiphysics; modelování; simulace; analýza; polovodič; drift; difůze; PN přechod; TiberCAD; MOSFET; transistor; COMSOL Multiphysics; modeling; simulation; analysis; semiconductor; drift; diffusion; PN junction; TiberCAD

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APA (6th Edition):

Major, J. (2019). Počítačové modelování MOSFET tranzistoru: Computer modeling of MOSFET transistor. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/7296

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Major, Jan. “Počítačové modelování MOSFET tranzistoru: Computer modeling of MOSFET transistor.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/7296.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Major, Jan. “Počítačové modelování MOSFET tranzistoru: Computer modeling of MOSFET transistor.” 2019. Web. 30 Oct 2020.

Vancouver:

Major J. Počítačové modelování MOSFET tranzistoru: Computer modeling of MOSFET transistor. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/7296.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Major J. Počítačové modelování MOSFET tranzistoru: Computer modeling of MOSFET transistor. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/7296

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

25. Gábel, Marián. Spínaná nabíječka autobaterií 14,4V/6A: Switching charger for car batteries 14.4V/6A.

Degree: 2019, Brno University of Technology

 This bachelor's thesis deals with issue of design of a switching charger for car batteries using a fly-back converter. The fly-back converter and its functions… (more)

Subjects/Keywords: blokujúci menič; spínaný zdroj; impulzný transformátor; MOSFET tranzistor; integrovaný obvod; fly-back converter; switching power supply; pulse transformer; MOSFET transistor; integrated circuit

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APA (6th Edition):

Gábel, M. (2019). Spínaná nabíječka autobaterií 14,4V/6A: Switching charger for car batteries 14.4V/6A. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/173516

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gábel, Marián. “Spínaná nabíječka autobaterií 14,4V/6A: Switching charger for car batteries 14.4V/6A.” 2019. Thesis, Brno University of Technology. Accessed October 30, 2020. http://hdl.handle.net/11012/173516.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gábel, Marián. “Spínaná nabíječka autobaterií 14,4V/6A: Switching charger for car batteries 14.4V/6A.” 2019. Web. 30 Oct 2020.

Vancouver:

Gábel M. Spínaná nabíječka autobaterií 14,4V/6A: Switching charger for car batteries 14.4V/6A. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/11012/173516.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gábel M. Spínaná nabíječka autobaterií 14,4V/6A: Switching charger for car batteries 14.4V/6A. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/173516

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Vanderbilt University

26. Ni, Kai. Single event transient and total ionizing dose effects on III-V MOSFETs for sub-10 nm node CMOS.

Degree: PhD, Electrical Engineering, 2016, Vanderbilt University

 With CMOS scaling continuing to sub-10 nm node, Si is approaching its physical limits. To enable further scaling, alternative channel materials with superior transport properties… (more)

Subjects/Keywords: charge collection; TCAD; parasitic bipolar transistor; pulsed laser; heavy ion; III-V MOSFET; single event transient; total ionizing dose

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APA (6th Edition):

Ni, K. (2016). Single event transient and total ionizing dose effects on III-V MOSFETs for sub-10 nm node CMOS. (Doctoral Dissertation). Vanderbilt University. Retrieved from http://hdl.handle.net/1803/14126

Chicago Manual of Style (16th Edition):

Ni, Kai. “Single event transient and total ionizing dose effects on III-V MOSFETs for sub-10 nm node CMOS.” 2016. Doctoral Dissertation, Vanderbilt University. Accessed October 30, 2020. http://hdl.handle.net/1803/14126.

MLA Handbook (7th Edition):

Ni, Kai. “Single event transient and total ionizing dose effects on III-V MOSFETs for sub-10 nm node CMOS.” 2016. Web. 30 Oct 2020.

Vancouver:

Ni K. Single event transient and total ionizing dose effects on III-V MOSFETs for sub-10 nm node CMOS. [Internet] [Doctoral dissertation]. Vanderbilt University; 2016. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/1803/14126.

Council of Science Editors:

Ni K. Single event transient and total ionizing dose effects on III-V MOSFETs for sub-10 nm node CMOS. [Doctoral Dissertation]. Vanderbilt University; 2016. Available from: http://hdl.handle.net/1803/14126


North Carolina State University

27. Pesovic, Nemanja. Selective Chemical Vapor Deposition of Heavily Boron Doped Silicon-Germanium Films from Disilane, Germane and Chlorine for Source/ Drain Junctions of Nanoscale CMOS.

Degree: PhD, Electrical Engineering, 2002, North Carolina State University

 As metal-oxide semiconductor field effect transistors (MOSFETs) are scaled for higher speed and reduced power, new challenges are imposed on the source/drain junctions and their… (more)

Subjects/Keywords: selective; epitaxy; sige; source; drain; mosfet; transistor

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APA (6th Edition):

Pesovic, N. (2002). Selective Chemical Vapor Deposition of Heavily Boron Doped Silicon-Germanium Films from Disilane, Germane and Chlorine for Source/ Drain Junctions of Nanoscale CMOS. (Doctoral Dissertation). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/3477

Chicago Manual of Style (16th Edition):

Pesovic, Nemanja. “Selective Chemical Vapor Deposition of Heavily Boron Doped Silicon-Germanium Films from Disilane, Germane and Chlorine for Source/ Drain Junctions of Nanoscale CMOS.” 2002. Doctoral Dissertation, North Carolina State University. Accessed October 30, 2020. http://www.lib.ncsu.edu/resolver/1840.16/3477.

MLA Handbook (7th Edition):

Pesovic, Nemanja. “Selective Chemical Vapor Deposition of Heavily Boron Doped Silicon-Germanium Films from Disilane, Germane and Chlorine for Source/ Drain Junctions of Nanoscale CMOS.” 2002. Web. 30 Oct 2020.

Vancouver:

Pesovic N. Selective Chemical Vapor Deposition of Heavily Boron Doped Silicon-Germanium Films from Disilane, Germane and Chlorine for Source/ Drain Junctions of Nanoscale CMOS. [Internet] [Doctoral dissertation]. North Carolina State University; 2002. [cited 2020 Oct 30]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/3477.

Council of Science Editors:

Pesovic N. Selective Chemical Vapor Deposition of Heavily Boron Doped Silicon-Germanium Films from Disilane, Germane and Chlorine for Source/ Drain Junctions of Nanoscale CMOS. [Doctoral Dissertation]. North Carolina State University; 2002. Available from: http://www.lib.ncsu.edu/resolver/1840.16/3477

28. Tavares, Jorge Paulo Nunes. Sistema de teste de transístores bipolares de junção e de efeito de campo.

Degree: 2011, Instituto Politécnico do Porto

O estudo das curvas características de um transístor permite conhecer um conjunto de parâmetros essenciais à sua utilização tanto no domínio da amplificação de sinais… (more)

Subjects/Keywords: TBJ; JFET; MOSFET; Curvas características; Curvas de dreno; Amplificadores; Transístor; BJT; Characteristic curves; Drain curves; Amplifier; Transistor

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APA (6th Edition):

Tavares, J. P. N. (2011). Sistema de teste de transístores bipolares de junção e de efeito de campo. (Thesis). Instituto Politécnico do Porto. Retrieved from http://www.rcaap.pt/detail.jsp?id=oai:recipp.ipp.pt:10400.22/2641

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tavares, Jorge Paulo Nunes. “Sistema de teste de transístores bipolares de junção e de efeito de campo.” 2011. Thesis, Instituto Politécnico do Porto. Accessed October 30, 2020. http://www.rcaap.pt/detail.jsp?id=oai:recipp.ipp.pt:10400.22/2641.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tavares, Jorge Paulo Nunes. “Sistema de teste de transístores bipolares de junção e de efeito de campo.” 2011. Web. 30 Oct 2020.

Vancouver:

Tavares JPN. Sistema de teste de transístores bipolares de junção e de efeito de campo. [Internet] [Thesis]. Instituto Politécnico do Porto; 2011. [cited 2020 Oct 30]. Available from: http://www.rcaap.pt/detail.jsp?id=oai:recipp.ipp.pt:10400.22/2641.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tavares JPN. Sistema de teste de transístores bipolares de junção e de efeito de campo. [Thesis]. Instituto Politécnico do Porto; 2011. Available from: http://www.rcaap.pt/detail.jsp?id=oai:recipp.ipp.pt:10400.22/2641

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Chicago

29. Zhang, Nanzhu. Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System.

Degree: 2014, University of Illinois – Chicago

 In the first part of the thesis, some basic knowledge related to my research is introduced, such as what is MOSFET, polymer and QDs. In… (more)

Subjects/Keywords: Dual-gate Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET); Wurtzite Quantum Heterostructures; Photodetector; Quantum Dots; Interface phonon modes

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APA (6th Edition):

Zhang, N. (2014). Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System. (Thesis). University of Illinois – Chicago. Retrieved from http://hdl.handle.net/10027/18882

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhang, Nanzhu. “Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System.” 2014. Thesis, University of Illinois – Chicago. Accessed October 30, 2020. http://hdl.handle.net/10027/18882.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhang, Nanzhu. “Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System.” 2014. Web. 30 Oct 2020.

Vancouver:

Zhang N. Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System. [Internet] [Thesis]. University of Illinois – Chicago; 2014. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/10027/18882.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhang N. Interface Phonon Modes of Heterostructures and Quantum Dots/Polymer Composite System. [Thesis]. University of Illinois – Chicago; 2014. Available from: http://hdl.handle.net/10027/18882

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

30. Wang, Ning. Toward high-performance, low-power, carbon-based interconnects and transistors.

Degree: MS, 1200, 2013, University of Illinois – Urbana-Champaign

 As the physical limits of Moore’s law scaling are immediately apparent, industry has explored new ways of pushing technological progress. For integrated circuit applications, major… (more)

Subjects/Keywords: graphene; carbon nanotube; graphene nanoribbon (GNR); interconnect; metal-oxide-semiconductor field-effect transistor (MOSFET); avalanche multiplication; impact ionization

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APA (6th Edition):

Wang, N. (2013). Toward high-performance, low-power, carbon-based interconnects and transistors. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/45604

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Ning. “Toward high-performance, low-power, carbon-based interconnects and transistors.” 2013. Thesis, University of Illinois – Urbana-Champaign. Accessed October 30, 2020. http://hdl.handle.net/2142/45604.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Ning. “Toward high-performance, low-power, carbon-based interconnects and transistors.” 2013. Web. 30 Oct 2020.

Vancouver:

Wang N. Toward high-performance, low-power, carbon-based interconnects and transistors. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2013. [cited 2020 Oct 30]. Available from: http://hdl.handle.net/2142/45604.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang N. Toward high-performance, low-power, carbon-based interconnects and transistors. [Thesis]. University of Illinois – Urbana-Champaign; 2013. Available from: http://hdl.handle.net/2142/45604

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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