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You searched for subject:(LDPC). Showing records 1 – 30 of 240 total matches.

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1. Mahdi, Ahmed. Αρχιτεκτονική και υλοποίηση κωδικοποιητών VLSI για κώδικες LDPC.

Degree: 2010, University of Patras

Η διπλωματική εργασία επικεντρώνεται στη μελέτη της κωδικοποίησης για κώδικες LDPC. Στα πλαίσιά της, θα μελετηθούν τα προβλήματα και η πολυπλοκότητα κωδικοποίησης συναρτήσει του μήκους… (more)

Subjects/Keywords: Κωδικοποιητές; Κώδικες LDPC; 005.72; Encoders; LDPC codes

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APA (6th Edition):

Mahdi, A. (2010). Αρχιτεκτονική και υλοποίηση κωδικοποιητών VLSI για κώδικες LDPC. (Masters Thesis). University of Patras. Retrieved from http://nemertes.lis.upatras.gr/jspui/handle/10889/4280

Chicago Manual of Style (16th Edition):

Mahdi, Ahmed. “Αρχιτεκτονική και υλοποίηση κωδικοποιητών VLSI για κώδικες LDPC.” 2010. Masters Thesis, University of Patras. Accessed June 19, 2019. http://nemertes.lis.upatras.gr/jspui/handle/10889/4280.

MLA Handbook (7th Edition):

Mahdi, Ahmed. “Αρχιτεκτονική και υλοποίηση κωδικοποιητών VLSI για κώδικες LDPC.” 2010. Web. 19 Jun 2019.

Vancouver:

Mahdi A. Αρχιτεκτονική και υλοποίηση κωδικοποιητών VLSI για κώδικες LDPC. [Internet] [Masters thesis]. University of Patras; 2010. [cited 2019 Jun 19]. Available from: http://nemertes.lis.upatras.gr/jspui/handle/10889/4280.

Council of Science Editors:

Mahdi A. Αρχιτεκτονική και υλοποίηση κωδικοποιητών VLSI για κώδικες LDPC. [Masters Thesis]. University of Patras; 2010. Available from: http://nemertes.lis.upatras.gr/jspui/handle/10889/4280


University of Alberta

2. Zhang, Shuai. Controlling the Error Floors of the Low-Density Parity-Check Codes.

Degree: PhD, Department of Electrical and Computer Engineering, 2012, University of Alberta

 The goal of error control coding is to encode information in such a way, that in the event that errors occur during transmission over a… (more)

Subjects/Keywords: LDPC; Error Floor

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APA (6th Edition):

Zhang, S. (2012). Controlling the Error Floors of the Low-Density Parity-Check Codes. (Doctoral Dissertation). University of Alberta. Retrieved from https://era.library.ualberta.ca/files/5425kb98q

Chicago Manual of Style (16th Edition):

Zhang, Shuai. “Controlling the Error Floors of the Low-Density Parity-Check Codes.” 2012. Doctoral Dissertation, University of Alberta. Accessed June 19, 2019. https://era.library.ualberta.ca/files/5425kb98q.

MLA Handbook (7th Edition):

Zhang, Shuai. “Controlling the Error Floors of the Low-Density Parity-Check Codes.” 2012. Web. 19 Jun 2019.

Vancouver:

Zhang S. Controlling the Error Floors of the Low-Density Parity-Check Codes. [Internet] [Doctoral dissertation]. University of Alberta; 2012. [cited 2019 Jun 19]. Available from: https://era.library.ualberta.ca/files/5425kb98q.

Council of Science Editors:

Zhang S. Controlling the Error Floors of the Low-Density Parity-Check Codes. [Doctoral Dissertation]. University of Alberta; 2012. Available from: https://era.library.ualberta.ca/files/5425kb98q


Texas A&M University

3. Wang, Weihuang. Low power low-density parity-checking (ldpc) codes decoder design using dynamic voltage and frequency scaling.

Degree: 2009, Texas A&M University

 This thesis presents a low-power LDPC decoder design based on speculative scheduling of energy necessary to decode dynamically varying data frame in both block-fading channels… (more)

Subjects/Keywords: VLSI; LDPC; low power

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APA (6th Edition):

Wang, W. (2009). Low power low-density parity-checking (ldpc) codes decoder design using dynamic voltage and frequency scaling. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2504

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Weihuang. “Low power low-density parity-checking (ldpc) codes decoder design using dynamic voltage and frequency scaling.” 2009. Thesis, Texas A&M University. Accessed June 19, 2019. http://hdl.handle.net/1969.1/ETD-TAMU-2504.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Weihuang. “Low power low-density parity-checking (ldpc) codes decoder design using dynamic voltage and frequency scaling.” 2009. Web. 19 Jun 2019.

Vancouver:

Wang W. Low power low-density parity-checking (ldpc) codes decoder design using dynamic voltage and frequency scaling. [Internet] [Thesis]. Texas A&M University; 2009. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2504.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang W. Low power low-density parity-checking (ldpc) codes decoder design using dynamic voltage and frequency scaling. [Thesis]. Texas A&M University; 2009. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2504

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

4. Dihidar, Souvik. Applications of Low Density Parity Check Codes for Wiretap Channels and Congestion Localization in Networks.

Degree: PhD, Electrical and Computer Engineering, 2006, Georgia Tech

 Error control coding in some form is present in virtually every communication system today. Recently, Low Density Parity Check (LDPC) codes have been proposed along… (more)

Subjects/Keywords: LDPC; Wiretap

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APA (6th Edition):

Dihidar, S. (2006). Applications of Low Density Parity Check Codes for Wiretap Channels and Congestion Localization in Networks. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/13969

Chicago Manual of Style (16th Edition):

Dihidar, Souvik. “Applications of Low Density Parity Check Codes for Wiretap Channels and Congestion Localization in Networks.” 2006. Doctoral Dissertation, Georgia Tech. Accessed June 19, 2019. http://hdl.handle.net/1853/13969.

MLA Handbook (7th Edition):

Dihidar, Souvik. “Applications of Low Density Parity Check Codes for Wiretap Channels and Congestion Localization in Networks.” 2006. Web. 19 Jun 2019.

Vancouver:

Dihidar S. Applications of Low Density Parity Check Codes for Wiretap Channels and Congestion Localization in Networks. [Internet] [Doctoral dissertation]. Georgia Tech; 2006. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/1853/13969.

Council of Science Editors:

Dihidar S. Applications of Low Density Parity Check Codes for Wiretap Channels and Congestion Localization in Networks. [Doctoral Dissertation]. Georgia Tech; 2006. Available from: http://hdl.handle.net/1853/13969


Queens University

5. Alnabulsi, Basel. LDPC-OFDM: Channel Estimation and Power considerations .

Degree: Electrical and Computer Engineering, 2013, Queens University

 Small cells are low-powered radio access nodes that operate in licensed and unlicensed spectrum that have a range of 10 meters to 200 meters, compared… (more)

Subjects/Keywords: LDPC; OFDM; PAPR; Nonuniform Interpolation

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APA (6th Edition):

Alnabulsi, B. (2013). LDPC-OFDM: Channel Estimation and Power considerations . (Thesis). Queens University. Retrieved from http://hdl.handle.net/1974/7981

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Alnabulsi, Basel. “LDPC-OFDM: Channel Estimation and Power considerations .” 2013. Thesis, Queens University. Accessed June 19, 2019. http://hdl.handle.net/1974/7981.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Alnabulsi, Basel. “LDPC-OFDM: Channel Estimation and Power considerations .” 2013. Web. 19 Jun 2019.

Vancouver:

Alnabulsi B. LDPC-OFDM: Channel Estimation and Power considerations . [Internet] [Thesis]. Queens University; 2013. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/1974/7981.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Alnabulsi B. LDPC-OFDM: Channel Estimation and Power considerations . [Thesis]. Queens University; 2013. Available from: http://hdl.handle.net/1974/7981

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Louisiana State University

6. Xia, Tian. Blind LDPC encoder identification.

Degree: MSEE, Electrical and Computer Engineering, 2013, Louisiana State University

 Nowadays, adaptive modulation and coding (AMC) techniques can facilitate flexible strategies subject to dynamic channel quality. The AMC transceivers select the most suitable coding and… (more)

Subjects/Keywords: LDPC codes; blind identification

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APA (6th Edition):

Xia, T. (2013). Blind LDPC encoder identification. (Masters Thesis). Louisiana State University. Retrieved from etd-11182013-115645 ; https://digitalcommons.lsu.edu/gradschool_theses/3323

Chicago Manual of Style (16th Edition):

Xia, Tian. “Blind LDPC encoder identification.” 2013. Masters Thesis, Louisiana State University. Accessed June 19, 2019. etd-11182013-115645 ; https://digitalcommons.lsu.edu/gradschool_theses/3323.

MLA Handbook (7th Edition):

Xia, Tian. “Blind LDPC encoder identification.” 2013. Web. 19 Jun 2019.

Vancouver:

Xia T. Blind LDPC encoder identification. [Internet] [Masters thesis]. Louisiana State University; 2013. [cited 2019 Jun 19]. Available from: etd-11182013-115645 ; https://digitalcommons.lsu.edu/gradschool_theses/3323.

Council of Science Editors:

Xia T. Blind LDPC encoder identification. [Masters Thesis]. Louisiana State University; 2013. Available from: etd-11182013-115645 ; https://digitalcommons.lsu.edu/gradschool_theses/3323


University of Saskatchewan

7. Loi, Kung Chi Cinnati. Field-programmable gate-array (FPGA) implementation of low-density parity-check (LDPC) decoder in digital video broadcasting - second generation satellite (DVB-S2).

Degree: 2010, University of Saskatchewan

 In recent years, LDPC codes are gaining a lot of attention among researchers. Its near-Shannon performance combined with its highly parallel architecture and lesser complexity… (more)

Subjects/Keywords: FPGA; DVB-S2; LDPC

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APA (6th Edition):

Loi, K. C. C. (2010). Field-programmable gate-array (FPGA) implementation of low-density parity-check (LDPC) decoder in digital video broadcasting - second generation satellite (DVB-S2). (Thesis). University of Saskatchewan. Retrieved from http://hdl.handle.net/10388/etd-09222010-120119

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Loi, Kung Chi Cinnati. “Field-programmable gate-array (FPGA) implementation of low-density parity-check (LDPC) decoder in digital video broadcasting - second generation satellite (DVB-S2).” 2010. Thesis, University of Saskatchewan. Accessed June 19, 2019. http://hdl.handle.net/10388/etd-09222010-120119.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Loi, Kung Chi Cinnati. “Field-programmable gate-array (FPGA) implementation of low-density parity-check (LDPC) decoder in digital video broadcasting - second generation satellite (DVB-S2).” 2010. Web. 19 Jun 2019.

Vancouver:

Loi KCC. Field-programmable gate-array (FPGA) implementation of low-density parity-check (LDPC) decoder in digital video broadcasting - second generation satellite (DVB-S2). [Internet] [Thesis]. University of Saskatchewan; 2010. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/10388/etd-09222010-120119.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Loi KCC. Field-programmable gate-array (FPGA) implementation of low-density parity-check (LDPC) decoder in digital video broadcasting - second generation satellite (DVB-S2). [Thesis]. University of Saskatchewan; 2010. Available from: http://hdl.handle.net/10388/etd-09222010-120119

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Waterloo

8. Li, Si-Yun. Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder.

Degree: 2012, University of Waterloo

 In this thesis, we present an FPGA implementation of parallel-node low-density-parity-check convolutional-code (PN-LDPC-CC) encoder and decoder. A 2.4 Gbit/s rate-1/2 (3, 6) PN-LDPC-CC encoder and… (more)

Subjects/Keywords: LDPC; FPGA; Convolutional Codes; FEC

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APA (6th Edition):

Li, S. (2012). Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/6962

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Si-Yun. “Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder.” 2012. Thesis, University of Waterloo. Accessed June 19, 2019. http://hdl.handle.net/10012/6962.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Si-Yun. “Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder.” 2012. Web. 19 Jun 2019.

Vancouver:

Li S. Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder. [Internet] [Thesis]. University of Waterloo; 2012. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/10012/6962.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li S. Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder. [Thesis]. University of Waterloo; 2012. Available from: http://hdl.handle.net/10012/6962

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Arizona

9. Sun, Xiaole. Secure and Reliable Communications over Free-space Optical Channels .

Degree: 2019, University of Arizona

 Free-space optical (FSO) communication provides a promising alternative solution to the traditional radio frequency (RF) communications. Compared to the RF technology, there are many advantages… (more)

Subjects/Keywords: FPGA; FSO; LDPC; QKD

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APA (6th Edition):

Sun, X. (2019). Secure and Reliable Communications over Free-space Optical Channels . (Doctoral Dissertation). University of Arizona. Retrieved from http://hdl.handle.net/10150/631902

Chicago Manual of Style (16th Edition):

Sun, Xiaole. “Secure and Reliable Communications over Free-space Optical Channels .” 2019. Doctoral Dissertation, University of Arizona. Accessed June 19, 2019. http://hdl.handle.net/10150/631902.

MLA Handbook (7th Edition):

Sun, Xiaole. “Secure and Reliable Communications over Free-space Optical Channels .” 2019. Web. 19 Jun 2019.

Vancouver:

Sun X. Secure and Reliable Communications over Free-space Optical Channels . [Internet] [Doctoral dissertation]. University of Arizona; 2019. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/10150/631902.

Council of Science Editors:

Sun X. Secure and Reliable Communications over Free-space Optical Channels . [Doctoral Dissertation]. University of Arizona; 2019. Available from: http://hdl.handle.net/10150/631902

10. Bhutto, Tarique Inayat. Root LDPC Codes for Non Ergodic Transmission Channels.

Degree: 2011, , School of Engineering

4 ABSTRACT Tremendous amount of research has been conducted in modern coding theory in the past few years and much of the work has… (more)

Subjects/Keywords: Non-Binary Root LDPC codes; LDPC codes; Binary-Root LDPC codes; Signal Processing; Signalbehandling; Computer Sciences; Datavetenskap (datalogi); Telecommunications; Telekommunikation

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APA (6th Edition):

Bhutto, T. I. (2011). Root LDPC Codes for Non Ergodic Transmission Channels. (Thesis). , School of Engineering. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:bth-5938

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Bhutto, Tarique Inayat. “Root LDPC Codes for Non Ergodic Transmission Channels.” 2011. Thesis, , School of Engineering. Accessed June 19, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-5938.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Bhutto, Tarique Inayat. “Root LDPC Codes for Non Ergodic Transmission Channels.” 2011. Web. 19 Jun 2019.

Vancouver:

Bhutto TI. Root LDPC Codes for Non Ergodic Transmission Channels. [Internet] [Thesis]. , School of Engineering; 2011. [cited 2019 Jun 19]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:bth-5938.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Bhutto TI. Root LDPC Codes for Non Ergodic Transmission Channels. [Thesis]. , School of Engineering; 2011. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:bth-5938

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Kansas State University

11. Kopparthi, Sunitha. Flexible encoder and decoder designs for low-density parity-check codes.

Degree: PhD, Department of Electrical and Computer Engineering, 2010, Kansas State University

 Future technologies such as cognitive radio require flexible and reliable hardware architectures that can be easily configured and adapted to varying coding parameters. The objective… (more)

Subjects/Keywords: Flexible LDPC encoder; IEEE 802.16e LDPC codes; Flexible LDPC decoder; Hardware Architecture; Engineering, Electronics and Electrical (0544)

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APA (6th Edition):

Kopparthi, S. (2010). Flexible encoder and decoder designs for low-density parity-check codes. (Doctoral Dissertation). Kansas State University. Retrieved from http://hdl.handle.net/2097/4190

Chicago Manual of Style (16th Edition):

Kopparthi, Sunitha. “Flexible encoder and decoder designs for low-density parity-check codes.” 2010. Doctoral Dissertation, Kansas State University. Accessed June 19, 2019. http://hdl.handle.net/2097/4190.

MLA Handbook (7th Edition):

Kopparthi, Sunitha. “Flexible encoder and decoder designs for low-density parity-check codes.” 2010. Web. 19 Jun 2019.

Vancouver:

Kopparthi S. Flexible encoder and decoder designs for low-density parity-check codes. [Internet] [Doctoral dissertation]. Kansas State University; 2010. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/2097/4190.

Council of Science Editors:

Kopparthi S. Flexible encoder and decoder designs for low-density parity-check codes. [Doctoral Dissertation]. Kansas State University; 2010. Available from: http://hdl.handle.net/2097/4190


University of Alberta

12. Zheng, Chao. Design and Decoding LDPC Codes With Low Complexity.

Degree: MS, Department of Electrical and Computer Engineering, 2012, University of Alberta

 This thesis presents low complexity design and decoding schemes for low density parity check (LDPC) codes. First, we consider the iterative decoding of LDPC codes… (more)

Subjects/Keywords: iterative decoding; universal codes; LLR; LDPC codes

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zheng, C. (2012). Design and Decoding LDPC Codes With Low Complexity. (Masters Thesis). University of Alberta. Retrieved from https://era.library.ualberta.ca/files/2v23vt80m

Chicago Manual of Style (16th Edition):

Zheng, Chao. “Design and Decoding LDPC Codes With Low Complexity.” 2012. Masters Thesis, University of Alberta. Accessed June 19, 2019. https://era.library.ualberta.ca/files/2v23vt80m.

MLA Handbook (7th Edition):

Zheng, Chao. “Design and Decoding LDPC Codes With Low Complexity.” 2012. Web. 19 Jun 2019.

Vancouver:

Zheng C. Design and Decoding LDPC Codes With Low Complexity. [Internet] [Masters thesis]. University of Alberta; 2012. [cited 2019 Jun 19]. Available from: https://era.library.ualberta.ca/files/2v23vt80m.

Council of Science Editors:

Zheng C. Design and Decoding LDPC Codes With Low Complexity. [Masters Thesis]. University of Alberta; 2012. Available from: https://era.library.ualberta.ca/files/2v23vt80m


University of Alberta

13. Maier, Andrew J. Design and Optimization of Decoders for Low-Denisty Parity Check Codes Synthesized from the OpenCL Specifications.

Degree: MS, Department of Electrical and Computer Engineering, 2016, University of Alberta

 Open Computing Language (OpenCL) is a high-level language that allows developers to produce portable software for heterogeneous parallel computing platforms. OpenCL is available for a… (more)

Subjects/Keywords: OpenCL; LDPC; FPGA; Heterogeneous Programming; Parallel Programming

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APA (6th Edition):

Maier, A. J. (2016). Design and Optimization of Decoders for Low-Denisty Parity Check Codes Synthesized from the OpenCL Specifications. (Masters Thesis). University of Alberta. Retrieved from https://era.library.ualberta.ca/files/cjd472w72q

Chicago Manual of Style (16th Edition):

Maier, Andrew J. “Design and Optimization of Decoders for Low-Denisty Parity Check Codes Synthesized from the OpenCL Specifications.” 2016. Masters Thesis, University of Alberta. Accessed June 19, 2019. https://era.library.ualberta.ca/files/cjd472w72q.

MLA Handbook (7th Edition):

Maier, Andrew J. “Design and Optimization of Decoders for Low-Denisty Parity Check Codes Synthesized from the OpenCL Specifications.” 2016. Web. 19 Jun 2019.

Vancouver:

Maier AJ. Design and Optimization of Decoders for Low-Denisty Parity Check Codes Synthesized from the OpenCL Specifications. [Internet] [Masters thesis]. University of Alberta; 2016. [cited 2019 Jun 19]. Available from: https://era.library.ualberta.ca/files/cjd472w72q.

Council of Science Editors:

Maier AJ. Design and Optimization of Decoders for Low-Denisty Parity Check Codes Synthesized from the OpenCL Specifications. [Masters Thesis]. University of Alberta; 2016. Available from: https://era.library.ualberta.ca/files/cjd472w72q


University of Edinburgh

14. Khan, Zahid. Optimization of advanced telecommunication algorithms from power and performance perspective.

Degree: 2011, University of Edinburgh

 This thesis investigates optimization of advanced telecommunication algorithms from power and performance perspectives. The algorithms chosen are MIMO and LDPC. MIMO is implemented in custom… (more)

Subjects/Keywords: 621.382; MIMO; LDPC; low power; VBLAST

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APA (6th Edition):

Khan, Z. (2011). Optimization of advanced telecommunication algorithms from power and performance perspective. (Doctoral Dissertation). University of Edinburgh. Retrieved from http://hdl.handle.net/1842/5784

Chicago Manual of Style (16th Edition):

Khan, Zahid. “Optimization of advanced telecommunication algorithms from power and performance perspective.” 2011. Doctoral Dissertation, University of Edinburgh. Accessed June 19, 2019. http://hdl.handle.net/1842/5784.

MLA Handbook (7th Edition):

Khan, Zahid. “Optimization of advanced telecommunication algorithms from power and performance perspective.” 2011. Web. 19 Jun 2019.

Vancouver:

Khan Z. Optimization of advanced telecommunication algorithms from power and performance perspective. [Internet] [Doctoral dissertation]. University of Edinburgh; 2011. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/1842/5784.

Council of Science Editors:

Khan Z. Optimization of advanced telecommunication algorithms from power and performance perspective. [Doctoral Dissertation]. University of Edinburgh; 2011. Available from: http://hdl.handle.net/1842/5784

15. 尾澤, 章弘. ギャップの大きなLDPC符号に対するRichardson符号化法の効率改善 : Improving the complexity of richardson's encoding algorithm for LDPC codes with large gap; ギャップ ノ オオキナ LDPC フゴウ ニ タイスル Richardson フゴウカ ホウ ノ コウリツ カイゼン.

Degree: Nara Institute of Science and Technology / 奈良先端科学技術大学院大学

Subjects/Keywords: LDPC符号

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APA (6th Edition):

尾澤, . (n.d.). ギャップの大きなLDPC符号に対するRichardson符号化法の効率改善 : Improving the complexity of richardson's encoding algorithm for LDPC codes with large gap; ギャップ ノ オオキナ LDPC フゴウ ニ タイスル Richardson フゴウカ ホウ ノ コウリツ カイゼン. (Thesis). Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Retrieved from http://hdl.handle.net/10061/1211

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

尾澤, 章弘. “ギャップの大きなLDPC符号に対するRichardson符号化法の効率改善 : Improving the complexity of richardson's encoding algorithm for LDPC codes with large gap; ギャップ ノ オオキナ LDPC フゴウ ニ タイスル Richardson フゴウカ ホウ ノ コウリツ カイゼン.” Thesis, Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Accessed June 19, 2019. http://hdl.handle.net/10061/1211.

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

尾澤, 章弘. “ギャップの大きなLDPC符号に対するRichardson符号化法の効率改善 : Improving the complexity of richardson's encoding algorithm for LDPC codes with large gap; ギャップ ノ オオキナ LDPC フゴウ ニ タイスル Richardson フゴウカ ホウ ノ コウリツ カイゼン.” Web. 19 Jun 2019.

Note: this citation may be lacking information needed for this citation format:
No year of publication.

Vancouver:

尾澤 . ギャップの大きなLDPC符号に対するRichardson符号化法の効率改善 : Improving the complexity of richardson's encoding algorithm for LDPC codes with large gap; ギャップ ノ オオキナ LDPC フゴウ ニ タイスル Richardson フゴウカ ホウ ノ コウリツ カイゼン. [Internet] [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; [cited 2019 Jun 19]. Available from: http://hdl.handle.net/10061/1211.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.

Council of Science Editors:

尾澤 . ギャップの大きなLDPC符号に対するRichardson符号化法の効率改善 : Improving the complexity of richardson's encoding algorithm for LDPC codes with large gap; ギャップ ノ オオキナ LDPC フゴウ ニ タイスル Richardson フゴウカ ホウ ノ コウリツ カイゼン. [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; Available from: http://hdl.handle.net/10061/1211

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.


Georgia Tech

16. Du, Jianxuan. Layered Space-Time Structure for MIMO-OFDM Systems.

Degree: PhD, Electrical and Computer Engineering, 2005, Georgia Tech

 The low complexity of layered processing makes the layered structure a promising candidate for MIMO systems with a large number of transmit antennas and higher… (more)

Subjects/Keywords: LDPC; OFDM; MIMO

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Du, J. (2005). Layered Space-Time Structure for MIMO-OFDM Systems. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/7204

Chicago Manual of Style (16th Edition):

Du, Jianxuan. “Layered Space-Time Structure for MIMO-OFDM Systems.” 2005. Doctoral Dissertation, Georgia Tech. Accessed June 19, 2019. http://hdl.handle.net/1853/7204.

MLA Handbook (7th Edition):

Du, Jianxuan. “Layered Space-Time Structure for MIMO-OFDM Systems.” 2005. Web. 19 Jun 2019.

Vancouver:

Du J. Layered Space-Time Structure for MIMO-OFDM Systems. [Internet] [Doctoral dissertation]. Georgia Tech; 2005. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/1853/7204.

Council of Science Editors:

Du J. Layered Space-Time Structure for MIMO-OFDM Systems. [Doctoral Dissertation]. Georgia Tech; 2005. Available from: http://hdl.handle.net/1853/7204


UCLA

17. Vakilinia, Kasra. Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory.

Degree: Electrical Engineering, 2016, UCLA

 This dissertation mainly focuses on two different branches of coding theory and its applications:1) coding to approach capacity in short blocklengths using feedback and 2)… (more)

Subjects/Keywords: Electrical engineering; Feedback; Flash Memory; LDPC Coding

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Vakilinia, K. (2016). Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory. (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/08f672rf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vakilinia, Kasra. “Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory.” 2016. Thesis, UCLA. Accessed June 19, 2019. http://www.escholarship.org/uc/item/08f672rf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vakilinia, Kasra. “Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory.” 2016. Web. 19 Jun 2019.

Vancouver:

Vakilinia K. Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory. [Internet] [Thesis]. UCLA; 2016. [cited 2019 Jun 19]. Available from: http://www.escholarship.org/uc/item/08f672rf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vakilinia K. Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory. [Thesis]. UCLA; 2016. Available from: http://www.escholarship.org/uc/item/08f672rf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Texas – Austin

18. Regulapati, Varsha. Error correction codes in NAND flash memory.

Degree: Electrical and Computer Engineering, 2015, University of Texas – Austin

 Error Correction Codes (ECC) are used in NAND Flash memories to detect and correct bit-errors. With shrinking technology nodes and increased memory complexity, bit error… (more)

Subjects/Keywords: Error correction codes; NAND flash memory; LDPC

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Regulapati, V. (2015). Error correction codes in NAND flash memory. (Thesis). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/33302

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Regulapati, Varsha. “Error correction codes in NAND flash memory.” 2015. Thesis, University of Texas – Austin. Accessed June 19, 2019. http://hdl.handle.net/2152/33302.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Regulapati, Varsha. “Error correction codes in NAND flash memory.” 2015. Web. 19 Jun 2019.

Vancouver:

Regulapati V. Error correction codes in NAND flash memory. [Internet] [Thesis]. University of Texas – Austin; 2015. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/2152/33302.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Regulapati V. Error correction codes in NAND flash memory. [Thesis]. University of Texas – Austin; 2015. Available from: http://hdl.handle.net/2152/33302

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Minnesota

19. Kim, Sangmin. Reduced-complexity VLSI architectures for binary and nonbinary LDPC Codes.

Degree: PhD, Electrical Engineering, 2010, University of Minnesota

 This thesis proposes efficient algorithm and architecture aspects for binary and nonbinary low- density parity-check (LDPC) codes by developing optimal quantization approaches, decoding algorithms, decoding… (more)

Subjects/Keywords: Architecture; Decoding; LDPC; VLSI; Electrical Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kim, S. (2010). Reduced-complexity VLSI architectures for binary and nonbinary LDPC Codes. (Doctoral Dissertation). University of Minnesota. Retrieved from http://purl.umn.edu/96825

Chicago Manual of Style (16th Edition):

Kim, Sangmin. “Reduced-complexity VLSI architectures for binary and nonbinary LDPC Codes.” 2010. Doctoral Dissertation, University of Minnesota. Accessed June 19, 2019. http://purl.umn.edu/96825.

MLA Handbook (7th Edition):

Kim, Sangmin. “Reduced-complexity VLSI architectures for binary and nonbinary LDPC Codes.” 2010. Web. 19 Jun 2019.

Vancouver:

Kim S. Reduced-complexity VLSI architectures for binary and nonbinary LDPC Codes. [Internet] [Doctoral dissertation]. University of Minnesota; 2010. [cited 2019 Jun 19]. Available from: http://purl.umn.edu/96825.

Council of Science Editors:

Kim S. Reduced-complexity VLSI architectures for binary and nonbinary LDPC Codes. [Doctoral Dissertation]. University of Minnesota; 2010. Available from: http://purl.umn.edu/96825


University of Newcastle

20. Brown, Raymond. Design of low-density parity-check Codes for multiple-input multiple-output wireless systems.

Degree: LDPC, 2009, University of Newcastle

Masters Research - Masters of Engineering

Mobile telephony, wireless networks and wireless telemetry systems have gone from simple single-input single-output wireless architectures with low data… (more)

Subjects/Keywords: MIMO; STBC; LDPC; EXIT Charts; FEC

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Brown, R. (2009). Design of low-density parity-check Codes for multiple-input multiple-output wireless systems. (Masters Thesis). University of Newcastle. Retrieved from http://hdl.handle.net/1959.13/41187

Chicago Manual of Style (16th Edition):

Brown, Raymond. “Design of low-density parity-check Codes for multiple-input multiple-output wireless systems.” 2009. Masters Thesis, University of Newcastle. Accessed June 19, 2019. http://hdl.handle.net/1959.13/41187.

MLA Handbook (7th Edition):

Brown, Raymond. “Design of low-density parity-check Codes for multiple-input multiple-output wireless systems.” 2009. Web. 19 Jun 2019.

Vancouver:

Brown R. Design of low-density parity-check Codes for multiple-input multiple-output wireless systems. [Internet] [Masters thesis]. University of Newcastle; 2009. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/1959.13/41187.

Council of Science Editors:

Brown R. Design of low-density parity-check Codes for multiple-input multiple-output wireless systems. [Masters Thesis]. University of Newcastle; 2009. Available from: http://hdl.handle.net/1959.13/41187


Universitat Politècnica de València

21. Angarita Preciado, Fabián Enrique. Diseño de decodificadores de altas prestaciones para código LDPC .

Degree: 2013, Universitat Politècnica de València

 En esta tesis se han investigado los algoritmos de decodificación para códigos de comprobación de paridad de baja densidad (LDPC) y las arquitecturas para la… (more)

Subjects/Keywords: Corrección de errores; Decodificación; Códigos LDPC; VLSI

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APA (6th Edition):

Angarita Preciado, F. E. (2013). Diseño de decodificadores de altas prestaciones para código LDPC . (Doctoral Dissertation). Universitat Politècnica de València. Retrieved from http://hdl.handle.net/10251/31646

Chicago Manual of Style (16th Edition):

Angarita Preciado, Fabián Enrique. “Diseño de decodificadores de altas prestaciones para código LDPC .” 2013. Doctoral Dissertation, Universitat Politècnica de València. Accessed June 19, 2019. http://hdl.handle.net/10251/31646.

MLA Handbook (7th Edition):

Angarita Preciado, Fabián Enrique. “Diseño de decodificadores de altas prestaciones para código LDPC .” 2013. Web. 19 Jun 2019.

Vancouver:

Angarita Preciado FE. Diseño de decodificadores de altas prestaciones para código LDPC . [Internet] [Doctoral dissertation]. Universitat Politècnica de València; 2013. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/10251/31646.

Council of Science Editors:

Angarita Preciado FE. Diseño de decodificadores de altas prestaciones para código LDPC . [Doctoral Dissertation]. Universitat Politècnica de València; 2013. Available from: http://hdl.handle.net/10251/31646

22. Růžička Lukáš. Návrhový systém pro implementaci a analýzu vlastností LDPC kódu .

Degree: 2014, Czech University of Technology

 Low-denstiy parity-check (LDPC, Řídké paritu kontrolující) kódy jsou v těchto dnech celkem populární. Mají dobrý výkon, který je blízko Shannovýmu limitu a mohou být s… (more)

Subjects/Keywords: LDPC; řídké matice; pseudo náhodné matice; AWGN kanál; RA LDPC; SPA dekódování; BER; EXIT graf

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APA (6th Edition):

Lukáš, R. (2014). Návrhový systém pro implementaci a analýzu vlastností LDPC kódu . (Thesis). Czech University of Technology. Retrieved from http://hdl.handle.net/10467/24271

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lukáš, Růžička. “Návrhový systém pro implementaci a analýzu vlastností LDPC kódu .” 2014. Thesis, Czech University of Technology. Accessed June 19, 2019. http://hdl.handle.net/10467/24271.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lukáš, Růžička. “Návrhový systém pro implementaci a analýzu vlastností LDPC kódu .” 2014. Web. 19 Jun 2019.

Vancouver:

Lukáš R. Návrhový systém pro implementaci a analýzu vlastností LDPC kódu . [Internet] [Thesis]. Czech University of Technology; 2014. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/10467/24271.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lukáš R. Návrhový systém pro implementaci a analýzu vlastností LDPC kódu . [Thesis]. Czech University of Technology; 2014. Available from: http://hdl.handle.net/10467/24271

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

23. Le Trung, Khoa. Nouvelle approche pour une implémentation matérielle à faible complexité du décodeur PGDBF : New direction on Low complexity implementation of Probabilisitic Gradient Descent Bit Flipping.

Degree: Docteur es, STIC - Cergy, 2017, Cergy-Pontoise

 L’algorithme de basculement de bits à descente de gradient probabiliste (Probabilistic Gradient Descent Bit Flipping :PGDBF) est récemment introduit comme un nouveau type de décodeur… (more)

Subjects/Keywords: LDPC codec; Tolérants aux erreurs; Arithmétique imprécis; LDPC codec; Fault tolerant; Imprecise arithmetic

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APA (6th Edition):

Le Trung, K. (2017). Nouvelle approche pour une implémentation matérielle à faible complexité du décodeur PGDBF : New direction on Low complexity implementation of Probabilisitic Gradient Descent Bit Flipping. (Doctoral Dissertation). Cergy-Pontoise. Retrieved from http://www.theses.fr/2017CERG0902

Chicago Manual of Style (16th Edition):

Le Trung, Khoa. “Nouvelle approche pour une implémentation matérielle à faible complexité du décodeur PGDBF : New direction on Low complexity implementation of Probabilisitic Gradient Descent Bit Flipping.” 2017. Doctoral Dissertation, Cergy-Pontoise. Accessed June 19, 2019. http://www.theses.fr/2017CERG0902.

MLA Handbook (7th Edition):

Le Trung, Khoa. “Nouvelle approche pour une implémentation matérielle à faible complexité du décodeur PGDBF : New direction on Low complexity implementation of Probabilisitic Gradient Descent Bit Flipping.” 2017. Web. 19 Jun 2019.

Vancouver:

Le Trung K. Nouvelle approche pour une implémentation matérielle à faible complexité du décodeur PGDBF : New direction on Low complexity implementation of Probabilisitic Gradient Descent Bit Flipping. [Internet] [Doctoral dissertation]. Cergy-Pontoise; 2017. [cited 2019 Jun 19]. Available from: http://www.theses.fr/2017CERG0902.

Council of Science Editors:

Le Trung K. Nouvelle approche pour une implémentation matérielle à faible complexité du décodeur PGDBF : New direction on Low complexity implementation of Probabilisitic Gradient Descent Bit Flipping. [Doctoral Dissertation]. Cergy-Pontoise; 2017. Available from: http://www.theses.fr/2017CERG0902

24. Γκίκα, Ζαχαρούλα. Διόρθωση λαθών με τη χρήση κωδίκων RS-LDPC.

Degree: 2012, University of Patras

 Σήμερα, σε όλα σχεδόν τα τηλεπικοινωνιακά συστήματα τα οποία προορίζονται για αποστολή δεδομένων σε υψηλούς ρυθμούς, έχουν υιοθετηθεί κώδικες διόρθωσης λαθών για την αύξηση της… (more)

Subjects/Keywords: Κώδικες RS-LDPC; Διόρθωση λαθών; 621.382 1; RS-LDPC codes; Error correction

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APA (6th Edition):

Γκίκα, . (2012). Διόρθωση λαθών με τη χρήση κωδίκων RS-LDPC. (Masters Thesis). University of Patras. Retrieved from http://hdl.handle.net/10889/6037

Chicago Manual of Style (16th Edition):

Γκίκα, Ζαχαρούλα. “Διόρθωση λαθών με τη χρήση κωδίκων RS-LDPC.” 2012. Masters Thesis, University of Patras. Accessed June 19, 2019. http://hdl.handle.net/10889/6037.

MLA Handbook (7th Edition):

Γκίκα, Ζαχαρούλα. “Διόρθωση λαθών με τη χρήση κωδίκων RS-LDPC.” 2012. Web. 19 Jun 2019.

Vancouver:

Γκίκα . Διόρθωση λαθών με τη χρήση κωδίκων RS-LDPC. [Internet] [Masters thesis]. University of Patras; 2012. [cited 2019 Jun 19]. Available from: http://hdl.handle.net/10889/6037.

Council of Science Editors:

Γκίκα . Διόρθωση λαθών με τη χρήση κωδίκων RS-LDPC. [Masters Thesis]. University of Patras; 2012. Available from: http://hdl.handle.net/10889/6037

25. Planjery, Shiva Kumar. Iterative decoding beyond belief propagation for low-density parity-check codes : Décodage itératif pour les codes LDPC au-delà de la propagation de croyances.

Degree: Docteur es, STIC (sciences et technologies de l'information et de la communication) - Cergy, 2012, Cergy-Pontoise; University of Arizona

 Les codes Low-Density Parity-Check (LDPC) sont au coeur de larecherche des codes correcteurs d'erreurs en raison de leur excellenteperformance de décodage en utilisant un algorithme… (more)

Subjects/Keywords: Ldpc; Propagation de croyances; Trapping sets; Décodage itératif; Ldpc; Belief propagation; Trapping sets

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APA (6th Edition):

Planjery, S. K. (2012). Iterative decoding beyond belief propagation for low-density parity-check codes : Décodage itératif pour les codes LDPC au-delà de la propagation de croyances. (Doctoral Dissertation). Cergy-Pontoise; University of Arizona. Retrieved from http://www.theses.fr/2012CERG0618

Chicago Manual of Style (16th Edition):

Planjery, Shiva Kumar. “Iterative decoding beyond belief propagation for low-density parity-check codes : Décodage itératif pour les codes LDPC au-delà de la propagation de croyances.” 2012. Doctoral Dissertation, Cergy-Pontoise; University of Arizona. Accessed June 19, 2019. http://www.theses.fr/2012CERG0618.

MLA Handbook (7th Edition):

Planjery, Shiva Kumar. “Iterative decoding beyond belief propagation for low-density parity-check codes : Décodage itératif pour les codes LDPC au-delà de la propagation de croyances.” 2012. Web. 19 Jun 2019.

Vancouver:

Planjery SK. Iterative decoding beyond belief propagation for low-density parity-check codes : Décodage itératif pour les codes LDPC au-delà de la propagation de croyances. [Internet] [Doctoral dissertation]. Cergy-Pontoise; University of Arizona; 2012. [cited 2019 Jun 19]. Available from: http://www.theses.fr/2012CERG0618.

Council of Science Editors:

Planjery SK. Iterative decoding beyond belief propagation for low-density parity-check codes : Décodage itératif pour les codes LDPC au-delà de la propagation de croyances. [Doctoral Dissertation]. Cergy-Pontoise; University of Arizona; 2012. Available from: http://www.theses.fr/2012CERG0618

26. Ben Maad, Hassen. Optimisation des stratégies de décodage des codes LDPC dans les environnements impulsifs : application aux réseaux de capteurs et ad hoc : LDPC strategy decoding optimization in impulsive environments : sensors and ad hoc networks application.

Degree: Docteur es, Génie informatique, automatique et traitement du signal, 2011, Reims

L’objectif de cette thèse est d’étudier le comportement des codes LDPC dans un environnement où l’interférence générée par un réseau n’est pas de nature gaussienne… (more)

Subjects/Keywords: Distributions alpha-stables; Codes LDPC; Bruit impulsif; Alpha-stable distributions; LDPC codes; Impulsive noise

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APA (6th Edition):

Ben Maad, H. (2011). Optimisation des stratégies de décodage des codes LDPC dans les environnements impulsifs : application aux réseaux de capteurs et ad hoc : LDPC strategy decoding optimization in impulsive environments : sensors and ad hoc networks application. (Doctoral Dissertation). Reims. Retrieved from http://www.theses.fr/2011REIMS023

Chicago Manual of Style (16th Edition):

Ben Maad, Hassen. “Optimisation des stratégies de décodage des codes LDPC dans les environnements impulsifs : application aux réseaux de capteurs et ad hoc : LDPC strategy decoding optimization in impulsive environments : sensors and ad hoc networks application.” 2011. Doctoral Dissertation, Reims. Accessed June 19, 2019. http://www.theses.fr/2011REIMS023.

MLA Handbook (7th Edition):

Ben Maad, Hassen. “Optimisation des stratégies de décodage des codes LDPC dans les environnements impulsifs : application aux réseaux de capteurs et ad hoc : LDPC strategy decoding optimization in impulsive environments : sensors and ad hoc networks application.” 2011. Web. 19 Jun 2019.

Vancouver:

Ben Maad H. Optimisation des stratégies de décodage des codes LDPC dans les environnements impulsifs : application aux réseaux de capteurs et ad hoc : LDPC strategy decoding optimization in impulsive environments : sensors and ad hoc networks application. [Internet] [Doctoral dissertation]. Reims; 2011. [cited 2019 Jun 19]. Available from: http://www.theses.fr/2011REIMS023.

Council of Science Editors:

Ben Maad H. Optimisation des stratégies de décodage des codes LDPC dans les environnements impulsifs : application aux réseaux de capteurs et ad hoc : LDPC strategy decoding optimization in impulsive environments : sensors and ad hoc networks application. [Doctoral Dissertation]. Reims; 2011. Available from: http://www.theses.fr/2011REIMS023


Utah State University

27. Tithi, Tasnuva Tarannum. Error-Floors of the 802.3an LDPC Code for Noise Assisted Decoding.

Degree: PhD, Electrical and Computer Engineering, 2019, Utah State University

  In digital communication, information is sent as bits, which is corrupted by the noise present in wired/wireless medium known as the channel. The Low… (more)

Subjects/Keywords: LDPC code; Error Correction Code; Stochastic Decoding; LDPC Error Floors; Electrical and Computer Engineering

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APA (6th Edition):

Tithi, T. T. (2019). Error-Floors of the 802.3an LDPC Code for Noise Assisted Decoding. (Doctoral Dissertation). Utah State University. Retrieved from https://digitalcommons.usu.edu/etd/7465

Chicago Manual of Style (16th Edition):

Tithi, Tasnuva Tarannum. “Error-Floors of the 802.3an LDPC Code for Noise Assisted Decoding.” 2019. Doctoral Dissertation, Utah State University. Accessed June 19, 2019. https://digitalcommons.usu.edu/etd/7465.

MLA Handbook (7th Edition):

Tithi, Tasnuva Tarannum. “Error-Floors of the 802.3an LDPC Code for Noise Assisted Decoding.” 2019. Web. 19 Jun 2019.

Vancouver:

Tithi TT. Error-Floors of the 802.3an LDPC Code for Noise Assisted Decoding. [Internet] [Doctoral dissertation]. Utah State University; 2019. [cited 2019 Jun 19]. Available from: https://digitalcommons.usu.edu/etd/7465.

Council of Science Editors:

Tithi TT. Error-Floors of the 802.3an LDPC Code for Noise Assisted Decoding. [Doctoral Dissertation]. Utah State University; 2019. Available from: https://digitalcommons.usu.edu/etd/7465

28. Shams, Bilal. Les Codes LDPC non-binaires de nouvelle génération : Development of new generation non-binary LDPC error correcting codes.

Degree: Docteur es, STIC (sciences et technologies de l'information et de la communication), 2010, Cergy-Pontoise

Dans cette thèse, nous présentons nos travaux dans le domaine de l'algorithme de décodage non-binaire pour les classes générales de codes LDPC non-binaires. Les Low-Density… (more)

Subjects/Keywords: Codes LDPC non-binaires; Corps fini de Galois; Codes LDPC defini sur les groups fini; Cluster LDPC codes; Les algorithmes de decodage; Codes de correction des erreurs; Non-binary LDPC codes; Finite Galois gields; LDPC defined over finite groups; Cluster LDPC codes; Decoding algorithms; Error correcting codes

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Shams, B. (2010). Les Codes LDPC non-binaires de nouvelle génération : Development of new generation non-binary LDPC error correcting codes. (Doctoral Dissertation). Cergy-Pontoise. Retrieved from http://www.theses.fr/2010CERG0525

Chicago Manual of Style (16th Edition):

Shams, Bilal. “Les Codes LDPC non-binaires de nouvelle génération : Development of new generation non-binary LDPC error correcting codes.” 2010. Doctoral Dissertation, Cergy-Pontoise. Accessed June 19, 2019. http://www.theses.fr/2010CERG0525.

MLA Handbook (7th Edition):

Shams, Bilal. “Les Codes LDPC non-binaires de nouvelle génération : Development of new generation non-binary LDPC error correcting codes.” 2010. Web. 19 Jun 2019.

Vancouver:

Shams B. Les Codes LDPC non-binaires de nouvelle génération : Development of new generation non-binary LDPC error correcting codes. [Internet] [Doctoral dissertation]. Cergy-Pontoise; 2010. [cited 2019 Jun 19]. Available from: http://www.theses.fr/2010CERG0525.

Council of Science Editors:

Shams B. Les Codes LDPC non-binaires de nouvelle génération : Development of new generation non-binary LDPC error correcting codes. [Doctoral Dissertation]. Cergy-Pontoise; 2010. Available from: http://www.theses.fr/2010CERG0525

29. Li, Ao. Performances des codes correcteurs d’erreur LDPC appliqués au lien Fronthaul optique haut-débit pour l’architecture C-RAN du réseau 5G : conception et implantation sur FPGA : Modeling and simulation of high speed optical transmission and forward error correction design and implementation using FPGA.

Degree: Docteur es, Electronique des Hautes Fréquences, Photonique et Systèmes, 2017, Limoges

De nos jours, l’architecture du réseau mobile est en pleine évolution pour assurer la montée en débit entre les Centraux (CO) (réseaux coeurs) et différents… (more)

Subjects/Keywords: Codes correcteurs d’erreur,; C-RAN; LDPC; Fronthaul optique; Forward error code; C-RAN; LDPC; Optical Fronthaul; 621.382 2

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, A. (2017). Performances des codes correcteurs d’erreur LDPC appliqués au lien Fronthaul optique haut-débit pour l’architecture C-RAN du réseau 5G : conception et implantation sur FPGA : Modeling and simulation of high speed optical transmission and forward error correction design and implementation using FPGA. (Doctoral Dissertation). Limoges. Retrieved from http://www.theses.fr/2017LIMO0110

Chicago Manual of Style (16th Edition):

Li, Ao. “Performances des codes correcteurs d’erreur LDPC appliqués au lien Fronthaul optique haut-débit pour l’architecture C-RAN du réseau 5G : conception et implantation sur FPGA : Modeling and simulation of high speed optical transmission and forward error correction design and implementation using FPGA.” 2017. Doctoral Dissertation, Limoges. Accessed June 19, 2019. http://www.theses.fr/2017LIMO0110.

MLA Handbook (7th Edition):

Li, Ao. “Performances des codes correcteurs d’erreur LDPC appliqués au lien Fronthaul optique haut-débit pour l’architecture C-RAN du réseau 5G : conception et implantation sur FPGA : Modeling and simulation of high speed optical transmission and forward error correction design and implementation using FPGA.” 2017. Web. 19 Jun 2019.

Vancouver:

Li A. Performances des codes correcteurs d’erreur LDPC appliqués au lien Fronthaul optique haut-débit pour l’architecture C-RAN du réseau 5G : conception et implantation sur FPGA : Modeling and simulation of high speed optical transmission and forward error correction design and implementation using FPGA. [Internet] [Doctoral dissertation]. Limoges; 2017. [cited 2019 Jun 19]. Available from: http://www.theses.fr/2017LIMO0110.

Council of Science Editors:

Li A. Performances des codes correcteurs d’erreur LDPC appliqués au lien Fronthaul optique haut-débit pour l’architecture C-RAN du réseau 5G : conception et implantation sur FPGA : Modeling and simulation of high speed optical transmission and forward error correction design and implementation using FPGA. [Doctoral Dissertation]. Limoges; 2017. Available from: http://www.theses.fr/2017LIMO0110

30. Nguyen Ly, Thien Truong. Mise en oeuvre matérielle de décodeurs LDPC haut débit, en exploitant la robustesse du décodage par passage de messages aux imprécisions de calcul : Efficient Hardware Implementations of LDPC Decoders, through Exploiting Impreciseness in Message-Passing Decoding Algorithms.

Degree: Docteur es, Génie électrique et électronique - Cergy, 2017, Cergy-Pontoise

 Les codes correcteurs d'erreurs sont une composante essentielle de tout système de communication, capables d’assurer le transport fiable de l’information sur un canal de communication… (more)

Subjects/Keywords: Ldpc; Imprécisions; D'optimisation de coût; Haut débit; NS-FAIDs; Ldpc; Impreciseness; Cost-Effective; High-Throughput; NS-FAIDs

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Nguyen Ly, T. T. (2017). Mise en oeuvre matérielle de décodeurs LDPC haut débit, en exploitant la robustesse du décodage par passage de messages aux imprécisions de calcul : Efficient Hardware Implementations of LDPC Decoders, through Exploiting Impreciseness in Message-Passing Decoding Algorithms. (Doctoral Dissertation). Cergy-Pontoise. Retrieved from http://www.theses.fr/2017CERG0904

Chicago Manual of Style (16th Edition):

Nguyen Ly, Thien Truong. “Mise en oeuvre matérielle de décodeurs LDPC haut débit, en exploitant la robustesse du décodage par passage de messages aux imprécisions de calcul : Efficient Hardware Implementations of LDPC Decoders, through Exploiting Impreciseness in Message-Passing Decoding Algorithms.” 2017. Doctoral Dissertation, Cergy-Pontoise. Accessed June 19, 2019. http://www.theses.fr/2017CERG0904.

MLA Handbook (7th Edition):

Nguyen Ly, Thien Truong. “Mise en oeuvre matérielle de décodeurs LDPC haut débit, en exploitant la robustesse du décodage par passage de messages aux imprécisions de calcul : Efficient Hardware Implementations of LDPC Decoders, through Exploiting Impreciseness in Message-Passing Decoding Algorithms.” 2017. Web. 19 Jun 2019.

Vancouver:

Nguyen Ly TT. Mise en oeuvre matérielle de décodeurs LDPC haut débit, en exploitant la robustesse du décodage par passage de messages aux imprécisions de calcul : Efficient Hardware Implementations of LDPC Decoders, through Exploiting Impreciseness in Message-Passing Decoding Algorithms. [Internet] [Doctoral dissertation]. Cergy-Pontoise; 2017. [cited 2019 Jun 19]. Available from: http://www.theses.fr/2017CERG0904.

Council of Science Editors:

Nguyen Ly TT. Mise en oeuvre matérielle de décodeurs LDPC haut débit, en exploitant la robustesse du décodage par passage de messages aux imprécisions de calcul : Efficient Hardware Implementations of LDPC Decoders, through Exploiting Impreciseness in Message-Passing Decoding Algorithms. [Doctoral Dissertation]. Cergy-Pontoise; 2017. Available from: http://www.theses.fr/2017CERG0904

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