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You searched for subject:(Intel). Showing records 1 – 30 of 173 total matches.

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1. Bazm, Mohammad Mahdi. Unified isolation architecture and mechanisms against side channel attacks for decentralized cloud infrastructures : Architecture d’isolation unifiée et mécanismes de lutte contre les canaux auxiliaires pour infrastructures cloud décentralisées.

Degree: Docteur es, Sécurité informatique, 2019, Nantes

Depuis les travaux de Ristenpart [Ristenpart et al., 2009], les attaques par canaux auxiliaires se sont imposées comme un enjeu sécurité important pour les environnements… (more)

Subjects/Keywords: HPCs; Technologie Intel CMT; 005.8

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APA (6th Edition):

Bazm, M. M. (2019). Unified isolation architecture and mechanisms against side channel attacks for decentralized cloud infrastructures : Architecture d’isolation unifiée et mécanismes de lutte contre les canaux auxiliaires pour infrastructures cloud décentralisées. (Doctoral Dissertation). Nantes. Retrieved from http://www.theses.fr/2019NANT4042

Chicago Manual of Style (16th Edition):

Bazm, Mohammad Mahdi. “Unified isolation architecture and mechanisms against side channel attacks for decentralized cloud infrastructures : Architecture d’isolation unifiée et mécanismes de lutte contre les canaux auxiliaires pour infrastructures cloud décentralisées.” 2019. Doctoral Dissertation, Nantes. Accessed January 20, 2021. http://www.theses.fr/2019NANT4042.

MLA Handbook (7th Edition):

Bazm, Mohammad Mahdi. “Unified isolation architecture and mechanisms against side channel attacks for decentralized cloud infrastructures : Architecture d’isolation unifiée et mécanismes de lutte contre les canaux auxiliaires pour infrastructures cloud décentralisées.” 2019. Web. 20 Jan 2021.

Vancouver:

Bazm MM. Unified isolation architecture and mechanisms against side channel attacks for decentralized cloud infrastructures : Architecture d’isolation unifiée et mécanismes de lutte contre les canaux auxiliaires pour infrastructures cloud décentralisées. [Internet] [Doctoral dissertation]. Nantes; 2019. [cited 2021 Jan 20]. Available from: http://www.theses.fr/2019NANT4042.

Council of Science Editors:

Bazm MM. Unified isolation architecture and mechanisms against side channel attacks for decentralized cloud infrastructures : Architecture d’isolation unifiée et mécanismes de lutte contre les canaux auxiliaires pour infrastructures cloud décentralisées. [Doctoral Dissertation]. Nantes; 2019. Available from: http://www.theses.fr/2019NANT4042


University of Debrecen

2. Labancz, Anita. Hardveres algoritmus gyorsítás .

Degree: DE – TEK – Informatikai Kar, 2014, University of Debrecen

 „A 21. század a tudás, a technológia, és a folyamatos fejlődés időszaka. A műszaki paraméterek, és az alkalmazások szinte napról-napra megújulnak.” Ez lehetővé teszi, hogy… (more)

Subjects/Keywords: megszakítási rendszer; Intel 8051

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APA (6th Edition):

Labancz, A. (2014). Hardveres algoritmus gyorsítás . (Thesis). University of Debrecen. Retrieved from http://hdl.handle.net/2437/177933

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Labancz, Anita. “Hardveres algoritmus gyorsítás .” 2014. Thesis, University of Debrecen. Accessed January 20, 2021. http://hdl.handle.net/2437/177933.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Labancz, Anita. “Hardveres algoritmus gyorsítás .” 2014. Web. 20 Jan 2021.

Vancouver:

Labancz A. Hardveres algoritmus gyorsítás . [Internet] [Thesis]. University of Debrecen; 2014. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/2437/177933.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Labancz A. Hardveres algoritmus gyorsítás . [Thesis]. University of Debrecen; 2014. Available from: http://hdl.handle.net/2437/177933

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

3. Shih, Mingwei. Securing Intel SGX against side-channel attacks via load-time synthesis.

Degree: PhD, Computer Science, 2019, Georgia Tech

 In response to the growing need for securing user data in the cloud, recent Intel processors have supported a new feature, Intel Software Guard Extensions… (more)

Subjects/Keywords: Intel SGX; Side-channel attacks

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APA (6th Edition):

Shih, M. (2019). Securing Intel SGX against side-channel attacks via load-time synthesis. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/62337

Chicago Manual of Style (16th Edition):

Shih, Mingwei. “Securing Intel SGX against side-channel attacks via load-time synthesis.” 2019. Doctoral Dissertation, Georgia Tech. Accessed January 20, 2021. http://hdl.handle.net/1853/62337.

MLA Handbook (7th Edition):

Shih, Mingwei. “Securing Intel SGX against side-channel attacks via load-time synthesis.” 2019. Web. 20 Jan 2021.

Vancouver:

Shih M. Securing Intel SGX against side-channel attacks via load-time synthesis. [Internet] [Doctoral dissertation]. Georgia Tech; 2019. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/1853/62337.

Council of Science Editors:

Shih M. Securing Intel SGX against side-channel attacks via load-time synthesis. [Doctoral Dissertation]. Georgia Tech; 2019. Available from: http://hdl.handle.net/1853/62337


Virginia Tech

4. Pugaonkar, Aniket Narayan. A High Performance C++ Generic Benchmark for Computational Epidemiology.

Degree: MS, Computer Science and Applications, 2015, Virginia Tech

 An effective tool used by planners and policy makers in public health, such as Center for Disease Control (CDC), to curtail spread of infectious diseases… (more)

Subjects/Keywords: Benchmark; Epidemiology; EpiSimdemics; EpiFast; C++11; BOOST C++ libraries; Intel TBB; Intel Cilk Plus; Intel MIC

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APA (6th Edition):

Pugaonkar, A. N. (2015). A High Performance C++ Generic Benchmark for Computational Epidemiology. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/51243

Chicago Manual of Style (16th Edition):

Pugaonkar, Aniket Narayan. “A High Performance C++ Generic Benchmark for Computational Epidemiology.” 2015. Masters Thesis, Virginia Tech. Accessed January 20, 2021. http://hdl.handle.net/10919/51243.

MLA Handbook (7th Edition):

Pugaonkar, Aniket Narayan. “A High Performance C++ Generic Benchmark for Computational Epidemiology.” 2015. Web. 20 Jan 2021.

Vancouver:

Pugaonkar AN. A High Performance C++ Generic Benchmark for Computational Epidemiology. [Internet] [Masters thesis]. Virginia Tech; 2015. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/10919/51243.

Council of Science Editors:

Pugaonkar AN. A High Performance C++ Generic Benchmark for Computational Epidemiology. [Masters Thesis]. Virginia Tech; 2015. Available from: http://hdl.handle.net/10919/51243


NSYSU

5. Cheng, Sheng-tzu. The Effect of B2B Social Media Management Strategy on Advertising & Communicating Effect and Fan Page Preferenceâ A Case Study Of Intel Taiwan Fan Page.

Degree: Master, Business Management, 2013, NSYSU

Intel, a non-consumer goods manufacturer, actually operates facebook and work hard to communicate with the general consumers recently. As a non-consumer goods manufacturer, what kinds… (more)

Subjects/Keywords: brands; Facebook; advertising effectiveness; fan page; Intel

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APA (6th Edition):

Cheng, S. (2013). The Effect of B2B Social Media Management Strategy on Advertising & Communicating Effect and Fan Page Preferenceâ A Case Study Of Intel Taiwan Fan Page. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0515113-143743

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Cheng, Sheng-tzu. “The Effect of B2B Social Media Management Strategy on Advertising & Communicating Effect and Fan Page Preferenceâ A Case Study Of Intel Taiwan Fan Page.” 2013. Thesis, NSYSU. Accessed January 20, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0515113-143743.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Cheng, Sheng-tzu. “The Effect of B2B Social Media Management Strategy on Advertising & Communicating Effect and Fan Page Preferenceâ A Case Study Of Intel Taiwan Fan Page.” 2013. Web. 20 Jan 2021.

Vancouver:

Cheng S. The Effect of B2B Social Media Management Strategy on Advertising & Communicating Effect and Fan Page Preferenceâ A Case Study Of Intel Taiwan Fan Page. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Jan 20]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0515113-143743.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Cheng S. The Effect of B2B Social Media Management Strategy on Advertising & Communicating Effect and Fan Page Preferenceâ A Case Study Of Intel Taiwan Fan Page. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0515113-143743

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Washington University in St. Louis

6. Qiu, Wenjie. A Performance Analysis of Hardware-assisted Security Technologies.

Degree: MS, Computer Science & Engineering, 2020, Washington University in St. Louis

Intel Software Guard Extensions (SGX) is a novel hardware-assisted security technology introduced by Intel Corporation. The ambition of Intel SGX is to provide an isolated… (more)

Subjects/Keywords: Computer Security; System Security; Intel SGX; Engineering

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APA (6th Edition):

Qiu, W. (2020). A Performance Analysis of Hardware-assisted Security Technologies. (Thesis). Washington University in St. Louis. Retrieved from https://openscholarship.wustl.edu/eng_etds/507

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Qiu, Wenjie. “A Performance Analysis of Hardware-assisted Security Technologies.” 2020. Thesis, Washington University in St. Louis. Accessed January 20, 2021. https://openscholarship.wustl.edu/eng_etds/507.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Qiu, Wenjie. “A Performance Analysis of Hardware-assisted Security Technologies.” 2020. Web. 20 Jan 2021.

Vancouver:

Qiu W. A Performance Analysis of Hardware-assisted Security Technologies. [Internet] [Thesis]. Washington University in St. Louis; 2020. [cited 2021 Jan 20]. Available from: https://openscholarship.wustl.edu/eng_etds/507.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Qiu W. A Performance Analysis of Hardware-assisted Security Technologies. [Thesis]. Washington University in St. Louis; 2020. Available from: https://openscholarship.wustl.edu/eng_etds/507

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Uppsala University

7. Ekbom, Daniel; Enkvist, Daniel. Tester av Raspberry Pi 3 och Intel Galileo Gen 2 : En övergång från Arduino.

Degree: Information Technology, 2016, Uppsala University

Dagens enkortsdatorer skiljer sig mycket i hårdvara. Prestandamässigt skiljer sig dessutom datorerna åt beroende på vilket operativsystem som används samt vilket programmeringsspråk och bibliotek… (more)

Subjects/Keywords: iot; prestanda; raspberry pi; intel galileo; arduino

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APA (6th Edition):

Ekbom, Daniel; Enkvist, D. (2016). Tester av Raspberry Pi 3 och Intel Galileo Gen 2 : En övergång från Arduino. (Thesis). Uppsala University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-302634

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ekbom, Daniel; Enkvist, Daniel. “Tester av Raspberry Pi 3 och Intel Galileo Gen 2 : En övergång från Arduino.” 2016. Thesis, Uppsala University. Accessed January 20, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-302634.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ekbom, Daniel; Enkvist, Daniel. “Tester av Raspberry Pi 3 och Intel Galileo Gen 2 : En övergång från Arduino.” 2016. Web. 20 Jan 2021.

Vancouver:

Ekbom, Daniel; Enkvist D. Tester av Raspberry Pi 3 och Intel Galileo Gen 2 : En övergång från Arduino. [Internet] [Thesis]. Uppsala University; 2016. [cited 2021 Jan 20]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-302634.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ekbom, Daniel; Enkvist D. Tester av Raspberry Pi 3 och Intel Galileo Gen 2 : En övergång från Arduino. [Thesis]. Uppsala University; 2016. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-302634

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


California State University – Sacramento

8. Raval, Pinak. Platform readiness test plan.

Degree: MS, Electrical and Electronic Engineering, 2010, California State University – Sacramento

 This report will present steps taken in order to develop a ???Platform Readiness Test Plan???. The platform readiness test plan will provide assistance to the… (more)

Subjects/Keywords: Validation; Intel; Architecture

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APA (6th Edition):

Raval, P. (2010). Platform readiness test plan. (Masters Thesis). California State University – Sacramento. Retrieved from http://hdl.handle.net/10211.9/256

Chicago Manual of Style (16th Edition):

Raval, Pinak. “Platform readiness test plan.” 2010. Masters Thesis, California State University – Sacramento. Accessed January 20, 2021. http://hdl.handle.net/10211.9/256.

MLA Handbook (7th Edition):

Raval, Pinak. “Platform readiness test plan.” 2010. Web. 20 Jan 2021.

Vancouver:

Raval P. Platform readiness test plan. [Internet] [Masters thesis]. California State University – Sacramento; 2010. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/10211.9/256.

Council of Science Editors:

Raval P. Platform readiness test plan. [Masters Thesis]. California State University – Sacramento; 2010. Available from: http://hdl.handle.net/10211.9/256


Brno University of Technology

9. Machač, Jiří. Intel Integrated Performance Primitives a jejich využití při vývoji aplikací: Intel Integrated Performance Primitives and their use in application development.

Degree: 2018, Brno University of Technology

 The aim of the presented work is to demonstrate and evaluate the contribution of computing system SIMD especially units MMX, SSE, SSE2, SSE3, SSSE3 and… (more)

Subjects/Keywords: SIMD; MMX; SSE; Intel; vektorizace; IPP; INTEL INTEGRATED PERFORMANCE PRIMITIVES; Intel Compiler; TCS; Time Stamp Counter; aplikace; Intrinsic; Optimalizace aplikací; SIMD; MMX; SSE; Intel; Vectorization; IPP; INTEL INTEGRATED PERFORMANCE PRIMITIVES; Intel Compiler; TCS; Time Stamp Counter; application; Intrinsics; Optimizing Applications

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APA (6th Edition):

Machač, J. (2018). Intel Integrated Performance Primitives a jejich využití při vývoji aplikací: Intel Integrated Performance Primitives and their use in application development. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/16861

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Machač, Jiří. “Intel Integrated Performance Primitives a jejich využití při vývoji aplikací: Intel Integrated Performance Primitives and their use in application development.” 2018. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/16861.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Machač, Jiří. “Intel Integrated Performance Primitives a jejich využití při vývoji aplikací: Intel Integrated Performance Primitives and their use in application development.” 2018. Web. 20 Jan 2021.

Vancouver:

Machač J. Intel Integrated Performance Primitives a jejich využití při vývoji aplikací: Intel Integrated Performance Primitives and their use in application development. [Internet] [Thesis]. Brno University of Technology; 2018. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/16861.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Machač J. Intel Integrated Performance Primitives a jejich využití při vývoji aplikací: Intel Integrated Performance Primitives and their use in application development. [Thesis]. Brno University of Technology; 2018. Available from: http://hdl.handle.net/11012/16861

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

10. Panák, Petr. Vysokoúrovňová syntéza číslicových obvodů v oblasti síťových aplikací popsaných v jazyce P4: High level synthesis in network applications described using P4 language.

Degree: 2020, Brno University of Technology

 High-level synthesis is a compelling method of designing a digital circuit. High abstraction and faster verification are advantages which aren't pressent in Register Transfer Level… (more)

Subjects/Keywords: Vysokoúrovňová syntéza; FPGA; P4; Akce; Externí bloky; MI32; Intel HLS; High-level Synthesis; FPGA; P4; Actions; Extern blocks; MI32; Intel HLS

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APA (6th Edition):

Panák, P. (2020). Vysokoúrovňová syntéza číslicových obvodů v oblasti síťových aplikací popsaných v jazyce P4: High level synthesis in network applications described using P4 language. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/190506

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Panák, Petr. “Vysokoúrovňová syntéza číslicových obvodů v oblasti síťových aplikací popsaných v jazyce P4: High level synthesis in network applications described using P4 language.” 2020. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/190506.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Panák, Petr. “Vysokoúrovňová syntéza číslicových obvodů v oblasti síťových aplikací popsaných v jazyce P4: High level synthesis in network applications described using P4 language.” 2020. Web. 20 Jan 2021.

Vancouver:

Panák P. Vysokoúrovňová syntéza číslicových obvodů v oblasti síťových aplikací popsaných v jazyce P4: High level synthesis in network applications described using P4 language. [Internet] [Thesis]. Brno University of Technology; 2020. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/190506.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Panák P. Vysokoúrovňová syntéza číslicových obvodů v oblasti síťových aplikací popsaných v jazyce P4: High level synthesis in network applications described using P4 language. [Thesis]. Brno University of Technology; 2020. Available from: http://hdl.handle.net/11012/190506

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

11. Rudolf, Tomáš. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.

Degree: 2020, Brno University of Technology

 This thesis deals with increasing efficiency of supercomputers. Higher efficiency can be achieved by reducing frequency of processor if the algorithm does not slow down… (more)

Subjects/Keywords: Analýza; spotřeba; procesor; frekvence; paměť; PAPI; MSR; RAPL; Intel; Linpack; Analysis; consumption; processor; frequency; memory; PAPI; MSR; RAPL; Intel; Linpack

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APA (6th Edition):

Rudolf, T. (2020). Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/189820

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rudolf, Tomáš. “Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.” 2020. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/189820.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rudolf, Tomáš. “Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.” 2020. Web. 20 Jan 2021.

Vancouver:

Rudolf T. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. [Internet] [Thesis]. Brno University of Technology; 2020. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/189820.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rudolf T. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. [Thesis]. Brno University of Technology; 2020. Available from: http://hdl.handle.net/11012/189820

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

12. Tomečko, Lukáš. Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech: Efficient Implementation of High Performance Algorithms on Multi-Core Processors.

Degree: 2019, Brno University of Technology

 This thesis describes the process of parallelization and vectorization of fluid simulation using OpenMP library and Intel compiler. Various approaches were tried e.g. cache blocking,… (more)

Subjects/Keywords: paralelizácia; vektorizácia; OpenMP; simd; Intel; SPH; simulácia; násobenie matíc; parallelization; vectorization; OpenMP; simd; Intel; SPH; simulation; matmul

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APA (6th Edition):

Tomečko, L. (2019). Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech: Efficient Implementation of High Performance Algorithms on Multi-Core Processors. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/62068

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tomečko, Lukáš. “Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech: Efficient Implementation of High Performance Algorithms on Multi-Core Processors.” 2019. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/62068.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tomečko, Lukáš. “Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech: Efficient Implementation of High Performance Algorithms on Multi-Core Processors.” 2019. Web. 20 Jan 2021.

Vancouver:

Tomečko L. Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech: Efficient Implementation of High Performance Algorithms on Multi-Core Processors. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/62068.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tomečko L. Efektivní implementace vysoce náročných algoritmů na vícejádrových procesorech: Efficient Implementation of High Performance Algorithms on Multi-Core Processors. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/62068

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

13. Rudolf, Tomáš. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.

Degree: 2018, Brno University of Technology

 This thesis deals with increasing efficiency of supercomputers. Higher efficiency can be achieved by reducing frequency of processor if the algorithm does not slow down… (more)

Subjects/Keywords: Analýza; spotřeba; procesor; frekvence; paměť; PAPI; MSR; RAPL; Intel; Linpack; Analysis; consumption; processor; frequency; memory; PAPI; MSR; RAPL; Intel; Linpack

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rudolf, T. (2018). Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/85277

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rudolf, Tomáš. “Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.” 2018. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/85277.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rudolf, Tomáš. “Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.” 2018. Web. 20 Jan 2021.

Vancouver:

Rudolf T. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. [Internet] [Thesis]. Brno University of Technology; 2018. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/85277.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rudolf T. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. [Thesis]. Brno University of Technology; 2018. Available from: http://hdl.handle.net/11012/85277

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

14. Rudolf, Tomáš. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.

Degree: 2020, Brno University of Technology

 This thesis deals with increasing efficiency of supercomputers. Higher efficiency can be achieved by reducing frequency of processor if the algorithm does not slow down… (more)

Subjects/Keywords: Analýza; spotřeba; procesor; frekvence; paměť; PAPI; MSR; RAPL; Intel; Linpack; Analysis; consumption; processor; frequency; memory; PAPI; MSR; RAPL; Intel; Linpack

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rudolf, T. (2020). Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/188571

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rudolf, Tomáš. “Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.” 2020. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/188571.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rudolf, Tomáš. “Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption.” 2020. Web. 20 Jan 2021.

Vancouver:

Rudolf T. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. [Internet] [Thesis]. Brno University of Technology; 2020. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/188571.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rudolf T. Automatizace analýzy výkonu a spotřeby zvoleného systému: Automatization of Analysis of Performance and Power Consumption. [Thesis]. Brno University of Technology; 2020. Available from: http://hdl.handle.net/11012/188571

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

15. Lukačovič, Martin. Využitie grafických procesorov pre univerzálne výpočty v priemyselných systémoch: General Processing on Graphics Processing Units for Industrial Systems.

Degree: 2019, Brno University of Technology

 The thesis deals with the abilities of graphics processors for GPGPU. It contains historical solutions to contemporary design. There are also described graphics processors from… (more)

Subjects/Keywords: GPGPU; GPU; CPU; NVIDIA; Intel; AMD; OpenCL; paralelizácia; GPGPU; GPU; CPU; NVIDIA; AMD; Intel; OpenCL; parallelization

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lukačovič, M. (2019). Využitie grafických procesorov pre univerzálne výpočty v priemyselných systémoch: General Processing on Graphics Processing Units for Industrial Systems. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/34286

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lukačovič, Martin. “Využitie grafických procesorov pre univerzálne výpočty v priemyselných systémoch: General Processing on Graphics Processing Units for Industrial Systems.” 2019. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/34286.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lukačovič, Martin. “Využitie grafických procesorov pre univerzálne výpočty v priemyselných systémoch: General Processing on Graphics Processing Units for Industrial Systems.” 2019. Web. 20 Jan 2021.

Vancouver:

Lukačovič M. Využitie grafických procesorov pre univerzálne výpočty v priemyselných systémoch: General Processing on Graphics Processing Units for Industrial Systems. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/34286.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lukačovič M. Využitie grafických procesorov pre univerzálne výpočty v priemyselných systémoch: General Processing on Graphics Processing Units for Industrial Systems. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/34286

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

16. Fuksa, Tomáš. Paralelizace výpočtů pro zpracování obrazu: Paralelized image processing library.

Degree: 2018, Brno University of Technology

 This work deals with parallel computing on modern processors - multi-core CPU and GPU. The goal is to learn about computing on this devices suitable… (more)

Subjects/Keywords: Grafický procesor; GPGPU; Nvidia; CUDA; Paralelismus; OpenCL; Intel IPP; SIMD; Graphic processor; GPGPU; Nvidia; CUDA; Paralelism; OpenCL; Intel IPP; SIMD

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Fuksa, T. (2018). Paralelizace výpočtů pro zpracování obrazu: Paralelized image processing library. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/8264

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Fuksa, Tomáš. “Paralelizace výpočtů pro zpracování obrazu: Paralelized image processing library.” 2018. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/8264.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Fuksa, Tomáš. “Paralelizace výpočtů pro zpracování obrazu: Paralelized image processing library.” 2018. Web. 20 Jan 2021.

Vancouver:

Fuksa T. Paralelizace výpočtů pro zpracování obrazu: Paralelized image processing library. [Internet] [Thesis]. Brno University of Technology; 2018. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/8264.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Fuksa T. Paralelizace výpočtů pro zpracování obrazu: Paralelized image processing library. [Thesis]. Brno University of Technology; 2018. Available from: http://hdl.handle.net/11012/8264

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

17. Šlenker, Samuel. Výpočetní jednotky procesorů poslední generace a jejich využití: Processing units of last generation processors and their utilization.

Degree: 2019, Brno University of Technology

 The aim of this thesis was to study and subsequently process the differences between the older instruction sets and newer instruction sets, to specify the… (more)

Subjects/Keywords: SIMD; SSE; AVX; FMA; vektorové spracovanie dát; Intel; AMD; SIMD; SSE; AVX; FMA; vector data processing; Intel; AMD

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APA (6th Edition):

Šlenker, S. (2019). Výpočetní jednotky procesorů poslední generace a jejich využití: Processing units of last generation processors and their utilization. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/41353

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Šlenker, Samuel. “Výpočetní jednotky procesorů poslední generace a jejich využití: Processing units of last generation processors and their utilization.” 2019. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/41353.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Šlenker, Samuel. “Výpočetní jednotky procesorů poslední generace a jejich využití: Processing units of last generation processors and their utilization.” 2019. Web. 20 Jan 2021.

Vancouver:

Šlenker S. Výpočetní jednotky procesorů poslední generace a jejich využití: Processing units of last generation processors and their utilization. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/41353.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Šlenker S. Výpočetní jednotky procesorů poslední generace a jejich využití: Processing units of last generation processors and their utilization. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/41353

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

18. Semančík, Matej. Využití platformy Intel Galileo v Internet of Things: Intel Galileo platform usage in the Internet of Things.

Degree: 2018, Brno University of Technology

This thesis is about practical usage of Intel Galileo board in Internet of Things and it's comparison to other development platforms, communication types in IoT, sensors and sensor networks, implementation examples, proposal and implementation of testing topology. Advisors/Committee Members: Krajsa, Ondřej (advisor), Lattenberg, Ivo (referee).

Subjects/Keywords: Internet vecí; IoT; Intel Galileo; Arduino; senzorické siete; senzory; Internet of Things; IoT; Intel Galileo; Arduino; sensor networks; sensors

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APA (6th Edition):

Semančík, M. (2018). Využití platformy Intel Galileo v Internet of Things: Intel Galileo platform usage in the Internet of Things. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/61698

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Semančík, Matej. “Využití platformy Intel Galileo v Internet of Things: Intel Galileo platform usage in the Internet of Things.” 2018. Thesis, Brno University of Technology. Accessed January 20, 2021. http://hdl.handle.net/11012/61698.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Semančík, Matej. “Využití platformy Intel Galileo v Internet of Things: Intel Galileo platform usage in the Internet of Things.” 2018. Web. 20 Jan 2021.

Vancouver:

Semančík M. Využití platformy Intel Galileo v Internet of Things: Intel Galileo platform usage in the Internet of Things. [Internet] [Thesis]. Brno University of Technology; 2018. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/11012/61698.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Semančík M. Využití platformy Intel Galileo v Internet of Things: Intel Galileo platform usage in the Internet of Things. [Thesis]. Brno University of Technology; 2018. Available from: http://hdl.handle.net/11012/61698

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Rochester Institute of Technology

19. Chapman, William A. A Simulator for the Intel 8086 microprocessor.

Degree: Electrical Engineering, 1988, Rochester Institute of Technology

  This project was originally suggested by J. Schueckler as an aid to teaching students the Intel 8086 Assembly Language. The need for such a… (more)

Subjects/Keywords: Intel 8086 microprocessor; Pascal; Simulators

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chapman, W. A. (1988). A Simulator for the Intel 8086 microprocessor. (Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/6866

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chapman, William A. “A Simulator for the Intel 8086 microprocessor.” 1988. Thesis, Rochester Institute of Technology. Accessed January 20, 2021. https://scholarworks.rit.edu/theses/6866.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chapman, William A. “A Simulator for the Intel 8086 microprocessor.” 1988. Web. 20 Jan 2021.

Vancouver:

Chapman WA. A Simulator for the Intel 8086 microprocessor. [Internet] [Thesis]. Rochester Institute of Technology; 1988. [cited 2021 Jan 20]. Available from: https://scholarworks.rit.edu/theses/6866.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chapman WA. A Simulator for the Intel 8086 microprocessor. [Thesis]. Rochester Institute of Technology; 1988. Available from: https://scholarworks.rit.edu/theses/6866

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Waterloo

20. Vinayagamurthy, Dhinakaran. User-Controlled Computations in Untrusted Computing Environments.

Degree: 2019, University of Waterloo

 Computing infrastructures are challenging and expensive to maintain. This led to the growth of cloud computing with users renting computing resources from centralized cloud providers.… (more)

Subjects/Keywords: computing on encrypted data; Intel SGX; encrypted databases; post-quantum security

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Vinayagamurthy, D. (2019). User-Controlled Computations in Untrusted Computing Environments. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/14352

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vinayagamurthy, Dhinakaran. “User-Controlled Computations in Untrusted Computing Environments.” 2019. Thesis, University of Waterloo. Accessed January 20, 2021. http://hdl.handle.net/10012/14352.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vinayagamurthy, Dhinakaran. “User-Controlled Computations in Untrusted Computing Environments.” 2019. Web. 20 Jan 2021.

Vancouver:

Vinayagamurthy D. User-Controlled Computations in Untrusted Computing Environments. [Internet] [Thesis]. University of Waterloo; 2019. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/10012/14352.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vinayagamurthy D. User-Controlled Computations in Untrusted Computing Environments. [Thesis]. University of Waterloo; 2019. Available from: http://hdl.handle.net/10012/14352

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Manitoba

21. Ahmed, Kazi Wasif. Secure and efficient nearest neighbour search in high dimensional space.

Degree: Computer Science, 2017, University of Manitoba

 The attractive features of cloud platforms such as low cost, high availability and scalability are encouraging social networks, health and other service providers to outsource… (more)

Subjects/Keywords: Nearest Neighbour Search; Social Discovery; Anonymization; Intel SGX; Obfuscated Image Classification

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APA (6th Edition):

Ahmed, K. W. (2017). Secure and efficient nearest neighbour search in high dimensional space. (Masters Thesis). University of Manitoba. Retrieved from http://hdl.handle.net/1993/32788

Chicago Manual of Style (16th Edition):

Ahmed, Kazi Wasif. “Secure and efficient nearest neighbour search in high dimensional space.” 2017. Masters Thesis, University of Manitoba. Accessed January 20, 2021. http://hdl.handle.net/1993/32788.

MLA Handbook (7th Edition):

Ahmed, Kazi Wasif. “Secure and efficient nearest neighbour search in high dimensional space.” 2017. Web. 20 Jan 2021.

Vancouver:

Ahmed KW. Secure and efficient nearest neighbour search in high dimensional space. [Internet] [Masters thesis]. University of Manitoba; 2017. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/1993/32788.

Council of Science Editors:

Ahmed KW. Secure and efficient nearest neighbour search in high dimensional space. [Masters Thesis]. University of Manitoba; 2017. Available from: http://hdl.handle.net/1993/32788


University of Illinois – Chicago

22. Pezzotti, Emanuele. Efficient Non-uniform Fast Fourier Transform (NuFFT) Implementation for MRI Processing on FPGA.

Degree: 2017, University of Illinois – Chicago

 Magnetic Resonance Imaging (MRI) is one of the most used technique in the medical field to image the human body thanks to its non invasive… (more)

Subjects/Keywords: FPGA; Intel; MRI; Data Processing; Image Processing; NuFFT

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APA (6th Edition):

Pezzotti, E. (2017). Efficient Non-uniform Fast Fourier Transform (NuFFT) Implementation for MRI Processing on FPGA. (Thesis). University of Illinois – Chicago. Retrieved from http://hdl.handle.net/10027/21737

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Pezzotti, Emanuele. “Efficient Non-uniform Fast Fourier Transform (NuFFT) Implementation for MRI Processing on FPGA.” 2017. Thesis, University of Illinois – Chicago. Accessed January 20, 2021. http://hdl.handle.net/10027/21737.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Pezzotti, Emanuele. “Efficient Non-uniform Fast Fourier Transform (NuFFT) Implementation for MRI Processing on FPGA.” 2017. Web. 20 Jan 2021.

Vancouver:

Pezzotti E. Efficient Non-uniform Fast Fourier Transform (NuFFT) Implementation for MRI Processing on FPGA. [Internet] [Thesis]. University of Illinois – Chicago; 2017. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/10027/21737.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Pezzotti E. Efficient Non-uniform Fast Fourier Transform (NuFFT) Implementation for MRI Processing on FPGA. [Thesis]. University of Illinois – Chicago; 2017. Available from: http://hdl.handle.net/10027/21737

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

23. Janzén, Johan. Evaluation of Energy-Optimizing Scheduling Algorithms for Streaming Computations on Massively Parallel Multicore Architectures.

Degree: The Institute of Technology, 2014, Linköping UniversityLinköping University

  This thesis describes an environment to evaluate and compare static schedulers for real pipelined streaming applications on massively parallel architectures, such as Intel Single… (more)

Subjects/Keywords: Intel SCC; DVFS; Task based programming; Static scheduling; Energy efficiency; Multicore

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APA (6th Edition):

Janzén, J. (2014). Evaluation of Energy-Optimizing Scheduling Algorithms for Streaming Computations on Massively Parallel Multicore Architectures. (Thesis). Linköping UniversityLinköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-111385

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Janzén, Johan. “Evaluation of Energy-Optimizing Scheduling Algorithms for Streaming Computations on Massively Parallel Multicore Architectures.” 2014. Thesis, Linköping UniversityLinköping University. Accessed January 20, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-111385.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Janzén, Johan. “Evaluation of Energy-Optimizing Scheduling Algorithms for Streaming Computations on Massively Parallel Multicore Architectures.” 2014. Web. 20 Jan 2021.

Vancouver:

Janzén J. Evaluation of Energy-Optimizing Scheduling Algorithms for Streaming Computations on Massively Parallel Multicore Architectures. [Internet] [Thesis]. Linköping UniversityLinköping University; 2014. [cited 2021 Jan 20]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-111385.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Janzén J. Evaluation of Energy-Optimizing Scheduling Algorithms for Streaming Computations on Massively Parallel Multicore Architectures. [Thesis]. Linköping UniversityLinköping University; 2014. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-111385

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Uppsala University

24. Malmgren, Antonia. Intel - mot en effektsbaserad bedömningsmetod? : En analys av Intel-domens effekter på bedömningen av dominansmissbruk enligt art. 102 FEUF.

Degree: Law, 2019, Uppsala University

  För att göra ett företag i dominerande ställning ansvarigt för ett missbruk av densamma, krävs det enligt den centrala bestämmelsen på det unionsrättsliga området,… (more)

Subjects/Keywords: Konkurrensrätt; Intel; rabattsystem; art. 102 FEUF; Law; Juridik

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APA (6th Edition):

Malmgren, A. (2019). Intel - mot en effektsbaserad bedömningsmetod? : En analys av Intel-domens effekter på bedömningen av dominansmissbruk enligt art. 102 FEUF. (Thesis). Uppsala University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-378179

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Malmgren, Antonia. “Intel - mot en effektsbaserad bedömningsmetod? : En analys av Intel-domens effekter på bedömningen av dominansmissbruk enligt art. 102 FEUF.” 2019. Thesis, Uppsala University. Accessed January 20, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-378179.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Malmgren, Antonia. “Intel - mot en effektsbaserad bedömningsmetod? : En analys av Intel-domens effekter på bedömningen av dominansmissbruk enligt art. 102 FEUF.” 2019. Web. 20 Jan 2021.

Vancouver:

Malmgren A. Intel - mot en effektsbaserad bedömningsmetod? : En analys av Intel-domens effekter på bedömningen av dominansmissbruk enligt art. 102 FEUF. [Internet] [Thesis]. Uppsala University; 2019. [cited 2021 Jan 20]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-378179.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Malmgren A. Intel - mot en effektsbaserad bedömningsmetod? : En analys av Intel-domens effekter på bedömningen av dominansmissbruk enligt art. 102 FEUF. [Thesis]. Uppsala University; 2019. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-378179

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Delft University of Technology

25. Shi, Gaomei (author). MultiProxy: a collaborative approach to censorship circumvention.

Degree: 2019, Delft University of Technology

In recent years, many countries and administrative domains exploit control over their communication infrastructures to censor online materials. The concrete reasons behind the Internet censorship… (more)

Subjects/Keywords: censorship; network traffic analysis; distributed systems; Intel SGX

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Shi, G. (. (2019). MultiProxy: a collaborative approach to censorship circumvention. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:858f16c9-71f1-4d7f-8baf-d4fa0a0687e3

Chicago Manual of Style (16th Edition):

Shi, Gaomei (author). “MultiProxy: a collaborative approach to censorship circumvention.” 2019. Masters Thesis, Delft University of Technology. Accessed January 20, 2021. http://resolver.tudelft.nl/uuid:858f16c9-71f1-4d7f-8baf-d4fa0a0687e3.

MLA Handbook (7th Edition):

Shi, Gaomei (author). “MultiProxy: a collaborative approach to censorship circumvention.” 2019. Web. 20 Jan 2021.

Vancouver:

Shi G(. MultiProxy: a collaborative approach to censorship circumvention. [Internet] [Masters thesis]. Delft University of Technology; 2019. [cited 2021 Jan 20]. Available from: http://resolver.tudelft.nl/uuid:858f16c9-71f1-4d7f-8baf-d4fa0a0687e3.

Council of Science Editors:

Shi G(. MultiProxy: a collaborative approach to censorship circumvention. [Masters Thesis]. Delft University of Technology; 2019. Available from: http://resolver.tudelft.nl/uuid:858f16c9-71f1-4d7f-8baf-d4fa0a0687e3


University of Notre Dame

26. Benjamin Robert Bernard. NGO-Business Partnerships: Risk, Trust, and the Future of Development</h1>.

Degree: International Peace Studies, 2012, University of Notre Dame

  This thesis examines the privatization of development and the changing interests, pressures, and demands that have brought NGOs and corporations into collaborative partnerships (NGO-BPs).… (more)

Subjects/Keywords: partnership; Intel; trust; risk; Catholic Relief Services; business; NGO; development

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APA (6th Edition):

Bernard, B. R. (2012). NGO-Business Partnerships: Risk, Trust, and the Future of Development</h1>. (Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/8910js9767w

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Bernard, Benjamin Robert. “NGO-Business Partnerships: Risk, Trust, and the Future of Development</h1>.” 2012. Thesis, University of Notre Dame. Accessed January 20, 2021. https://curate.nd.edu/show/8910js9767w.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Bernard, Benjamin Robert. “NGO-Business Partnerships: Risk, Trust, and the Future of Development</h1>.” 2012. Web. 20 Jan 2021.

Vancouver:

Bernard BR. NGO-Business Partnerships: Risk, Trust, and the Future of Development</h1>. [Internet] [Thesis]. University of Notre Dame; 2012. [cited 2021 Jan 20]. Available from: https://curate.nd.edu/show/8910js9767w.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Bernard BR. NGO-Business Partnerships: Risk, Trust, and the Future of Development</h1>. [Thesis]. University of Notre Dame; 2012. Available from: https://curate.nd.edu/show/8910js9767w

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Saskatchewan

27. Janzen, Chandler. Autotuning the Intel HLS Compiler using the Opentuner Framework.

Degree: 2019, University of Saskatchewan

 High level synthesis (HLS) tools can be used to improve design flow and decrease verification times for field programmable gate array (FPGA) and application specific… (more)

Subjects/Keywords: HLS; Intel FPGA; FPGA; OpenTuner; autotuner; C; CHStone

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Janzen, C. (2019). Autotuning the Intel HLS Compiler using the Opentuner Framework. (Thesis). University of Saskatchewan. Retrieved from http://hdl.handle.net/10388/12422

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Janzen, Chandler. “Autotuning the Intel HLS Compiler using the Opentuner Framework.” 2019. Thesis, University of Saskatchewan. Accessed January 20, 2021. http://hdl.handle.net/10388/12422.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Janzen, Chandler. “Autotuning the Intel HLS Compiler using the Opentuner Framework.” 2019. Web. 20 Jan 2021.

Vancouver:

Janzen C. Autotuning the Intel HLS Compiler using the Opentuner Framework. [Internet] [Thesis]. University of Saskatchewan; 2019. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/10388/12422.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Janzen C. Autotuning the Intel HLS Compiler using the Opentuner Framework. [Thesis]. University of Saskatchewan; 2019. Available from: http://hdl.handle.net/10388/12422

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of New Mexico

28. Noormofidi, Seyed Vahid. Simulating Nonlinear Neutrino Oscillations on Next-Generation Many-Core Architectures.

Degree: Electrical and Computer Engineering, 2016, University of New Mexico

 In this work an astrophysical simulation code, XFLAT, is developed to study neutrino oscillations in supernovae. XFLAT is a hybrid modular code which was designed… (more)

Subjects/Keywords: Accelerators; GPU; HPC; Intel MIC; Neutrinos; Simulation; Xeon Phi

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Noormofidi, S. V. (2016). Simulating Nonlinear Neutrino Oscillations on Next-Generation Many-Core Architectures. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/32322

Chicago Manual of Style (16th Edition):

Noormofidi, Seyed Vahid. “Simulating Nonlinear Neutrino Oscillations on Next-Generation Many-Core Architectures.” 2016. Doctoral Dissertation, University of New Mexico. Accessed January 20, 2021. http://hdl.handle.net/1928/32322.

MLA Handbook (7th Edition):

Noormofidi, Seyed Vahid. “Simulating Nonlinear Neutrino Oscillations on Next-Generation Many-Core Architectures.” 2016. Web. 20 Jan 2021.

Vancouver:

Noormofidi SV. Simulating Nonlinear Neutrino Oscillations on Next-Generation Many-Core Architectures. [Internet] [Doctoral dissertation]. University of New Mexico; 2016. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/1928/32322.

Council of Science Editors:

Noormofidi SV. Simulating Nonlinear Neutrino Oscillations on Next-Generation Many-Core Architectures. [Doctoral Dissertation]. University of New Mexico; 2016. Available from: http://hdl.handle.net/1928/32322


MIT

29. Paliwal, Prashant. An ecosystem strategy for Intel Corporation to drive adoption of its embedded solutions .

Degree: Intel Corporation, 2010, MIT

 With time, successful companies and businesses grow to create a network of partners and stakeholders that work very closely with them. The very survival and… (more)

Subjects/Keywords: Engineering Systems Division.; Intel Corporation.

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Paliwal, P. (2010). An ecosystem strategy for Intel Corporation to drive adoption of its embedded solutions . (Thesis). MIT. Retrieved from http://hdl.handle.net/1721.1/62771

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Paliwal, Prashant. “An ecosystem strategy for Intel Corporation to drive adoption of its embedded solutions .” 2010. Thesis, MIT. Accessed January 20, 2021. http://hdl.handle.net/1721.1/62771.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Paliwal, Prashant. “An ecosystem strategy for Intel Corporation to drive adoption of its embedded solutions .” 2010. Web. 20 Jan 2021.

Vancouver:

Paliwal P. An ecosystem strategy for Intel Corporation to drive adoption of its embedded solutions . [Internet] [Thesis]. MIT; 2010. [cited 2021 Jan 20]. Available from: http://hdl.handle.net/1721.1/62771.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Paliwal P. An ecosystem strategy for Intel Corporation to drive adoption of its embedded solutions . [Thesis]. MIT; 2010. Available from: http://hdl.handle.net/1721.1/62771

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Southern California

30. Porter, Joshua. The impact of globalization and multinational corporations on schools and universities in Costa Rica.

Degree: EdD, Education (Leadership), 2014, University of Southern California

 In a highly competitive and rapidly changing world, many countries are finding a need to adapt to a global market and a country’s educational system… (more)

Subjects/Keywords: globalization; education; 21st century learning; collaboration; elementary; Costa Rica; Intel; technology

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Porter, J. (2014). The impact of globalization and multinational corporations on schools and universities in Costa Rica. (Doctoral Dissertation). University of Southern California. Retrieved from http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/372090/rec/6806

Chicago Manual of Style (16th Edition):

Porter, Joshua. “The impact of globalization and multinational corporations on schools and universities in Costa Rica.” 2014. Doctoral Dissertation, University of Southern California. Accessed January 20, 2021. http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/372090/rec/6806.

MLA Handbook (7th Edition):

Porter, Joshua. “The impact of globalization and multinational corporations on schools and universities in Costa Rica.” 2014. Web. 20 Jan 2021.

Vancouver:

Porter J. The impact of globalization and multinational corporations on schools and universities in Costa Rica. [Internet] [Doctoral dissertation]. University of Southern California; 2014. [cited 2021 Jan 20]. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/372090/rec/6806.

Council of Science Editors:

Porter J. The impact of globalization and multinational corporations on schools and universities in Costa Rica. [Doctoral Dissertation]. University of Southern California; 2014. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll3/id/372090/rec/6806

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