Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · date | New search

Language: English

You searched for subject:(Incremental ADC). Showing records 1 – 7 of 7 total matches.

Search Limiters

Last 2 Years | English Only

No search limiters apply to these results.

▼ Search Limiters


Oregon State University

1. Zhang, Yi. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.

Degree: PhD, Electrical and Computer Engineering, 2016, Oregon State University

Incremental ADCs (IADCs) have found wide applications in sensor interface circuitry since, compared to ∆Σ ADCs, they provide low-latency high-accuracy conversion and easy multiplexing among… (more)

Subjects/Keywords: Incremental ADC; Analog-to-digital converters  – Design and construction

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhang, Y. (2016). Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/59929

Chicago Manual of Style (16th Edition):

Zhang, Yi. “Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.” 2016. Doctoral Dissertation, Oregon State University. Accessed October 29, 2020. http://hdl.handle.net/1957/59929.

MLA Handbook (7th Edition):

Zhang, Yi. “Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.” 2016. Web. 29 Oct 2020.

Vancouver:

Zhang Y. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. [Internet] [Doctoral dissertation]. Oregon State University; 2016. [cited 2020 Oct 29]. Available from: http://hdl.handle.net/1957/59929.

Council of Science Editors:

Zhang Y. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. [Doctoral Dissertation]. Oregon State University; 2016. Available from: http://hdl.handle.net/1957/59929


Delft University of Technology

2. Karykis, G. (author). A high-resolution self-timed zero-crossing-based Incremental ?? ADC.

Degree: 2015, Delft University of Technology

This thesis discusses the d es ign and verification of a high-resolution self-timed incremental ?? ADC. The first self-timed incremental ?? ADC was presented by… (more)

Subjects/Keywords: energy-efficient; high-resolution; incremental ?? ADC; self-timed; zerocrossing-based integrator

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Karykis, G. (. (2015). A high-resolution self-timed zero-crossing-based Incremental ?? ADC. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:98bbf309-c0cd-4c7e-be40-6333d5427c9b

Chicago Manual of Style (16th Edition):

Karykis, G (author). “A high-resolution self-timed zero-crossing-based Incremental ?? ADC.” 2015. Masters Thesis, Delft University of Technology. Accessed October 29, 2020. http://resolver.tudelft.nl/uuid:98bbf309-c0cd-4c7e-be40-6333d5427c9b.

MLA Handbook (7th Edition):

Karykis, G (author). “A high-resolution self-timed zero-crossing-based Incremental ?? ADC.” 2015. Web. 29 Oct 2020.

Vancouver:

Karykis G(. A high-resolution self-timed zero-crossing-based Incremental ?? ADC. [Internet] [Masters thesis]. Delft University of Technology; 2015. [cited 2020 Oct 29]. Available from: http://resolver.tudelft.nl/uuid:98bbf309-c0cd-4c7e-be40-6333d5427c9b.

Council of Science Editors:

Karykis G(. A high-resolution self-timed zero-crossing-based Incremental ?? ADC. [Masters Thesis]. Delft University of Technology; 2015. Available from: http://resolver.tudelft.nl/uuid:98bbf309-c0cd-4c7e-be40-6333d5427c9b

3. Lindeberg, Johan. Design and Implementation of a Low-Power SAR-ADC with Flexible Sample-Rate and Internal Calibration.

Degree: The Institute of Technology, 2014, Linköping UniversityLinköping University

  The objective of this Master's thesis was to design and implement a low power Analog to Digital Converter (ADC) used for sensor measurements. In… (more)

Subjects/Keywords: Analog to Digital Converter (ADC); Cyclic; Algorithmic; Incremental; Capacitor mismatch; Compensation

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lindeberg, J. (2014). Design and Implementation of a Low-Power SAR-ADC with Flexible Sample-Rate and Internal Calibration. (Thesis). Linköping UniversityLinköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-103229

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lindeberg, Johan. “Design and Implementation of a Low-Power SAR-ADC with Flexible Sample-Rate and Internal Calibration.” 2014. Thesis, Linköping UniversityLinköping University. Accessed October 29, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-103229.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lindeberg, Johan. “Design and Implementation of a Low-Power SAR-ADC with Flexible Sample-Rate and Internal Calibration.” 2014. Web. 29 Oct 2020.

Vancouver:

Lindeberg J. Design and Implementation of a Low-Power SAR-ADC with Flexible Sample-Rate and Internal Calibration. [Internet] [Thesis]. Linköping UniversityLinköping University; 2014. [cited 2020 Oct 29]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-103229.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lindeberg J. Design and Implementation of a Low-Power SAR-ADC with Flexible Sample-Rate and Internal Calibration. [Thesis]. Linköping UniversityLinköping University; 2014. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-103229

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

4. Rajendran, L. (author). Design of an Energy-Efficient Interface Circuit for a MEMS-based Capacitive Pressure Sensor.

Degree: 2013, Delft University of Technology

This thesis presents an incremental ?? capacitance-to-digital converter (CDC) that serves as an interface circuit for a MEMS-based pressure sensor. The thesis presents a systematic… (more)

Subjects/Keywords: pressure-sensor interface; energy-efficiency; double sampling; inverter-based OTA; incremental ?? ADC

…Quantization Noise . . . . . . . . 2-9-1 Incremental ADC… …to the ∆Σ ADC. The comparison between the two is as follows [4]: • The primary… …difference between ∆Σ ADC and the CDC are: In the case of a CDC, Capacitance is not known and a… …ADC, the input voltage is not known and a known value of capacitance is applied. A reference… …Σ ADC is that they both work based on the principle of ’charge balancing’. In the context… 

Page 1 Page 2 Page 3 Page 4 Page 5 Page 6 Page 7 Sample image

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rajendran, L. (. (2013). Design of an Energy-Efficient Interface Circuit for a MEMS-based Capacitive Pressure Sensor. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:b6b6915b-ac95-45ad-838d-c8fad5b8a171

Chicago Manual of Style (16th Edition):

Rajendran, L (author). “Design of an Energy-Efficient Interface Circuit for a MEMS-based Capacitive Pressure Sensor.” 2013. Masters Thesis, Delft University of Technology. Accessed October 29, 2020. http://resolver.tudelft.nl/uuid:b6b6915b-ac95-45ad-838d-c8fad5b8a171.

MLA Handbook (7th Edition):

Rajendran, L (author). “Design of an Energy-Efficient Interface Circuit for a MEMS-based Capacitive Pressure Sensor.” 2013. Web. 29 Oct 2020.

Vancouver:

Rajendran L(. Design of an Energy-Efficient Interface Circuit for a MEMS-based Capacitive Pressure Sensor. [Internet] [Masters thesis]. Delft University of Technology; 2013. [cited 2020 Oct 29]. Available from: http://resolver.tudelft.nl/uuid:b6b6915b-ac95-45ad-838d-c8fad5b8a171.

Council of Science Editors:

Rajendran L(. Design of an Energy-Efficient Interface Circuit for a MEMS-based Capacitive Pressure Sensor. [Masters Thesis]. Delft University of Technology; 2013. Available from: http://resolver.tudelft.nl/uuid:b6b6915b-ac95-45ad-838d-c8fad5b8a171


Delft University of Technology

5. Chen, C. (author). Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.

Degree: 2012, Delft University of Technology

Microelectronics

Microelectronics & Computer Engineering

Electrical Engineering, Mathematics and Computer Science

Advisors/Committee Members: Pertijs, M.A.P. (mentor).

Subjects/Keywords: Incremental Delta-sigma ADC; self-timed; zero-crossing-based circuits; energy-efficient; low-power

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, C. (. (2012). Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef

Chicago Manual of Style (16th Edition):

Chen, C (author). “Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.” 2012. Masters Thesis, Delft University of Technology. Accessed October 29, 2020. http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef.

MLA Handbook (7th Edition):

Chen, C (author). “Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC.” 2012. Web. 29 Oct 2020.

Vancouver:

Chen C(. Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. [Internet] [Masters thesis]. Delft University of Technology; 2012. [cited 2020 Oct 29]. Available from: http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef.

Council of Science Editors:

Chen C(. Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC. [Masters Thesis]. Delft University of Technology; 2012. Available from: http://resolver.tudelft.nl/uuid:077f4577-c9b8-4be7-91a7-49bf751e73ef


Delft University of Technology

6. Kamath, U.R. (author). Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip.

Degree: 2012, Delft University of Technology

Glucose sensors are useful for monitoring and control of blood-sugar concentration for diabetic patients. There are many challenges in their wide-spread use and effectiveness in… (more)

Subjects/Keywords: glucose sensor; incremental Sigma-Delta; current input ADC; dynamic reference; wide-dynamic range; sensor adaptable ADC

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kamath, U. R. (. (2012). Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:ea9d2e1c-5b03-44e9-b916-587fd737313f

Chicago Manual of Style (16th Edition):

Kamath, U R (author). “Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip.” 2012. Masters Thesis, Delft University of Technology. Accessed October 29, 2020. http://resolver.tudelft.nl/uuid:ea9d2e1c-5b03-44e9-b916-587fd737313f.

MLA Handbook (7th Edition):

Kamath, U R (author). “Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip.” 2012. Web. 29 Oct 2020.

Vancouver:

Kamath UR(. Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip. [Internet] [Masters thesis]. Delft University of Technology; 2012. [cited 2020 Oct 29]. Available from: http://resolver.tudelft.nl/uuid:ea9d2e1c-5b03-44e9-b916-587fd737313f.

Council of Science Editors:

Kamath UR(. Design of high-resolution photodiode readout circuitry for a bio-implantable continuous glucose sensing chip. [Masters Thesis]. Delft University of Technology; 2012. Available from: http://resolver.tudelft.nl/uuid:ea9d2e1c-5b03-44e9-b916-587fd737313f


University of Toronto

7. Liang, Joshua. A Frequency-scalable 14-bit ADC for Low Power Sensor Applications.

Degree: 2009, University of Toronto

In this thesis, a 14-bit low-power Analog-to-Digital Converter (ADC) is designed for sensor applications. Following on previous work, the ADC is designed to be frequency… (more)

Subjects/Keywords: ADC; scalable; delta-sigma; incremental converter; 0544

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liang, J. (2009). A Frequency-scalable 14-bit ADC for Low Power Sensor Applications. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/18802

Chicago Manual of Style (16th Edition):

Liang, Joshua. “A Frequency-scalable 14-bit ADC for Low Power Sensor Applications.” 2009. Masters Thesis, University of Toronto. Accessed October 29, 2020. http://hdl.handle.net/1807/18802.

MLA Handbook (7th Edition):

Liang, Joshua. “A Frequency-scalable 14-bit ADC for Low Power Sensor Applications.” 2009. Web. 29 Oct 2020.

Vancouver:

Liang J. A Frequency-scalable 14-bit ADC for Low Power Sensor Applications. [Internet] [Masters thesis]. University of Toronto; 2009. [cited 2020 Oct 29]. Available from: http://hdl.handle.net/1807/18802.

Council of Science Editors:

Liang J. A Frequency-scalable 14-bit ADC for Low Power Sensor Applications. [Masters Thesis]. University of Toronto; 2009. Available from: http://hdl.handle.net/1807/18802

.