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You searched for subject:(High k gate oxide). Showing records 1 – 30 of 46177 total matches.

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University of Illinois – Chicago

1. Colon, Albert. Design and Optimization of GaN-Based Power Semiconductor Transistors.

Degree: 2017, University of Illinois – Chicago

 Gallium Nitride, a wide bandgap semiconductor, is a robust material with applications in high-power transistors and power amplifiers. However, processing technology is still maturing and… (more)

Subjects/Keywords: AlGaN; Capacitors; Dielectrics; GaN; Gate Oxide; High-k; InAlN; Insulators; MISHFET; Ohmic Contact; Semiconductors; Transistors

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Colon, A. (2017). Design and Optimization of GaN-Based Power Semiconductor Transistors. (Thesis). University of Illinois – Chicago. Retrieved from http://hdl.handle.net/10027/21752

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Colon, Albert. “Design and Optimization of GaN-Based Power Semiconductor Transistors.” 2017. Thesis, University of Illinois – Chicago. Accessed September 26, 2020. http://hdl.handle.net/10027/21752.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Colon, Albert. “Design and Optimization of GaN-Based Power Semiconductor Transistors.” 2017. Web. 26 Sep 2020.

Vancouver:

Colon A. Design and Optimization of GaN-Based Power Semiconductor Transistors. [Internet] [Thesis]. University of Illinois – Chicago; 2017. [cited 2020 Sep 26]. Available from: http://hdl.handle.net/10027/21752.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Colon A. Design and Optimization of GaN-Based Power Semiconductor Transistors. [Thesis]. University of Illinois – Chicago; 2017. Available from: http://hdl.handle.net/10027/21752

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Kyoto University / 京都大学

2. Zhao, Ming. Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy : 高分解能ラザフォード後方散乱法による高誘電率ゲートスタック構造に関する研究.

Degree: 博士(工学), 2008, Kyoto University / 京都大学

This thesis is on the study of the characterization of interfaces and surfaces of high-k stacks for the future microelectronics. The changes of the high-k(more)

Subjects/Keywords: high-k gate stacks; high-resolution RBS

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APA (6th Edition):

Zhao, M. (2008). Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy : 高分解能ラザフォード後方散乱法による高誘電率ゲートスタック構造に関する研究. (Thesis). Kyoto University / 京都大学. Retrieved from http://hdl.handle.net/2433/57263 ; http://dx.doi.org/10.14989/doctor.k13814

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhao, Ming. “Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy : 高分解能ラザフォード後方散乱法による高誘電率ゲートスタック構造に関する研究.” 2008. Thesis, Kyoto University / 京都大学. Accessed September 26, 2020. http://hdl.handle.net/2433/57263 ; http://dx.doi.org/10.14989/doctor.k13814.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhao, Ming. “Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy : 高分解能ラザフォード後方散乱法による高誘電率ゲートスタック構造に関する研究.” 2008. Web. 26 Sep 2020.

Vancouver:

Zhao M. Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy : 高分解能ラザフォード後方散乱法による高誘電率ゲートスタック構造に関する研究. [Internet] [Thesis]. Kyoto University / 京都大学; 2008. [cited 2020 Sep 26]. Available from: http://hdl.handle.net/2433/57263 ; http://dx.doi.org/10.14989/doctor.k13814.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhao M. Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy : 高分解能ラザフォード後方散乱法による高誘電率ゲートスタック構造に関する研究. [Thesis]. Kyoto University / 京都大学; 2008. Available from: http://hdl.handle.net/2433/57263 ; http://dx.doi.org/10.14989/doctor.k13814

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

3. Anu, Philip. Preparation and Characterization ofHigh-k Aluminum Oxide Thin Films by Atomic Layer Deposition for Gate Dielectric Applications.

Degree: Instrumentation, 2011, Cochin University of Science and Technology

Present work deals with the Preparation and characterization of high-k aluminum oxide thin films by atomic layer deposition for gate dielectric applications.The ever-increasing demand for… (more)

Subjects/Keywords: Thin Films; Atomic Layer Deposition; High-k Aluminum Oxide; Gate Dielectric Applications; Plasma Enhanced Atomic Layer Deposition

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APA (6th Edition):

Anu, P. (2011). Preparation and Characterization ofHigh-k Aluminum Oxide Thin Films by Atomic Layer Deposition for Gate Dielectric Applications. (Thesis). Cochin University of Science and Technology. Retrieved from http://dyuthi.cusat.ac.in/purl/3034

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Anu, Philip. “Preparation and Characterization ofHigh-k Aluminum Oxide Thin Films by Atomic Layer Deposition for Gate Dielectric Applications.” 2011. Thesis, Cochin University of Science and Technology. Accessed September 26, 2020. http://dyuthi.cusat.ac.in/purl/3034.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Anu, Philip. “Preparation and Characterization ofHigh-k Aluminum Oxide Thin Films by Atomic Layer Deposition for Gate Dielectric Applications.” 2011. Web. 26 Sep 2020.

Vancouver:

Anu P. Preparation and Characterization ofHigh-k Aluminum Oxide Thin Films by Atomic Layer Deposition for Gate Dielectric Applications. [Internet] [Thesis]. Cochin University of Science and Technology; 2011. [cited 2020 Sep 26]. Available from: http://dyuthi.cusat.ac.in/purl/3034.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Anu P. Preparation and Characterization ofHigh-k Aluminum Oxide Thin Films by Atomic Layer Deposition for Gate Dielectric Applications. [Thesis]. Cochin University of Science and Technology; 2011. Available from: http://dyuthi.cusat.ac.in/purl/3034

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

4. Jiang, Jiayu. Study of Thin Silicon Oxides and High-K Materials for Gate Dielectrics in Metal-Insulator-Si Structures.

Degree: 2008, Penn State University

 The development of a gate stack system (dielectric, electrode, and their compatibility with plasma etching processes and the scaled complementary metal oxide semiconductor [CMOS] integrated… (more)

Subjects/Keywords: thin oxide; high k; gate dielectrics; characterization

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APA (6th Edition):

Jiang, J. (2008). Study of Thin Silicon Oxides and High-K Materials for Gate Dielectrics in Metal-Insulator-Si Structures. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/6342

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jiang, Jiayu. “Study of Thin Silicon Oxides and High-K Materials for Gate Dielectrics in Metal-Insulator-Si Structures.” 2008. Thesis, Penn State University. Accessed September 26, 2020. https://submit-etda.libraries.psu.edu/catalog/6342.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jiang, Jiayu. “Study of Thin Silicon Oxides and High-K Materials for Gate Dielectrics in Metal-Insulator-Si Structures.” 2008. Web. 26 Sep 2020.

Vancouver:

Jiang J. Study of Thin Silicon Oxides and High-K Materials for Gate Dielectrics in Metal-Insulator-Si Structures. [Internet] [Thesis]. Penn State University; 2008. [cited 2020 Sep 26]. Available from: https://submit-etda.libraries.psu.edu/catalog/6342.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jiang J. Study of Thin Silicon Oxides and High-K Materials for Gate Dielectrics in Metal-Insulator-Si Structures. [Thesis]. Penn State University; 2008. Available from: https://submit-etda.libraries.psu.edu/catalog/6342

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Tokyo Institute of Technology / 東京工業大学

5. DOU, CHUN MENG. A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究.

Degree: 博士(工学), 2014, Tokyo Institute of Technology / 東京工業大学

 In order to avoid CMOS down-scaling limit due to the short-channel effect, multi-gate structure, such as fin-FETs or Tri-gate has been introduced. In addition, MOSFETs… (more)

Subjects/Keywords: Interface traps; oxide border traps; MOS; multi-gate structure; high-k/III-V; AlGaN/GaN HEMT

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APA (6th Edition):

DOU, C. M. (2014). A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究. (Thesis). Tokyo Institute of Technology / 東京工業大学. Retrieved from http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100667420

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

DOU, CHUN MENG. “A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究.” 2014. Thesis, Tokyo Institute of Technology / 東京工業大学. Accessed September 26, 2020. http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100667420.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

DOU, CHUN MENG. “A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究.” 2014. Web. 26 Sep 2020.

Vancouver:

DOU CM. A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究. [Internet] [Thesis]. Tokyo Institute of Technology / 東京工業大学; 2014. [cited 2020 Sep 26]. Available from: http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100667420.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

DOU CM. A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究. [Thesis]. Tokyo Institute of Technology / 東京工業大学; 2014. Available from: http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100667420

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Indian Institute of Science

6. Ganapathi, K Lakshmi. Optimization of HfO2 Thin Films for Gate Dielectric Applications in 2-D Layered Materials.

Degree: PhD, Faculty of Engineering, 2018, Indian Institute of Science

 Recently, high-κ materials have become the focus of research and been extensively utilized as the gate dielectric layer in aggressive scaled complementary metal-oxide-semiconductor (CMOS) technology.… (more)

Subjects/Keywords: Hafnium Dioxide Thin Films; Complementary Metal-Oxide Semiconductors (CMOS); Two-Dimensional Layered Materials - Gate Dielectrics; High-K Materials; Gate Dielectric; High-K Gate Dielectric; Nanoelectronic Devices - Gate Dielectrics; HfO2 Gate Dielectrics; Dielectric Thin Films; HfO2 Back Gated Graphene Transistors; HfO2 Back Gated MoS2 Transistors; Dielectrics; Metal-Oxide Semiconductor Transistors; HfO2 Thin Films; 2-D lLyered Materials; Instrumentation and Applied Physics

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APA (6th Edition):

Ganapathi, K. L. (2018). Optimization of HfO2 Thin Films for Gate Dielectric Applications in 2-D Layered Materials. (Doctoral Dissertation). Indian Institute of Science. Retrieved from http://etd.iisc.ac.in/handle/2005/3219

Chicago Manual of Style (16th Edition):

Ganapathi, K Lakshmi. “Optimization of HfO2 Thin Films for Gate Dielectric Applications in 2-D Layered Materials.” 2018. Doctoral Dissertation, Indian Institute of Science. Accessed September 26, 2020. http://etd.iisc.ac.in/handle/2005/3219.

MLA Handbook (7th Edition):

Ganapathi, K Lakshmi. “Optimization of HfO2 Thin Films for Gate Dielectric Applications in 2-D Layered Materials.” 2018. Web. 26 Sep 2020.

Vancouver:

Ganapathi KL. Optimization of HfO2 Thin Films for Gate Dielectric Applications in 2-D Layered Materials. [Internet] [Doctoral dissertation]. Indian Institute of Science; 2018. [cited 2020 Sep 26]. Available from: http://etd.iisc.ac.in/handle/2005/3219.

Council of Science Editors:

Ganapathi KL. Optimization of HfO2 Thin Films for Gate Dielectric Applications in 2-D Layered Materials. [Doctoral Dissertation]. Indian Institute of Science; 2018. Available from: http://etd.iisc.ac.in/handle/2005/3219

7. Kumar, Pushpendra. Impact of 14/28nm FDSOI high-k metal gate stack processes on reliability and electrostatic control through combined electrical and physicochemical characterization techniques : Etude de l’Impact des procédés d’empilement de grille des technologies FDSOI 14/28nm sur la fiabilité et le contrôle électrostatique grâce à l'utilisation conjointe de caractérisations électriques et physicochimiques.

Degree: Docteur es, Nano electronique et nano technologies, 2018, Université Grenoble Alpes (ComUE)

Cette thèse concerne l’étude des procédés de fabrication des grilles HKMG des technologies FDSOI 14 et 28 nm sur les performances électriques des transistors MOS.… (more)

Subjects/Keywords: Fiabilité; Xps; Travail de sortie effectif; TiN grille metallique; Bandes d’énergie; High-K oxyde; Reliability; Xps; Effective workfunction; TiN metal gate; Band energy; High-K oxide; 620

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APA (6th Edition):

Kumar, P. (2018). Impact of 14/28nm FDSOI high-k metal gate stack processes on reliability and electrostatic control through combined electrical and physicochemical characterization techniques : Etude de l’Impact des procédés d’empilement de grille des technologies FDSOI 14/28nm sur la fiabilité et le contrôle électrostatique grâce à l'utilisation conjointe de caractérisations électriques et physicochimiques. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2018GREAT114

Chicago Manual of Style (16th Edition):

Kumar, Pushpendra. “Impact of 14/28nm FDSOI high-k metal gate stack processes on reliability and electrostatic control through combined electrical and physicochemical characterization techniques : Etude de l’Impact des procédés d’empilement de grille des technologies FDSOI 14/28nm sur la fiabilité et le contrôle électrostatique grâce à l'utilisation conjointe de caractérisations électriques et physicochimiques.” 2018. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed September 26, 2020. http://www.theses.fr/2018GREAT114.

MLA Handbook (7th Edition):

Kumar, Pushpendra. “Impact of 14/28nm FDSOI high-k metal gate stack processes on reliability and electrostatic control through combined electrical and physicochemical characterization techniques : Etude de l’Impact des procédés d’empilement de grille des technologies FDSOI 14/28nm sur la fiabilité et le contrôle électrostatique grâce à l'utilisation conjointe de caractérisations électriques et physicochimiques.” 2018. Web. 26 Sep 2020.

Vancouver:

Kumar P. Impact of 14/28nm FDSOI high-k metal gate stack processes on reliability and electrostatic control through combined electrical and physicochemical characterization techniques : Etude de l’Impact des procédés d’empilement de grille des technologies FDSOI 14/28nm sur la fiabilité et le contrôle électrostatique grâce à l'utilisation conjointe de caractérisations électriques et physicochimiques. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2018. [cited 2020 Sep 26]. Available from: http://www.theses.fr/2018GREAT114.

Council of Science Editors:

Kumar P. Impact of 14/28nm FDSOI high-k metal gate stack processes on reliability and electrostatic control through combined electrical and physicochemical characterization techniques : Etude de l’Impact des procédés d’empilement de grille des technologies FDSOI 14/28nm sur la fiabilité et le contrôle électrostatique grâce à l'utilisation conjointe de caractérisations électriques et physicochimiques. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2018. Available from: http://www.theses.fr/2018GREAT114


NSYSU

8. Huang, Ching-Che. Fabrication and characteristics of nonvolatile memory with CoSi2 nanocrystals embedded in high-k dielectrics structure.

Degree: Master, Electro-Optical Engineering, 2009, NSYSU

 Current requirements of nonvolatile memory (NVM) are the high density cells, low-power consumption, high-speed operation and good reliability for the scaling down devices. However, all… (more)

Subjects/Keywords: CoSi; high-k; tunnel oxide

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APA (6th Edition):

Huang, C. (2009). Fabrication and characteristics of nonvolatile memory with CoSi2 nanocrystals embedded in high-k dielectrics structure. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625109-151045

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Ching-Che. “Fabrication and characteristics of nonvolatile memory with CoSi2 nanocrystals embedded in high-k dielectrics structure.” 2009. Thesis, NSYSU. Accessed September 26, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625109-151045.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Ching-Che. “Fabrication and characteristics of nonvolatile memory with CoSi2 nanocrystals embedded in high-k dielectrics structure.” 2009. Web. 26 Sep 2020.

Vancouver:

Huang C. Fabrication and characteristics of nonvolatile memory with CoSi2 nanocrystals embedded in high-k dielectrics structure. [Internet] [Thesis]. NSYSU; 2009. [cited 2020 Sep 26]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625109-151045.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang C. Fabrication and characteristics of nonvolatile memory with CoSi2 nanocrystals embedded in high-k dielectrics structure. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625109-151045

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

9. Kuo, Yuan-Jui. Electrical Properties and Physical Mechanisms of Advanced MOSFETs.

Degree: PhD, Electro-Optical Engineering, 2010, NSYSU

 In this thesis, we investigate the electrical properties and reliability of novel metal-oxide-semiconductor field-effect transistors (MOSFETs) for 65 nm technology node and below. Roughly, we… (more)

Subjects/Keywords: MOSFETs; metal gate; strained silicon; high-k

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APA (6th Edition):

Kuo, Y. (2010). Electrical Properties and Physical Mechanisms of Advanced MOSFETs. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1220110-174355

Chicago Manual of Style (16th Edition):

Kuo, Yuan-Jui. “Electrical Properties and Physical Mechanisms of Advanced MOSFETs.” 2010. Doctoral Dissertation, NSYSU. Accessed September 26, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1220110-174355.

MLA Handbook (7th Edition):

Kuo, Yuan-Jui. “Electrical Properties and Physical Mechanisms of Advanced MOSFETs.” 2010. Web. 26 Sep 2020.

Vancouver:

Kuo Y. Electrical Properties and Physical Mechanisms of Advanced MOSFETs. [Internet] [Doctoral dissertation]. NSYSU; 2010. [cited 2020 Sep 26]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1220110-174355.

Council of Science Editors:

Kuo Y. Electrical Properties and Physical Mechanisms of Advanced MOSFETs. [Doctoral Dissertation]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1220110-174355


North Carolina State University

10. Lee, Sanghyun. Characterization of High-k gate dielectrics based on HfO2 and TiO2 for CMOS Application.

Degree: PhD, Electrical Engineering, 2007, North Carolina State University

Subjects/Keywords: HAFNIUM OXIDE; TITANIUM OXIDE; HAFNIUM SILICON OXYNITRIDE; CMOS; HIGH K; GATE DIELECTRICS

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APA (6th Edition):

Lee, S. (2007). Characterization of High-k gate dielectrics based on HfO2 and TiO2 for CMOS Application. (Doctoral Dissertation). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/5251

Chicago Manual of Style (16th Edition):

Lee, Sanghyun. “Characterization of High-k gate dielectrics based on HfO2 and TiO2 for CMOS Application.” 2007. Doctoral Dissertation, North Carolina State University. Accessed September 26, 2020. http://www.lib.ncsu.edu/resolver/1840.16/5251.

MLA Handbook (7th Edition):

Lee, Sanghyun. “Characterization of High-k gate dielectrics based on HfO2 and TiO2 for CMOS Application.” 2007. Web. 26 Sep 2020.

Vancouver:

Lee S. Characterization of High-k gate dielectrics based on HfO2 and TiO2 for CMOS Application. [Internet] [Doctoral dissertation]. North Carolina State University; 2007. [cited 2020 Sep 26]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/5251.

Council of Science Editors:

Lee S. Characterization of High-k gate dielectrics based on HfO2 and TiO2 for CMOS Application. [Doctoral Dissertation]. North Carolina State University; 2007. Available from: http://www.lib.ncsu.edu/resolver/1840.16/5251


Indian Institute of Science

11. Kumar, Arvind. Facile and Process Compatible Growth of High-k Gate Dielectric Materials (TiO2, ZrO2 and HfO2) on Si and the Investigation of these Oxides and their Interfaces by Deep Level Transient Spectroscopy.

Degree: PhD, Faculty of Science, 2018, Indian Institute of Science

 The continuous downscaling has enforced the device size and oxide thickness to few nanometers. After serving for several decades as an excellent gate oxide layer… (more)

Subjects/Keywords: Metal Oxide Semiconductors - Silicon Interfaces; Metal Oxide Semiconductors; Metal Oxide Semiconductors Deep Level Transient Spectroscopy; Integrated Circuit; Thermal Stability; Thermal Evaporation; High-κ Gate Dielectrics; High-κ TiO2 MOS Structures; High-κ Titania Thin Films; High-k ZrO2 Gate Dielectrics; Spin-coated HfO2 Thin Films; High-κ TiO2 Thin Films; High-κ ZrO2/Si MOS Structure; Sol-gel Spin-coating Method; Physics

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APA (6th Edition):

Kumar, A. (2018). Facile and Process Compatible Growth of High-k Gate Dielectric Materials (TiO2, ZrO2 and HfO2) on Si and the Investigation of these Oxides and their Interfaces by Deep Level Transient Spectroscopy. (Doctoral Dissertation). Indian Institute of Science. Retrieved from http://etd.iisc.ac.in/handle/2005/3820

Chicago Manual of Style (16th Edition):

Kumar, Arvind. “Facile and Process Compatible Growth of High-k Gate Dielectric Materials (TiO2, ZrO2 and HfO2) on Si and the Investigation of these Oxides and their Interfaces by Deep Level Transient Spectroscopy.” 2018. Doctoral Dissertation, Indian Institute of Science. Accessed September 26, 2020. http://etd.iisc.ac.in/handle/2005/3820.

MLA Handbook (7th Edition):

Kumar, Arvind. “Facile and Process Compatible Growth of High-k Gate Dielectric Materials (TiO2, ZrO2 and HfO2) on Si and the Investigation of these Oxides and their Interfaces by Deep Level Transient Spectroscopy.” 2018. Web. 26 Sep 2020.

Vancouver:

Kumar A. Facile and Process Compatible Growth of High-k Gate Dielectric Materials (TiO2, ZrO2 and HfO2) on Si and the Investigation of these Oxides and their Interfaces by Deep Level Transient Spectroscopy. [Internet] [Doctoral dissertation]. Indian Institute of Science; 2018. [cited 2020 Sep 26]. Available from: http://etd.iisc.ac.in/handle/2005/3820.

Council of Science Editors:

Kumar A. Facile and Process Compatible Growth of High-k Gate Dielectric Materials (TiO2, ZrO2 and HfO2) on Si and the Investigation of these Oxides and their Interfaces by Deep Level Transient Spectroscopy. [Doctoral Dissertation]. Indian Institute of Science; 2018. Available from: http://etd.iisc.ac.in/handle/2005/3820


Texas A&M University

12. Lu, Jiang. Hafnium-doped tantalum oxide high-k gate dielectric films for future CMOS technology.

Degree: PhD, Chemical Engineering, 2007, Texas A&M University

 A novel high-k gate dielectric material, i.e., hafnium-doped tantalum oxide (Hf-doped TaOx), has been studied for the application of the future generation metal-oxidesemiconductor field effect… (more)

Subjects/Keywords: high-k; gate dielectric; metal gate electrode; Tantalum Oxide; Hafnium Oxide; Doped Oxide; Sputtering Deposition

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APA (6th Edition):

Lu, J. (2007). Hafnium-doped tantalum oxide high-k gate dielectric films for future CMOS technology. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/4714

Chicago Manual of Style (16th Edition):

Lu, Jiang. “Hafnium-doped tantalum oxide high-k gate dielectric films for future CMOS technology.” 2007. Doctoral Dissertation, Texas A&M University. Accessed September 26, 2020. http://hdl.handle.net/1969.1/4714.

MLA Handbook (7th Edition):

Lu, Jiang. “Hafnium-doped tantalum oxide high-k gate dielectric films for future CMOS technology.” 2007. Web. 26 Sep 2020.

Vancouver:

Lu J. Hafnium-doped tantalum oxide high-k gate dielectric films for future CMOS technology. [Internet] [Doctoral dissertation]. Texas A&M University; 2007. [cited 2020 Sep 26]. Available from: http://hdl.handle.net/1969.1/4714.

Council of Science Editors:

Lu J. Hafnium-doped tantalum oxide high-k gate dielectric films for future CMOS technology. [Doctoral Dissertation]. Texas A&M University; 2007. Available from: http://hdl.handle.net/1969.1/4714


North Carolina State University

13. Niu, Dong. Interface reactions during processing of chemical vapor deposited yttrium oxide high-k dielectrics.

Degree: PhD, Chemical Engineering, 2002, North Carolina State University

High dielectric constant (high-k) insulators are important for advanced MOS devices to limit gate leakage and increase gate capacitance. Reactions between high-k's and the substrate… (more)

Subjects/Keywords: Interface reaction mechanisms; High-k gate dielectrics; CVD; Yttrium Oxide

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APA (6th Edition):

Niu, D. (2002). Interface reactions during processing of chemical vapor deposited yttrium oxide high-k dielectrics. (Doctoral Dissertation). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/5797

Chicago Manual of Style (16th Edition):

Niu, Dong. “Interface reactions during processing of chemical vapor deposited yttrium oxide high-k dielectrics.” 2002. Doctoral Dissertation, North Carolina State University. Accessed September 26, 2020. http://www.lib.ncsu.edu/resolver/1840.16/5797.

MLA Handbook (7th Edition):

Niu, Dong. “Interface reactions during processing of chemical vapor deposited yttrium oxide high-k dielectrics.” 2002. Web. 26 Sep 2020.

Vancouver:

Niu D. Interface reactions during processing of chemical vapor deposited yttrium oxide high-k dielectrics. [Internet] [Doctoral dissertation]. North Carolina State University; 2002. [cited 2020 Sep 26]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/5797.

Council of Science Editors:

Niu D. Interface reactions during processing of chemical vapor deposited yttrium oxide high-k dielectrics. [Doctoral Dissertation]. North Carolina State University; 2002. Available from: http://www.lib.ncsu.edu/resolver/1840.16/5797


University of Notre Dame

14. Dana Charles Wheeler. High-k-InAs metal-oxide-semiconductor capacitors formed by atomic-layer deposition</h1>.

Degree: Electrical Engineering, 2009, University of Notre Dame

  Atomic-layer deposition is used to grow HfO(2) and Al(2)O(3) thin films on InAs substrates to form high-k-InAs metal-oxide-semiconductor capacitors. Devices are formed using various… (more)

Subjects/Keywords: III-V metal-oxide-semiconductor; atomic-layer deposition; high-k gate dielectrics

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APA (6th Edition):

Wheeler, D. C. (2009). High-k-InAs metal-oxide-semiconductor capacitors formed by atomic-layer deposition</h1>. (Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/pz50gt56z5s

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wheeler, Dana Charles. “High-k-InAs metal-oxide-semiconductor capacitors formed by atomic-layer deposition</h1>.” 2009. Thesis, University of Notre Dame. Accessed September 26, 2020. https://curate.nd.edu/show/pz50gt56z5s.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wheeler, Dana Charles. “High-k-InAs metal-oxide-semiconductor capacitors formed by atomic-layer deposition</h1>.” 2009. Web. 26 Sep 2020.

Vancouver:

Wheeler DC. High-k-InAs metal-oxide-semiconductor capacitors formed by atomic-layer deposition</h1>. [Internet] [Thesis]. University of Notre Dame; 2009. [cited 2020 Sep 26]. Available from: https://curate.nd.edu/show/pz50gt56z5s.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wheeler DC. High-k-InAs metal-oxide-semiconductor capacitors formed by atomic-layer deposition</h1>. [Thesis]. University of Notre Dame; 2009. Available from: https://curate.nd.edu/show/pz50gt56z5s

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

15. LOH WEI YIP. Reliability modeling of ultra-thin gate oxide and high-k dielectrics for nano-scale CMOS devices.

Degree: 2005, National University of Singapore

Subjects/Keywords: Quasi-breakdown; oxide degradation; gate leakage current; ultra-thin gate oxide; dielectric reliability; high-K dielectrics

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APA (6th Edition):

YIP, L. W. (2005). Reliability modeling of ultra-thin gate oxide and high-k dielectrics for nano-scale CMOS devices. (Thesis). National University of Singapore. Retrieved from http://scholarbank.nus.edu.sg/handle/10635/14505

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

YIP, LOH WEI. “Reliability modeling of ultra-thin gate oxide and high-k dielectrics for nano-scale CMOS devices.” 2005. Thesis, National University of Singapore. Accessed September 26, 2020. http://scholarbank.nus.edu.sg/handle/10635/14505.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

YIP, LOH WEI. “Reliability modeling of ultra-thin gate oxide and high-k dielectrics for nano-scale CMOS devices.” 2005. Web. 26 Sep 2020.

Vancouver:

YIP LW. Reliability modeling of ultra-thin gate oxide and high-k dielectrics for nano-scale CMOS devices. [Internet] [Thesis]. National University of Singapore; 2005. [cited 2020 Sep 26]. Available from: http://scholarbank.nus.edu.sg/handle/10635/14505.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

YIP LW. Reliability modeling of ultra-thin gate oxide and high-k dielectrics for nano-scale CMOS devices. [Thesis]. National University of Singapore; 2005. Available from: http://scholarbank.nus.edu.sg/handle/10635/14505

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

16. Fontaine, Charly. Analyse par XPS d'empilements High-K Metal Gate de transistors CMOS et corrélation des décalages d'énergie de liaison aux tensions de seuil : XPs analysis of High K Metal Gate transistors and relationship between binding energy shift and threshold voltage.

Degree: Docteur es, Nano electronique et nano technologies, 2019, Université Grenoble Alpes (ComUE)

Les dernières technologies microélectroniques embarquent des transistors dont les isolants de grille sont des isolants à forte constante diélectrique (high-k en anglais) associés à des… (more)

Subjects/Keywords: Xps; Tension de seuil; High K metal gate; Xps; Threshold voltage; High K metal gate; 540; 620

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APA (6th Edition):

Fontaine, C. (2019). Analyse par XPS d'empilements High-K Metal Gate de transistors CMOS et corrélation des décalages d'énergie de liaison aux tensions de seuil : XPs analysis of High K Metal Gate transistors and relationship between binding energy shift and threshold voltage. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2019GREAT011

Chicago Manual of Style (16th Edition):

Fontaine, Charly. “Analyse par XPS d'empilements High-K Metal Gate de transistors CMOS et corrélation des décalages d'énergie de liaison aux tensions de seuil : XPs analysis of High K Metal Gate transistors and relationship between binding energy shift and threshold voltage.” 2019. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed September 26, 2020. http://www.theses.fr/2019GREAT011.

MLA Handbook (7th Edition):

Fontaine, Charly. “Analyse par XPS d'empilements High-K Metal Gate de transistors CMOS et corrélation des décalages d'énergie de liaison aux tensions de seuil : XPs analysis of High K Metal Gate transistors and relationship between binding energy shift and threshold voltage.” 2019. Web. 26 Sep 2020.

Vancouver:

Fontaine C. Analyse par XPS d'empilements High-K Metal Gate de transistors CMOS et corrélation des décalages d'énergie de liaison aux tensions de seuil : XPs analysis of High K Metal Gate transistors and relationship between binding energy shift and threshold voltage. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2019. [cited 2020 Sep 26]. Available from: http://www.theses.fr/2019GREAT011.

Council of Science Editors:

Fontaine C. Analyse par XPS d'empilements High-K Metal Gate de transistors CMOS et corrélation des décalages d'énergie de liaison aux tensions de seuil : XPs analysis of High K Metal Gate transistors and relationship between binding energy shift and threshold voltage. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2019. Available from: http://www.theses.fr/2019GREAT011


North Carolina State University

17. Lee, Bongmook. A Study of Group III Elements (La, Gd, Eu, and Al) Incorporation on Metal Gate / High–k Stacks for Advanced CMOS Applications.

Degree: PhD, Electrical Engineering, 2010, North Carolina State University

 The goal of this research is to evaluate the effect of group III elements incorporation into advanced metal gate / high–k dielectric stacks to achieve… (more)

Subjects/Keywords: gate stack; reliability; advanced CMOS; high-k; metal gate; Vt tuning; work function

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APA (6th Edition):

Lee, B. (2010). A Study of Group III Elements (La, Gd, Eu, and Al) Incorporation on Metal Gate / High–k Stacks for Advanced CMOS Applications. (Doctoral Dissertation). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/6186

Chicago Manual of Style (16th Edition):

Lee, Bongmook. “A Study of Group III Elements (La, Gd, Eu, and Al) Incorporation on Metal Gate / High–k Stacks for Advanced CMOS Applications.” 2010. Doctoral Dissertation, North Carolina State University. Accessed September 26, 2020. http://www.lib.ncsu.edu/resolver/1840.16/6186.

MLA Handbook (7th Edition):

Lee, Bongmook. “A Study of Group III Elements (La, Gd, Eu, and Al) Incorporation on Metal Gate / High–k Stacks for Advanced CMOS Applications.” 2010. Web. 26 Sep 2020.

Vancouver:

Lee B. A Study of Group III Elements (La, Gd, Eu, and Al) Incorporation on Metal Gate / High–k Stacks for Advanced CMOS Applications. [Internet] [Doctoral dissertation]. North Carolina State University; 2010. [cited 2020 Sep 26]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/6186.

Council of Science Editors:

Lee B. A Study of Group III Elements (La, Gd, Eu, and Al) Incorporation on Metal Gate / High–k Stacks for Advanced CMOS Applications. [Doctoral Dissertation]. North Carolina State University; 2010. Available from: http://www.lib.ncsu.edu/resolver/1840.16/6186


Vanderbilt University

18. Dasgupta, Aritra. Radiation Response in MOS Devices with High-K Gate Oxides and Metal Gates.

Degree: PhD, Electrical Engineering, 2011, Vanderbilt University

 The effects of low and medium energy x-rays on MOS capacitors with SiO2 or HfO2 gate dielectrics and Al and TaSi gate metallization have been… (more)

Subjects/Keywords: gate dielectrics; dose; metal gates; BEOL; high-k; MOS

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APA (6th Edition):

Dasgupta, A. (2011). Radiation Response in MOS Devices with High-K Gate Oxides and Metal Gates. (Doctoral Dissertation). Vanderbilt University. Retrieved from http://hdl.handle.net/1803/13937

Chicago Manual of Style (16th Edition):

Dasgupta, Aritra. “Radiation Response in MOS Devices with High-K Gate Oxides and Metal Gates.” 2011. Doctoral Dissertation, Vanderbilt University. Accessed September 26, 2020. http://hdl.handle.net/1803/13937.

MLA Handbook (7th Edition):

Dasgupta, Aritra. “Radiation Response in MOS Devices with High-K Gate Oxides and Metal Gates.” 2011. Web. 26 Sep 2020.

Vancouver:

Dasgupta A. Radiation Response in MOS Devices with High-K Gate Oxides and Metal Gates. [Internet] [Doctoral dissertation]. Vanderbilt University; 2011. [cited 2020 Sep 26]. Available from: http://hdl.handle.net/1803/13937.

Council of Science Editors:

Dasgupta A. Radiation Response in MOS Devices with High-K Gate Oxides and Metal Gates. [Doctoral Dissertation]. Vanderbilt University; 2011. Available from: http://hdl.handle.net/1803/13937


Anna University

19. Nirmal, D. Nanoscale double gate mosfets for subthreshold low power applications using high k dielectrics; -.

Degree: Information and Communication Engineering, 2014, Anna University

Recent oriented towards reducing the power and increasing the gain of single chip systems newlineWhile focusing the attention on low power and gain in the… (more)

Subjects/Keywords: high k dielectrics; information and communication engineering; Nanoscale double gate

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APA (6th Edition):

Nirmal, D. (2014). Nanoscale double gate mosfets for subthreshold low power applications using high k dielectrics; -. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/24802

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Nirmal, D. “Nanoscale double gate mosfets for subthreshold low power applications using high k dielectrics; -.” 2014. Thesis, Anna University. Accessed September 26, 2020. http://shodhganga.inflibnet.ac.in/handle/10603/24802.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Nirmal, D. “Nanoscale double gate mosfets for subthreshold low power applications using high k dielectrics; -.” 2014. Web. 26 Sep 2020.

Vancouver:

Nirmal D. Nanoscale double gate mosfets for subthreshold low power applications using high k dielectrics; -. [Internet] [Thesis]. Anna University; 2014. [cited 2020 Sep 26]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/24802.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Nirmal D. Nanoscale double gate mosfets for subthreshold low power applications using high k dielectrics; -. [Thesis]. Anna University; 2014. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/24802

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


North Carolina State University

20. Choung, Jiyoung. Photoemission Spectroscopic Studies of Metal-Gated MOS structures based on ultra-thin High-k Dielectrics.

Degree: PhD, Electrical Engineering, 2009, North Carolina State University

 The band structure and interface properties of high-κ MOS gate stack structures have been studied using a combination of x-ray and ultraviolet photoemission spectroscopy to… (more)

Subjects/Keywords: UPS; XPS; work function; metal gate; TiN; Ru; high-k

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APA (6th Edition):

Choung, J. (2009). Photoemission Spectroscopic Studies of Metal-Gated MOS structures based on ultra-thin High-k Dielectrics. (Doctoral Dissertation). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/5900

Chicago Manual of Style (16th Edition):

Choung, Jiyoung. “Photoemission Spectroscopic Studies of Metal-Gated MOS structures based on ultra-thin High-k Dielectrics.” 2009. Doctoral Dissertation, North Carolina State University. Accessed September 26, 2020. http://www.lib.ncsu.edu/resolver/1840.16/5900.

MLA Handbook (7th Edition):

Choung, Jiyoung. “Photoemission Spectroscopic Studies of Metal-Gated MOS structures based on ultra-thin High-k Dielectrics.” 2009. Web. 26 Sep 2020.

Vancouver:

Choung J. Photoemission Spectroscopic Studies of Metal-Gated MOS structures based on ultra-thin High-k Dielectrics. [Internet] [Doctoral dissertation]. North Carolina State University; 2009. [cited 2020 Sep 26]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/5900.

Council of Science Editors:

Choung J. Photoemission Spectroscopic Studies of Metal-Gated MOS structures based on ultra-thin High-k Dielectrics. [Doctoral Dissertation]. North Carolina State University; 2009. Available from: http://www.lib.ncsu.edu/resolver/1840.16/5900


Université de Grenoble

21. Baudot, Sylvain. Elaboration et caractérisation des grilles métalliques pour les technologiesCMOS 32 / 28 nm à base de diélectrique haute permittivité : Metal gate manufacturing and characterization for high-k based 32/28nm CMOS technologies.

Degree: Docteur es, Nano électronique et nano technologies, 2012, Université de Grenoble

Cette thèse porte sur l'élaboration et la caractérisation des grilles métalliques en TiN, aluminium et lanthane pour les technologies CMOS gate-first à base d'oxyde high-k(more)

Subjects/Keywords: CMOS; Grille métallique; Diélectrique high-k; TiN; Lanthane; Aluminium; CMOS; Metal gate; High-k dielectric; TiN; Lanthanum; Aluminum; 620

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APA (6th Edition):

Baudot, S. (2012). Elaboration et caractérisation des grilles métalliques pour les technologiesCMOS 32 / 28 nm à base de diélectrique haute permittivité : Metal gate manufacturing and characterization for high-k based 32/28nm CMOS technologies. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2012GRENT122

Chicago Manual of Style (16th Edition):

Baudot, Sylvain. “Elaboration et caractérisation des grilles métalliques pour les technologiesCMOS 32 / 28 nm à base de diélectrique haute permittivité : Metal gate manufacturing and characterization for high-k based 32/28nm CMOS technologies.” 2012. Doctoral Dissertation, Université de Grenoble. Accessed September 26, 2020. http://www.theses.fr/2012GRENT122.

MLA Handbook (7th Edition):

Baudot, Sylvain. “Elaboration et caractérisation des grilles métalliques pour les technologiesCMOS 32 / 28 nm à base de diélectrique haute permittivité : Metal gate manufacturing and characterization for high-k based 32/28nm CMOS technologies.” 2012. Web. 26 Sep 2020.

Vancouver:

Baudot S. Elaboration et caractérisation des grilles métalliques pour les technologiesCMOS 32 / 28 nm à base de diélectrique haute permittivité : Metal gate manufacturing and characterization for high-k based 32/28nm CMOS technologies. [Internet] [Doctoral dissertation]. Université de Grenoble; 2012. [cited 2020 Sep 26]. Available from: http://www.theses.fr/2012GRENT122.

Council of Science Editors:

Baudot S. Elaboration et caractérisation des grilles métalliques pour les technologiesCMOS 32 / 28 nm à base de diélectrique haute permittivité : Metal gate manufacturing and characterization for high-k based 32/28nm CMOS technologies. [Doctoral Dissertation]. Université de Grenoble; 2012. Available from: http://www.theses.fr/2012GRENT122


NSYSU

22. Lo, Wen-Hung. Physical Mechanism of Reliability Analysis on SOI and High-k/Metal Gate MOSFETs.

Degree: PhD, Physics, 2013, NSYSU

 This dissertation studies physical mechanisms and reliability analysis on Silicon-on-Insulator (SOI) and high-K/metal gate MOSFETs. For the part of bias temperature instability (BTI), we investigate… (more)

Subjects/Keywords: MOSFETs; Silicon-on-Insulator; high-K/metal gate; bias temperature instability; hot carrier stress

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APA (6th Edition):

Lo, W. (2013). Physical Mechanism of Reliability Analysis on SOI and High-k/Metal Gate MOSFETs. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623113-230228

Chicago Manual of Style (16th Edition):

Lo, Wen-Hung. “Physical Mechanism of Reliability Analysis on SOI and High-k/Metal Gate MOSFETs.” 2013. Doctoral Dissertation, NSYSU. Accessed September 26, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623113-230228.

MLA Handbook (7th Edition):

Lo, Wen-Hung. “Physical Mechanism of Reliability Analysis on SOI and High-k/Metal Gate MOSFETs.” 2013. Web. 26 Sep 2020.

Vancouver:

Lo W. Physical Mechanism of Reliability Analysis on SOI and High-k/Metal Gate MOSFETs. [Internet] [Doctoral dissertation]. NSYSU; 2013. [cited 2020 Sep 26]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623113-230228.

Council of Science Editors:

Lo W. Physical Mechanism of Reliability Analysis on SOI and High-k/Metal Gate MOSFETs. [Doctoral Dissertation]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623113-230228


NSYSU

23. Ji, Jing. Impacts of Oxygen Plasma Surface Treatment on Performance and Reliability of N-type Poly-Si Thin-Film Transistors With TiN/HfO2 Gate Stack.

Degree: Master, Electrical Engineering, 2016, NSYSU

 The application of polysilicon thin-film transistors in active matrix liquid crystal displays has been the main driver of the development of polysilicon thin-film transistors technology.… (more)

Subjects/Keywords: O2 plasma surface treatment; poly-Si TFTs; high-k gate dielectric; short channel effect; reliability

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APA (6th Edition):

Ji, J. (2016). Impacts of Oxygen Plasma Surface Treatment on Performance and Reliability of N-type Poly-Si Thin-Film Transistors With TiN/HfO2 Gate Stack. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0708116-115616

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ji, Jing. “Impacts of Oxygen Plasma Surface Treatment on Performance and Reliability of N-type Poly-Si Thin-Film Transistors With TiN/HfO2 Gate Stack.” 2016. Thesis, NSYSU. Accessed September 26, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0708116-115616.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ji, Jing. “Impacts of Oxygen Plasma Surface Treatment on Performance and Reliability of N-type Poly-Si Thin-Film Transistors With TiN/HfO2 Gate Stack.” 2016. Web. 26 Sep 2020.

Vancouver:

Ji J. Impacts of Oxygen Plasma Surface Treatment on Performance and Reliability of N-type Poly-Si Thin-Film Transistors With TiN/HfO2 Gate Stack. [Internet] [Thesis]. NSYSU; 2016. [cited 2020 Sep 26]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0708116-115616.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ji J. Impacts of Oxygen Plasma Surface Treatment on Performance and Reliability of N-type Poly-Si Thin-Film Transistors With TiN/HfO2 Gate Stack. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0708116-115616

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

24. Tsai, Jyun-Yu. The evolutional mechanisms of hot carrier degradation in advanced high-k/metal gate MOSFETs.

Degree: PhD, Physics, 2015, NSYSU

 To achieve high speed, the continuous scaling down of metal oxide semiconductor field electrical field transistors is driving conventional SiO2-based dielectric to be only a… (more)

Subjects/Keywords: electron-electron scattering; high-K/metal gate; short channel effect; hot carrier degradation; MOSFETs

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APA (6th Edition):

Tsai, J. (2015). The evolutional mechanisms of hot carrier degradation in advanced high-k/metal gate MOSFETs. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615115-172714

Chicago Manual of Style (16th Edition):

Tsai, Jyun-Yu. “The evolutional mechanisms of hot carrier degradation in advanced high-k/metal gate MOSFETs.” 2015. Doctoral Dissertation, NSYSU. Accessed September 26, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615115-172714.

MLA Handbook (7th Edition):

Tsai, Jyun-Yu. “The evolutional mechanisms of hot carrier degradation in advanced high-k/metal gate MOSFETs.” 2015. Web. 26 Sep 2020.

Vancouver:

Tsai J. The evolutional mechanisms of hot carrier degradation in advanced high-k/metal gate MOSFETs. [Internet] [Doctoral dissertation]. NSYSU; 2015. [cited 2020 Sep 26]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615115-172714.

Council of Science Editors:

Tsai J. The evolutional mechanisms of hot carrier degradation in advanced high-k/metal gate MOSFETs. [Doctoral Dissertation]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615115-172714


New Jersey Institute of Technology

25. Rahim, Nilufa. TiN/HfO2/SiO2/Si gate stacks reliability : Contribution of HfO2 and interfacial SiO2 layer.

Degree: PhD, Electrical and Computer Engineering, 2011, New Jersey Institute of Technology

  Hafnium Oxide based gate stacks are considered to be the potential candidates to replace SiO2 in complementary metal-oxide-semiconductor (CMOS), as they reduce the gate(more)

Subjects/Keywords: CMOS; Reliability; High-k gate stack; CVS; HfO2; VRS; Electrical and Electronics

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APA (6th Edition):

Rahim, N. (2011). TiN/HfO2/SiO2/Si gate stacks reliability : Contribution of HfO2 and interfacial SiO2 layer. (Doctoral Dissertation). New Jersey Institute of Technology. Retrieved from https://digitalcommons.njit.edu/dissertations/242

Chicago Manual of Style (16th Edition):

Rahim, Nilufa. “TiN/HfO2/SiO2/Si gate stacks reliability : Contribution of HfO2 and interfacial SiO2 layer.” 2011. Doctoral Dissertation, New Jersey Institute of Technology. Accessed September 26, 2020. https://digitalcommons.njit.edu/dissertations/242.

MLA Handbook (7th Edition):

Rahim, Nilufa. “TiN/HfO2/SiO2/Si gate stacks reliability : Contribution of HfO2 and interfacial SiO2 layer.” 2011. Web. 26 Sep 2020.

Vancouver:

Rahim N. TiN/HfO2/SiO2/Si gate stacks reliability : Contribution of HfO2 and interfacial SiO2 layer. [Internet] [Doctoral dissertation]. New Jersey Institute of Technology; 2011. [cited 2020 Sep 26]. Available from: https://digitalcommons.njit.edu/dissertations/242.

Council of Science Editors:

Rahim N. TiN/HfO2/SiO2/Si gate stacks reliability : Contribution of HfO2 and interfacial SiO2 layer. [Doctoral Dissertation]. New Jersey Institute of Technology; 2011. Available from: https://digitalcommons.njit.edu/dissertations/242


Tokyo Institute of Technology / 東京工業大学

26. DOU, CHUN MENG. A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究.

Degree: 博士(工学), 2014, Tokyo Institute of Technology / 東京工業大学

Subjects/Keywords: Interface traps; oxide border traps; MOS; multi-gate structure; high-k/III-V; AlGaN/GaN HEMT

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APA (6th Edition):

DOU, C. M. (2014). A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究. (Thesis). Tokyo Institute of Technology / 東京工業大学. Retrieved from http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100667421

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

DOU, CHUN MENG. “A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究.” 2014. Thesis, Tokyo Institute of Technology / 東京工業大学. Accessed September 26, 2020. http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100667421.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

DOU, CHUN MENG. “A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究.” 2014. Web. 26 Sep 2020.

Vancouver:

DOU CM. A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究. [Internet] [Thesis]. Tokyo Institute of Technology / 東京工業大学; 2014. [cited 2020 Sep 26]. Available from: http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100667421.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

DOU CM. A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction : A study on interface traps and near interfacial bulk traps at the interfaces of dielectric/semiconductor and semiconductor heterojunction; 誘電体/半導体と半導体ヘテロ接合界面における界面トラップおよび界面近傍のバルクトラップに関する研究. [Thesis]. Tokyo Institute of Technology / 東京工業大学; 2014. Available from: http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100667421

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

27. Woods, Keenan. Amorphous Metal Oxide Thin Films from Aqueous Precursors: New Routes to High-κ Dielectrics, Impact of Annealing Atmosphere Humidity, and Elucidation of Non-uniform Composition Profiles.

Degree: PhD, Department of Chemistry and Biochemistry, 2018, University of Oregon

 Metal oxide thin films serve as critical components in many modern technologies, including microelectronic devices. Industrial state-of-the-art production utilizes vapor-phase techniques to make high-quality (dense,… (more)

Subjects/Keywords: Aqueous solution deposition; High-k dielectric; Lanthanum zirconium oxide; Metal oxide; Spin-coating; Thin films

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APA (6th Edition):

Woods, K. (2018). Amorphous Metal Oxide Thin Films from Aqueous Precursors: New Routes to High-κ Dielectrics, Impact of Annealing Atmosphere Humidity, and Elucidation of Non-uniform Composition Profiles. (Doctoral Dissertation). University of Oregon. Retrieved from http://hdl.handle.net/1794/23173

Chicago Manual of Style (16th Edition):

Woods, Keenan. “Amorphous Metal Oxide Thin Films from Aqueous Precursors: New Routes to High-κ Dielectrics, Impact of Annealing Atmosphere Humidity, and Elucidation of Non-uniform Composition Profiles.” 2018. Doctoral Dissertation, University of Oregon. Accessed September 26, 2020. http://hdl.handle.net/1794/23173.

MLA Handbook (7th Edition):

Woods, Keenan. “Amorphous Metal Oxide Thin Films from Aqueous Precursors: New Routes to High-κ Dielectrics, Impact of Annealing Atmosphere Humidity, and Elucidation of Non-uniform Composition Profiles.” 2018. Web. 26 Sep 2020.

Vancouver:

Woods K. Amorphous Metal Oxide Thin Films from Aqueous Precursors: New Routes to High-κ Dielectrics, Impact of Annealing Atmosphere Humidity, and Elucidation of Non-uniform Composition Profiles. [Internet] [Doctoral dissertation]. University of Oregon; 2018. [cited 2020 Sep 26]. Available from: http://hdl.handle.net/1794/23173.

Council of Science Editors:

Woods K. Amorphous Metal Oxide Thin Films from Aqueous Precursors: New Routes to High-κ Dielectrics, Impact of Annealing Atmosphere Humidity, and Elucidation of Non-uniform Composition Profiles. [Doctoral Dissertation]. University of Oregon; 2018. Available from: http://hdl.handle.net/1794/23173

28. Niinistö, Jaakko. Atomic Layer Deposition of High-k Dielectrics from Novel Cyclopentadienyl-Type Precursors.

Degree: 2006, Helsinki University of Technology

The atomic layer deposition (ALD) method was applied for fabricating high permittivity (high-k) dielectrics, viz. HfO2, ZrO2 and rare earth oxides, which can be used… (more)

Subjects/Keywords: atomic layer deposition; ALD; high-k dielectrics; oxide thin films; cyclopentadienyl

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APA (6th Edition):

Niinistö, J. (2006). Atomic Layer Deposition of High-k Dielectrics from Novel Cyclopentadienyl-Type Precursors. (Thesis). Helsinki University of Technology. Retrieved from http://lib.tkk.fi/Diss/2006/isbn9512281708/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Niinistö, Jaakko. “Atomic Layer Deposition of High-k Dielectrics from Novel Cyclopentadienyl-Type Precursors.” 2006. Thesis, Helsinki University of Technology. Accessed September 26, 2020. http://lib.tkk.fi/Diss/2006/isbn9512281708/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Niinistö, Jaakko. “Atomic Layer Deposition of High-k Dielectrics from Novel Cyclopentadienyl-Type Precursors.” 2006. Web. 26 Sep 2020.

Vancouver:

Niinistö J. Atomic Layer Deposition of High-k Dielectrics from Novel Cyclopentadienyl-Type Precursors. [Internet] [Thesis]. Helsinki University of Technology; 2006. [cited 2020 Sep 26]. Available from: http://lib.tkk.fi/Diss/2006/isbn9512281708/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Niinistö J. Atomic Layer Deposition of High-k Dielectrics from Novel Cyclopentadienyl-Type Precursors. [Thesis]. Helsinki University of Technology; 2006. Available from: http://lib.tkk.fi/Diss/2006/isbn9512281708/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


North Carolina State University

29. Fulton, Charles Clifton. Spectroscopic Study of the Interface Chemical and Electronic Properties of High-kappa Gate Stacks.

Degree: PhD, Materials Science and Engineering, 2005, North Carolina State University

 X-ray and ultraviolet photoemission spectroscopy has been combined with in-situ deposition to study the interface chemistry and electronic structure of potential highgate stack materials.… (more)

Subjects/Keywords: dielectric; gate stack; high-kappa; high-k; photoemission

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APA (6th Edition):

Fulton, C. C. (2005). Spectroscopic Study of the Interface Chemical and Electronic Properties of High-kappa Gate Stacks. (Doctoral Dissertation). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/3147

Chicago Manual of Style (16th Edition):

Fulton, Charles Clifton. “Spectroscopic Study of the Interface Chemical and Electronic Properties of High-kappa Gate Stacks.” 2005. Doctoral Dissertation, North Carolina State University. Accessed September 26, 2020. http://www.lib.ncsu.edu/resolver/1840.16/3147.

MLA Handbook (7th Edition):

Fulton, Charles Clifton. “Spectroscopic Study of the Interface Chemical and Electronic Properties of High-kappa Gate Stacks.” 2005. Web. 26 Sep 2020.

Vancouver:

Fulton CC. Spectroscopic Study of the Interface Chemical and Electronic Properties of High-kappa Gate Stacks. [Internet] [Doctoral dissertation]. North Carolina State University; 2005. [cited 2020 Sep 26]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/3147.

Council of Science Editors:

Fulton CC. Spectroscopic Study of the Interface Chemical and Electronic Properties of High-kappa Gate Stacks. [Doctoral Dissertation]. North Carolina State University; 2005. Available from: http://www.lib.ncsu.edu/resolver/1840.16/3147


Kyoto University

30. Zhao, Ming. Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy .

Degree: 2008, Kyoto University

 This thesis is on the study of the characterization of interfaces and surfaces of high-k stacks for the future microelectronics. The changes of the high-k(more)

Subjects/Keywords: high-k gate stacks; high-resolution RBS

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APA (6th Edition):

Zhao, M. (2008). Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy . (Thesis). Kyoto University. Retrieved from http://hdl.handle.net/2433/57263

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhao, Ming. “Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy .” 2008. Thesis, Kyoto University. Accessed September 26, 2020. http://hdl.handle.net/2433/57263.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhao, Ming. “Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy .” 2008. Web. 26 Sep 2020.

Vancouver:

Zhao M. Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy . [Internet] [Thesis]. Kyoto University; 2008. [cited 2020 Sep 26]. Available from: http://hdl.handle.net/2433/57263.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhao M. Studies on High-k Gate Stacks by High-resolution Rutherford Backscattering Spectroscopy . [Thesis]. Kyoto University; 2008. Available from: http://hdl.handle.net/2433/57263

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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