Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for subject:(GPU parallel 2 Opt). Showing records 1 – 30 of 18245 total matches.

[1] [2] [3] [4] [5] … [609]

Search Limiters

Last 2 Years | English Only

Languages

Country

▼ Search Limiters

1. Qiao, Wenbao. GPU component-based neighborhood search for Euclidean graph minimization problems : Méthodes GPU de recherche par voisinage pour les problèmes de minimisation de graphes Euclidiens.

Degree: Docteur es, Informatique, 2018, Bourgogne Franche-Comté

Dans cette thèse, nous proposons des solutions parrallèles basées sur le systèmes actuel GPU (graphics processing unit) pour deux problèmes de minimisation de graphe Euclidien,… (more)

Subjects/Keywords: Recherche en spirale Bentley; Gpu; Problème du voyageur de commerce; Massifs 2-/3-Opt mouvements; Recherche K-D; Parallèles 2-Opt; Bentley sprial search; Gpu; GPU parallel 2-Opt; Multiple 2-Opt moves; Euclidean minimum spanning tree; K-D search; 006

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Qiao, W. (2018). GPU component-based neighborhood search for Euclidean graph minimization problems : Méthodes GPU de recherche par voisinage pour les problèmes de minimisation de graphes Euclidiens. (Doctoral Dissertation). Bourgogne Franche-Comté. Retrieved from http://www.theses.fr/2018UBFCA020

Chicago Manual of Style (16th Edition):

Qiao, Wenbao. “GPU component-based neighborhood search for Euclidean graph minimization problems : Méthodes GPU de recherche par voisinage pour les problèmes de minimisation de graphes Euclidiens.” 2018. Doctoral Dissertation, Bourgogne Franche-Comté. Accessed April 01, 2020. http://www.theses.fr/2018UBFCA020.

MLA Handbook (7th Edition):

Qiao, Wenbao. “GPU component-based neighborhood search for Euclidean graph minimization problems : Méthodes GPU de recherche par voisinage pour les problèmes de minimisation de graphes Euclidiens.” 2018. Web. 01 Apr 2020.

Vancouver:

Qiao W. GPU component-based neighborhood search for Euclidean graph minimization problems : Méthodes GPU de recherche par voisinage pour les problèmes de minimisation de graphes Euclidiens. [Internet] [Doctoral dissertation]. Bourgogne Franche-Comté; 2018. [cited 2020 Apr 01]. Available from: http://www.theses.fr/2018UBFCA020.

Council of Science Editors:

Qiao W. GPU component-based neighborhood search for Euclidean graph minimization problems : Méthodes GPU de recherche par voisinage pour les problèmes de minimisation de graphes Euclidiens. [Doctoral Dissertation]. Bourgogne Franche-Comté; 2018. Available from: http://www.theses.fr/2018UBFCA020


California State University – Sacramento

2. Robles, Kristofer Carlos. Acceleration of digital forensics functions using a GPU.

Degree: MS, Computer Science, 2017, California State University – Sacramento

 When file system metadata is corrupted, missing, or otherwise unreliable, file carving is the strategy used to recover files from a data volume. Difficulties arise… (more)

Subjects/Keywords: GPU; Parallel; Forensics

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Robles, K. C. (2017). Acceleration of digital forensics functions using a GPU. (Masters Thesis). California State University – Sacramento. Retrieved from http://hdl.handle.net/10211.3/191910

Chicago Manual of Style (16th Edition):

Robles, Kristofer Carlos. “Acceleration of digital forensics functions using a GPU.” 2017. Masters Thesis, California State University – Sacramento. Accessed April 01, 2020. http://hdl.handle.net/10211.3/191910.

MLA Handbook (7th Edition):

Robles, Kristofer Carlos. “Acceleration of digital forensics functions using a GPU.” 2017. Web. 01 Apr 2020.

Vancouver:

Robles KC. Acceleration of digital forensics functions using a GPU. [Internet] [Masters thesis]. California State University – Sacramento; 2017. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/10211.3/191910.

Council of Science Editors:

Robles KC. Acceleration of digital forensics functions using a GPU. [Masters Thesis]. California State University – Sacramento; 2017. Available from: http://hdl.handle.net/10211.3/191910


University of Louisville

3. Madhusoodhanan Sathik, Anju Panicker, 1984-. Parallelizing a network intrusion detection system using a GPU.

Degree: MS, 2012, University of Louisville

 As network speeds continue to increase and attacks get increasingly more complicated, there is need to improved detection algorithms and improved performance of Network Intrusion… (more)

Subjects/Keywords: GPU parallel programming; Parallel NIDS; CUDA; NIDS GPU; Snort GPU; CUDA NIDS GPU

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Madhusoodhanan Sathik, Anju Panicker, 1. (2012). Parallelizing a network intrusion detection system using a GPU. (Masters Thesis). University of Louisville. Retrieved from 10.18297/etd/879 ; https://ir.library.louisville.edu/etd/879

Chicago Manual of Style (16th Edition):

Madhusoodhanan Sathik, Anju Panicker, 1984-. “Parallelizing a network intrusion detection system using a GPU.” 2012. Masters Thesis, University of Louisville. Accessed April 01, 2020. 10.18297/etd/879 ; https://ir.library.louisville.edu/etd/879.

MLA Handbook (7th Edition):

Madhusoodhanan Sathik, Anju Panicker, 1984-. “Parallelizing a network intrusion detection system using a GPU.” 2012. Web. 01 Apr 2020.

Vancouver:

Madhusoodhanan Sathik, Anju Panicker 1. Parallelizing a network intrusion detection system using a GPU. [Internet] [Masters thesis]. University of Louisville; 2012. [cited 2020 Apr 01]. Available from: 10.18297/etd/879 ; https://ir.library.louisville.edu/etd/879.

Council of Science Editors:

Madhusoodhanan Sathik, Anju Panicker 1. Parallelizing a network intrusion detection system using a GPU. [Masters Thesis]. University of Louisville; 2012. Available from: 10.18297/etd/879 ; https://ir.library.louisville.edu/etd/879


University of Western Australia

4. Bravo-Rojas, Maria Luisa. Computation of skyline points using parallel scan algorithms on GPU devices.

Degree: MS, 2014, University of Western Australia

The computation of skyline points has become a particularly interesting topic in recent years because of its application in multi-criteria decision-making systems. Though many e… (more)

Subjects/Keywords: Skyline; Database; GPU; Parallel algorithm

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Bravo-Rojas, M. L. (2014). Computation of skyline points using parallel scan algorithms on GPU devices. (Masters Thesis). University of Western Australia. Retrieved from http://repository.uwa.edu.au:80/R/?func=dbin-jump-full&object_id=40256&local_base=GEN01-INS01

Chicago Manual of Style (16th Edition):

Bravo-Rojas, Maria Luisa. “Computation of skyline points using parallel scan algorithms on GPU devices.” 2014. Masters Thesis, University of Western Australia. Accessed April 01, 2020. http://repository.uwa.edu.au:80/R/?func=dbin-jump-full&object_id=40256&local_base=GEN01-INS01.

MLA Handbook (7th Edition):

Bravo-Rojas, Maria Luisa. “Computation of skyline points using parallel scan algorithms on GPU devices.” 2014. Web. 01 Apr 2020.

Vancouver:

Bravo-Rojas ML. Computation of skyline points using parallel scan algorithms on GPU devices. [Internet] [Masters thesis]. University of Western Australia; 2014. [cited 2020 Apr 01]. Available from: http://repository.uwa.edu.au:80/R/?func=dbin-jump-full&object_id=40256&local_base=GEN01-INS01.

Council of Science Editors:

Bravo-Rojas ML. Computation of skyline points using parallel scan algorithms on GPU devices. [Masters Thesis]. University of Western Australia; 2014. Available from: http://repository.uwa.edu.au:80/R/?func=dbin-jump-full&object_id=40256&local_base=GEN01-INS01


University of Alberta

5. Karimipour, Hadis. Parallel Dynamic State Estimation of Large-scale Cyber-physical Power Systems.

Degree: PhD, Department of Electrical and Computer Engineering, 2016, University of Alberta

 Growing system size and complexity along with the large amount of data provided by phasor measurement units (PMUs) are the drivers for accurate state estimation… (more)

Subjects/Keywords: Parallel Programming; GPU; Dynamic State Estimation

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Karimipour, H. (2016). Parallel Dynamic State Estimation of Large-scale Cyber-physical Power Systems. (Doctoral Dissertation). University of Alberta. Retrieved from https://era.library.ualberta.ca/files/crv042t14w

Chicago Manual of Style (16th Edition):

Karimipour, Hadis. “Parallel Dynamic State Estimation of Large-scale Cyber-physical Power Systems.” 2016. Doctoral Dissertation, University of Alberta. Accessed April 01, 2020. https://era.library.ualberta.ca/files/crv042t14w.

MLA Handbook (7th Edition):

Karimipour, Hadis. “Parallel Dynamic State Estimation of Large-scale Cyber-physical Power Systems.” 2016. Web. 01 Apr 2020.

Vancouver:

Karimipour H. Parallel Dynamic State Estimation of Large-scale Cyber-physical Power Systems. [Internet] [Doctoral dissertation]. University of Alberta; 2016. [cited 2020 Apr 01]. Available from: https://era.library.ualberta.ca/files/crv042t14w.

Council of Science Editors:

Karimipour H. Parallel Dynamic State Estimation of Large-scale Cyber-physical Power Systems. [Doctoral Dissertation]. University of Alberta; 2016. Available from: https://era.library.ualberta.ca/files/crv042t14w


Université de Montréal

6. Kemerchou, Nabil. Logiciel de génération de nombres aléatoires dans OpenCL .

Degree: 2016, Université de Montréal

 clRNG et clProbdist sont deux interfaces de programmation (APIs) que nous avons développées pour la génération de nombres aléatoires uniformes et non uniformes sur des… (more)

Subjects/Keywords: Rng; Parallélisme; OpenCL; Gpu; Parallel computing

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kemerchou, N. (2016). Logiciel de génération de nombres aléatoires dans OpenCL . (Thesis). Université de Montréal. Retrieved from http://hdl.handle.net/1866/13473

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kemerchou, Nabil. “Logiciel de génération de nombres aléatoires dans OpenCL .” 2016. Thesis, Université de Montréal. Accessed April 01, 2020. http://hdl.handle.net/1866/13473.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kemerchou, Nabil. “Logiciel de génération de nombres aléatoires dans OpenCL .” 2016. Web. 01 Apr 2020.

Vancouver:

Kemerchou N. Logiciel de génération de nombres aléatoires dans OpenCL . [Internet] [Thesis]. Université de Montréal; 2016. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/1866/13473.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kemerchou N. Logiciel de génération de nombres aléatoires dans OpenCL . [Thesis]. Université de Montréal; 2016. Available from: http://hdl.handle.net/1866/13473

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Delft University of Technology

7. Penders, A. Accelerating Graph Analysis with Heterogeneous Systems:.

Degree: 2012, Delft University of Technology

 Data analysis is a rising field of interest for computer science research due to the growing amount of information that is digitally available. This increase… (more)

Subjects/Keywords: GPU; graph; Graph analysis; accelerators; OpenCL; parallel

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Penders, A. (2012). Accelerating Graph Analysis with Heterogeneous Systems:. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:7f3eeb52-77bd-4fdb-84a9-ea9ca0a35b94

Chicago Manual of Style (16th Edition):

Penders, A. “Accelerating Graph Analysis with Heterogeneous Systems:.” 2012. Masters Thesis, Delft University of Technology. Accessed April 01, 2020. http://resolver.tudelft.nl/uuid:7f3eeb52-77bd-4fdb-84a9-ea9ca0a35b94.

MLA Handbook (7th Edition):

Penders, A. “Accelerating Graph Analysis with Heterogeneous Systems:.” 2012. Web. 01 Apr 2020.

Vancouver:

Penders A. Accelerating Graph Analysis with Heterogeneous Systems:. [Internet] [Masters thesis]. Delft University of Technology; 2012. [cited 2020 Apr 01]. Available from: http://resolver.tudelft.nl/uuid:7f3eeb52-77bd-4fdb-84a9-ea9ca0a35b94.

Council of Science Editors:

Penders A. Accelerating Graph Analysis with Heterogeneous Systems:. [Masters Thesis]. Delft University of Technology; 2012. Available from: http://resolver.tudelft.nl/uuid:7f3eeb52-77bd-4fdb-84a9-ea9ca0a35b94


University of New South Wales

8. Di, Peng. Automatic Parallelization of Tiled Stencil Loop Nests on GPUs.

Degree: Computer Science & Engineering, 2013, University of New South Wales

 This thesis attempts to design and implement a compiler framework based on the polyhedral model. The compiler automatically parallelizes loop nests; especially stencil kernels, into… (more)

Subjects/Keywords: Compiler; GPU; Loop tiling; Parallel computing

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Di, P. (2013). Automatic Parallelization of Tiled Stencil Loop Nests on GPUs. (Doctoral Dissertation). University of New South Wales. Retrieved from http://handle.unsw.edu.au/1959.4/53495 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:12190/SOURCE02?view=true

Chicago Manual of Style (16th Edition):

Di, Peng. “Automatic Parallelization of Tiled Stencil Loop Nests on GPUs.” 2013. Doctoral Dissertation, University of New South Wales. Accessed April 01, 2020. http://handle.unsw.edu.au/1959.4/53495 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:12190/SOURCE02?view=true.

MLA Handbook (7th Edition):

Di, Peng. “Automatic Parallelization of Tiled Stencil Loop Nests on GPUs.” 2013. Web. 01 Apr 2020.

Vancouver:

Di P. Automatic Parallelization of Tiled Stencil Loop Nests on GPUs. [Internet] [Doctoral dissertation]. University of New South Wales; 2013. [cited 2020 Apr 01]. Available from: http://handle.unsw.edu.au/1959.4/53495 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:12190/SOURCE02?view=true.

Council of Science Editors:

Di P. Automatic Parallelization of Tiled Stencil Loop Nests on GPUs. [Doctoral Dissertation]. University of New South Wales; 2013. Available from: http://handle.unsw.edu.au/1959.4/53495 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:12190/SOURCE02?view=true


University of Houston

9. Chitral, Pooja 1986-. Accelerator Benchmark Suite Using OpenACC Directives.

Degree: MS, Computer Science, 2014, University of Houston

 In recent years, GPU computing has been very popular for scientific applications, especially after the release of programming languages like CUDA, OpenCL, and OpenACC. The… (more)

Subjects/Keywords: GPU computing; OpenACC; Parboil; NAS parallel Benchmarks

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chitral, P. 1. (2014). Accelerator Benchmark Suite Using OpenACC Directives. (Masters Thesis). University of Houston. Retrieved from http://hdl.handle.net/10657/1686

Chicago Manual of Style (16th Edition):

Chitral, Pooja 1986-. “Accelerator Benchmark Suite Using OpenACC Directives.” 2014. Masters Thesis, University of Houston. Accessed April 01, 2020. http://hdl.handle.net/10657/1686.

MLA Handbook (7th Edition):

Chitral, Pooja 1986-. “Accelerator Benchmark Suite Using OpenACC Directives.” 2014. Web. 01 Apr 2020.

Vancouver:

Chitral P1. Accelerator Benchmark Suite Using OpenACC Directives. [Internet] [Masters thesis]. University of Houston; 2014. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/10657/1686.

Council of Science Editors:

Chitral P1. Accelerator Benchmark Suite Using OpenACC Directives. [Masters Thesis]. University of Houston; 2014. Available from: http://hdl.handle.net/10657/1686

10. -1801-637X. High-Performance Sparse Fourier Transform on Parallel Architectures.

Degree: PhD, Computer Science, 2016, University of Houston

 Fast Fourier Transform (FFT) is one of the most important numerical algorithms widely used in numerous scientific and engineering computations. With the emergence of big… (more)

Subjects/Keywords: Sparse FFT; Parallel computing; Compressive Sensing; GPU

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

-1801-637X. (2016). High-Performance Sparse Fourier Transform on Parallel Architectures. (Doctoral Dissertation). University of Houston. Retrieved from http://hdl.handle.net/10657/3269

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Chicago Manual of Style (16th Edition):

-1801-637X. “High-Performance Sparse Fourier Transform on Parallel Architectures.” 2016. Doctoral Dissertation, University of Houston. Accessed April 01, 2020. http://hdl.handle.net/10657/3269.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

MLA Handbook (7th Edition):

-1801-637X. “High-Performance Sparse Fourier Transform on Parallel Architectures.” 2016. Web. 01 Apr 2020.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Vancouver:

-1801-637X. High-Performance Sparse Fourier Transform on Parallel Architectures. [Internet] [Doctoral dissertation]. University of Houston; 2016. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/10657/3269.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Council of Science Editors:

-1801-637X. High-Performance Sparse Fourier Transform on Parallel Architectures. [Doctoral Dissertation]. University of Houston; 2016. Available from: http://hdl.handle.net/10657/3269

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete


Georgia Tech

11. Wu, Jiadong. Improving the throughput of novel cluster computing systems.

Degree: PhD, Electrical and Computer Engineering, 2015, Georgia Tech

 Traditional cluster computing systems such as the supercomputers are equipped with specially designed high-performance hardware, which escalates the manufacturing cost and the energy cost of… (more)

Subjects/Keywords: GPU; Hadoop; Computer cluster; Parallel computing

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wu, J. (2015). Improving the throughput of novel cluster computing systems. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/53890

Chicago Manual of Style (16th Edition):

Wu, Jiadong. “Improving the throughput of novel cluster computing systems.” 2015. Doctoral Dissertation, Georgia Tech. Accessed April 01, 2020. http://hdl.handle.net/1853/53890.

MLA Handbook (7th Edition):

Wu, Jiadong. “Improving the throughput of novel cluster computing systems.” 2015. Web. 01 Apr 2020.

Vancouver:

Wu J. Improving the throughput of novel cluster computing systems. [Internet] [Doctoral dissertation]. Georgia Tech; 2015. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/1853/53890.

Council of Science Editors:

Wu J. Improving the throughput of novel cluster computing systems. [Doctoral Dissertation]. Georgia Tech; 2015. Available from: http://hdl.handle.net/1853/53890


Texas State University – San Marcos

12. Zecena, Ivan. Energy Consumption Analysis of Parallel Algorithms Running on Multicore Systems and GPUS.

Degree: MS, Computer Science, 2013, Texas State University – San Marcos

 As multicore computers and High Performance Computing systems in general continue to increase their number of processors and processing power, so too have the energy… (more)

Subjects/Keywords: Energy-Efficiency; Parallel programming; GPU; Multicore

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zecena, I. (2013). Energy Consumption Analysis of Parallel Algorithms Running on Multicore Systems and GPUS. (Masters Thesis). Texas State University – San Marcos. Retrieved from https://digital.library.txstate.edu/handle/10877/5469

Chicago Manual of Style (16th Edition):

Zecena, Ivan. “Energy Consumption Analysis of Parallel Algorithms Running on Multicore Systems and GPUS.” 2013. Masters Thesis, Texas State University – San Marcos. Accessed April 01, 2020. https://digital.library.txstate.edu/handle/10877/5469.

MLA Handbook (7th Edition):

Zecena, Ivan. “Energy Consumption Analysis of Parallel Algorithms Running on Multicore Systems and GPUS.” 2013. Web. 01 Apr 2020.

Vancouver:

Zecena I. Energy Consumption Analysis of Parallel Algorithms Running on Multicore Systems and GPUS. [Internet] [Masters thesis]. Texas State University – San Marcos; 2013. [cited 2020 Apr 01]. Available from: https://digital.library.txstate.edu/handle/10877/5469.

Council of Science Editors:

Zecena I. Energy Consumption Analysis of Parallel Algorithms Running on Multicore Systems and GPUS. [Masters Thesis]. Texas State University – San Marcos; 2013. Available from: https://digital.library.txstate.edu/handle/10877/5469


University of Illinois – Urbana-Champaign

13. Lv, Jie. Parallel merge for many-core architectures.

Degree: MS, Electrical & Computer Engr, 2016, University of Illinois – Urbana-Champaign

 This thesis proposes a novel GPU implementation for merging two sorted arrays. We consider the problem of merging two arrays A and B into a… (more)

Subjects/Keywords: Graphics processing unit (GPU); Parallel Merge

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lv, J. (2016). Parallel merge for many-core architectures. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/90824

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lv, Jie. “Parallel merge for many-core architectures.” 2016. Thesis, University of Illinois – Urbana-Champaign. Accessed April 01, 2020. http://hdl.handle.net/2142/90824.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lv, Jie. “Parallel merge for many-core architectures.” 2016. Web. 01 Apr 2020.

Vancouver:

Lv J. Parallel merge for many-core architectures. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2016. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/2142/90824.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lv J. Parallel merge for many-core architectures. [Thesis]. University of Illinois – Urbana-Champaign; 2016. Available from: http://hdl.handle.net/2142/90824

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

14. Anderson Boettge Pinheiro. Fusion: abstraÃÃes linguÃsticas sobre Java para programaÃÃo paralela heterogÃnea sobre GPGPUs.

Degree: Master, 2013, Universidade Federal do Ceará

Unidades de aceleraÃÃo grÃca, ou GPU (Graphical Processing Units ), tem se consolidado nos Ãltimos anos para computaÃÃo de propÃsito geral, para aceleraÃÃo de trechos… (more)

Subjects/Keywords: CIENCIA DA COMPUTACAO; java; GPU; paralela; heterogÃnea; java; GPU; parallel; heterogeneous

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Pinheiro, A. B. (2013). Fusion: abstraÃÃes linguÃsticas sobre Java para programaÃÃo paralela heterogÃnea sobre GPGPUs. (Masters Thesis). Universidade Federal do Ceará. Retrieved from http://www.teses.ufc.br/tde_busca/arquivo.php?codArquivo=9972 ;

Chicago Manual of Style (16th Edition):

Pinheiro, Anderson Boettge. “Fusion: abstraÃÃes linguÃsticas sobre Java para programaÃÃo paralela heterogÃnea sobre GPGPUs.” 2013. Masters Thesis, Universidade Federal do Ceará. Accessed April 01, 2020. http://www.teses.ufc.br/tde_busca/arquivo.php?codArquivo=9972 ;.

MLA Handbook (7th Edition):

Pinheiro, Anderson Boettge. “Fusion: abstraÃÃes linguÃsticas sobre Java para programaÃÃo paralela heterogÃnea sobre GPGPUs.” 2013. Web. 01 Apr 2020.

Vancouver:

Pinheiro AB. Fusion: abstraÃÃes linguÃsticas sobre Java para programaÃÃo paralela heterogÃnea sobre GPGPUs. [Internet] [Masters thesis]. Universidade Federal do Ceará 2013. [cited 2020 Apr 01]. Available from: http://www.teses.ufc.br/tde_busca/arquivo.php?codArquivo=9972 ;.

Council of Science Editors:

Pinheiro AB. Fusion: abstraÃÃes linguÃsticas sobre Java para programaÃÃo paralela heterogÃnea sobre GPGPUs. [Masters Thesis]. Universidade Federal do Ceará 2013. Available from: http://www.teses.ufc.br/tde_busca/arquivo.php?codArquivo=9972 ;

15. Ben Romdhanne, Bilel. Simulation des réseaux à grande échelle sur les architectures de calculs hétérogènes : Large-scale network simulation over heterogeneous computing architecture.

Degree: Docteur es, Informatique et réseaux, 2013, Paris, ENST

La simulation est une étape primordiale dans l'évolution des systèmes en réseaux. L’évolutivité et l’efficacité des outils de simulation est une clef principale de l’objectivité… (more)

Subjects/Keywords: Calcul parallèle; CPU/GPU; Parallel computing; CPU/GPU

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ben Romdhanne, B. (2013). Simulation des réseaux à grande échelle sur les architectures de calculs hétérogènes : Large-scale network simulation over heterogeneous computing architecture. (Doctoral Dissertation). Paris, ENST. Retrieved from http://www.theses.fr/2013ENST0088

Chicago Manual of Style (16th Edition):

Ben Romdhanne, Bilel. “Simulation des réseaux à grande échelle sur les architectures de calculs hétérogènes : Large-scale network simulation over heterogeneous computing architecture.” 2013. Doctoral Dissertation, Paris, ENST. Accessed April 01, 2020. http://www.theses.fr/2013ENST0088.

MLA Handbook (7th Edition):

Ben Romdhanne, Bilel. “Simulation des réseaux à grande échelle sur les architectures de calculs hétérogènes : Large-scale network simulation over heterogeneous computing architecture.” 2013. Web. 01 Apr 2020.

Vancouver:

Ben Romdhanne B. Simulation des réseaux à grande échelle sur les architectures de calculs hétérogènes : Large-scale network simulation over heterogeneous computing architecture. [Internet] [Doctoral dissertation]. Paris, ENST; 2013. [cited 2020 Apr 01]. Available from: http://www.theses.fr/2013ENST0088.

Council of Science Editors:

Ben Romdhanne B. Simulation des réseaux à grande échelle sur les architectures de calculs hétérogènes : Large-scale network simulation over heterogeneous computing architecture. [Doctoral Dissertation]. Paris, ENST; 2013. Available from: http://www.theses.fr/2013ENST0088


Rice University

16. Wang, Guohui. Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems.

Degree: PhD, Engineering, 2014, Rice University

 During past several years, there has been a trend that the modern mobile SoC (system-on-chip) chipsets start to incorporate in one single chip the functionality… (more)

Subjects/Keywords: Mobile computing; parallel algorithm; parallel architecture; VLSI; GPU

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, G. (2014). Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/88381

Chicago Manual of Style (16th Edition):

Wang, Guohui. “Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems.” 2014. Doctoral Dissertation, Rice University. Accessed April 01, 2020. http://hdl.handle.net/1911/88381.

MLA Handbook (7th Edition):

Wang, Guohui. “Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems.” 2014. Web. 01 Apr 2020.

Vancouver:

Wang G. Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems. [Internet] [Doctoral dissertation]. Rice University; 2014. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/1911/88381.

Council of Science Editors:

Wang G. Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems. [Doctoral Dissertation]. Rice University; 2014. Available from: http://hdl.handle.net/1911/88381


Texas State University – San Marcos

17. Azimi Moghaddam, Sahar. GPU Execution Tracing and Compression.

Degree: MS, Computer Science, 2017, Texas State University – San Marcos

 Program tracing is widely used for debugging and performance optimization. Whenever a program is traced, the overhead in terms of extra runtime and in terms… (more)

Subjects/Keywords: GPU execution tracing; GPU trace compression; Trace compression; Parallel programming; Data compression

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Azimi Moghaddam, S. (2017). GPU Execution Tracing and Compression. (Masters Thesis). Texas State University – San Marcos. Retrieved from https://digital.library.txstate.edu/handle/10877/7738

Chicago Manual of Style (16th Edition):

Azimi Moghaddam, Sahar. “GPU Execution Tracing and Compression.” 2017. Masters Thesis, Texas State University – San Marcos. Accessed April 01, 2020. https://digital.library.txstate.edu/handle/10877/7738.

MLA Handbook (7th Edition):

Azimi Moghaddam, Sahar. “GPU Execution Tracing and Compression.” 2017. Web. 01 Apr 2020.

Vancouver:

Azimi Moghaddam S. GPU Execution Tracing and Compression. [Internet] [Masters thesis]. Texas State University – San Marcos; 2017. [cited 2020 Apr 01]. Available from: https://digital.library.txstate.edu/handle/10877/7738.

Council of Science Editors:

Azimi Moghaddam S. GPU Execution Tracing and Compression. [Masters Thesis]. Texas State University – San Marcos; 2017. Available from: https://digital.library.txstate.edu/handle/10877/7738


University of Manitoba

18. Tamal, Md Toufique Morshed. CPU and GPU accelerated fully homomorphic encryption.

Degree: Computer Science, 2019, University of Manitoba

 Fully Homomorphic Encryption (FHE) is one of the most promising technologies for privacy protection as it allows an arbitrary number of function computations over encrypted… (more)

Subjects/Keywords: Fully Homomorphic Encryption; GPU parallelism; Secure computation on GPU; Parallel FHE Framework

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tamal, M. T. M. (2019). CPU and GPU accelerated fully homomorphic encryption. (Masters Thesis). University of Manitoba. Retrieved from http://hdl.handle.net/1993/34394

Chicago Manual of Style (16th Edition):

Tamal, Md Toufique Morshed. “CPU and GPU accelerated fully homomorphic encryption.” 2019. Masters Thesis, University of Manitoba. Accessed April 01, 2020. http://hdl.handle.net/1993/34394.

MLA Handbook (7th Edition):

Tamal, Md Toufique Morshed. “CPU and GPU accelerated fully homomorphic encryption.” 2019. Web. 01 Apr 2020.

Vancouver:

Tamal MTM. CPU and GPU accelerated fully homomorphic encryption. [Internet] [Masters thesis]. University of Manitoba; 2019. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/1993/34394.

Council of Science Editors:

Tamal MTM. CPU and GPU accelerated fully homomorphic encryption. [Masters Thesis]. University of Manitoba; 2019. Available from: http://hdl.handle.net/1993/34394

19. Rubez, Gaëtan. Accélération des calculs en Chimie théorique : l'exemple des processeurs graphiques : Accelerating Computations in Theoretical Chemistry : The Example of Graphic Processors.

Degree: Docteur es, Info - Informatique, 2018, Reims

Nous nous intéressons à l'utilisation de la technologie manycore des cartes graphiques dans le cadre de la Chimie théorique. Nous soutenons la nécessité pour ce… (more)

Subjects/Keywords: Docking; Nci; Dftb; Drug design; Parallel computing; Gpu; Docking; Nci; Dftb; Drug design; Parallel computing; Gpu

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rubez, G. (2018). Accélération des calculs en Chimie théorique : l'exemple des processeurs graphiques : Accelerating Computations in Theoretical Chemistry : The Example of Graphic Processors. (Doctoral Dissertation). Reims. Retrieved from http://www.theses.fr/2018REIMS002

Chicago Manual of Style (16th Edition):

Rubez, Gaëtan. “Accélération des calculs en Chimie théorique : l'exemple des processeurs graphiques : Accelerating Computations in Theoretical Chemistry : The Example of Graphic Processors.” 2018. Doctoral Dissertation, Reims. Accessed April 01, 2020. http://www.theses.fr/2018REIMS002.

MLA Handbook (7th Edition):

Rubez, Gaëtan. “Accélération des calculs en Chimie théorique : l'exemple des processeurs graphiques : Accelerating Computations in Theoretical Chemistry : The Example of Graphic Processors.” 2018. Web. 01 Apr 2020.

Vancouver:

Rubez G. Accélération des calculs en Chimie théorique : l'exemple des processeurs graphiques : Accelerating Computations in Theoretical Chemistry : The Example of Graphic Processors. [Internet] [Doctoral dissertation]. Reims; 2018. [cited 2020 Apr 01]. Available from: http://www.theses.fr/2018REIMS002.

Council of Science Editors:

Rubez G. Accélération des calculs en Chimie théorique : l'exemple des processeurs graphiques : Accelerating Computations in Theoretical Chemistry : The Example of Graphic Processors. [Doctoral Dissertation]. Reims; 2018. Available from: http://www.theses.fr/2018REIMS002


Texas State University – San Marcos

20. Jaiganesh, Jayadharini. An Efficient Connected Components Algorithm for Massively-Parallel Devices.

Degree: MS, Computer Science, 2017, Texas State University – San Marcos

 Massively-parallel devices such as GPUs are best suited for accelerating regular algorithms. Since the memory access patterns and control flow of irregular algorithms are data… (more)

Subjects/Keywords: GPU; Connected Components; Irregular algorithm; Parallel Processing; Computer science; Parallel processing (Electronic computers)

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jaiganesh, J. (2017). An Efficient Connected Components Algorithm for Massively-Parallel Devices. (Masters Thesis). Texas State University – San Marcos. Retrieved from https://digital.library.txstate.edu/handle/10877/6570

Chicago Manual of Style (16th Edition):

Jaiganesh, Jayadharini. “An Efficient Connected Components Algorithm for Massively-Parallel Devices.” 2017. Masters Thesis, Texas State University – San Marcos. Accessed April 01, 2020. https://digital.library.txstate.edu/handle/10877/6570.

MLA Handbook (7th Edition):

Jaiganesh, Jayadharini. “An Efficient Connected Components Algorithm for Massively-Parallel Devices.” 2017. Web. 01 Apr 2020.

Vancouver:

Jaiganesh J. An Efficient Connected Components Algorithm for Massively-Parallel Devices. [Internet] [Masters thesis]. Texas State University – San Marcos; 2017. [cited 2020 Apr 01]. Available from: https://digital.library.txstate.edu/handle/10877/6570.

Council of Science Editors:

Jaiganesh J. An Efficient Connected Components Algorithm for Massively-Parallel Devices. [Masters Thesis]. Texas State University – San Marcos; 2017. Available from: https://digital.library.txstate.edu/handle/10877/6570


Texas State University – San Marcos

21. Taheri, Saeed. A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization.

Degree: MS, Computer Science, 2014, Texas State University – San Marcos

 Future computing systems, from handhelds all the way to supercomputers, will be more parallel and more heterogeneous than today’s systems to provide more performance without… (more)

Subjects/Keywords: GPU; Optimization; Irregular; Computer science; Graphics processing units; Parallel computers; Parallel processing (Electronic computers)

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Taheri, S. (2014). A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization. (Masters Thesis). Texas State University – San Marcos. Retrieved from https://digital.library.txstate.edu/handle/10877/5380

Chicago Manual of Style (16th Edition):

Taheri, Saeed. “A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization.” 2014. Masters Thesis, Texas State University – San Marcos. Accessed April 01, 2020. https://digital.library.txstate.edu/handle/10877/5380.

MLA Handbook (7th Edition):

Taheri, Saeed. “A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization.” 2014. Web. 01 Apr 2020.

Vancouver:

Taheri S. A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization. [Internet] [Masters thesis]. Texas State University – San Marcos; 2014. [cited 2020 Apr 01]. Available from: https://digital.library.txstate.edu/handle/10877/5380.

Council of Science Editors:

Taheri S. A Tool for Automatic Suggestions for Irregular GPU Kernel Optimization. [Masters Thesis]. Texas State University – San Marcos; 2014. Available from: https://digital.library.txstate.edu/handle/10877/5380


NSYSU

22. Hsu, Hsin-yun. Improving the search of near-optimal solution of vehicle routine problems with parallelable modified algorithms.

Degree: Master, Applied Mathematics, 2017, NSYSU

 We consider finding the near-optimized solution of logistic's vehicle routing problem includes grouping of customers and travelling salesman problem. We try to balance the number… (more)

Subjects/Keywords: Feiring algorithm; Vehicle routing problem (VRP); MPI; Travelling salesman problem (TSP); k-mean clustering; 2-opt

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsu, H. (2017). Improving the search of near-optimal solution of vehicle routine problems with parallelable modified algorithms. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629117-234517

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Hsin-yun. “Improving the search of near-optimal solution of vehicle routine problems with parallelable modified algorithms.” 2017. Thesis, NSYSU. Accessed April 01, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629117-234517.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Hsin-yun. “Improving the search of near-optimal solution of vehicle routine problems with parallelable modified algorithms.” 2017. Web. 01 Apr 2020.

Vancouver:

Hsu H. Improving the search of near-optimal solution of vehicle routine problems with parallelable modified algorithms. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Apr 01]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629117-234517.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu H. Improving the search of near-optimal solution of vehicle routine problems with parallelable modified algorithms. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629117-234517

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

23. Μαυροειδής, Ιωάννης. Algorithm mapping to reconfigurable systems and systems with multiple embedded processors.

Degree: 2011, Technical University of Crete (TUC); Πολυτεχνείο Κρήτης

 The Traveling Salesman Problem (TSP) is probably the most-studied combinatorial optimization problem of all time. TSP applications range from logistics, and job scheduling, to computing… (more)

Subjects/Keywords: Πρόβλημα περιοδεύοντος πωλητή; Υλοποίηση αλγορίθμων σε hardware; Traveling salesman problem; TSP; 2-Opt; Algorithm mapping; Reconfigurable systems; FPGAs; CUDA

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Μαυροειδής, . . (2011). Algorithm mapping to reconfigurable systems and systems with multiple embedded processors. (Thesis). Technical University of Crete (TUC); Πολυτεχνείο Κρήτης. Retrieved from http://hdl.handle.net/10442/hedi/26343

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Μαυροειδής, Ιωάννης. “Algorithm mapping to reconfigurable systems and systems with multiple embedded processors.” 2011. Thesis, Technical University of Crete (TUC); Πολυτεχνείο Κρήτης. Accessed April 01, 2020. http://hdl.handle.net/10442/hedi/26343.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Μαυροειδής, Ιωάννης. “Algorithm mapping to reconfigurable systems and systems with multiple embedded processors.” 2011. Web. 01 Apr 2020.

Vancouver:

Μαυροειδής . Algorithm mapping to reconfigurable systems and systems with multiple embedded processors. [Internet] [Thesis]. Technical University of Crete (TUC); Πολυτεχνείο Κρήτης; 2011. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/10442/hedi/26343.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Μαυροειδής . Algorithm mapping to reconfigurable systems and systems with multiple embedded processors. [Thesis]. Technical University of Crete (TUC); Πολυτεχνείο Κρήτης; 2011. Available from: http://hdl.handle.net/10442/hedi/26343

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

24. 岡田, 正浩. 巡回セールスマン問題に対する2-optの確率的解析 : ジュンカイ セールスマン モンダイ ニ タイスル 2-opt ノ カクリツテキ カイセキ.

Degree: Nara Institute of Science and Technology / 奈良先端科学技術大学院大学

Subjects/Keywords: 巡回セールスマン問題; 2-opt

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

岡田, . (n.d.). 巡回セールスマン問題に対する2-optの確率的解析 : ジュンカイ セールスマン モンダイ ニ タイスル 2-opt ノ カクリツテキ カイセキ. (Thesis). Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Retrieved from http://hdl.handle.net/10061/2284

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

岡田, 正浩. “巡回セールスマン問題に対する2-optの確率的解析 : ジュンカイ セールスマン モンダイ ニ タイスル 2-opt ノ カクリツテキ カイセキ.” Thesis, Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Accessed April 01, 2020. http://hdl.handle.net/10061/2284.

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

岡田, 正浩. “巡回セールスマン問題に対する2-optの確率的解析 : ジュンカイ セールスマン モンダイ ニ タイスル 2-opt ノ カクリツテキ カイセキ.” Web. 01 Apr 2020.

Note: this citation may be lacking information needed for this citation format:
No year of publication.

Vancouver:

岡田 . 巡回セールスマン問題に対する2-optの確率的解析 : ジュンカイ セールスマン モンダイ ニ タイスル 2-opt ノ カクリツテキ カイセキ. [Internet] [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; [cited 2020 Apr 01]. Available from: http://hdl.handle.net/10061/2284.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.

Council of Science Editors:

岡田 . 巡回セールスマン問題に対する2-optの確率的解析 : ジュンカイ セールスマン モンダイ ニ タイスル 2-opt ノ カクリツテキ カイセキ. [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; Available from: http://hdl.handle.net/10061/2284

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.


Dalhousie University

25. Kamali, Shahrokh. IMPLEMENTATION OF FILTERING BEAMFORMING ALGORITHMS FOR SONAR DEVICES USING GPU.

Degree: Master of Applied Science, Department of Electrical & Computer Engineering, 2013, Dalhousie University

 Beamforming is a signal processing technique used in sensor arrays to direct signal transmission or reception. Beamformer combines input signals in the array to achieve… (more)

Subjects/Keywords: Beamforming; GPU Computation; Sonar Signal Processing; GPGPU; Parallel Processing

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kamali, S. (2013). IMPLEMENTATION OF FILTERING BEAMFORMING ALGORITHMS FOR SONAR DEVICES USING GPU. (Masters Thesis). Dalhousie University. Retrieved from http://hdl.handle.net/10222/31240

Chicago Manual of Style (16th Edition):

Kamali, Shahrokh. “IMPLEMENTATION OF FILTERING BEAMFORMING ALGORITHMS FOR SONAR DEVICES USING GPU.” 2013. Masters Thesis, Dalhousie University. Accessed April 01, 2020. http://hdl.handle.net/10222/31240.

MLA Handbook (7th Edition):

Kamali, Shahrokh. “IMPLEMENTATION OF FILTERING BEAMFORMING ALGORITHMS FOR SONAR DEVICES USING GPU.” 2013. Web. 01 Apr 2020.

Vancouver:

Kamali S. IMPLEMENTATION OF FILTERING BEAMFORMING ALGORITHMS FOR SONAR DEVICES USING GPU. [Internet] [Masters thesis]. Dalhousie University; 2013. [cited 2020 Apr 01]. Available from: http://hdl.handle.net/10222/31240.

Council of Science Editors:

Kamali S. IMPLEMENTATION OF FILTERING BEAMFORMING ALGORITHMS FOR SONAR DEVICES USING GPU. [Masters Thesis]. Dalhousie University; 2013. Available from: http://hdl.handle.net/10222/31240


University of Utah

26. Vo, Huy T. Designing a parallel dataflow architecture for streaming large-scale visualization on heterogeneous platforms.

Degree: PhD, School of Computing, 2011, University of Utah

 Dataflow pipeline models are widely used in visualization systems. Despite recent advancements in parallel architecture, most systems still support only a single CPU or a… (more)

Subjects/Keywords: Dataflow architecture; Heterogeneous platforms; Multi-CPU; Multi-GPU; Parallel execution

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Vo, H. T. (2011). Designing a parallel dataflow architecture for streaming large-scale visualization on heterogeneous platforms. (Doctoral Dissertation). University of Utah. Retrieved from http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/342/rec/656

Chicago Manual of Style (16th Edition):

Vo, Huy T. “Designing a parallel dataflow architecture for streaming large-scale visualization on heterogeneous platforms.” 2011. Doctoral Dissertation, University of Utah. Accessed April 01, 2020. http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/342/rec/656.

MLA Handbook (7th Edition):

Vo, Huy T. “Designing a parallel dataflow architecture for streaming large-scale visualization on heterogeneous platforms.” 2011. Web. 01 Apr 2020.

Vancouver:

Vo HT. Designing a parallel dataflow architecture for streaming large-scale visualization on heterogeneous platforms. [Internet] [Doctoral dissertation]. University of Utah; 2011. [cited 2020 Apr 01]. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/342/rec/656.

Council of Science Editors:

Vo HT. Designing a parallel dataflow architecture for streaming large-scale visualization on heterogeneous platforms. [Doctoral Dissertation]. University of Utah; 2011. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/342/rec/656


Michigan Technological University

27. Hajmohammadi, Solmaz. PARALLEL IMPLEMENTATION OF BISPECTRUM MULTI-FRAME DECONVOLUTION FOR IMAGE RECONSTRUCTION.

Degree: PhD, Department of Electrical and Computer Engineering, 2017, Michigan Technological University

  There is high demand for deploying real-time or near real-time implementation of image reconstruction techniques for intelligence, surveillance, and reconnaissance (ISR) systems, as well… (more)

Subjects/Keywords: parallel programming; gpu; image processing; blind deconvolution; speckle imaging; Signal Processing

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hajmohammadi, S. (2017). PARALLEL IMPLEMENTATION OF BISPECTRUM MULTI-FRAME DECONVOLUTION FOR IMAGE RECONSTRUCTION. (Doctoral Dissertation). Michigan Technological University. Retrieved from http://digitalcommons.mtu.edu/etdr/432

Chicago Manual of Style (16th Edition):

Hajmohammadi, Solmaz. “PARALLEL IMPLEMENTATION OF BISPECTRUM MULTI-FRAME DECONVOLUTION FOR IMAGE RECONSTRUCTION.” 2017. Doctoral Dissertation, Michigan Technological University. Accessed April 01, 2020. http://digitalcommons.mtu.edu/etdr/432.

MLA Handbook (7th Edition):

Hajmohammadi, Solmaz. “PARALLEL IMPLEMENTATION OF BISPECTRUM MULTI-FRAME DECONVOLUTION FOR IMAGE RECONSTRUCTION.” 2017. Web. 01 Apr 2020.

Vancouver:

Hajmohammadi S. PARALLEL IMPLEMENTATION OF BISPECTRUM MULTI-FRAME DECONVOLUTION FOR IMAGE RECONSTRUCTION. [Internet] [Doctoral dissertation]. Michigan Technological University; 2017. [cited 2020 Apr 01]. Available from: http://digitalcommons.mtu.edu/etdr/432.

Council of Science Editors:

Hajmohammadi S. PARALLEL IMPLEMENTATION OF BISPECTRUM MULTI-FRAME DECONVOLUTION FOR IMAGE RECONSTRUCTION. [Doctoral Dissertation]. Michigan Technological University; 2017. Available from: http://digitalcommons.mtu.edu/etdr/432


University of Notre Dame

28. Kai Xiao. GPU Based Acceleration Techniques: Algorithms, Implementations, and Applications</h1>.

Degree: PhD, Computer Science and Engineering, 2016, University of Notre Dame

  Shared memory many-core processors such as GPUs have been extensively used in accelerating computation-intensive algorithms and applications. When porting existing algorithms from sequential or… (more)

Subjects/Keywords: GPU; computer graphics; parallel computing; data structure; radiation dose calculation

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Xiao, K. (2016). GPU Based Acceleration Techniques: Algorithms, Implementations, and Applications</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/4m90dv15x27

Chicago Manual of Style (16th Edition):

Xiao, Kai. “GPU Based Acceleration Techniques: Algorithms, Implementations, and Applications</h1>.” 2016. Doctoral Dissertation, University of Notre Dame. Accessed April 01, 2020. https://curate.nd.edu/show/4m90dv15x27.

MLA Handbook (7th Edition):

Xiao, Kai. “GPU Based Acceleration Techniques: Algorithms, Implementations, and Applications</h1>.” 2016. Web. 01 Apr 2020.

Vancouver:

Xiao K. GPU Based Acceleration Techniques: Algorithms, Implementations, and Applications</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2016. [cited 2020 Apr 01]. Available from: https://curate.nd.edu/show/4m90dv15x27.

Council of Science Editors:

Xiao K. GPU Based Acceleration Techniques: Algorithms, Implementations, and Applications</h1>. [Doctoral Dissertation]. University of Notre Dame; 2016. Available from: https://curate.nd.edu/show/4m90dv15x27


NSYSU

29. Tsai, An-Ti. GPU Acceleration of Eigenface of the Face Recognition System.

Degree: Master, Computer Science and Engineering, 2017, NSYSU

 To use GPGPU to speed up the computation plays an important role in many real-time applications. In this thesis we apply GPGPU to speed up… (more)

Subjects/Keywords: Face recognition; Eigenface; CUDA; GPU parallel computing; GPGPU

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tsai, A. (2017). GPU Acceleration of Eigenface of the Face Recognition System. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615117-002830

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tsai, An-Ti. “GPU Acceleration of Eigenface of the Face Recognition System.” 2017. Thesis, NSYSU. Accessed April 01, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615117-002830.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tsai, An-Ti. “GPU Acceleration of Eigenface of the Face Recognition System.” 2017. Web. 01 Apr 2020.

Vancouver:

Tsai A. GPU Acceleration of Eigenface of the Face Recognition System. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Apr 01]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615117-002830.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tsai A. GPU Acceleration of Eigenface of the Face Recognition System. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0615117-002830

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

30. Arafat, Md Humayun. Runtime Systems for Load Balancing and Fault Tolerance on Distributed Systems.

Degree: PhD, Computer Science and Engineering, 2014, The Ohio State University

 Exascale computing creates many challenges for scientific applications in both hardware and software. There is a continuous need for adaption to new architectures. Load balancing… (more)

Subjects/Keywords: Computer Science; Task Parallel model, CPU-GPU, Fault Tolerance, Load Balancing

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Arafat, M. H. (2014). Runtime Systems for Load Balancing and Fault Tolerance on Distributed Systems. (Doctoral Dissertation). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1408972218

Chicago Manual of Style (16th Edition):

Arafat, Md Humayun. “Runtime Systems for Load Balancing and Fault Tolerance on Distributed Systems.” 2014. Doctoral Dissertation, The Ohio State University. Accessed April 01, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1408972218.

MLA Handbook (7th Edition):

Arafat, Md Humayun. “Runtime Systems for Load Balancing and Fault Tolerance on Distributed Systems.” 2014. Web. 01 Apr 2020.

Vancouver:

Arafat MH. Runtime Systems for Load Balancing and Fault Tolerance on Distributed Systems. [Internet] [Doctoral dissertation]. The Ohio State University; 2014. [cited 2020 Apr 01]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1408972218.

Council of Science Editors:

Arafat MH. Runtime Systems for Load Balancing and Fault Tolerance on Distributed Systems. [Doctoral Dissertation]. The Ohio State University; 2014. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1408972218

[1] [2] [3] [4] [5] … [609]

.