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You searched for subject:(Fpu). Showing records 1 – 14 of 14 total matches.

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University of California – Santa Cruz

1. Natesh, Pranav Kumar. Floating-point Network Node for Multi-University Research Network.

Degree: Computer Engineering, 2012, University of California – Santa Cruz

 Floating-point operations are complex, they are both power and area intensive. The performance of floating-point operations can have a significant impact on the overall performance… (more)

Subjects/Keywords: Computer engineering; fpu; murn; scoore

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APA (6th Edition):

Natesh, P. K. (2012). Floating-point Network Node for Multi-University Research Network. (Thesis). University of California – Santa Cruz. Retrieved from http://www.escholarship.org/uc/item/0dd1p9v1

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Natesh, Pranav Kumar. “Floating-point Network Node for Multi-University Research Network.” 2012. Thesis, University of California – Santa Cruz. Accessed December 06, 2019. http://www.escholarship.org/uc/item/0dd1p9v1.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Natesh, Pranav Kumar. “Floating-point Network Node for Multi-University Research Network.” 2012. Web. 06 Dec 2019.

Vancouver:

Natesh PK. Floating-point Network Node for Multi-University Research Network. [Internet] [Thesis]. University of California – Santa Cruz; 2012. [cited 2019 Dec 06]. Available from: http://www.escholarship.org/uc/item/0dd1p9v1.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Natesh PK. Floating-point Network Node for Multi-University Research Network. [Thesis]. University of California – Santa Cruz; 2012. Available from: http://www.escholarship.org/uc/item/0dd1p9v1

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

2. Sarrazin, Guillaume. Simulation fonctionnelle native pour des systèmes many-cœurs : Functional native simulation techniques for many-core systems.

Degree: Docteur es, Informatique, 2016, Grenoble Alpes

Le nombre de transistors dans une puce augmente constamment en suivant la conjecture de Moore, qui dit que le nombre de transistors dans une puce… (more)

Subjects/Keywords: Simulation native; Simulation compilé; Systèmes sur puce; Fpu; Many-Cœur; Native simulation; Compiled smulation; System-On-Chip; Fpu; Many-Core; 004

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APA (6th Edition):

Sarrazin, G. (2016). Simulation fonctionnelle native pour des systèmes many-cœurs : Functional native simulation techniques for many-core systems. (Doctoral Dissertation). Grenoble Alpes. Retrieved from http://www.theses.fr/2016GREAM015

Chicago Manual of Style (16th Edition):

Sarrazin, Guillaume. “Simulation fonctionnelle native pour des systèmes many-cœurs : Functional native simulation techniques for many-core systems.” 2016. Doctoral Dissertation, Grenoble Alpes. Accessed December 06, 2019. http://www.theses.fr/2016GREAM015.

MLA Handbook (7th Edition):

Sarrazin, Guillaume. “Simulation fonctionnelle native pour des systèmes many-cœurs : Functional native simulation techniques for many-core systems.” 2016. Web. 06 Dec 2019.

Vancouver:

Sarrazin G. Simulation fonctionnelle native pour des systèmes many-cœurs : Functional native simulation techniques for many-core systems. [Internet] [Doctoral dissertation]. Grenoble Alpes; 2016. [cited 2019 Dec 06]. Available from: http://www.theses.fr/2016GREAM015.

Council of Science Editors:

Sarrazin G. Simulation fonctionnelle native pour des systèmes many-cœurs : Functional native simulation techniques for many-core systems. [Doctoral Dissertation]. Grenoble Alpes; 2016. Available from: http://www.theses.fr/2016GREAM015


Brno University of Technology

3. Závada, Vladislav. C++ knihovna pro práci s čísly v pohyblivé řádové čárce s libovolnou přesností .

Degree: 2019, Brno University of Technology

 Tato práce se zabývá návrhem floating point modulu, který umožní provádět operace s floating point operandy které mají libovolnou bitovou šířku. K tomuto účelu je… (more)

Subjects/Keywords: C++; šablony; IEEE754; pohyblivá řadová čárka; FPU; procesor; knihovna; jednotkové testy; C++; templates; IEEE754; floating point; FPU; processor; library; unit tests

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APA (6th Edition):

Závada, V. (2019). C++ knihovna pro práci s čísly v pohyblivé řádové čárce s libovolnou přesností . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/180357

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Závada, Vladislav. “C++ knihovna pro práci s čísly v pohyblivé řádové čárce s libovolnou přesností .” 2019. Thesis, Brno University of Technology. Accessed December 06, 2019. http://hdl.handle.net/11012/180357.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Závada, Vladislav. “C++ knihovna pro práci s čísly v pohyblivé řádové čárce s libovolnou přesností .” 2019. Web. 06 Dec 2019.

Vancouver:

Závada V. C++ knihovna pro práci s čísly v pohyblivé řádové čárce s libovolnou přesností . [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/11012/180357.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Závada V. C++ knihovna pro práci s čísly v pohyblivé řádové čárce s libovolnou přesností . [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/180357

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

4. Pinto, Wagner Mespaque. Monitoramento de deformações e deslocamentos relativos nas estruturas de suporte de plantas de processo modulares em unidades flutuantes de produção de petróleo do tipo FPSO.

Degree: 2010, Universidade Federal do Rio Grande

Dissertação(mestrado) - Universidade Federal do Rio Grande, Programa de Pós-Graduação em Engenharia Oceânica, Escola de Engenharia, 2010.

Os projetos mais recentes de plataformas do tipo… (more)

Subjects/Keywords: FPSO; FPU; Stool; Interação casco módulos; Hull topside iterface

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Pinto, W. M. (2010). Monitoramento de deformações e deslocamentos relativos nas estruturas de suporte de plantas de processo modulares em unidades flutuantes de produção de petróleo do tipo FPSO. (Masters Thesis). Universidade Federal do Rio Grande. Retrieved from http://repositorio.furg.br/handle/1/3439

Chicago Manual of Style (16th Edition):

Pinto, Wagner Mespaque. “Monitoramento de deformações e deslocamentos relativos nas estruturas de suporte de plantas de processo modulares em unidades flutuantes de produção de petróleo do tipo FPSO.” 2010. Masters Thesis, Universidade Federal do Rio Grande. Accessed December 06, 2019. http://repositorio.furg.br/handle/1/3439.

MLA Handbook (7th Edition):

Pinto, Wagner Mespaque. “Monitoramento de deformações e deslocamentos relativos nas estruturas de suporte de plantas de processo modulares em unidades flutuantes de produção de petróleo do tipo FPSO.” 2010. Web. 06 Dec 2019.

Vancouver:

Pinto WM. Monitoramento de deformações e deslocamentos relativos nas estruturas de suporte de plantas de processo modulares em unidades flutuantes de produção de petróleo do tipo FPSO. [Internet] [Masters thesis]. Universidade Federal do Rio Grande; 2010. [cited 2019 Dec 06]. Available from: http://repositorio.furg.br/handle/1/3439.

Council of Science Editors:

Pinto WM. Monitoramento de deformações e deslocamentos relativos nas estruturas de suporte de plantas de processo modulares em unidades flutuantes de produção de petróleo do tipo FPSO. [Masters Thesis]. Universidade Federal do Rio Grande; 2010. Available from: http://repositorio.furg.br/handle/1/3439


Linköping University

5. Olsson, Martin. Portning och utökning av processor för ASIC och FPGA.

Degree: Electrical Engineering, 2009, Linköping University

  In this master thesis, the possibilities of customizing a low-cost microprocessor with the purpose of replacing an existing microprocessor solution are investigated. A brief… (more)

Subjects/Keywords: CPU; Mico32; FPU; FPGA; FIR; accelerators; GDB; TECHNOLOGY; TEKNIKVETENSKAP

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APA (6th Edition):

Olsson, M. (2009). Portning och utökning av processor för ASIC och FPGA. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-18250

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Olsson, Martin. “Portning och utökning av processor för ASIC och FPGA.” 2009. Thesis, Linköping University. Accessed December 06, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-18250.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Olsson, Martin. “Portning och utökning av processor för ASIC och FPGA.” 2009. Web. 06 Dec 2019.

Vancouver:

Olsson M. Portning och utökning av processor för ASIC och FPGA. [Internet] [Thesis]. Linköping University; 2009. [cited 2019 Dec 06]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-18250.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Olsson M. Portning och utökning av processor för ASIC och FPGA. [Thesis]. Linköping University; 2009. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-18250

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

6. A. Maspero. BIRKHOFF COORDINATES OF INTEGRABLE HAMILTONIAN SYSTEMS IN ASYMPTOTIC REGIMES.

Degree: 2014, Università degli Studi di Milano

 In this thesis we investigate two examples of infinite dimensional integrable Hamiltonian systems in 1-space dimension: the Toda chain with periodic boundary conditions and large… (more)

Subjects/Keywords: integrability; Birkhoff coordinates; Toda; KdV; scattering; FPU; Settore MAT/07 - Fisica Matematica

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APA (6th Edition):

Maspero, A. (2014). BIRKHOFF COORDINATES OF INTEGRABLE HAMILTONIAN SYSTEMS IN ASYMPTOTIC REGIMES. (Thesis). Università degli Studi di Milano. Retrieved from http://hdl.handle.net/2434/246796

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Maspero, A.. “BIRKHOFF COORDINATES OF INTEGRABLE HAMILTONIAN SYSTEMS IN ASYMPTOTIC REGIMES.” 2014. Thesis, Università degli Studi di Milano. Accessed December 06, 2019. http://hdl.handle.net/2434/246796.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Maspero, A.. “BIRKHOFF COORDINATES OF INTEGRABLE HAMILTONIAN SYSTEMS IN ASYMPTOTIC REGIMES.” 2014. Web. 06 Dec 2019.

Vancouver:

Maspero A. BIRKHOFF COORDINATES OF INTEGRABLE HAMILTONIAN SYSTEMS IN ASYMPTOTIC REGIMES. [Internet] [Thesis]. Università degli Studi di Milano; 2014. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/2434/246796.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Maspero A. BIRKHOFF COORDINATES OF INTEGRABLE HAMILTONIAN SYSTEMS IN ASYMPTOTIC REGIMES. [Thesis]. Università degli Studi di Milano; 2014. Available from: http://hdl.handle.net/2434/246796

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of New South Wales

7. Chong, Michael Yee Jern. Customization of floating-point units for embedded systems and field programmable gate arrays.

Degree: Computer Science & Engineering, 2009, University of New South Wales

 While Application Specific Instruction Set Processors (ASIPs) have allowed designers to create processors with custom instructions to target specific applications, floating-point units (FPUs) are still… (more)

Subjects/Keywords: embedded systems; floating-point; FPGA; FPU

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APA (6th Edition):

Chong, M. Y. J. (2009). Customization of floating-point units for embedded systems and field programmable gate arrays. (Doctoral Dissertation). University of New South Wales. Retrieved from http://handle.unsw.edu.au/1959.4/44399 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:6016/SOURCE02?view=true

Chicago Manual of Style (16th Edition):

Chong, Michael Yee Jern. “Customization of floating-point units for embedded systems and field programmable gate arrays.” 2009. Doctoral Dissertation, University of New South Wales. Accessed December 06, 2019. http://handle.unsw.edu.au/1959.4/44399 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:6016/SOURCE02?view=true.

MLA Handbook (7th Edition):

Chong, Michael Yee Jern. “Customization of floating-point units for embedded systems and field programmable gate arrays.” 2009. Web. 06 Dec 2019.

Vancouver:

Chong MYJ. Customization of floating-point units for embedded systems and field programmable gate arrays. [Internet] [Doctoral dissertation]. University of New South Wales; 2009. [cited 2019 Dec 06]. Available from: http://handle.unsw.edu.au/1959.4/44399 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:6016/SOURCE02?view=true.

Council of Science Editors:

Chong MYJ. Customization of floating-point units for embedded systems and field programmable gate arrays. [Doctoral Dissertation]. University of New South Wales; 2009. Available from: http://handle.unsw.edu.au/1959.4/44399 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:6016/SOURCE02?view=true


Louisiana State University

8. Dugas, Anna Charron. A Non-Invasive Semiconductor Optical System To Measure Skin Tension.

Degree: MSBAE, Engineering, 2009, Louisiana State University

 The objectives of this project are to design, construct, validate and test a low-cost, non-invasive and painless device to measure skin tension. Skin is a… (more)

Subjects/Keywords: age and skin; gender and skin; in vivo skin tension; uM-FPU; BASIC Stamp; Cutisfirm; skin tension measurement; skin tension

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APA (6th Edition):

Dugas, A. C. (2009). A Non-Invasive Semiconductor Optical System To Measure Skin Tension. (Masters Thesis). Louisiana State University. Retrieved from etd-11052009-232342 ; https://digitalcommons.lsu.edu/gradschool_theses/1649

Chicago Manual of Style (16th Edition):

Dugas, Anna Charron. “A Non-Invasive Semiconductor Optical System To Measure Skin Tension.” 2009. Masters Thesis, Louisiana State University. Accessed December 06, 2019. etd-11052009-232342 ; https://digitalcommons.lsu.edu/gradschool_theses/1649.

MLA Handbook (7th Edition):

Dugas, Anna Charron. “A Non-Invasive Semiconductor Optical System To Measure Skin Tension.” 2009. Web. 06 Dec 2019.

Vancouver:

Dugas AC. A Non-Invasive Semiconductor Optical System To Measure Skin Tension. [Internet] [Masters thesis]. Louisiana State University; 2009. [cited 2019 Dec 06]. Available from: etd-11052009-232342 ; https://digitalcommons.lsu.edu/gradschool_theses/1649.

Council of Science Editors:

Dugas AC. A Non-Invasive Semiconductor Optical System To Measure Skin Tension. [Masters Thesis]. Louisiana State University; 2009. Available from: etd-11052009-232342 ; https://digitalcommons.lsu.edu/gradschool_theses/1649


University of Saskatchewan

9. Lee, Yongsoon. A neural network face detector design using bit-width reduced FPU in FPGA.

Degree: 2007, University of Saskatchewan

 This thesis implemented a field programmable gate array (FPGA)-based face detector using a neural network (NN), as well as a bit-width reduced floating-point unit (FPU).… (more)

Subjects/Keywords: Bit-Width Reduced FPU; Neural Network; Face Detector; FPGA

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APA (6th Edition):

Lee, Y. (2007). A neural network face detector design using bit-width reduced FPU in FPGA. (Thesis). University of Saskatchewan. Retrieved from http://hdl.handle.net/10388/etd-02032007-112130

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lee, Yongsoon. “A neural network face detector design using bit-width reduced FPU in FPGA.” 2007. Thesis, University of Saskatchewan. Accessed December 06, 2019. http://hdl.handle.net/10388/etd-02032007-112130.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lee, Yongsoon. “A neural network face detector design using bit-width reduced FPU in FPGA.” 2007. Web. 06 Dec 2019.

Vancouver:

Lee Y. A neural network face detector design using bit-width reduced FPU in FPGA. [Internet] [Thesis]. University of Saskatchewan; 2007. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/10388/etd-02032007-112130.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lee Y. A neural network face detector design using bit-width reduced FPU in FPGA. [Thesis]. University of Saskatchewan; 2007. Available from: http://hdl.handle.net/10388/etd-02032007-112130

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Duarte Sanchez , Daniel Felipe. ESTUDIO DE FIBRAS NATURALES COMO UNIDADES BASE PARA APLICACIONES EN ELECTRÓNICA.

Degree: 2016, Universidad de los Andes

 Este trabajo, comprende el estudio de fibras naturales usadas actualmente como materia prima de la artesanía Colombiana. Incluye el proceso de modificación de estos materiales… (more)

Subjects/Keywords: Nanocompuesto; electrónica textil; nanotubo de carbono; caracterización; FPU; Damagua; Cabecinegro

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APA (6th Edition):

Duarte Sanchez , D. F. (2016). ESTUDIO DE FIBRAS NATURALES COMO UNIDADES BASE PARA APLICACIONES EN ELECTRÓNICA. (Thesis). Universidad de los Andes. Retrieved from http://documentodegrado.uniandes.edu.co/documentos/201012670_fecha_2014_07_30_hora_18_00_41_parte_1.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Duarte Sanchez , Daniel Felipe. “ESTUDIO DE FIBRAS NATURALES COMO UNIDADES BASE PARA APLICACIONES EN ELECTRÓNICA. ” 2016. Thesis, Universidad de los Andes. Accessed December 06, 2019. http://documentodegrado.uniandes.edu.co/documentos/201012670_fecha_2014_07_30_hora_18_00_41_parte_1.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Duarte Sanchez , Daniel Felipe. “ESTUDIO DE FIBRAS NATURALES COMO UNIDADES BASE PARA APLICACIONES EN ELECTRÓNICA. ” 2016. Web. 06 Dec 2019.

Vancouver:

Duarte Sanchez DF. ESTUDIO DE FIBRAS NATURALES COMO UNIDADES BASE PARA APLICACIONES EN ELECTRÓNICA. [Internet] [Thesis]. Universidad de los Andes; 2016. [cited 2019 Dec 06]. Available from: http://documentodegrado.uniandes.edu.co/documentos/201012670_fecha_2014_07_30_hora_18_00_41_parte_1.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Duarte Sanchez DF. ESTUDIO DE FIBRAS NATURALES COMO UNIDADES BASE PARA APLICACIONES EN ELECTRÓNICA. [Thesis]. Universidad de los Andes; 2016. Available from: http://documentodegrado.uniandes.edu.co/documentos/201012670_fecha_2014_07_30_hora_18_00_41_parte_1.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Rochester Institute of Technology

11. Bekker, Dmitriy. Hardware and software optimization of fourier transform infrared spectrometry on hybrid-FPGAs.

Degree: Computer Engineering, 2007, Rochester Institute of Technology

 With the increasing complexity of today’s spacecrafts, there exists a concern that the on-board flight computer may be overburdened with various processing tasks. Currently available… (more)

Subjects/Keywords: APU; Embedded processor; FTIR spectrometry; FPU; Hybrid-FPGA; PowerPC 405; Virtex-4 FX

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Bekker, D. (2007). Hardware and software optimization of fourier transform infrared spectrometry on hybrid-FPGAs. (Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/3193

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Bekker, Dmitriy. “Hardware and software optimization of fourier transform infrared spectrometry on hybrid-FPGAs.” 2007. Thesis, Rochester Institute of Technology. Accessed December 06, 2019. https://scholarworks.rit.edu/theses/3193.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Bekker, Dmitriy. “Hardware and software optimization of fourier transform infrared spectrometry on hybrid-FPGAs.” 2007. Web. 06 Dec 2019.

Vancouver:

Bekker D. Hardware and software optimization of fourier transform infrared spectrometry on hybrid-FPGAs. [Internet] [Thesis]. Rochester Institute of Technology; 2007. [cited 2019 Dec 06]. Available from: https://scholarworks.rit.edu/theses/3193.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Bekker D. Hardware and software optimization of fourier transform infrared spectrometry on hybrid-FPGAs. [Thesis]. Rochester Institute of Technology; 2007. Available from: https://scholarworks.rit.edu/theses/3193

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Université de Montréal

12. Gill-Comeau, Maxime. Simulation et analyse modale du transport de chaleur dans les réseaux à dimensionnalité réduite .

Degree: 2018, Université de Montréal

Subjects/Keywords: Transport de chaleur; Dynamique moléculaire; Phonons; Relaxons; Analyse des modes normaux; Modèle FPU; Graphène; Heat transport; Molecular dynamics; Normal mode analysis; FPU model; Graphene

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APA (6th Edition):

Gill-Comeau, M. (2018). Simulation et analyse modale du transport de chaleur dans les réseaux à dimensionnalité réduite . (Thesis). Université de Montréal. Retrieved from http://hdl.handle.net/1866/20767

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gill-Comeau, Maxime. “Simulation et analyse modale du transport de chaleur dans les réseaux à dimensionnalité réduite .” 2018. Thesis, Université de Montréal. Accessed December 06, 2019. http://hdl.handle.net/1866/20767.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gill-Comeau, Maxime. “Simulation et analyse modale du transport de chaleur dans les réseaux à dimensionnalité réduite .” 2018. Web. 06 Dec 2019.

Vancouver:

Gill-Comeau M. Simulation et analyse modale du transport de chaleur dans les réseaux à dimensionnalité réduite . [Internet] [Thesis]. Université de Montréal; 2018. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/1866/20767.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gill-Comeau M. Simulation et analyse modale du transport de chaleur dans les réseaux à dimensionnalité réduite . [Thesis]. Université de Montréal; 2018. Available from: http://hdl.handle.net/1866/20767

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of New South Wales

13. Tempatarachoke, Pisut. Thermal conduction in the Fermi-Pasta-Ulam model.

Degree: Physical, 2005, University of New South Wales

 We conduct a comprehensive and systematic study of the Fermi-Pasta-Ulam (FPU) model using both equilibrium and non-equilibrium molecular dynamics simulations, with the aim being to… (more)

Subjects/Keywords: Anharmonicity; energy transport; fermi-pasta-ulam (FPU); molecular dynamics simulations; thermal analysis; thermal conductivity

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APA (6th Edition):

Tempatarachoke, P. (2005). Thermal conduction in the Fermi-Pasta-Ulam model. (Doctoral Dissertation). University of New South Wales. Retrieved from http://handle.unsw.edu.au/1959.4/38684 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:3282/SOURCE01?view=true

Chicago Manual of Style (16th Edition):

Tempatarachoke, Pisut. “Thermal conduction in the Fermi-Pasta-Ulam model.” 2005. Doctoral Dissertation, University of New South Wales. Accessed December 06, 2019. http://handle.unsw.edu.au/1959.4/38684 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:3282/SOURCE01?view=true.

MLA Handbook (7th Edition):

Tempatarachoke, Pisut. “Thermal conduction in the Fermi-Pasta-Ulam model.” 2005. Web. 06 Dec 2019.

Vancouver:

Tempatarachoke P. Thermal conduction in the Fermi-Pasta-Ulam model. [Internet] [Doctoral dissertation]. University of New South Wales; 2005. [cited 2019 Dec 06]. Available from: http://handle.unsw.edu.au/1959.4/38684 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:3282/SOURCE01?view=true.

Council of Science Editors:

Tempatarachoke P. Thermal conduction in the Fermi-Pasta-Ulam model. [Doctoral Dissertation]. University of New South Wales; 2005. Available from: http://handle.unsw.edu.au/1959.4/38684 ; https://unsworks.unsw.edu.au/fapi/datastream/unsworks:3282/SOURCE01?view=true

14. Truty, Wojciech J. Design and implementation of a floating point unit for rigel, a massively parallel accelerator.

Degree: MS, 1200, 2010, University of Illinois – Urbana-Champaign

 Scientific applications rely heavily on floating point data types. Floating point operations are complex and require complicated hardware that is both area and power intensive.… (more)

Subjects/Keywords: Floating point; Rigel; parallel; many core; multicore; processor; Accelerator; Floating point unit (FPU); floating point unit; IEEE Standard for Floating-Point Arithmetic (IEEE 754); Massively parallel

…Exec 2 (empty) (empty) FPU 2 FPU 3 FPU 4 Exec Decode Mem3 FPU 1… …Fetch Mem 2 Mem FPU CCRead WB Bypass Network SPRF RegFile Figure 1.2: Diagram of the… …FPU designs. However, the emergence of highly parallel processing units creates new… …thesis is to develop a clear picture of an FPU design which balances performance, area, and… …20 CHAPTER 3 FPU DESIGN AND IMPLEMENTATION 3.1 Methods Rigel is implemented using the… 

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Truty, W. J. (2010). Design and implementation of a floating point unit for rigel, a massively parallel accelerator. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/16472

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Truty, Wojciech J. “Design and implementation of a floating point unit for rigel, a massively parallel accelerator.” 2010. Thesis, University of Illinois – Urbana-Champaign. Accessed December 06, 2019. http://hdl.handle.net/2142/16472.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Truty, Wojciech J. “Design and implementation of a floating point unit for rigel, a massively parallel accelerator.” 2010. Web. 06 Dec 2019.

Vancouver:

Truty WJ. Design and implementation of a floating point unit for rigel, a massively parallel accelerator. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2010. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/2142/16472.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Truty WJ. Design and implementation of a floating point unit for rigel, a massively parallel accelerator. [Thesis]. University of Illinois – Urbana-Champaign; 2010. Available from: http://hdl.handle.net/2142/16472

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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