Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for subject:(Floating gate transistors). Showing records 1 – 8 of 8 total matches.

Search Limiters

Last 2 Years | English Only

No search limiters apply to these results.

▼ Search Limiters

1. Fakher, Sundes Juma. Advanced study of pentacene-based organic memory structures.

Degree: PhD, 2014, Bangor University

 A systematic approach has been used to optimise the fabrication process of pentacene-based nonvolatile organic thin film memory transistors (OTFMTs) operating at low programming voltages.… (more)

Subjects/Keywords: 004.568; Organic thin film, transistors, floating gate

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Fakher, S. J. (2014). Advanced study of pentacene-based organic memory structures. (Doctoral Dissertation). Bangor University. Retrieved from https://research.bangor.ac.uk/portal/en/theses/advanced-study-of-pentacenebased-organic-memory-structures(5319a571-2c4c-4f90-a26c-fa5e7da82cfb).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.613637

Chicago Manual of Style (16th Edition):

Fakher, Sundes Juma. “Advanced study of pentacene-based organic memory structures.” 2014. Doctoral Dissertation, Bangor University. Accessed August 05, 2020. https://research.bangor.ac.uk/portal/en/theses/advanced-study-of-pentacenebased-organic-memory-structures(5319a571-2c4c-4f90-a26c-fa5e7da82cfb).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.613637.

MLA Handbook (7th Edition):

Fakher, Sundes Juma. “Advanced study of pentacene-based organic memory structures.” 2014. Web. 05 Aug 2020.

Vancouver:

Fakher SJ. Advanced study of pentacene-based organic memory structures. [Internet] [Doctoral dissertation]. Bangor University; 2014. [cited 2020 Aug 05]. Available from: https://research.bangor.ac.uk/portal/en/theses/advanced-study-of-pentacenebased-organic-memory-structures(5319a571-2c4c-4f90-a26c-fa5e7da82cfb).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.613637.

Council of Science Editors:

Fakher SJ. Advanced study of pentacene-based organic memory structures. [Doctoral Dissertation]. Bangor University; 2014. Available from: https://research.bangor.ac.uk/portal/en/theses/advanced-study-of-pentacenebased-organic-memory-structures(5319a571-2c4c-4f90-a26c-fa5e7da82cfb).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.613637

2. Agopian, Paula Ghedini Der. Estudo do efeito de elevação atípica da transcondutância na região linear de polarização em dispositivos SOI nMOSFETS ultra-submicrométricos.

Degree: PhD, Microeletrônica, 2008, University of São Paulo

 Este trabalho apresenta o estudo do efeito de elevação atípica da transcondutância na região linear de polarização devido ao efeito de corpo flutuante induzido pela… (more)

Subjects/Keywords: Circuitos integrados MOS; FinFETs; Gate induced floating body effect; Microeletrônica; SOI technology; Strained transistors; Transconductance second peak

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Agopian, P. G. D. (2008). Estudo do efeito de elevação atípica da transcondutância na região linear de polarização em dispositivos SOI nMOSFETS ultra-submicrométricos. (Doctoral Dissertation). University of São Paulo. Retrieved from http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09022009-190025/ ;

Chicago Manual of Style (16th Edition):

Agopian, Paula Ghedini Der. “Estudo do efeito de elevação atípica da transcondutância na região linear de polarização em dispositivos SOI nMOSFETS ultra-submicrométricos.” 2008. Doctoral Dissertation, University of São Paulo. Accessed August 05, 2020. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09022009-190025/ ;.

MLA Handbook (7th Edition):

Agopian, Paula Ghedini Der. “Estudo do efeito de elevação atípica da transcondutância na região linear de polarização em dispositivos SOI nMOSFETS ultra-submicrométricos.” 2008. Web. 05 Aug 2020.

Vancouver:

Agopian PGD. Estudo do efeito de elevação atípica da transcondutância na região linear de polarização em dispositivos SOI nMOSFETS ultra-submicrométricos. [Internet] [Doctoral dissertation]. University of São Paulo; 2008. [cited 2020 Aug 05]. Available from: http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09022009-190025/ ;.

Council of Science Editors:

Agopian PGD. Estudo do efeito de elevação atípica da transcondutância na região linear de polarização em dispositivos SOI nMOSFETS ultra-submicrométricos. [Doctoral Dissertation]. University of São Paulo; 2008. Available from: http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09022009-190025/ ;

3. Degnan, Brian Paul. Temperature robust programmable subthreshold circuits through a balanced force approach.

Degree: PhD, Electrical and Computer Engineering, 2013, Georgia Tech

 The subthreshold region of operation has simple physics which allows for a balanced-force approach to behavioral modeling that has shown to be robust to temperature,… (more)

Subjects/Keywords: Floating-gate transistors; Compact EKV; Subthreshold; Transistors; Integrated circuits; Microelectronics

…in relationship to Vef f . . . . . . . . 15 To have matched floating-gate transistors, one… …gate transistors for precise programming of currents. 1.1 Subthreshold rises to the top The… …GATE TRANSISTORS The floating-gate transistor is a device where the gate polysilicon is… …for floating-gate transistors to accumulate charge in digital systems has been well… …state of the channel. The ability to set the “back from fab” state of floating-gate transistors… 

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Degnan, B. P. (2013). Temperature robust programmable subthreshold circuits through a balanced force approach. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/47548

Chicago Manual of Style (16th Edition):

Degnan, Brian Paul. “Temperature robust programmable subthreshold circuits through a balanced force approach.” 2013. Doctoral Dissertation, Georgia Tech. Accessed August 05, 2020. http://hdl.handle.net/1853/47548.

MLA Handbook (7th Edition):

Degnan, Brian Paul. “Temperature robust programmable subthreshold circuits through a balanced force approach.” 2013. Web. 05 Aug 2020.

Vancouver:

Degnan BP. Temperature robust programmable subthreshold circuits through a balanced force approach. [Internet] [Doctoral dissertation]. Georgia Tech; 2013. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/1853/47548.

Council of Science Editors:

Degnan BP. Temperature robust programmable subthreshold circuits through a balanced force approach. [Doctoral Dissertation]. Georgia Tech; 2013. Available from: http://hdl.handle.net/1853/47548


Texas A&M University

4. Abusultan, Monther Y. A. Digital Circuit Design Using Floating Gate Transistors.

Degree: PhD, Computer Engineering, 2017, Texas A&M University

Floating gate (flash) transistors are used exclusively for memory applications today. These applications include SD cards of various form factors, USB flash drives and SSDs.… (more)

Subjects/Keywords: flash-based design; floating gate transistors; digital logic using floating gate transistors; flash-based FPGA; flash-based design flow; flash-based CAD; multi-valued digital circuits; flash-based design optimization; ternary-valued digital circuit

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Abusultan, M. Y. A. (2017). Digital Circuit Design Using Floating Gate Transistors. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/187176

Chicago Manual of Style (16th Edition):

Abusultan, Monther Y A. “Digital Circuit Design Using Floating Gate Transistors.” 2017. Doctoral Dissertation, Texas A&M University. Accessed August 05, 2020. http://hdl.handle.net/1969.1/187176.

MLA Handbook (7th Edition):

Abusultan, Monther Y A. “Digital Circuit Design Using Floating Gate Transistors.” 2017. Web. 05 Aug 2020.

Vancouver:

Abusultan MYA. Digital Circuit Design Using Floating Gate Transistors. [Internet] [Doctoral dissertation]. Texas A&M University; 2017. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/1969.1/187176.

Council of Science Editors:

Abusultan MYA. Digital Circuit Design Using Floating Gate Transistors. [Doctoral Dissertation]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/187176


Georgia Tech

5. Dugger, Jeffery Don. Adaptive Analog VLSI Signal Processing and Neural Networks.

Degree: PhD, Electrical and Computer Engineering, 2003, Georgia Tech

 Research presented in this thesis provides a substantial leap from the study of interesting device physics to fully adaptive analog networks and lays a solid… (more)

Subjects/Keywords: Floating gate transistors; Neural networks; Adaptive filters; VLSI; Analog electronics

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Dugger, J. D. (2003). Adaptive Analog VLSI Signal Processing and Neural Networks. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/5294

Chicago Manual of Style (16th Edition):

Dugger, Jeffery Don. “Adaptive Analog VLSI Signal Processing and Neural Networks.” 2003. Doctoral Dissertation, Georgia Tech. Accessed August 05, 2020. http://hdl.handle.net/1853/5294.

MLA Handbook (7th Edition):

Dugger, Jeffery Don. “Adaptive Analog VLSI Signal Processing and Neural Networks.” 2003. Web. 05 Aug 2020.

Vancouver:

Dugger JD. Adaptive Analog VLSI Signal Processing and Neural Networks. [Internet] [Doctoral dissertation]. Georgia Tech; 2003. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/1853/5294.

Council of Science Editors:

Dugger JD. Adaptive Analog VLSI Signal Processing and Neural Networks. [Doctoral Dissertation]. Georgia Tech; 2003. Available from: http://hdl.handle.net/1853/5294


Georgia Tech

6. Serrano, Guillermo J. High Performance Analog Circuit Design Using Floating-Gate Techniques.

Degree: PhD, Electrical and Computer Engineering, 2007, Georgia Tech

 The programmability property of floating-gate transistors is exploited in this work to compensate for mismatch and device parameter variations in various high performance analog circuits.… (more)

Subjects/Keywords: Floating-gates; Voltage reference; Current refernce; Amplifiers; Digital-to-analog converter; Programming; Electronic analog computers Circuits; Field programmable gate arrays; Transistors

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Serrano, G. J. (2007). High Performance Analog Circuit Design Using Floating-Gate Techniques. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/19819

Chicago Manual of Style (16th Edition):

Serrano, Guillermo J. “High Performance Analog Circuit Design Using Floating-Gate Techniques.” 2007. Doctoral Dissertation, Georgia Tech. Accessed August 05, 2020. http://hdl.handle.net/1853/19819.

MLA Handbook (7th Edition):

Serrano, Guillermo J. “High Performance Analog Circuit Design Using Floating-Gate Techniques.” 2007. Web. 05 Aug 2020.

Vancouver:

Serrano GJ. High Performance Analog Circuit Design Using Floating-Gate Techniques. [Internet] [Doctoral dissertation]. Georgia Tech; 2007. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/1853/19819.

Council of Science Editors:

Serrano GJ. High Performance Analog Circuit Design Using Floating-Gate Techniques. [Doctoral Dissertation]. Georgia Tech; 2007. Available from: http://hdl.handle.net/1853/19819


Georgia Tech

7. Yoo, Heejong. Low-Power Audio Input Enhancement for Portable Devices.

Degree: PhD, Electrical and Computer Engineering, 2005, Georgia Tech

 With the development of VLSI and wireless communication technology, portable devices such as personal digital assistants (PDAs), pocket PCs, and mobile phones have gained a… (more)

Subjects/Keywords: LMS adaptive filter; Low-power processing; CADSP; Floating gate transistors; Speech processing systems; Analog electronic systems; Mobile computing; Portable computers Programming; Signal processing Digital techniques

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yoo, H. (2005). Low-Power Audio Input Enhancement for Portable Devices. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/6821

Chicago Manual of Style (16th Edition):

Yoo, Heejong. “Low-Power Audio Input Enhancement for Portable Devices.” 2005. Doctoral Dissertation, Georgia Tech. Accessed August 05, 2020. http://hdl.handle.net/1853/6821.

MLA Handbook (7th Edition):

Yoo, Heejong. “Low-Power Audio Input Enhancement for Portable Devices.” 2005. Web. 05 Aug 2020.

Vancouver:

Yoo H. Low-Power Audio Input Enhancement for Portable Devices. [Internet] [Doctoral dissertation]. Georgia Tech; 2005. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/1853/6821.

Council of Science Editors:

Yoo H. Low-Power Audio Input Enhancement for Portable Devices. [Doctoral Dissertation]. Georgia Tech; 2005. Available from: http://hdl.handle.net/1853/6821


Georgia Tech

8. Srinivasan, Venkatesh. Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning.

Degree: PhD, Electrical and Computer Engineering, 2006, Georgia Tech

 In this work, programmable analog techniques using floating-gate transistors have been developed to design precision analog circuits, low-power signal processing primitives and adaptive systems that… (more)

Subjects/Keywords: Programmable multipliers; Adaptive filters; Voltage references; Offset cancellation; Floating-gate transistors; Synapse; Neural networks (Computer science); Signal processing; Adaptive signal processing; Electronic analog computers Circuits; Gate array circuits

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Srinivasan, V. (2006). Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/11588

Chicago Manual of Style (16th Edition):

Srinivasan, Venkatesh. “Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning.” 2006. Doctoral Dissertation, Georgia Tech. Accessed August 05, 2020. http://hdl.handle.net/1853/11588.

MLA Handbook (7th Edition):

Srinivasan, Venkatesh. “Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning.” 2006. Web. 05 Aug 2020.

Vancouver:

Srinivasan V. Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning. [Internet] [Doctoral dissertation]. Georgia Tech; 2006. [cited 2020 Aug 05]. Available from: http://hdl.handle.net/1853/11588.

Council of Science Editors:

Srinivasan V. Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning. [Doctoral Dissertation]. Georgia Tech; 2006. Available from: http://hdl.handle.net/1853/11588

.