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You searched for subject:(Flash memory). Showing records 1 – 30 of 119 total matches.

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1. Kim, Yongjune. Writing on Dirty Memory.

Degree: 2016, Carnegie Mellon University

 Non-volatile memories (NVM) including flash memories and resistive memories have attracted significant interest as data storage media. Flash memories are widely employed in mobile devices… (more)

Subjects/Keywords: Memory; Nonvolatile memory; Coding; Side information; Flash memory; Resistive memory

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kim, Y. (2016). Writing on Dirty Memory. (Thesis). Carnegie Mellon University. Retrieved from http://repository.cmu.edu/dissertations/835

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kim, Yongjune. “Writing on Dirty Memory.” 2016. Thesis, Carnegie Mellon University. Accessed September 28, 2020. http://repository.cmu.edu/dissertations/835.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kim, Yongjune. “Writing on Dirty Memory.” 2016. Web. 28 Sep 2020.

Vancouver:

Kim Y. Writing on Dirty Memory. [Internet] [Thesis]. Carnegie Mellon University; 2016. [cited 2020 Sep 28]. Available from: http://repository.cmu.edu/dissertations/835.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kim Y. Writing on Dirty Memory. [Thesis]. Carnegie Mellon University; 2016. Available from: http://repository.cmu.edu/dissertations/835

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


UCLA

2. Vakilinia, Kasra. Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory.

Degree: Electrical Engineering, 2016, UCLA

 This dissertation mainly focuses on two different branches of coding theory and its applications:1) coding to approach capacity in short blocklengths using feedback and 2)… (more)

Subjects/Keywords: Electrical engineering; Feedback; Flash Memory; LDPC Coding

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APA (6th Edition):

Vakilinia, K. (2016). Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory. (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/08f672rf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vakilinia, Kasra. “Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory.” 2016. Thesis, UCLA. Accessed September 28, 2020. http://www.escholarship.org/uc/item/08f672rf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vakilinia, Kasra. “Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory.” 2016. Web. 28 Sep 2020.

Vancouver:

Vakilinia K. Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory. [Internet] [Thesis]. UCLA; 2016. [cited 2020 Sep 28]. Available from: http://www.escholarship.org/uc/item/08f672rf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vakilinia K. Coding Schemes to Approach Capacity in Short Blocklength with Feedback and LDPC Coding for Flash Memory. [Thesis]. UCLA; 2016. Available from: http://www.escholarship.org/uc/item/08f672rf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Cornell University

3. Lee, Jaegoo. Three-Dimensional Integration For Flash Memory Cell.

Degree: 2009, Cornell University

 Scaling of flash memory cell structures for large-capacity nonvolatile storage will encounter serious technical challenges in lithography, disturbance and gate stack designs. An alternative way… (more)

Subjects/Keywords: Flash Memory Cell

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APA (6th Edition):

Lee, J. (2009). Three-Dimensional Integration For Flash Memory Cell. (Thesis). Cornell University. Retrieved from http://hdl.handle.net/1813/13999

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lee, Jaegoo. “Three-Dimensional Integration For Flash Memory Cell.” 2009. Thesis, Cornell University. Accessed September 28, 2020. http://hdl.handle.net/1813/13999.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lee, Jaegoo. “Three-Dimensional Integration For Flash Memory Cell.” 2009. Web. 28 Sep 2020.

Vancouver:

Lee J. Three-Dimensional Integration For Flash Memory Cell. [Internet] [Thesis]. Cornell University; 2009. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/1813/13999.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lee J. Three-Dimensional Integration For Flash Memory Cell. [Thesis]. Cornell University; 2009. Available from: http://hdl.handle.net/1813/13999

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Rochester Institute of Technology

4. Streat, Lennard G. A Scalable Flash-Based Hardware Architecture for the Hierarchical Temporal Memory Spatial Pooler.

Degree: MS, Computer Engineering, 2016, Rochester Institute of Technology

  Hierarchical temporal memory (HTM) is a biomimetic machine learning algorithm focused upon modeling the structural and algorithmic properties of the neocortex. It is comprised… (more)

Subjects/Keywords: Flash; Hierarchical; Memory; Processor; Storage; Temporal

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APA (6th Edition):

Streat, L. G. (2016). A Scalable Flash-Based Hardware Architecture for the Hierarchical Temporal Memory Spatial Pooler. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/9058

Chicago Manual of Style (16th Edition):

Streat, Lennard G. “A Scalable Flash-Based Hardware Architecture for the Hierarchical Temporal Memory Spatial Pooler.” 2016. Masters Thesis, Rochester Institute of Technology. Accessed September 28, 2020. https://scholarworks.rit.edu/theses/9058.

MLA Handbook (7th Edition):

Streat, Lennard G. “A Scalable Flash-Based Hardware Architecture for the Hierarchical Temporal Memory Spatial Pooler.” 2016. Web. 28 Sep 2020.

Vancouver:

Streat LG. A Scalable Flash-Based Hardware Architecture for the Hierarchical Temporal Memory Spatial Pooler. [Internet] [Masters thesis]. Rochester Institute of Technology; 2016. [cited 2020 Sep 28]. Available from: https://scholarworks.rit.edu/theses/9058.

Council of Science Editors:

Streat LG. A Scalable Flash-Based Hardware Architecture for the Hierarchical Temporal Memory Spatial Pooler. [Masters Thesis]. Rochester Institute of Technology; 2016. Available from: https://scholarworks.rit.edu/theses/9058


NSYSU

5. Chen, Chia-Lun. The Marketing Strategic Research of Memory Module -A Case Study of T company.

Degree: Master, EMBA, 2013, NSYSU

 Since Taiwan has been an important manufacturing center for high-tech electronic products, memory cards not only the components concept for consumers, now are end products… (more)

Subjects/Keywords: memory module; market strategy; nand flash; memory; brand

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APA (6th Edition):

Chen, C. (2013). The Marketing Strategic Research of Memory Module -A Case Study of T company. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0416113-151932

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Chia-Lun. “The Marketing Strategic Research of Memory Module -A Case Study of T company.” 2013. Thesis, NSYSU. Accessed September 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0416113-151932.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Chia-Lun. “The Marketing Strategic Research of Memory Module -A Case Study of T company.” 2013. Web. 28 Sep 2020.

Vancouver:

Chen C. The Marketing Strategic Research of Memory Module -A Case Study of T company. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Sep 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0416113-151932.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen C. The Marketing Strategic Research of Memory Module -A Case Study of T company. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0416113-151932

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

6. Shahidi, Narges. Flash Translation Layer Design in Solid State Drives.

Degree: 2017, Penn State University

 In the last decade, NAND fash-based SSDs have been widely adopted for high-end enterprise systems in an attempt to provide a high-performance and reliable storage.… (more)

Subjects/Keywords: SSD; NAND Flash Memory; Solid State Drives; Flash Translation Layer; Storage System

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Shahidi, N. (2017). Flash Translation Layer Design in Solid State Drives. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/14079nxs314

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Shahidi, Narges. “Flash Translation Layer Design in Solid State Drives.” 2017. Thesis, Penn State University. Accessed September 28, 2020. https://submit-etda.libraries.psu.edu/catalog/14079nxs314.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Shahidi, Narges. “Flash Translation Layer Design in Solid State Drives.” 2017. Web. 28 Sep 2020.

Vancouver:

Shahidi N. Flash Translation Layer Design in Solid State Drives. [Internet] [Thesis]. Penn State University; 2017. [cited 2020 Sep 28]. Available from: https://submit-etda.libraries.psu.edu/catalog/14079nxs314.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Shahidi N. Flash Translation Layer Design in Solid State Drives. [Thesis]. Penn State University; 2017. Available from: https://submit-etda.libraries.psu.edu/catalog/14079nxs314

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Northeastern University

7. McCormick, Thomas. Ultra-reliable flash memory systems for embedded applications.

Degree: PhD, Department of Electrical and Computer Engineering, 2016, Northeastern University

 Based on its ruggedness, solid-state flash memory has been accepted as the basis of code and data storage in embedded systems applications for several decades.… (more)

Subjects/Keywords: embedded computer; flash memory systems; flash translation Layer (FTL); NAND; reliability; write amplification factor (WAF)

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APA (6th Edition):

McCormick, T. (2016). Ultra-reliable flash memory systems for embedded applications. (Doctoral Dissertation). Northeastern University. Retrieved from http://hdl.handle.net/2047/D20211693

Chicago Manual of Style (16th Edition):

McCormick, Thomas. “Ultra-reliable flash memory systems for embedded applications.” 2016. Doctoral Dissertation, Northeastern University. Accessed September 28, 2020. http://hdl.handle.net/2047/D20211693.

MLA Handbook (7th Edition):

McCormick, Thomas. “Ultra-reliable flash memory systems for embedded applications.” 2016. Web. 28 Sep 2020.

Vancouver:

McCormick T. Ultra-reliable flash memory systems for embedded applications. [Internet] [Doctoral dissertation]. Northeastern University; 2016. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/2047/D20211693.

Council of Science Editors:

McCormick T. Ultra-reliable flash memory systems for embedded applications. [Doctoral Dissertation]. Northeastern University; 2016. Available from: http://hdl.handle.net/2047/D20211693


Brno University of Technology

8. Křenek, Pavel. USB zavaděč pro 8/32 bitové mikrokontroléry: USB bootloader for 8/32 bit microcontrollers.

Degree: 2019, Brno University of Technology

This work deals with issues of in circuit programming with using a bootloader. The general aim is to create functional bootloader’s for the two different types of Freescale microcontrollers Freescale. Advisors/Committee Members: Semiconductors, Pavel Lajšner, Freescale (advisor), Galda, Michael (referee).

Subjects/Keywords: Zavaděč; obvodové programování; flashovací funkce; komunikace; mikrokontrolér; flash paměť.; Bootloader; in circuit programming; flash function; communication; microcontroller; flash memory.

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Křenek, P. (2019). USB zavaděč pro 8/32 bitové mikrokontroléry: USB bootloader for 8/32 bit microcontrollers. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/6805

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Křenek, Pavel. “USB zavaděč pro 8/32 bitové mikrokontroléry: USB bootloader for 8/32 bit microcontrollers.” 2019. Thesis, Brno University of Technology. Accessed September 28, 2020. http://hdl.handle.net/11012/6805.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Křenek, Pavel. “USB zavaděč pro 8/32 bitové mikrokontroléry: USB bootloader for 8/32 bit microcontrollers.” 2019. Web. 28 Sep 2020.

Vancouver:

Křenek P. USB zavaděč pro 8/32 bitové mikrokontroléry: USB bootloader for 8/32 bit microcontrollers. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/11012/6805.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Křenek P. USB zavaděč pro 8/32 bitové mikrokontroléry: USB bootloader for 8/32 bit microcontrollers. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/6805

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Indian Institute of Science

9. Srimugunthan, *. Efficient Usage Of Flash Memories In High Performance Scenarios.

Degree: MSc Engg, Faculty of Engineering, 2016, Indian Institute of Science

 New PCI-e flash cards and SSDs supporting over 100,000 IOPs are now available, with several usecases in the design of a high performance storage system.… (more)

Subjects/Keywords: Flash Cards; Flash Memory Scaling; High Performance Computing; Distributed Flash Memories; Word Recognition; Flash Translation Layer (FTL); Distributed File System; Parallelism Flash Cards; Flash Cards - Garbage Collection; Flash Storage Nodes; Cluster Storage; Distributed Storage System; Computer Science

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Srimugunthan, *. (2016). Efficient Usage Of Flash Memories In High Performance Scenarios. (Masters Thesis). Indian Institute of Science. Retrieved from http://etd.iisc.ac.in/handle/2005/2562

Chicago Manual of Style (16th Edition):

Srimugunthan, *. “Efficient Usage Of Flash Memories In High Performance Scenarios.” 2016. Masters Thesis, Indian Institute of Science. Accessed September 28, 2020. http://etd.iisc.ac.in/handle/2005/2562.

MLA Handbook (7th Edition):

Srimugunthan, *. “Efficient Usage Of Flash Memories In High Performance Scenarios.” 2016. Web. 28 Sep 2020.

Vancouver:

Srimugunthan *. Efficient Usage Of Flash Memories In High Performance Scenarios. [Internet] [Masters thesis]. Indian Institute of Science; 2016. [cited 2020 Sep 28]. Available from: http://etd.iisc.ac.in/handle/2005/2562.

Council of Science Editors:

Srimugunthan *. Efficient Usage Of Flash Memories In High Performance Scenarios. [Masters Thesis]. Indian Institute of Science; 2016. Available from: http://etd.iisc.ac.in/handle/2005/2562


Texas A&M University

10. Li, Yue. Algorithms and Data Representations for Emerging Non-Volatile Memories.

Degree: PhD, Computer Science, 2014, Texas A&M University

 The evolution of data storage technologies has been extraordinary. Hard disk drives that fit in current personal computers have the capacity that requires tons of… (more)

Subjects/Keywords: Nonvolatile memory; flash memory; phase-change memory; coding theory; error correcting code; write-once memory; reliability; endurance; rank modulation code; scrubbing

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APA (6th Edition):

Li, Y. (2014). Algorithms and Data Representations for Emerging Non-Volatile Memories. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/152646

Chicago Manual of Style (16th Edition):

Li, Yue. “Algorithms and Data Representations for Emerging Non-Volatile Memories.” 2014. Doctoral Dissertation, Texas A&M University. Accessed September 28, 2020. http://hdl.handle.net/1969.1/152646.

MLA Handbook (7th Edition):

Li, Yue. “Algorithms and Data Representations for Emerging Non-Volatile Memories.” 2014. Web. 28 Sep 2020.

Vancouver:

Li Y. Algorithms and Data Representations for Emerging Non-Volatile Memories. [Internet] [Doctoral dissertation]. Texas A&M University; 2014. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/1969.1/152646.

Council of Science Editors:

Li Y. Algorithms and Data Representations for Emerging Non-Volatile Memories. [Doctoral Dissertation]. Texas A&M University; 2014. Available from: http://hdl.handle.net/1969.1/152646


University of California – Santa Cruz

11. Yang, Jingpei. Improving Performance for Flash-Based Storage Systems.

Degree: Computer Science, 2014, University of California – Santa Cruz

 With the dramatic advances in electronic device industry, the availability of high speed non-volatile memory (NVRAM) has introduced a new tier into the storage hierarchy,… (more)

Subjects/Keywords: Computer science; file system; flash memory; performance; storage

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APA (6th Edition):

Yang, J. (2014). Improving Performance for Flash-Based Storage Systems. (Thesis). University of California – Santa Cruz. Retrieved from http://www.escholarship.org/uc/item/7w70s24f

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Jingpei. “Improving Performance for Flash-Based Storage Systems.” 2014. Thesis, University of California – Santa Cruz. Accessed September 28, 2020. http://www.escholarship.org/uc/item/7w70s24f.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Jingpei. “Improving Performance for Flash-Based Storage Systems.” 2014. Web. 28 Sep 2020.

Vancouver:

Yang J. Improving Performance for Flash-Based Storage Systems. [Internet] [Thesis]. University of California – Santa Cruz; 2014. [cited 2020 Sep 28]. Available from: http://www.escholarship.org/uc/item/7w70s24f.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang J. Improving Performance for Flash-Based Storage Systems. [Thesis]. University of California – Santa Cruz; 2014. Available from: http://www.escholarship.org/uc/item/7w70s24f

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

12. Προδρομάκης, Αντώνιος. Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών.

Degree: 2015, University of Patras

 Τις τελευταίες δεκαετίες, η ανάπτυξη των non-volatile μνημών (NVMs) κατέστησε ικανή την αντικατάσταση volatile μνημών, όπως των DRAMs και των μαγνητικών σκληρών δίσκων (HDDs), σε… (more)

Subjects/Keywords: Εξομοίωση; Γήρανση; 621.397; NAND flash; PCM; Non-volatile memory (NVM); FPGA

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Προδρομάκης, . (2015). Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών. (Masters Thesis). University of Patras. Retrieved from http://hdl.handle.net/10889/8815

Chicago Manual of Style (16th Edition):

Προδρομάκης, Αντώνιος. “Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών.” 2015. Masters Thesis, University of Patras. Accessed September 28, 2020. http://hdl.handle.net/10889/8815.

MLA Handbook (7th Edition):

Προδρομάκης, Αντώνιος. “Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών.” 2015. Web. 28 Sep 2020.

Vancouver:

Προδρομάκης . Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών. [Internet] [Masters thesis]. University of Patras; 2015. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/10889/8815.

Council of Science Editors:

Προδρομάκης . Μοντελοποίηση και εξομοίωση των χαρακτηριστικών γήρανσης NV μνημών. [Masters Thesis]. University of Patras; 2015. Available from: http://hdl.handle.net/10889/8815


University of Michigan

13. Dong, Qing. Low-power Volatile and Non-volatile Memory Design.

Degree: PhD, Electrical Engineering, 2017, University of Michigan

 Embedded memories play a pivotal role in VLSI systems to support the increasing need of data storage in various applications. With technology scaling, memory cell… (more)

Subjects/Keywords: Low Power; SRAM; Flash; MRAM; Memory; Electrical Engineering; Engineering

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APA (6th Edition):

Dong, Q. (2017). Low-power Volatile and Non-volatile Memory Design. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/140951

Chicago Manual of Style (16th Edition):

Dong, Qing. “Low-power Volatile and Non-volatile Memory Design.” 2017. Doctoral Dissertation, University of Michigan. Accessed September 28, 2020. http://hdl.handle.net/2027.42/140951.

MLA Handbook (7th Edition):

Dong, Qing. “Low-power Volatile and Non-volatile Memory Design.” 2017. Web. 28 Sep 2020.

Vancouver:

Dong Q. Low-power Volatile and Non-volatile Memory Design. [Internet] [Doctoral dissertation]. University of Michigan; 2017. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/2027.42/140951.

Council of Science Editors:

Dong Q. Low-power Volatile and Non-volatile Memory Design. [Doctoral Dissertation]. University of Michigan; 2017. Available from: http://hdl.handle.net/2027.42/140951


Georgia Tech

14. Shim, Da Eun. 3D flash memory cube design utilizing COTS for space.

Degree: MS, Electrical and Computer Engineering, 2019, Georgia Tech

 With the rapid growth in scope for space missions, the computing capabilities of on-board spacecraft is becoming a major limiting factor for future missions. This… (more)

Subjects/Keywords: NAND flash; Memory cube; COTS; Electronics for space

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APA (6th Edition):

Shim, D. E. (2019). 3D flash memory cube design utilizing COTS for space. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/62704

Chicago Manual of Style (16th Edition):

Shim, Da Eun. “3D flash memory cube design utilizing COTS for space.” 2019. Masters Thesis, Georgia Tech. Accessed September 28, 2020. http://hdl.handle.net/1853/62704.

MLA Handbook (7th Edition):

Shim, Da Eun. “3D flash memory cube design utilizing COTS for space.” 2019. Web. 28 Sep 2020.

Vancouver:

Shim DE. 3D flash memory cube design utilizing COTS for space. [Internet] [Masters thesis]. Georgia Tech; 2019. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/1853/62704.

Council of Science Editors:

Shim DE. 3D flash memory cube design utilizing COTS for space. [Masters Thesis]. Georgia Tech; 2019. Available from: http://hdl.handle.net/1853/62704


Penn State University

15. Kim, Youngjae. DESIGN CHALLENGES ON ENTERPRISE-SCALE STORAGE SYSTEMS EMPLOYING HARD DRIVES AND NAND FLASH BASED SOLID-STATE DRIVES .

Degree: 2009, Penn State University

Flash memory overcomes some key shortcomings of hard disk drives (HDDs), including faster access to non-sequential data and lower power consumption. Economic forces, driven by… (more)

Subjects/Keywords: Storage Systems; Flash Memory

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kim, Y. (2009). DESIGN CHALLENGES ON ENTERPRISE-SCALE STORAGE SYSTEMS EMPLOYING HARD DRIVES AND NAND FLASH BASED SOLID-STATE DRIVES . (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/10128

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kim, Youngjae. “DESIGN CHALLENGES ON ENTERPRISE-SCALE STORAGE SYSTEMS EMPLOYING HARD DRIVES AND NAND FLASH BASED SOLID-STATE DRIVES .” 2009. Thesis, Penn State University. Accessed September 28, 2020. https://submit-etda.libraries.psu.edu/catalog/10128.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kim, Youngjae. “DESIGN CHALLENGES ON ENTERPRISE-SCALE STORAGE SYSTEMS EMPLOYING HARD DRIVES AND NAND FLASH BASED SOLID-STATE DRIVES .” 2009. Web. 28 Sep 2020.

Vancouver:

Kim Y. DESIGN CHALLENGES ON ENTERPRISE-SCALE STORAGE SYSTEMS EMPLOYING HARD DRIVES AND NAND FLASH BASED SOLID-STATE DRIVES . [Internet] [Thesis]. Penn State University; 2009. [cited 2020 Sep 28]. Available from: https://submit-etda.libraries.psu.edu/catalog/10128.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kim Y. DESIGN CHALLENGES ON ENTERPRISE-SCALE STORAGE SYSTEMS EMPLOYING HARD DRIVES AND NAND FLASH BASED SOLID-STATE DRIVES . [Thesis]. Penn State University; 2009. Available from: https://submit-etda.libraries.psu.edu/catalog/10128

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

16. Fedorov, Viacheslav. Memory Management for Emerging Memory Technologies.

Degree: PhD, Computer Engineering, 2016, Texas A&M University

 The Memory Wall, or the gap between CPU speed and main memory latency, is ever increasing. The latency of Dynamic Random-Access Memory (DRAM) is now… (more)

Subjects/Keywords: NVM; emerging memory technologies; caching; OS; paging; swapping; prefetch; flash

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Fedorov, V. (2016). Memory Management for Emerging Memory Technologies. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/187349

Chicago Manual of Style (16th Edition):

Fedorov, Viacheslav. “Memory Management for Emerging Memory Technologies.” 2016. Doctoral Dissertation, Texas A&M University. Accessed September 28, 2020. http://hdl.handle.net/1969.1/187349.

MLA Handbook (7th Edition):

Fedorov, Viacheslav. “Memory Management for Emerging Memory Technologies.” 2016. Web. 28 Sep 2020.

Vancouver:

Fedorov V. Memory Management for Emerging Memory Technologies. [Internet] [Doctoral dissertation]. Texas A&M University; 2016. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/1969.1/187349.

Council of Science Editors:

Fedorov V. Memory Management for Emerging Memory Technologies. [Doctoral Dissertation]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/187349


University of Toledo

17. Ordosgoitti, Jorhan Rainier. Development of a Non-Volatile Memristor Device Based on a Manganese-Doped Titanium Oxide Material.

Degree: MSin Electrical Engineering, Electrical Engineering, 2010, University of Toledo

Flash Memory is the current predominant technology in the non-volatile memory market. It has gained popularity due to its rapid increase in reliability, storage density… (more)

Subjects/Keywords: Electrical Engineering; Volatile; Non-Volatile; Memristor; Manganese; Titanium; Oxide; Flash; Memory

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ordosgoitti, J. R. (2010). Development of a Non-Volatile Memristor Device Based on a Manganese-Doped Titanium Oxide Material. (Masters Thesis). University of Toledo. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=toledo1290131827

Chicago Manual of Style (16th Edition):

Ordosgoitti, Jorhan Rainier. “Development of a Non-Volatile Memristor Device Based on a Manganese-Doped Titanium Oxide Material.” 2010. Masters Thesis, University of Toledo. Accessed September 28, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1290131827.

MLA Handbook (7th Edition):

Ordosgoitti, Jorhan Rainier. “Development of a Non-Volatile Memristor Device Based on a Manganese-Doped Titanium Oxide Material.” 2010. Web. 28 Sep 2020.

Vancouver:

Ordosgoitti JR. Development of a Non-Volatile Memristor Device Based on a Manganese-Doped Titanium Oxide Material. [Internet] [Masters thesis]. University of Toledo; 2010. [cited 2020 Sep 28]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=toledo1290131827.

Council of Science Editors:

Ordosgoitti JR. Development of a Non-Volatile Memristor Device Based on a Manganese-Doped Titanium Oxide Material. [Masters Thesis]. University of Toledo; 2010. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=toledo1290131827


Universiteit Utrecht

18. Gayet, S. From the blind eye to the mind’s eye : How behavioral relevance determines access to visual awareness.

Degree: 2016, Universiteit Utrecht

 At any moment in time we are submerged in an overwhelming amount of visual information. If our brains were to consciously process all the information… (more)

Subjects/Keywords: Consciousness; Visual Awareness; Visual Working Memory; Subliminal; Continuous Flash Suppression

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gayet, S. (2016). From the blind eye to the mind’s eye : How behavioral relevance determines access to visual awareness. (Doctoral Dissertation). Universiteit Utrecht. Retrieved from http://dspace.library.uu.nl:8080/handle/1874/334106

Chicago Manual of Style (16th Edition):

Gayet, S. “From the blind eye to the mind’s eye : How behavioral relevance determines access to visual awareness.” 2016. Doctoral Dissertation, Universiteit Utrecht. Accessed September 28, 2020. http://dspace.library.uu.nl:8080/handle/1874/334106.

MLA Handbook (7th Edition):

Gayet, S. “From the blind eye to the mind’s eye : How behavioral relevance determines access to visual awareness.” 2016. Web. 28 Sep 2020.

Vancouver:

Gayet S. From the blind eye to the mind’s eye : How behavioral relevance determines access to visual awareness. [Internet] [Doctoral dissertation]. Universiteit Utrecht; 2016. [cited 2020 Sep 28]. Available from: http://dspace.library.uu.nl:8080/handle/1874/334106.

Council of Science Editors:

Gayet S. From the blind eye to the mind’s eye : How behavioral relevance determines access to visual awareness. [Doctoral Dissertation]. Universiteit Utrecht; 2016. Available from: http://dspace.library.uu.nl:8080/handle/1874/334106


Wayne State University

19. Shrestha, Mochan. Study On Endurance Of Flash Memory Ssds.

Degree: PhD, Computer Science, 2014, Wayne State University

Flash memory promises to revolutionize storage systems because of its massive performance gains, ruggedness, large decrease in power usage and physical space requirements, but… (more)

Subjects/Keywords: endurance; flash memory; wear leveling; write amplification; Computer Sciences

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Shrestha, M. (2014). Study On Endurance Of Flash Memory Ssds. (Doctoral Dissertation). Wayne State University. Retrieved from https://digitalcommons.wayne.edu/oa_dissertations/920

Chicago Manual of Style (16th Edition):

Shrestha, Mochan. “Study On Endurance Of Flash Memory Ssds.” 2014. Doctoral Dissertation, Wayne State University. Accessed September 28, 2020. https://digitalcommons.wayne.edu/oa_dissertations/920.

MLA Handbook (7th Edition):

Shrestha, Mochan. “Study On Endurance Of Flash Memory Ssds.” 2014. Web. 28 Sep 2020.

Vancouver:

Shrestha M. Study On Endurance Of Flash Memory Ssds. [Internet] [Doctoral dissertation]. Wayne State University; 2014. [cited 2020 Sep 28]. Available from: https://digitalcommons.wayne.edu/oa_dissertations/920.

Council of Science Editors:

Shrestha M. Study On Endurance Of Flash Memory Ssds. [Doctoral Dissertation]. Wayne State University; 2014. Available from: https://digitalcommons.wayne.edu/oa_dissertations/920


Virginia Tech

20. Mandlekar, Anup Shrikant. An Application Framework for a Power-Aware Processor Architecture.

Degree: MS, Electrical and Computer Engineering, 2012, Virginia Tech

 The instruction-set based general purpose processors are not energy-efficient for event-driven applications. The E-textiles group at Virginia Tech proposed a novel data-flow processor architecture design… (more)

Subjects/Keywords: Low Power Flash Memory Cells; Model Driven Engineering; Simulink; Dataflow Architecture

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APA (6th Edition):

Mandlekar, A. S. (2012). An Application Framework for a Power-Aware Processor Architecture. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/34484

Chicago Manual of Style (16th Edition):

Mandlekar, Anup Shrikant. “An Application Framework for a Power-Aware Processor Architecture.” 2012. Masters Thesis, Virginia Tech. Accessed September 28, 2020. http://hdl.handle.net/10919/34484.

MLA Handbook (7th Edition):

Mandlekar, Anup Shrikant. “An Application Framework for a Power-Aware Processor Architecture.” 2012. Web. 28 Sep 2020.

Vancouver:

Mandlekar AS. An Application Framework for a Power-Aware Processor Architecture. [Internet] [Masters thesis]. Virginia Tech; 2012. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/10919/34484.

Council of Science Editors:

Mandlekar AS. An Application Framework for a Power-Aware Processor Architecture. [Masters Thesis]. Virginia Tech; 2012. Available from: http://hdl.handle.net/10919/34484


University of Illinois – Chicago

21. Fogel, Jessica S. Vasomotor Symptoms and Cognition Among Women Receiving Estrogen Therapy for Breast Cancer.

Degree: 2019, University of Illinois – Chicago

 Increases in vasomotor symptoms (VMS) and decreases in cognitive performance have been demonstrated among women with a history of breast cancer. There is considerable interest… (more)

Subjects/Keywords: Cognition; Memory; Vasomotor symptoms; Hot flash; Stellate ganglion blockade; Breast Cancer

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APA (6th Edition):

Fogel, J. S. (2019). Vasomotor Symptoms and Cognition Among Women Receiving Estrogen Therapy for Breast Cancer. (Thesis). University of Illinois – Chicago. Retrieved from http://hdl.handle.net/10027/23661

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Fogel, Jessica S. “Vasomotor Symptoms and Cognition Among Women Receiving Estrogen Therapy for Breast Cancer.” 2019. Thesis, University of Illinois – Chicago. Accessed September 28, 2020. http://hdl.handle.net/10027/23661.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Fogel, Jessica S. “Vasomotor Symptoms and Cognition Among Women Receiving Estrogen Therapy for Breast Cancer.” 2019. Web. 28 Sep 2020.

Vancouver:

Fogel JS. Vasomotor Symptoms and Cognition Among Women Receiving Estrogen Therapy for Breast Cancer. [Internet] [Thesis]. University of Illinois – Chicago; 2019. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/10027/23661.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Fogel JS. Vasomotor Symptoms and Cognition Among Women Receiving Estrogen Therapy for Breast Cancer. [Thesis]. University of Illinois – Chicago; 2019. Available from: http://hdl.handle.net/10027/23661

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brunel University

22. Schmidgall, Ralf. Automotive embedded systems software reprogramming.

Degree: PhD, 2012, Brunel University

 The exponential growth of computer power is no longer limited to stand alone computing systems but applies to all areas of commercial embedded computing systems.… (more)

Subjects/Keywords: 005.1; Microcontroller; Flash memory; Magnetoresistive RAM; Diagnosis; Vehicle

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APA (6th Edition):

Schmidgall, R. (2012). Automotive embedded systems software reprogramming. (Doctoral Dissertation). Brunel University. Retrieved from http://bura.brunel.ac.uk/handle/2438/7070 ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.560944

Chicago Manual of Style (16th Edition):

Schmidgall, Ralf. “Automotive embedded systems software reprogramming.” 2012. Doctoral Dissertation, Brunel University. Accessed September 28, 2020. http://bura.brunel.ac.uk/handle/2438/7070 ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.560944.

MLA Handbook (7th Edition):

Schmidgall, Ralf. “Automotive embedded systems software reprogramming.” 2012. Web. 28 Sep 2020.

Vancouver:

Schmidgall R. Automotive embedded systems software reprogramming. [Internet] [Doctoral dissertation]. Brunel University; 2012. [cited 2020 Sep 28]. Available from: http://bura.brunel.ac.uk/handle/2438/7070 ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.560944.

Council of Science Editors:

Schmidgall R. Automotive embedded systems software reprogramming. [Doctoral Dissertation]. Brunel University; 2012. Available from: http://bura.brunel.ac.uk/handle/2438/7070 ; http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.560944


University of Toronto

23. Katsuno, Ian. SD Storage Array: Development and Characterization of a Many-device Storage Architecture.

Degree: 2013, University of Toronto

Transactional workloads have storage request streams consisting of many small, independent, random requests. Flash memory is well suited to these types of access patterns, but… (more)

Subjects/Keywords: flash memory; secure digital; FPGA; prototype; transactional workload; OLTP; 0544

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APA (6th Edition):

Katsuno, I. (2013). SD Storage Array: Development and Characterization of a Many-device Storage Architecture. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/42978

Chicago Manual of Style (16th Edition):

Katsuno, Ian. “SD Storage Array: Development and Characterization of a Many-device Storage Architecture.” 2013. Masters Thesis, University of Toronto. Accessed September 28, 2020. http://hdl.handle.net/1807/42978.

MLA Handbook (7th Edition):

Katsuno, Ian. “SD Storage Array: Development and Characterization of a Many-device Storage Architecture.” 2013. Web. 28 Sep 2020.

Vancouver:

Katsuno I. SD Storage Array: Development and Characterization of a Many-device Storage Architecture. [Internet] [Masters thesis]. University of Toronto; 2013. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/1807/42978.

Council of Science Editors:

Katsuno I. SD Storage Array: Development and Characterization of a Many-device Storage Architecture. [Masters Thesis]. University of Toronto; 2013. Available from: http://hdl.handle.net/1807/42978

24. Judd, Nicholas. An Examination of Unconscious Working Memory Flexibility using Continuous Flash Suppression.

Degree: Psychology, 2015, Umeå University

  Recent research has implicated working memory in unconscious tasks, controversially shifting the viewpoint of conscious access necessitating working memory functions (Soto, Mäntylä & Silvanto,… (more)

Subjects/Keywords: CFS; Unconscious; Working Memory; Flexibility; Continuous Flash Suppression

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APA (6th Edition):

Judd, N. (2015). An Examination of Unconscious Working Memory Flexibility using Continuous Flash Suppression. (Thesis). Umeå University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:umu:diva-117009

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Judd, Nicholas. “An Examination of Unconscious Working Memory Flexibility using Continuous Flash Suppression.” 2015. Thesis, Umeå University. Accessed September 28, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:umu:diva-117009.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Judd, Nicholas. “An Examination of Unconscious Working Memory Flexibility using Continuous Flash Suppression.” 2015. Web. 28 Sep 2020.

Vancouver:

Judd N. An Examination of Unconscious Working Memory Flexibility using Continuous Flash Suppression. [Internet] [Thesis]. Umeå University; 2015. [cited 2020 Sep 28]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:umu:diva-117009.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Judd N. An Examination of Unconscious Working Memory Flexibility using Continuous Flash Suppression. [Thesis]. Umeå University; 2015. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:umu:diva-117009

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

25. Wang, Panni ECE. Phase change memory cell with CMOS compatible vertically aligned carbon nanotube electrode.

Degree: 2017, Hong Kong University of Science and Technology

 Phase change memory (PCM) is a promising resistive non-volatile memory for its fast writing and reading speed, highly scalable properties, and long endurance. PCM formed… (more)

Subjects/Keywords: Phase change memory ; Flash memories (Computers) ; Carbon nanotubes

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APA (6th Edition):

Wang, P. E. (2017). Phase change memory cell with CMOS compatible vertically aligned carbon nanotube electrode. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-91050 ; https://doi.org/10.14711/thesis-991012554767403412 ; http://repository.ust.hk/ir/bitstream/1783.1-91050/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Panni ECE. “Phase change memory cell with CMOS compatible vertically aligned carbon nanotube electrode.” 2017. Thesis, Hong Kong University of Science and Technology. Accessed September 28, 2020. http://repository.ust.hk/ir/Record/1783.1-91050 ; https://doi.org/10.14711/thesis-991012554767403412 ; http://repository.ust.hk/ir/bitstream/1783.1-91050/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Panni ECE. “Phase change memory cell with CMOS compatible vertically aligned carbon nanotube electrode.” 2017. Web. 28 Sep 2020.

Vancouver:

Wang PE. Phase change memory cell with CMOS compatible vertically aligned carbon nanotube electrode. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2017. [cited 2020 Sep 28]. Available from: http://repository.ust.hk/ir/Record/1783.1-91050 ; https://doi.org/10.14711/thesis-991012554767403412 ; http://repository.ust.hk/ir/bitstream/1783.1-91050/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang PE. Phase change memory cell with CMOS compatible vertically aligned carbon nanotube electrode. [Thesis]. Hong Kong University of Science and Technology; 2017. Available from: http://repository.ust.hk/ir/Record/1783.1-91050 ; https://doi.org/10.14711/thesis-991012554767403412 ; http://repository.ust.hk/ir/bitstream/1783.1-91050/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Limerick

26. Sullivan, Joe. Extending the life of NOR flash memory using a genetic algorithm.

Degree: 2013, University of Limerick

peer-reviewed

We present methods, observations and insights into the application of Evolu- tionary Algorithms(EA) to the problem of ash memory wear-out. In doing so we… (more)

Subjects/Keywords: evolutionary algorithms (EA); flash memory; genetic algorithms (GA)

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APA (6th Edition):

Sullivan, J. (2013). Extending the life of NOR flash memory using a genetic algorithm. (Thesis). University of Limerick. Retrieved from http://hdl.handle.net/10344/8183

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sullivan, Joe. “Extending the life of NOR flash memory using a genetic algorithm.” 2013. Thesis, University of Limerick. Accessed September 28, 2020. http://hdl.handle.net/10344/8183.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sullivan, Joe. “Extending the life of NOR flash memory using a genetic algorithm.” 2013. Web. 28 Sep 2020.

Vancouver:

Sullivan J. Extending the life of NOR flash memory using a genetic algorithm. [Internet] [Thesis]. University of Limerick; 2013. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/10344/8183.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sullivan J. Extending the life of NOR flash memory using a genetic algorithm. [Thesis]. University of Limerick; 2013. Available from: http://hdl.handle.net/10344/8183

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Penn State University

27. Niedzwiecki II, John Joseph. Evaluation of Log-Based Block and Wear-Leveling Techniques .

Degree: 2008, Penn State University

Flash memory, a nonvolatile memory for external data storage, is growing in popularity of use, largely in portable devices. Because of the properties of this… (more)

Subjects/Keywords: flash; flash memory; wear-leveling; log-based

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APA (6th Edition):

Niedzwiecki II, J. J. (2008). Evaluation of Log-Based Block and Wear-Leveling Techniques . (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/8541

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Niedzwiecki II, John Joseph. “Evaluation of Log-Based Block and Wear-Leveling Techniques .” 2008. Thesis, Penn State University. Accessed September 28, 2020. https://submit-etda.libraries.psu.edu/catalog/8541.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Niedzwiecki II, John Joseph. “Evaluation of Log-Based Block and Wear-Leveling Techniques .” 2008. Web. 28 Sep 2020.

Vancouver:

Niedzwiecki II JJ. Evaluation of Log-Based Block and Wear-Leveling Techniques . [Internet] [Thesis]. Penn State University; 2008. [cited 2020 Sep 28]. Available from: https://submit-etda.libraries.psu.edu/catalog/8541.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Niedzwiecki II JJ. Evaluation of Log-Based Block and Wear-Leveling Techniques . [Thesis]. Penn State University; 2008. Available from: https://submit-etda.libraries.psu.edu/catalog/8541

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

28. Dvořák, Miroslav. Disk na bázi paměti FLASH: Disk Drive Based on FLASH Memory.

Degree: 2019, Brno University of Technology

 The work deals with flash technology, the history of its development, current application of this technology and discusses the advantages and disadvantages of flash memories.… (more)

Subjects/Keywords: Paměť flash; disk bez pohyblivých částí; řadič disku; USB; FPGA; PCB; Flash memory; solid state drive; disk controller; USB; FPGA; PCB

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APA (6th Edition):

Dvořák, M. (2019). Disk na bázi paměti FLASH: Disk Drive Based on FLASH Memory. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/53712

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Dvořák, Miroslav. “Disk na bázi paměti FLASH: Disk Drive Based on FLASH Memory.” 2019. Thesis, Brno University of Technology. Accessed September 28, 2020. http://hdl.handle.net/11012/53712.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Dvořák, Miroslav. “Disk na bázi paměti FLASH: Disk Drive Based on FLASH Memory.” 2019. Web. 28 Sep 2020.

Vancouver:

Dvořák M. Disk na bázi paměti FLASH: Disk Drive Based on FLASH Memory. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/11012/53712.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Dvořák M. Disk na bázi paměti FLASH: Disk Drive Based on FLASH Memory. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/53712

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Université Montpellier II

29. Mauroux, Pierre-Didier. Test et fiabilité des mémoires Flash : Test and Reliability of Flash Memories.

Degree: Docteur es, SYAM - Systèmes Automatiques et Microélectroniques, 2011, Université Montpellier II

Depuis quelques années, les mémoires non-volatiles de type Flash sont présentes dans un grand nombre de systèmes sur puce. La grande densité d'intégration et la… (more)

Subjects/Keywords: Mémoire Flash; Modèle électrique; Spice; Défauts; Modélisation de fautes; Flash memory; Electrical model; Spice; Defects; Fault modeling

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mauroux, P. (2011). Test et fiabilité des mémoires Flash : Test and Reliability of Flash Memories. (Doctoral Dissertation). Université Montpellier II. Retrieved from http://www.theses.fr/2011MON20185

Chicago Manual of Style (16th Edition):

Mauroux, Pierre-Didier. “Test et fiabilité des mémoires Flash : Test and Reliability of Flash Memories.” 2011. Doctoral Dissertation, Université Montpellier II. Accessed September 28, 2020. http://www.theses.fr/2011MON20185.

MLA Handbook (7th Edition):

Mauroux, Pierre-Didier. “Test et fiabilité des mémoires Flash : Test and Reliability of Flash Memories.” 2011. Web. 28 Sep 2020.

Vancouver:

Mauroux P. Test et fiabilité des mémoires Flash : Test and Reliability of Flash Memories. [Internet] [Doctoral dissertation]. Université Montpellier II; 2011. [cited 2020 Sep 28]. Available from: http://www.theses.fr/2011MON20185.

Council of Science Editors:

Mauroux P. Test et fiabilité des mémoires Flash : Test and Reliability of Flash Memories. [Doctoral Dissertation]. Université Montpellier II; 2011. Available from: http://www.theses.fr/2011MON20185


Brno University of Technology

30. Kučerka, Daniel. Návrh animace digitálního spojovacího pole: Design of digital switching field animation.

Degree: 2019, Brno University of Technology

 This thesis describes types and parameters of memories used in communication engineering. The memory is a device which is able to record and to save… (more)

Subjects/Keywords: paměť; T spínač; digitální spojovací pole; animace; Flash; memory; T swith; digital switching field; animation; Flash

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kučerka, D. (2019). Návrh animace digitálního spojovacího pole: Design of digital switching field animation. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/16776

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kučerka, Daniel. “Návrh animace digitálního spojovacího pole: Design of digital switching field animation.” 2019. Thesis, Brno University of Technology. Accessed September 28, 2020. http://hdl.handle.net/11012/16776.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kučerka, Daniel. “Návrh animace digitálního spojovacího pole: Design of digital switching field animation.” 2019. Web. 28 Sep 2020.

Vancouver:

Kučerka D. Návrh animace digitálního spojovacího pole: Design of digital switching field animation. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Sep 28]. Available from: http://hdl.handle.net/11012/16776.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kučerka D. Návrh animace digitálního spojovacího pole: Design of digital switching field animation. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/16776

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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