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You searched for subject:(Fast Multi Core CEM Solvers). Showing records 1 – 30 of 24134 total matches.

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Stellenbosch University

1. Jackman, Kyle. Fast multi-core CEM solvers and flux trapping analysis for superconducting structures.

Degree: PhD, Electrical and Electronic Engineering, 2018, Stellenbosch University

ENGLISH ABSTRACT: The dissertation presents the development of a numerical field solver, called TetraHenry (TTH), for inductance extraction and flux trapping analysis of superconducting integrated… (more)

Subjects/Keywords: Fast Multi-Core CEM Solvers; CEM (Air quality); Integrated circuits; Heat flux; UCTD

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APA (6th Edition):

Jackman, K. (2018). Fast multi-core CEM solvers and flux trapping analysis for superconducting structures. (Doctoral Dissertation). Stellenbosch University. Retrieved from http://hdl.handle.net/10019.1/103747

Chicago Manual of Style (16th Edition):

Jackman, Kyle. “Fast multi-core CEM solvers and flux trapping analysis for superconducting structures.” 2018. Doctoral Dissertation, Stellenbosch University. Accessed April 18, 2021. http://hdl.handle.net/10019.1/103747.

MLA Handbook (7th Edition):

Jackman, Kyle. “Fast multi-core CEM solvers and flux trapping analysis for superconducting structures.” 2018. Web. 18 Apr 2021.

Vancouver:

Jackman K. Fast multi-core CEM solvers and flux trapping analysis for superconducting structures. [Internet] [Doctoral dissertation]. Stellenbosch University; 2018. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10019.1/103747.

Council of Science Editors:

Jackman K. Fast multi-core CEM solvers and flux trapping analysis for superconducting structures. [Doctoral Dissertation]. Stellenbosch University; 2018. Available from: http://hdl.handle.net/10019.1/103747


Rice University

2. Geldermans, Peter. Accelerated PDE Constrained Optimization using Direct Solvers.

Degree: MA, Engineering, 2018, Rice University

 In this thesis, I propose a method to reduce the cost of computing solutions to optimization problems governed by partial differential equations (PDEs). Standard second… (more)

Subjects/Keywords: PDE constrained optimization; direct solvers; fast solvers

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APA (6th Edition):

Geldermans, P. (2018). Accelerated PDE Constrained Optimization using Direct Solvers. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/105485

Chicago Manual of Style (16th Edition):

Geldermans, Peter. “Accelerated PDE Constrained Optimization using Direct Solvers.” 2018. Masters Thesis, Rice University. Accessed April 18, 2021. http://hdl.handle.net/1911/105485.

MLA Handbook (7th Edition):

Geldermans, Peter. “Accelerated PDE Constrained Optimization using Direct Solvers.” 2018. Web. 18 Apr 2021.

Vancouver:

Geldermans P. Accelerated PDE Constrained Optimization using Direct Solvers. [Internet] [Masters thesis]. Rice University; 2018. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1911/105485.

Council of Science Editors:

Geldermans P. Accelerated PDE Constrained Optimization using Direct Solvers. [Masters Thesis]. Rice University; 2018. Available from: http://hdl.handle.net/1911/105485


King Abdullah University of Science and Technology

3. Chavez Chavez, Gustavo Ivan. Robust and scalable hierarchical matrix-based fast direct solver and preconditioner for the numerical solution of elliptic partial differential equations.

Degree: Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division, 2017, King Abdullah University of Science and Technology

 This dissertation introduces a novel fast direct solver and preconditioner for the solution of block tridiagonal linear systems that arise from the discretization of elliptic… (more)

Subjects/Keywords: hierarchical matrices; cyclic reduction; fast solvers; Direct solvers; preconditioning; Parallel Computing

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APA (6th Edition):

Chavez Chavez, G. I. (2017). Robust and scalable hierarchical matrix-based fast direct solver and preconditioner for the numerical solution of elliptic partial differential equations. (Thesis). King Abdullah University of Science and Technology. Retrieved from http://hdl.handle.net/10754/625172

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chavez Chavez, Gustavo Ivan. “Robust and scalable hierarchical matrix-based fast direct solver and preconditioner for the numerical solution of elliptic partial differential equations.” 2017. Thesis, King Abdullah University of Science and Technology. Accessed April 18, 2021. http://hdl.handle.net/10754/625172.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chavez Chavez, Gustavo Ivan. “Robust and scalable hierarchical matrix-based fast direct solver and preconditioner for the numerical solution of elliptic partial differential equations.” 2017. Web. 18 Apr 2021.

Vancouver:

Chavez Chavez GI. Robust and scalable hierarchical matrix-based fast direct solver and preconditioner for the numerical solution of elliptic partial differential equations. [Internet] [Thesis]. King Abdullah University of Science and Technology; 2017. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10754/625172.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chavez Chavez GI. Robust and scalable hierarchical matrix-based fast direct solver and preconditioner for the numerical solution of elliptic partial differential equations. [Thesis]. King Abdullah University of Science and Technology; 2017. Available from: http://hdl.handle.net/10754/625172

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Western Ontario

4. Costello, Colin S. A Generic Implementation of Fast Fourier Transforms for the BPAS Library.

Degree: 2020, University of Western Ontario

 In this thesis we seek to realize an efficient implementation of a generic parallel fast Fourier transform (FFT). The FFT will be used in support… (more)

Subjects/Keywords: Fast Fourier Transform; FFT over Finite Fields; DFT; Parallel Computing; Multi-core; Algebra

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APA (6th Edition):

Costello, C. S. (2020). A Generic Implementation of Fast Fourier Transforms for the BPAS Library. (Thesis). University of Western Ontario. Retrieved from https://ir.lib.uwo.ca/etd/7306

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Costello, Colin S. “A Generic Implementation of Fast Fourier Transforms for the BPAS Library.” 2020. Thesis, University of Western Ontario. Accessed April 18, 2021. https://ir.lib.uwo.ca/etd/7306.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Costello, Colin S. “A Generic Implementation of Fast Fourier Transforms for the BPAS Library.” 2020. Web. 18 Apr 2021.

Vancouver:

Costello CS. A Generic Implementation of Fast Fourier Transforms for the BPAS Library. [Internet] [Thesis]. University of Western Ontario; 2020. [cited 2021 Apr 18]. Available from: https://ir.lib.uwo.ca/etd/7306.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Costello CS. A Generic Implementation of Fast Fourier Transforms for the BPAS Library. [Thesis]. University of Western Ontario; 2020. Available from: https://ir.lib.uwo.ca/etd/7306

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


King Abdullah University of Science and Technology

5. Alharthi, Noha. Fast High-order Integral Equation Solvers for Acoustic and Electromagnetic Scattering Problems.

Degree: Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division, 2019, King Abdullah University of Science and Technology

 Acoustic and electromagnetic scattering from arbitrarily shaped structures can be numerically characterized by solving various surface integral equations (SIEs). One of the most effective techniques… (more)

Subjects/Keywords: Boundary Integral Equation; Acoustic Scattering; LU-Based Solver; Fast Solvers; Fast Multipole Solvers; Tile Low-Rank Approximations

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APA (6th Edition):

Alharthi, N. (2019). Fast High-order Integral Equation Solvers for Acoustic and Electromagnetic Scattering Problems. (Thesis). King Abdullah University of Science and Technology. Retrieved from http://hdl.handle.net/10754/660105

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Alharthi, Noha. “Fast High-order Integral Equation Solvers for Acoustic and Electromagnetic Scattering Problems.” 2019. Thesis, King Abdullah University of Science and Technology. Accessed April 18, 2021. http://hdl.handle.net/10754/660105.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Alharthi, Noha. “Fast High-order Integral Equation Solvers for Acoustic and Electromagnetic Scattering Problems.” 2019. Web. 18 Apr 2021.

Vancouver:

Alharthi N. Fast High-order Integral Equation Solvers for Acoustic and Electromagnetic Scattering Problems. [Internet] [Thesis]. King Abdullah University of Science and Technology; 2019. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10754/660105.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Alharthi N. Fast High-order Integral Equation Solvers for Acoustic and Electromagnetic Scattering Problems. [Thesis]. King Abdullah University of Science and Technology; 2019. Available from: http://hdl.handle.net/10754/660105

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Texas – Austin

6. -5494-1880. Fast and scalable solvers for high-order hybridized discontinuous Galerkin methods with applications to fluid dynamics and magnetohydrodynamics.

Degree: PhD, Aerospace Engineering, 2019, University of Texas – Austin

 The hybridized discontinuous Galerkin methods (HDG) introduced a decade ago is a promising candidate for high-order spatial discretization combined with implicit/implicit-explicit time stepping. Roughly speaking,… (more)

Subjects/Keywords: Hybridized discontinuous Galerkin; Fast solvers; Multigrid; Multilevel; MHD; Domain decomposition

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APA (6th Edition):

-5494-1880. (2019). Fast and scalable solvers for high-order hybridized discontinuous Galerkin methods with applications to fluid dynamics and magnetohydrodynamics. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://dx.doi.org/10.26153/tsw/5474

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Chicago Manual of Style (16th Edition):

-5494-1880. “Fast and scalable solvers for high-order hybridized discontinuous Galerkin methods with applications to fluid dynamics and magnetohydrodynamics.” 2019. Doctoral Dissertation, University of Texas – Austin. Accessed April 18, 2021. http://dx.doi.org/10.26153/tsw/5474.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

MLA Handbook (7th Edition):

-5494-1880. “Fast and scalable solvers for high-order hybridized discontinuous Galerkin methods with applications to fluid dynamics and magnetohydrodynamics.” 2019. Web. 18 Apr 2021.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Vancouver:

-5494-1880. Fast and scalable solvers for high-order hybridized discontinuous Galerkin methods with applications to fluid dynamics and magnetohydrodynamics. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2019. [cited 2021 Apr 18]. Available from: http://dx.doi.org/10.26153/tsw/5474.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Council of Science Editors:

-5494-1880. Fast and scalable solvers for high-order hybridized discontinuous Galerkin methods with applications to fluid dynamics and magnetohydrodynamics. [Doctoral Dissertation]. University of Texas – Austin; 2019. Available from: http://dx.doi.org/10.26153/tsw/5474

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete


University of Southern California

7. Chaudhari, Abhijit J. Fast solvers in hyperspectral optical bioluminescence tomography for small animal imaging.

Degree: MS, Electrical Engineering, 2007, University of Southern California

 Hyperspectral Optical Bioluminescence Tomography (HOBT) yields fairly accurate 3D reconstructed source distributions in small animal studies. The diffusion equation models the light propagation in tissue… (more)

Subjects/Keywords: hyperspectral optical bioluminescence tomography; fast solvers

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APA (6th Edition):

Chaudhari, A. J. (2007). Fast solvers in hyperspectral optical bioluminescence tomography for small animal imaging. (Masters Thesis). University of Southern California. Retrieved from http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/156808/rec/2772

Chicago Manual of Style (16th Edition):

Chaudhari, Abhijit J. “Fast solvers in hyperspectral optical bioluminescence tomography for small animal imaging.” 2007. Masters Thesis, University of Southern California. Accessed April 18, 2021. http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/156808/rec/2772.

MLA Handbook (7th Edition):

Chaudhari, Abhijit J. “Fast solvers in hyperspectral optical bioluminescence tomography for small animal imaging.” 2007. Web. 18 Apr 2021.

Vancouver:

Chaudhari AJ. Fast solvers in hyperspectral optical bioluminescence tomography for small animal imaging. [Internet] [Masters thesis]. University of Southern California; 2007. [cited 2021 Apr 18]. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/156808/rec/2772.

Council of Science Editors:

Chaudhari AJ. Fast solvers in hyperspectral optical bioluminescence tomography for small animal imaging. [Masters Thesis]. University of Southern California; 2007. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/156808/rec/2772

8. Yussuf Ali. マルチコアおよびメニコアプロセッサのための並列パス遅延故障シミュレーション : Parallel Path Delay Fault Simulation for Multi/Many-Core Processors; マルチコア オヨビ メニコア プロセッサ ノ タメ ノ ヘイレツ パス チエン コショウ シミュレーション.

Degree: Nara Institute of Science and Technology / 奈良先端科学技術大学院大学

Subjects/Keywords: Multi-Core

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APA (6th Edition):

Ali, Y. (n.d.). マルチコアおよびメニコアプロセッサのための並列パス遅延故障シミュレーション : Parallel Path Delay Fault Simulation for Multi/Many-Core Processors; マルチコア オヨビ メニコア プロセッサ ノ タメ ノ ヘイレツ パス チエン コショウ シミュレーション. (Thesis). Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Retrieved from http://hdl.handle.net/10061/9468

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ali, Yussuf. “マルチコアおよびメニコアプロセッサのための並列パス遅延故障シミュレーション : Parallel Path Delay Fault Simulation for Multi/Many-Core Processors; マルチコア オヨビ メニコア プロセッサ ノ タメ ノ ヘイレツ パス チエン コショウ シミュレーション.” Thesis, Nara Institute of Science and Technology / 奈良先端科学技術大学院大学. Accessed April 18, 2021. http://hdl.handle.net/10061/9468.

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ali, Yussuf. “マルチコアおよびメニコアプロセッサのための並列パス遅延故障シミュレーション : Parallel Path Delay Fault Simulation for Multi/Many-Core Processors; マルチコア オヨビ メニコア プロセッサ ノ タメ ノ ヘイレツ パス チエン コショウ シミュレーション.” Web. 18 Apr 2021.

Note: this citation may be lacking information needed for this citation format:
No year of publication.

Vancouver:

Ali Y. マルチコアおよびメニコアプロセッサのための並列パス遅延故障シミュレーション : Parallel Path Delay Fault Simulation for Multi/Many-Core Processors; マルチコア オヨビ メニコア プロセッサ ノ タメ ノ ヘイレツ パス チエン コショウ シミュレーション. [Internet] [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10061/9468.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.

Council of Science Editors:

Ali Y. マルチコアおよびメニコアプロセッサのための並列パス遅延故障シミュレーション : Parallel Path Delay Fault Simulation for Multi/Many-Core Processors; マルチコア オヨビ メニコア プロセッサ ノ タメ ノ ヘイレツ パス チエン コショウ シミュレーション. [Thesis]. Nara Institute of Science and Technology / 奈良先端科学技術大学院大学; Available from: http://hdl.handle.net/10061/9468

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.


Uppsala University

9. Karlsson, Johan. Efficient use of Multi-core Technology in Interactive Desktop Applications.

Degree: Information Technology, 2015, Uppsala University

  The emergence of multi-core processors has successfully ended the era where applications could enjoy free and regular performance improvements without source code modifications. This… (more)

Subjects/Keywords: Multi-core processors; parallelism

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APA (6th Edition):

Karlsson, J. (2015). Efficient use of Multi-core Technology in Interactive Desktop Applications. (Thesis). Uppsala University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-246120

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Karlsson, Johan. “Efficient use of Multi-core Technology in Interactive Desktop Applications.” 2015. Thesis, Uppsala University. Accessed April 18, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-246120.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Karlsson, Johan. “Efficient use of Multi-core Technology in Interactive Desktop Applications.” 2015. Web. 18 Apr 2021.

Vancouver:

Karlsson J. Efficient use of Multi-core Technology in Interactive Desktop Applications. [Internet] [Thesis]. Uppsala University; 2015. [cited 2021 Apr 18]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-246120.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Karlsson J. Efficient use of Multi-core Technology in Interactive Desktop Applications. [Thesis]. Uppsala University; 2015. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-246120

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Virginia Tech

10. Zhang, Jing. Transforming and Optimizing Irregular Applications for Parallel Architectures.

Degree: PhD, Computer Science and Applications, 2018, Virginia Tech

 Parallel architectures, including multi-core processors, many-core processors, and multi-node systems, have become commonplace, as it is no longer feasible to improve single-core performance through increasing… (more)

Subjects/Keywords: Irregular Applications; Parallel Architectures; Multi-core; Many-core; Multi-node; Bioinformatics

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APA (6th Edition):

Zhang, J. (2018). Transforming and Optimizing Irregular Applications for Parallel Architectures. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/82069

Chicago Manual of Style (16th Edition):

Zhang, Jing. “Transforming and Optimizing Irregular Applications for Parallel Architectures.” 2018. Doctoral Dissertation, Virginia Tech. Accessed April 18, 2021. http://hdl.handle.net/10919/82069.

MLA Handbook (7th Edition):

Zhang, Jing. “Transforming and Optimizing Irregular Applications for Parallel Architectures.” 2018. Web. 18 Apr 2021.

Vancouver:

Zhang J. Transforming and Optimizing Irregular Applications for Parallel Architectures. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10919/82069.

Council of Science Editors:

Zhang J. Transforming and Optimizing Irregular Applications for Parallel Architectures. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/82069

11. Leaver, Jonathan Alexander. Multi-Core Unit Propagation in Functional Languages.

Degree: 2012, University of Western Ontario

 Answer Set Programming is a declarative modeling paradigm enabling specialists in diverse disciplines to describe and solve complicated problems. Growth in high performance computing is… (more)

Subjects/Keywords: answer set programming; functional languages; parallel programming; satisfiability theory; immutable types; multi-core solvers; Artificial Intelligence and Robotics

…5.3 Implicit vs. Explicit Threading (Multi-core Murinae)… …5.5 Mutable vs. Immutable Data-Types (Multi-core Murinae) . . . . . . . . . . 49… …1 Multi-core F# DIMACS Processing (ms) . . . . . . . . . . . . . . . . . . . 78… …solving, functional languages, and multi-core programming. What follows is a brief introduction… …in conflicts. The multi-core version of Clasp 2.0 uses this technique in portfolio mode to… 

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APA (6th Edition):

Leaver, J. A. (2012). Multi-Core Unit Propagation in Functional Languages. (Thesis). University of Western Ontario. Retrieved from https://ir.lib.uwo.ca/etd/510

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Leaver, Jonathan Alexander. “Multi-Core Unit Propagation in Functional Languages.” 2012. Thesis, University of Western Ontario. Accessed April 18, 2021. https://ir.lib.uwo.ca/etd/510.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Leaver, Jonathan Alexander. “Multi-Core Unit Propagation in Functional Languages.” 2012. Web. 18 Apr 2021.

Vancouver:

Leaver JA. Multi-Core Unit Propagation in Functional Languages. [Internet] [Thesis]. University of Western Ontario; 2012. [cited 2021 Apr 18]. Available from: https://ir.lib.uwo.ca/etd/510.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Leaver JA. Multi-Core Unit Propagation in Functional Languages. [Thesis]. University of Western Ontario; 2012. Available from: https://ir.lib.uwo.ca/etd/510

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

12. Guney, Murat Efe. High-performance direct solution of finite element problems on multi-core processors.

Degree: PhD, Civil and Environmental Engineering, 2010, Georgia Tech

 A direct solution procedure is proposed and developed which exploits the parallelism that exists in current symmetric multiprocessing (SMP) multi-core processors. Several algorithms are proposed… (more)

Subjects/Keywords: Finite element method; High-performance computing; Multi-core; Direct sparse solvers; Fill-in reduction; Numerical analysis; Finite element method Computer programs; Finite element method Data processing; Algorithms

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APA (6th Edition):

Guney, M. E. (2010). High-performance direct solution of finite element problems on multi-core processors. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/34662

Chicago Manual of Style (16th Edition):

Guney, Murat Efe. “High-performance direct solution of finite element problems on multi-core processors.” 2010. Doctoral Dissertation, Georgia Tech. Accessed April 18, 2021. http://hdl.handle.net/1853/34662.

MLA Handbook (7th Edition):

Guney, Murat Efe. “High-performance direct solution of finite element problems on multi-core processors.” 2010. Web. 18 Apr 2021.

Vancouver:

Guney ME. High-performance direct solution of finite element problems on multi-core processors. [Internet] [Doctoral dissertation]. Georgia Tech; 2010. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1853/34662.

Council of Science Editors:

Guney ME. High-performance direct solution of finite element problems on multi-core processors. [Doctoral Dissertation]. Georgia Tech; 2010. Available from: http://hdl.handle.net/1853/34662


Mississippi State University

13. Parihar, Naveen. PARALLEL VITERBI SEARCH FOR CONTINUOUS SPEECH RECOGNITION ON A MULTI-CORE ARCHITECTURE.

Degree: PhD, Electrical and Computer Engineering, 2009, Mississippi State University

  State-of-the-art speech-recognition systems can successfully perform simple tasks in real-time on most computers, when the tasks are performed in controlled and noise-free environments. However,… (more)

Subjects/Keywords: fast gaussian calculations; fast likelihood computations; prefix tree; lexical tree; parallel speech decoding; parallel speech recognition; multi-core processors

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APA (6th Edition):

Parihar, N. (2009). PARALLEL VITERBI SEARCH FOR CONTINUOUS SPEECH RECOGNITION ON A MULTI-CORE ARCHITECTURE. (Doctoral Dissertation). Mississippi State University. Retrieved from http://sun.library.msstate.edu/ETD-db/theses/available/etd-11042009-134125/ ;

Chicago Manual of Style (16th Edition):

Parihar, Naveen. “PARALLEL VITERBI SEARCH FOR CONTINUOUS SPEECH RECOGNITION ON A MULTI-CORE ARCHITECTURE.” 2009. Doctoral Dissertation, Mississippi State University. Accessed April 18, 2021. http://sun.library.msstate.edu/ETD-db/theses/available/etd-11042009-134125/ ;.

MLA Handbook (7th Edition):

Parihar, Naveen. “PARALLEL VITERBI SEARCH FOR CONTINUOUS SPEECH RECOGNITION ON A MULTI-CORE ARCHITECTURE.” 2009. Web. 18 Apr 2021.

Vancouver:

Parihar N. PARALLEL VITERBI SEARCH FOR CONTINUOUS SPEECH RECOGNITION ON A MULTI-CORE ARCHITECTURE. [Internet] [Doctoral dissertation]. Mississippi State University; 2009. [cited 2021 Apr 18]. Available from: http://sun.library.msstate.edu/ETD-db/theses/available/etd-11042009-134125/ ;.

Council of Science Editors:

Parihar N. PARALLEL VITERBI SEARCH FOR CONTINUOUS SPEECH RECOGNITION ON A MULTI-CORE ARCHITECTURE. [Doctoral Dissertation]. Mississippi State University; 2009. Available from: http://sun.library.msstate.edu/ETD-db/theses/available/etd-11042009-134125/ ;


Université de Grenoble

14. Tendulkar, Pranav. Mapping and scheduling on multi-core processors using SMT solvers : Allocation et ordonnancement sur des processeurs multi-coeur avec des solveurs SMT.

Degree: Docteur es, Informatique, 2014, Université de Grenoble

 Dans l’objectif d’augmenter les performances, l’architecture des processeurs a évolué versdes plate-formes "multi-core" et "many-core" composées de multiple unités de traitements.Toutefois, trouver des moyens efficaces… (more)

Subjects/Keywords: Multi-coeur processeurs; Allocation; Ordonnancement; Solveurs SMT; Multiprocessors; Mapping; Scheduling; SMT Solvers; 004

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tendulkar, P. (2014). Mapping and scheduling on multi-core processors using SMT solvers : Allocation et ordonnancement sur des processeurs multi-coeur avec des solveurs SMT. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2014GRENM088

Chicago Manual of Style (16th Edition):

Tendulkar, Pranav. “Mapping and scheduling on multi-core processors using SMT solvers : Allocation et ordonnancement sur des processeurs multi-coeur avec des solveurs SMT.” 2014. Doctoral Dissertation, Université de Grenoble. Accessed April 18, 2021. http://www.theses.fr/2014GRENM088.

MLA Handbook (7th Edition):

Tendulkar, Pranav. “Mapping and scheduling on multi-core processors using SMT solvers : Allocation et ordonnancement sur des processeurs multi-coeur avec des solveurs SMT.” 2014. Web. 18 Apr 2021.

Vancouver:

Tendulkar P. Mapping and scheduling on multi-core processors using SMT solvers : Allocation et ordonnancement sur des processeurs multi-coeur avec des solveurs SMT. [Internet] [Doctoral dissertation]. Université de Grenoble; 2014. [cited 2021 Apr 18]. Available from: http://www.theses.fr/2014GRENM088.

Council of Science Editors:

Tendulkar P. Mapping and scheduling on multi-core processors using SMT solvers : Allocation et ordonnancement sur des processeurs multi-coeur avec des solveurs SMT. [Doctoral Dissertation]. Université de Grenoble; 2014. Available from: http://www.theses.fr/2014GRENM088


Rochester Institute of Technology

15. Sieber, Patrick. Reliability-aware multi-segmented bus architecture for photonic networks-on-chip.

Degree: Computer Engineering, 2013, Rochester Institute of Technology

 Network-on-chip (NoC) has emerged as an enabling platform for connecting hundreds of cores on a single chip, allowing for a structured, scalable system when compared… (more)

Subjects/Keywords: Multi-core; Network-on-chip; Photonic

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sieber, P. (2013). Reliability-aware multi-segmented bus architecture for photonic networks-on-chip. (Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/3160

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sieber, Patrick. “Reliability-aware multi-segmented bus architecture for photonic networks-on-chip.” 2013. Thesis, Rochester Institute of Technology. Accessed April 18, 2021. https://scholarworks.rit.edu/theses/3160.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sieber, Patrick. “Reliability-aware multi-segmented bus architecture for photonic networks-on-chip.” 2013. Web. 18 Apr 2021.

Vancouver:

Sieber P. Reliability-aware multi-segmented bus architecture for photonic networks-on-chip. [Internet] [Thesis]. Rochester Institute of Technology; 2013. [cited 2021 Apr 18]. Available from: https://scholarworks.rit.edu/theses/3160.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sieber P. Reliability-aware multi-segmented bus architecture for photonic networks-on-chip. [Thesis]. Rochester Institute of Technology; 2013. Available from: https://scholarworks.rit.edu/theses/3160

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Waterloo

16. Tegegn, Paulos. An Implementation of a Predictable Cache-coherent Multi-core System.

Degree: 2019, University of Waterloo

Multi-core platforms have entered the realm of the embedded systems to meet the ever growing performance requirements of the real-time embedded applications. Real-time applications leverage… (more)

Subjects/Keywords: real-time multi-core hardware on FPGA

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APA (6th Edition):

Tegegn, P. (2019). An Implementation of a Predictable Cache-coherent Multi-core System. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/14647

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tegegn, Paulos. “An Implementation of a Predictable Cache-coherent Multi-core System.” 2019. Thesis, University of Waterloo. Accessed April 18, 2021. http://hdl.handle.net/10012/14647.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tegegn, Paulos. “An Implementation of a Predictable Cache-coherent Multi-core System.” 2019. Web. 18 Apr 2021.

Vancouver:

Tegegn P. An Implementation of a Predictable Cache-coherent Multi-core System. [Internet] [Thesis]. University of Waterloo; 2019. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10012/14647.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tegegn P. An Implementation of a Predictable Cache-coherent Multi-core System. [Thesis]. University of Waterloo; 2019. Available from: http://hdl.handle.net/10012/14647

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade Nova

17. Mariano, Paulo Alexandre Lima da Silva. RepComp - replicated software components for improved performance.

Degree: 2011, Universidade Nova

Trabalho apresentado no âmbito do Mestrado em Engenharia Informática, como requisito parcial para obtenção do grau de Mestre em Engenharia Informática

The current trend of… (more)

Subjects/Keywords: Diverse replication; Multi-core; Parallel programming; Performance

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mariano, P. A. L. d. S. (2011). RepComp - replicated software components for improved performance. (Thesis). Universidade Nova. Retrieved from http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/5688

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mariano, Paulo Alexandre Lima da Silva. “RepComp - replicated software components for improved performance.” 2011. Thesis, Universidade Nova. Accessed April 18, 2021. http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/5688.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mariano, Paulo Alexandre Lima da Silva. “RepComp - replicated software components for improved performance.” 2011. Web. 18 Apr 2021.

Vancouver:

Mariano PALdS. RepComp - replicated software components for improved performance. [Internet] [Thesis]. Universidade Nova; 2011. [cited 2021 Apr 18]. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/5688.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mariano PALdS. RepComp - replicated software components for improved performance. [Thesis]. Universidade Nova; 2011. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/5688

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade Nova

18. Mourão, Diogo André Ribeiro. Um middleware independente da plataforma para computação paralela.

Degree: 2011, Universidade Nova

Dissertação para obtenção do Grau de Mestre em Engenharia Informática

A adoção generalizada dos processadores com vários núcleos (multi-core) requer modelos de programação que permitam… (more)

Subjects/Keywords: Programação paralela; Middleware; Arquiteturas multi-core

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mourão, D. A. R. (2011). Um middleware independente da plataforma para computação paralela. (Thesis). Universidade Nova. Retrieved from http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/6322

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mourão, Diogo André Ribeiro. “Um middleware independente da plataforma para computação paralela.” 2011. Thesis, Universidade Nova. Accessed April 18, 2021. http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/6322.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mourão, Diogo André Ribeiro. “Um middleware independente da plataforma para computação paralela.” 2011. Web. 18 Apr 2021.

Vancouver:

Mourão DAR. Um middleware independente da plataforma para computação paralela. [Internet] [Thesis]. Universidade Nova; 2011. [cited 2021 Apr 18]. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/6322.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mourão DAR. Um middleware independente da plataforma para computação paralela. [Thesis]. Universidade Nova; 2011. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/6322

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Delft University of Technology

19. Narayana, S. (author). Orchestrating Mixed-Criticality Melody: Reconciling Energy with Safety for Mixed-Criticality Embedded Real-Time Systems.

Degree: 2015, Delft University of Technology

Embedded systems are getting into various domains of our daily life as well as in many of the highly sophisticated large systems, such as air… (more)

Subjects/Keywords: mixed-criticality; criticality; energy minimization; multi-core

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APA (6th Edition):

Narayana, S. (. (2015). Orchestrating Mixed-Criticality Melody: Reconciling Energy with Safety for Mixed-Criticality Embedded Real-Time Systems. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:015312bf-905c-439a-a511-8b6f721888a5

Chicago Manual of Style (16th Edition):

Narayana, S (author). “Orchestrating Mixed-Criticality Melody: Reconciling Energy with Safety for Mixed-Criticality Embedded Real-Time Systems.” 2015. Masters Thesis, Delft University of Technology. Accessed April 18, 2021. http://resolver.tudelft.nl/uuid:015312bf-905c-439a-a511-8b6f721888a5.

MLA Handbook (7th Edition):

Narayana, S (author). “Orchestrating Mixed-Criticality Melody: Reconciling Energy with Safety for Mixed-Criticality Embedded Real-Time Systems.” 2015. Web. 18 Apr 2021.

Vancouver:

Narayana S(. Orchestrating Mixed-Criticality Melody: Reconciling Energy with Safety for Mixed-Criticality Embedded Real-Time Systems. [Internet] [Masters thesis]. Delft University of Technology; 2015. [cited 2021 Apr 18]. Available from: http://resolver.tudelft.nl/uuid:015312bf-905c-439a-a511-8b6f721888a5.

Council of Science Editors:

Narayana S(. Orchestrating Mixed-Criticality Melody: Reconciling Energy with Safety for Mixed-Criticality Embedded Real-Time Systems. [Masters Thesis]. Delft University of Technology; 2015. Available from: http://resolver.tudelft.nl/uuid:015312bf-905c-439a-a511-8b6f721888a5


University of Victoria

20. Berg, Celina. Building a foundation for the future of software practices within the multi-core domain.

Degree: Dept. of Computer Science, 2011, University of Victoria

Multi-core programming presents developers with a dramatic paradigm shift. Where the conceptual models of sequential programming largely supported the decoupling of source from underlying architecture,… (more)

Subjects/Keywords: software engineering; multi-core; parallel programming

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APA (6th Edition):

Berg, C. (2011). Building a foundation for the future of software practices within the multi-core domain. (Thesis). University of Victoria. Retrieved from http://hdl.handle.net/1828/3539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Berg, Celina. “Building a foundation for the future of software practices within the multi-core domain.” 2011. Thesis, University of Victoria. Accessed April 18, 2021. http://hdl.handle.net/1828/3539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Berg, Celina. “Building a foundation for the future of software practices within the multi-core domain.” 2011. Web. 18 Apr 2021.

Vancouver:

Berg C. Building a foundation for the future of software practices within the multi-core domain. [Internet] [Thesis]. University of Victoria; 2011. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1828/3539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Berg C. Building a foundation for the future of software practices within the multi-core domain. [Thesis]. University of Victoria; 2011. Available from: http://hdl.handle.net/1828/3539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Oslo

21. Wei, Wenjie. Effective use of multicore-based parallel computers for scientific computing.

Degree: 2012, University of Oslo

 This thesis studies how the multi-core hardware architecture can be efficiently used for real-world scientific applications that arise from computational cardiology and computational geoscience. The… (more)

Subjects/Keywords: multi-core; OpenMP; mixedprogramming; performancemodeling; VDP::420

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wei, W. (2012). Effective use of multicore-based parallel computers for scientific computing. (Thesis). University of Oslo. Retrieved from http://urn.nb.no/URN:NBN:no-33568 ; https://www.duo.uio.no/handle/10852/34824 ; Fulltext https://www.duo.uio.no/bitstream/handle/10852/34824/1/dravhandling-wei.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wei, Wenjie. “Effective use of multicore-based parallel computers for scientific computing.” 2012. Thesis, University of Oslo. Accessed April 18, 2021. http://urn.nb.no/URN:NBN:no-33568 ; https://www.duo.uio.no/handle/10852/34824 ; Fulltext https://www.duo.uio.no/bitstream/handle/10852/34824/1/dravhandling-wei.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wei, Wenjie. “Effective use of multicore-based parallel computers for scientific computing.” 2012. Web. 18 Apr 2021.

Vancouver:

Wei W. Effective use of multicore-based parallel computers for scientific computing. [Internet] [Thesis]. University of Oslo; 2012. [cited 2021 Apr 18]. Available from: http://urn.nb.no/URN:NBN:no-33568 ; https://www.duo.uio.no/handle/10852/34824 ; Fulltext https://www.duo.uio.no/bitstream/handle/10852/34824/1/dravhandling-wei.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wei W. Effective use of multicore-based parallel computers for scientific computing. [Thesis]. University of Oslo; 2012. Available from: http://urn.nb.no/URN:NBN:no-33568 ; https://www.duo.uio.no/handle/10852/34824 ; Fulltext https://www.duo.uio.no/bitstream/handle/10852/34824/1/dravhandling-wei.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

22. Garcia, Andy. An Advanced Wildfire Simulator: vFirelib.v2.

Degree: 2018, University of Nevada – Reno

 Wildfires can cause severe amounts of damage to wildlife habitat as well as commercial and residential properties. They put at risk the well-being of the… (more)

Subjects/Keywords: GPU; modeling; multi-core; parallel; real-time

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Garcia, A. (2018). An Advanced Wildfire Simulator: vFirelib.v2. (Thesis). University of Nevada – Reno. Retrieved from http://hdl.handle.net/11714/4865

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Garcia, Andy. “An Advanced Wildfire Simulator: vFirelib.v2.” 2018. Thesis, University of Nevada – Reno. Accessed April 18, 2021. http://hdl.handle.net/11714/4865.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Garcia, Andy. “An Advanced Wildfire Simulator: vFirelib.v2.” 2018. Web. 18 Apr 2021.

Vancouver:

Garcia A. An Advanced Wildfire Simulator: vFirelib.v2. [Internet] [Thesis]. University of Nevada – Reno; 2018. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/11714/4865.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Garcia A. An Advanced Wildfire Simulator: vFirelib.v2. [Thesis]. University of Nevada – Reno; 2018. Available from: http://hdl.handle.net/11714/4865

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Washington University in St. Louis

23. Wun, Benjamin. High Speed Networking In The Multi-Core Era.

Degree: PhD, Computer Science and Engineering, 2011, Washington University in St. Louis

 High speed networking is a demanding task that has traditionally been performed in dedicated, purpose built hardware or specialized network processors. These platforms sacrifice flexibility… (more)

Subjects/Keywords: Computer engineering; Multi-core; Networking; Network Processor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wun, B. (2011). High Speed Networking In The Multi-Core Era. (Doctoral Dissertation). Washington University in St. Louis. Retrieved from https://openscholarship.wustl.edu/etd/668

Chicago Manual of Style (16th Edition):

Wun, Benjamin. “High Speed Networking In The Multi-Core Era.” 2011. Doctoral Dissertation, Washington University in St. Louis. Accessed April 18, 2021. https://openscholarship.wustl.edu/etd/668.

MLA Handbook (7th Edition):

Wun, Benjamin. “High Speed Networking In The Multi-Core Era.” 2011. Web. 18 Apr 2021.

Vancouver:

Wun B. High Speed Networking In The Multi-Core Era. [Internet] [Doctoral dissertation]. Washington University in St. Louis; 2011. [cited 2021 Apr 18]. Available from: https://openscholarship.wustl.edu/etd/668.

Council of Science Editors:

Wun B. High Speed Networking In The Multi-Core Era. [Doctoral Dissertation]. Washington University in St. Louis; 2011. Available from: https://openscholarship.wustl.edu/etd/668


University of Arizona

24. Gajaria, Dhruv Mayur. DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors .

Degree: 2019, University of Arizona

 Spin-transfer torque RAMs (STT-RAMs) have been studied as a promising alternative to SRAMs in emerging caches and main memories due to their low leakage power… (more)

Subjects/Keywords: Caches; DVFS; Multi-Core Processors; STT-RAM

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APA (6th Edition):

Gajaria, D. M. (2019). DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors . (Masters Thesis). University of Arizona. Retrieved from http://hdl.handle.net/10150/633246

Chicago Manual of Style (16th Edition):

Gajaria, Dhruv Mayur. “DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors .” 2019. Masters Thesis, University of Arizona. Accessed April 18, 2021. http://hdl.handle.net/10150/633246.

MLA Handbook (7th Edition):

Gajaria, Dhruv Mayur. “DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors .” 2019. Web. 18 Apr 2021.

Vancouver:

Gajaria DM. DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors . [Internet] [Masters thesis]. University of Arizona; 2019. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/10150/633246.

Council of Science Editors:

Gajaria DM. DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors . [Masters Thesis]. University of Arizona; 2019. Available from: http://hdl.handle.net/10150/633246


University of Southern California

25. Peng, Liu. Parallelization framework for scientific application kernels on multi-core/many-core platforms.

Degree: PhD, Computer Science, 2011, University of Southern California

 The advent of multi-core/many-core paradigm has provided unprecedented computing power, and it is of great significance to develop a parallelization framework for various scientific applications… (more)

Subjects/Keywords: multi/many core; parallel computing; scientific simulation

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Peng, L. (2011). Parallelization framework for scientific application kernels on multi-core/many-core platforms. (Doctoral Dissertation). University of Southern California. Retrieved from http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/624895/rec/4915

Chicago Manual of Style (16th Edition):

Peng, Liu. “Parallelization framework for scientific application kernels on multi-core/many-core platforms.” 2011. Doctoral Dissertation, University of Southern California. Accessed April 18, 2021. http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/624895/rec/4915.

MLA Handbook (7th Edition):

Peng, Liu. “Parallelization framework for scientific application kernels on multi-core/many-core platforms.” 2011. Web. 18 Apr 2021.

Vancouver:

Peng L. Parallelization framework for scientific application kernels on multi-core/many-core platforms. [Internet] [Doctoral dissertation]. University of Southern California; 2011. [cited 2021 Apr 18]. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/624895/rec/4915.

Council of Science Editors:

Peng L. Parallelization framework for scientific application kernels on multi-core/many-core platforms. [Doctoral Dissertation]. University of Southern California; 2011. Available from: http://digitallibrary.usc.edu/cdm/compoundobject/collection/p15799coll127/id/624895/rec/4915


University of Edinburgh

26. Tournavitis, Georgios. Profile-driven parallelisation of sequential programs.

Degree: PhD, 2011, University of Edinburgh

 Traditional parallelism detection in compilers is performed by means of static analysis and more specifically data and control dependence analysis. The information that is available… (more)

Subjects/Keywords: 005.3; compiler; multi-core; parallelisation; pipeline

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APA (6th Edition):

Tournavitis, G. (2011). Profile-driven parallelisation of sequential programs. (Doctoral Dissertation). University of Edinburgh. Retrieved from http://hdl.handle.net/1842/5287

Chicago Manual of Style (16th Edition):

Tournavitis, Georgios. “Profile-driven parallelisation of sequential programs.” 2011. Doctoral Dissertation, University of Edinburgh. Accessed April 18, 2021. http://hdl.handle.net/1842/5287.

MLA Handbook (7th Edition):

Tournavitis, Georgios. “Profile-driven parallelisation of sequential programs.” 2011. Web. 18 Apr 2021.

Vancouver:

Tournavitis G. Profile-driven parallelisation of sequential programs. [Internet] [Doctoral dissertation]. University of Edinburgh; 2011. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1842/5287.

Council of Science Editors:

Tournavitis G. Profile-driven parallelisation of sequential programs. [Doctoral Dissertation]. University of Edinburgh; 2011. Available from: http://hdl.handle.net/1842/5287


University of Maryland

27. Zhao, Minshu. Studying the Impact of Multicore Processor Scaling on Cache Coherence Directories via Reuse Distance Analysis.

Degree: Electrical Engineering, 2015, University of Maryland

 Directories are one key part of a processor's cache coherence hardware, and constitute one of the main bottlenecks in multicore processor scaling, e.g. core count… (more)

Subjects/Keywords: Computer engineering; Cache coherence; Directory; Multi-core

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhao, M. (2015). Studying the Impact of Multicore Processor Scaling on Cache Coherence Directories via Reuse Distance Analysis. (Thesis). University of Maryland. Retrieved from http://hdl.handle.net/1903/16558

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhao, Minshu. “Studying the Impact of Multicore Processor Scaling on Cache Coherence Directories via Reuse Distance Analysis.” 2015. Thesis, University of Maryland. Accessed April 18, 2021. http://hdl.handle.net/1903/16558.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhao, Minshu. “Studying the Impact of Multicore Processor Scaling on Cache Coherence Directories via Reuse Distance Analysis.” 2015. Web. 18 Apr 2021.

Vancouver:

Zhao M. Studying the Impact of Multicore Processor Scaling on Cache Coherence Directories via Reuse Distance Analysis. [Internet] [Thesis]. University of Maryland; 2015. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1903/16558.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhao M. Studying the Impact of Multicore Processor Scaling on Cache Coherence Directories via Reuse Distance Analysis. [Thesis]. University of Maryland; 2015. Available from: http://hdl.handle.net/1903/16558

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


The Ohio State University

28. Bao, Wenlei. Power Aware WCET Analysis.

Degree: MS, Electrical and Computer Engineering, 2014, The Ohio State University

 Worst case execution time (WCET) analysis is used to verify that real-time tasks on systems can be executed without violating any timing constraints. Power con-… (more)

Subjects/Keywords: Electrical Engineering; power, WCET, multi-core

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Bao, W. (2014). Power Aware WCET Analysis. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1398937286

Chicago Manual of Style (16th Edition):

Bao, Wenlei. “Power Aware WCET Analysis.” 2014. Masters Thesis, The Ohio State University. Accessed April 18, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=osu1398937286.

MLA Handbook (7th Edition):

Bao, Wenlei. “Power Aware WCET Analysis.” 2014. Web. 18 Apr 2021.

Vancouver:

Bao W. Power Aware WCET Analysis. [Internet] [Masters thesis]. The Ohio State University; 2014. [cited 2021 Apr 18]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1398937286.

Council of Science Editors:

Bao W. Power Aware WCET Analysis. [Masters Thesis]. The Ohio State University; 2014. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1398937286

29. Méndez Real, Maria. Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core.

Degree: Docteur es, Stic, 2017, Lorient

L’évolution technologique ainsi que l’augmentation incessante de la puissance de calcul requise par les applications font des architectures ”many-core” la nouvelle tendance dans la conception… (more)

Subjects/Keywords: Architectures many-core; Multi-core architectures; Open Virtual Platforms; 005.8

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Méndez Real, M. (2017). Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core. (Doctoral Dissertation). Lorient. Retrieved from http://www.theses.fr/2017LORIS454

Chicago Manual of Style (16th Edition):

Méndez Real, Maria. “Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core.” 2017. Doctoral Dissertation, Lorient. Accessed April 18, 2021. http://www.theses.fr/2017LORIS454.

MLA Handbook (7th Edition):

Méndez Real, Maria. “Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core.” 2017. Web. 18 Apr 2021.

Vancouver:

Méndez Real M. Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core. [Internet] [Doctoral dissertation]. Lorient; 2017. [cited 2021 Apr 18]. Available from: http://www.theses.fr/2017LORIS454.

Council of Science Editors:

Méndez Real M. Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures : Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core. [Doctoral Dissertation]. Lorient; 2017. Available from: http://www.theses.fr/2017LORIS454


University of New Mexico

30. Bezerra, George. Energy consumption in networks on chip : efficiency and scaling.

Degree: Department of Computer Science, 2012, University of New Mexico

 Computer architecture design is in a new era where performance is increased by replicating processing cores on a chip rather than making CPUs larger and… (more)

Subjects/Keywords: multi-core; many-core; energy consumption; communicaiton locality; scaling

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Bezerra, G. (2012). Energy consumption in networks on chip : efficiency and scaling. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/21020

Chicago Manual of Style (16th Edition):

Bezerra, George. “Energy consumption in networks on chip : efficiency and scaling.” 2012. Doctoral Dissertation, University of New Mexico. Accessed April 18, 2021. http://hdl.handle.net/1928/21020.

MLA Handbook (7th Edition):

Bezerra, George. “Energy consumption in networks on chip : efficiency and scaling.” 2012. Web. 18 Apr 2021.

Vancouver:

Bezerra G. Energy consumption in networks on chip : efficiency and scaling. [Internet] [Doctoral dissertation]. University of New Mexico; 2012. [cited 2021 Apr 18]. Available from: http://hdl.handle.net/1928/21020.

Council of Science Editors:

Bezerra G. Energy consumption in networks on chip : efficiency and scaling. [Doctoral Dissertation]. University of New Mexico; 2012. Available from: http://hdl.handle.net/1928/21020

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