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Dept: Electrical and Computer Engineering

You searched for subject:(Engineering Design). Showing records 1 – 30 of 142 total matches.

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The Ohio State University

1. Buccapatnam Tirumala, Swapna. Control of Large Scale Networked Systems Under Uncertainty.

Degree: PhD, Electrical and Computer Engineering, 2014, The Ohio State University

 The rapid growth and popularity of smart mobile devices, wireless networks, and online social networks has transformed the nature of social interactions as well as… (more)

Subjects/Keywords: Electrical Engineering; Computer Science; Systems Design

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APA (6th Edition):

Buccapatnam Tirumala, S. (2014). Control of Large Scale Networked Systems Under Uncertainty. (Doctoral Dissertation). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1416764356

Chicago Manual of Style (16th Edition):

Buccapatnam Tirumala, Swapna. “Control of Large Scale Networked Systems Under Uncertainty.” 2014. Doctoral Dissertation, The Ohio State University. Accessed May 30, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1416764356.

MLA Handbook (7th Edition):

Buccapatnam Tirumala, Swapna. “Control of Large Scale Networked Systems Under Uncertainty.” 2014. Web. 30 May 2020.

Vancouver:

Buccapatnam Tirumala S. Control of Large Scale Networked Systems Under Uncertainty. [Internet] [Doctoral dissertation]. The Ohio State University; 2014. [cited 2020 May 30]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1416764356.

Council of Science Editors:

Buccapatnam Tirumala S. Control of Large Scale Networked Systems Under Uncertainty. [Doctoral Dissertation]. The Ohio State University; 2014. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1416764356


The Ohio State University

2. Teng, Yueh-Ching. Improved Synthesis Tool for Miller OTA Stage Using gm/ID Methodology.

Degree: MS, Electrical and Computer Engineering, 2011, The Ohio State University

 Modern analog integrated circuit design is mainly based on CMOS technology and is wildly used in different applications. Analog circuit designs are often complicated by… (more)

Subjects/Keywords: Electrical Engineering; OTA design; gm/Id

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APA (6th Edition):

Teng, Y. (2011). Improved Synthesis Tool for Miller OTA Stage Using gm/ID Methodology. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1300912150

Chicago Manual of Style (16th Edition):

Teng, Yueh-Ching. “Improved Synthesis Tool for Miller OTA Stage Using gm/ID Methodology.” 2011. Masters Thesis, The Ohio State University. Accessed May 30, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1300912150.

MLA Handbook (7th Edition):

Teng, Yueh-Ching. “Improved Synthesis Tool for Miller OTA Stage Using gm/ID Methodology.” 2011. Web. 30 May 2020.

Vancouver:

Teng Y. Improved Synthesis Tool for Miller OTA Stage Using gm/ID Methodology. [Internet] [Masters thesis]. The Ohio State University; 2011. [cited 2020 May 30]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1300912150.

Council of Science Editors:

Teng Y. Improved Synthesis Tool for Miller OTA Stage Using gm/ID Methodology. [Masters Thesis]. The Ohio State University; 2011. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1300912150


Purdue University

3. Sharad, Mrigank. Energy efficient hybrid computing systems using spin devices.

Degree: PhD, Electrical and Computer Engineering, 2014, Purdue University

  Emerging spin-devices like magnetic tunnel junctions (MTJ's), spin-valves and domain wall magnets (DWM) have opened new avenues for spin-based logic design. This work explored… (more)

Subjects/Keywords: Design; Electrical and Computer Engineering; Physics

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APA (6th Edition):

Sharad, M. (2014). Energy efficient hybrid computing systems using spin devices. (Doctoral Dissertation). Purdue University. Retrieved from https://docs.lib.purdue.edu/open_access_dissertations/362

Chicago Manual of Style (16th Edition):

Sharad, Mrigank. “Energy efficient hybrid computing systems using spin devices.” 2014. Doctoral Dissertation, Purdue University. Accessed May 30, 2020. https://docs.lib.purdue.edu/open_access_dissertations/362.

MLA Handbook (7th Edition):

Sharad, Mrigank. “Energy efficient hybrid computing systems using spin devices.” 2014. Web. 30 May 2020.

Vancouver:

Sharad M. Energy efficient hybrid computing systems using spin devices. [Internet] [Doctoral dissertation]. Purdue University; 2014. [cited 2020 May 30]. Available from: https://docs.lib.purdue.edu/open_access_dissertations/362.

Council of Science Editors:

Sharad M. Energy efficient hybrid computing systems using spin devices. [Doctoral Dissertation]. Purdue University; 2014. Available from: https://docs.lib.purdue.edu/open_access_dissertations/362


University of California – Irvine

4. Kim, Kyoungwon. Computation Model Based Automatic Design Space Exploration.

Degree: Electrical and Computer Engineering, 2014, University of California – Irvine

 Embedded system designers continuously face a twofold challenge handling the ever-increasing complexity of design and meeting the ever-shrinking time-to-market timeline. To meet such a challenge,… (more)

Subjects/Keywords: Engineering; Computer engineering; Automatic Design Space Exploration; Fast TLM Estimation; System Design Methodology

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APA (6th Edition):

Kim, K. (2014). Computation Model Based Automatic Design Space Exploration. (Thesis). University of California – Irvine. Retrieved from http://www.escholarship.org/uc/item/0h1876f9

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kim, Kyoungwon. “Computation Model Based Automatic Design Space Exploration.” 2014. Thesis, University of California – Irvine. Accessed May 30, 2020. http://www.escholarship.org/uc/item/0h1876f9.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kim, Kyoungwon. “Computation Model Based Automatic Design Space Exploration.” 2014. Web. 30 May 2020.

Vancouver:

Kim K. Computation Model Based Automatic Design Space Exploration. [Internet] [Thesis]. University of California – Irvine; 2014. [cited 2020 May 30]. Available from: http://www.escholarship.org/uc/item/0h1876f9.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kim K. Computation Model Based Automatic Design Space Exploration. [Thesis]. University of California – Irvine; 2014. Available from: http://www.escholarship.org/uc/item/0h1876f9

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of California – Irvine

5. Samei Syahkal, Yasaman. Automated Power-Aware System-Level Design with the MAVO Framework.

Degree: Electrical and Computer Engineering, 2014, University of California – Irvine

 For the past few decades, semiconductor capabilities have been improving as Moore's law predicted. Transistor size has been shrinking and technology size will be less… (more)

Subjects/Keywords: Computer engineering; Electrical engineering; Design; Power; SpecC; System-level

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APA (6th Edition):

Samei Syahkal, Y. (2014). Automated Power-Aware System-Level Design with the MAVO Framework. (Thesis). University of California – Irvine. Retrieved from http://www.escholarship.org/uc/item/05t1d8bq

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Samei Syahkal, Yasaman. “Automated Power-Aware System-Level Design with the MAVO Framework.” 2014. Thesis, University of California – Irvine. Accessed May 30, 2020. http://www.escholarship.org/uc/item/05t1d8bq.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Samei Syahkal, Yasaman. “Automated Power-Aware System-Level Design with the MAVO Framework.” 2014. Web. 30 May 2020.

Vancouver:

Samei Syahkal Y. Automated Power-Aware System-Level Design with the MAVO Framework. [Internet] [Thesis]. University of California – Irvine; 2014. [cited 2020 May 30]. Available from: http://www.escholarship.org/uc/item/05t1d8bq.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Samei Syahkal Y. Automated Power-Aware System-Level Design with the MAVO Framework. [Thesis]. University of California – Irvine; 2014. Available from: http://www.escholarship.org/uc/item/05t1d8bq

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


The Ohio State University

6. Milley, Andrew J. Computer-Aided Design and Frequency Domain Analysis of Sampling Circuits.

Degree: MS, Electrical and Computer Engineering, 2009, The Ohio State University

  As VLSI processes scale down to keep up with digital demands, classical transistor models become less and less accurate reducing the ability to characterize… (more)

Subjects/Keywords: Electrical Engineering; sampling circuits; sample and hold; VLSI design; computer-aided design

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APA (6th Edition):

Milley, A. J. (2009). Computer-Aided Design and Frequency Domain Analysis of Sampling Circuits. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1242665614

Chicago Manual of Style (16th Edition):

Milley, Andrew J. “Computer-Aided Design and Frequency Domain Analysis of Sampling Circuits.” 2009. Masters Thesis, The Ohio State University. Accessed May 30, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1242665614.

MLA Handbook (7th Edition):

Milley, Andrew J. “Computer-Aided Design and Frequency Domain Analysis of Sampling Circuits.” 2009. Web. 30 May 2020.

Vancouver:

Milley AJ. Computer-Aided Design and Frequency Domain Analysis of Sampling Circuits. [Internet] [Masters thesis]. The Ohio State University; 2009. [cited 2020 May 30]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1242665614.

Council of Science Editors:

Milley AJ. Computer-Aided Design and Frequency Domain Analysis of Sampling Circuits. [Masters Thesis]. The Ohio State University; 2009. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1242665614


Portland State University

7. Woods, Walt. The Design of a Simple, Spiking Sparse Coding Algorithm for Memristive Hardware.

Degree: MS(M.S.) in Electrical and Computer Engineering, Electrical and Computer Engineering, 2016, Portland State University

  Calculating a sparse code for signals with high dimensionality, such as high-resolution images, takes substantial time to compute on a traditional computer architecture. Memristors… (more)

Subjects/Keywords: Computer architecture  – Design; Computer architecture  – Evaluation; Associative storage  – Design; Memristors; Electrical and Computer Engineering

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APA (6th Edition):

Woods, W. (2016). The Design of a Simple, Spiking Sparse Coding Algorithm for Memristive Hardware. (Masters Thesis). Portland State University. Retrieved from http://pdxscholar.library.pdx.edu/open_access_etds/2721

Chicago Manual of Style (16th Edition):

Woods, Walt. “The Design of a Simple, Spiking Sparse Coding Algorithm for Memristive Hardware.” 2016. Masters Thesis, Portland State University. Accessed May 30, 2020. http://pdxscholar.library.pdx.edu/open_access_etds/2721.

MLA Handbook (7th Edition):

Woods, Walt. “The Design of a Simple, Spiking Sparse Coding Algorithm for Memristive Hardware.” 2016. Web. 30 May 2020.

Vancouver:

Woods W. The Design of a Simple, Spiking Sparse Coding Algorithm for Memristive Hardware. [Internet] [Masters thesis]. Portland State University; 2016. [cited 2020 May 30]. Available from: http://pdxscholar.library.pdx.edu/open_access_etds/2721.

Council of Science Editors:

Woods W. The Design of a Simple, Spiking Sparse Coding Algorithm for Memristive Hardware. [Masters Thesis]. Portland State University; 2016. Available from: http://pdxscholar.library.pdx.edu/open_access_etds/2721


Utah State University

8. Saha, Shamik. SSAGA: Streaming Multiprocessors (SMs) Sculpted for Asymmetric General Purpose Graphics Processing Unit (GPGPU) Applications.

Degree: MS, Electrical and Computer Engineering, 2016, Utah State University

  The evolution of the Graphics Processing Units (GPUs) over the last decade, has reinforced general purpose computing while sustaining a steady performance growth in… (more)

Subjects/Keywords: graphics processing unit; computer aided design; custom design; energy efficiency; VLSI; Electrical and Computer Engineering

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APA (6th Edition):

Saha, S. (2016). SSAGA: Streaming Multiprocessors (SMs) Sculpted for Asymmetric General Purpose Graphics Processing Unit (GPGPU) Applications. (Masters Thesis). Utah State University. Retrieved from https://digitalcommons.usu.edu/etd/5196

Chicago Manual of Style (16th Edition):

Saha, Shamik. “SSAGA: Streaming Multiprocessors (SMs) Sculpted for Asymmetric General Purpose Graphics Processing Unit (GPGPU) Applications.” 2016. Masters Thesis, Utah State University. Accessed May 30, 2020. https://digitalcommons.usu.edu/etd/5196.

MLA Handbook (7th Edition):

Saha, Shamik. “SSAGA: Streaming Multiprocessors (SMs) Sculpted for Asymmetric General Purpose Graphics Processing Unit (GPGPU) Applications.” 2016. Web. 30 May 2020.

Vancouver:

Saha S. SSAGA: Streaming Multiprocessors (SMs) Sculpted for Asymmetric General Purpose Graphics Processing Unit (GPGPU) Applications. [Internet] [Masters thesis]. Utah State University; 2016. [cited 2020 May 30]. Available from: https://digitalcommons.usu.edu/etd/5196.

Council of Science Editors:

Saha S. SSAGA: Streaming Multiprocessors (SMs) Sculpted for Asymmetric General Purpose Graphics Processing Unit (GPGPU) Applications. [Masters Thesis]. Utah State University; 2016. Available from: https://digitalcommons.usu.edu/etd/5196


Utah State University

9. Han, Yiding. Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation.

Degree: PhD, Electrical and Computer Engineering, 2014, Utah State University

  The electronic design automation (EDA) tools are a specific set of software that play important roles in modern integrated circuit (IC) design. These software… (more)

Subjects/Keywords: Graphics Processing; Unit-Based Computer-Aided Design Algorithms; Electronic Design; Electrical and Computer Engineering

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APA (6th Edition):

Han, Y. (2014). Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation. (Doctoral Dissertation). Utah State University. Retrieved from https://digitalcommons.usu.edu/etd/3868

Chicago Manual of Style (16th Edition):

Han, Yiding. “Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation.” 2014. Doctoral Dissertation, Utah State University. Accessed May 30, 2020. https://digitalcommons.usu.edu/etd/3868.

MLA Handbook (7th Edition):

Han, Yiding. “Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation.” 2014. Web. 30 May 2020.

Vancouver:

Han Y. Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation. [Internet] [Doctoral dissertation]. Utah State University; 2014. [cited 2020 May 30]. Available from: https://digitalcommons.usu.edu/etd/3868.

Council of Science Editors:

Han Y. Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation. [Doctoral Dissertation]. Utah State University; 2014. Available from: https://digitalcommons.usu.edu/etd/3868


University of Michigan

10. Darvishian, Ali. Design and Analysis of Extremely Low-Noise MEMS Gyroscopes for Navigation.

Degree: PhD, Electrical and Computer Engineering, 2018, University of Michigan

 Inertial measurement sensors that include three gyroscopes and three accelerometers are key elements of inertial navigation systems. Miniaturization of these sensors is desirable to achieve… (more)

Subjects/Keywords: Design; MEMS; Gyroscope; Resonator; Quality factor; Noise; Electrical Engineering; Mechanical Engineering; Engineering

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APA (6th Edition):

Darvishian, A. (2018). Design and Analysis of Extremely Low-Noise MEMS Gyroscopes for Navigation. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/147701

Chicago Manual of Style (16th Edition):

Darvishian, Ali. “Design and Analysis of Extremely Low-Noise MEMS Gyroscopes for Navigation.” 2018. Doctoral Dissertation, University of Michigan. Accessed May 30, 2020. http://hdl.handle.net/2027.42/147701.

MLA Handbook (7th Edition):

Darvishian, Ali. “Design and Analysis of Extremely Low-Noise MEMS Gyroscopes for Navigation.” 2018. Web. 30 May 2020.

Vancouver:

Darvishian A. Design and Analysis of Extremely Low-Noise MEMS Gyroscopes for Navigation. [Internet] [Doctoral dissertation]. University of Michigan; 2018. [cited 2020 May 30]. Available from: http://hdl.handle.net/2027.42/147701.

Council of Science Editors:

Darvishian A. Design and Analysis of Extremely Low-Noise MEMS Gyroscopes for Navigation. [Doctoral Dissertation]. University of Michigan; 2018. Available from: http://hdl.handle.net/2027.42/147701


University of California – Irvine

11. Mahajan, Akshay. Design of Ultra-Low Power Amplifier Array in Weak Inversion Region for Electrocortigraphy (ECoG) Signal Acquisition.

Degree: Electrical and Computer Engineering, 2015, University of California – Irvine

Design and implementation of a novel ultra-low power (ULP) operationaltransconductance amplifier (OTA) meant for recording Electrocorticography signals ispresented in this thesis. The design of the… (more)

Subjects/Keywords: Electrical engineering; Biomedical engineering; amplifier; ECoG; low noise; subthreshold design; Ultra low power; weak inversion

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APA (6th Edition):

Mahajan, A. (2015). Design of Ultra-Low Power Amplifier Array in Weak Inversion Region for Electrocortigraphy (ECoG) Signal Acquisition. (Thesis). University of California – Irvine. Retrieved from http://www.escholarship.org/uc/item/3bk869fs

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mahajan, Akshay. “Design of Ultra-Low Power Amplifier Array in Weak Inversion Region for Electrocortigraphy (ECoG) Signal Acquisition.” 2015. Thesis, University of California – Irvine. Accessed May 30, 2020. http://www.escholarship.org/uc/item/3bk869fs.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mahajan, Akshay. “Design of Ultra-Low Power Amplifier Array in Weak Inversion Region for Electrocortigraphy (ECoG) Signal Acquisition.” 2015. Web. 30 May 2020.

Vancouver:

Mahajan A. Design of Ultra-Low Power Amplifier Array in Weak Inversion Region for Electrocortigraphy (ECoG) Signal Acquisition. [Internet] [Thesis]. University of California – Irvine; 2015. [cited 2020 May 30]. Available from: http://www.escholarship.org/uc/item/3bk869fs.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mahajan A. Design of Ultra-Low Power Amplifier Array in Weak Inversion Region for Electrocortigraphy (ECoG) Signal Acquisition. [Thesis]. University of California – Irvine; 2015. Available from: http://www.escholarship.org/uc/item/3bk869fs

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Portland State University

12. Ashraf, Rehman. Robust Circuit & Architecture Design in the Nanoscale Regime.

Degree: PhD, Electrical and Computer Engineering, 2011, Portland State University

  Silicon based integrated circuit (IC) technology is approaching its physical limits. For sub 10nm technology nodes, the carbon nanotube (CNT) based field effect transistor… (more)

Subjects/Keywords: Electrical engineering; Computer engineering; Nanotechnology; Integrated circuits  – Design and construction; Field-effect transistors; Nanotubes; Carbon

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APA (6th Edition):

Ashraf, R. (2011). Robust Circuit & Architecture Design in the Nanoscale Regime. (Doctoral Dissertation). Portland State University. Retrieved from https://pdxscholar.library.pdx.edu/open_access_etds/240

Chicago Manual of Style (16th Edition):

Ashraf, Rehman. “Robust Circuit & Architecture Design in the Nanoscale Regime.” 2011. Doctoral Dissertation, Portland State University. Accessed May 30, 2020. https://pdxscholar.library.pdx.edu/open_access_etds/240.

MLA Handbook (7th Edition):

Ashraf, Rehman. “Robust Circuit & Architecture Design in the Nanoscale Regime.” 2011. Web. 30 May 2020.

Vancouver:

Ashraf R. Robust Circuit & Architecture Design in the Nanoscale Regime. [Internet] [Doctoral dissertation]. Portland State University; 2011. [cited 2020 May 30]. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/240.

Council of Science Editors:

Ashraf R. Robust Circuit & Architecture Design in the Nanoscale Regime. [Doctoral Dissertation]. Portland State University; 2011. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/240


The Ohio State University

13. Barat, Aakriti. Analysis and Design of Phase Locked Loops with insight into Wavelet Analysis.

Degree: MS, Electrical and Computer Engineering, 2017, The Ohio State University

 An injection locked oscillator is a presented using wavelet analysis to evaluate the role of PLLs in RF transceivers. The goal is to evaluate injection… (more)

Subjects/Keywords: Electrical Engineering; Design, Phase Locked Loops, Wavelet Analysis

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APA (6th Edition):

Barat, A. (2017). Analysis and Design of Phase Locked Loops with insight into Wavelet Analysis. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1483676715726685

Chicago Manual of Style (16th Edition):

Barat, Aakriti. “Analysis and Design of Phase Locked Loops with insight into Wavelet Analysis.” 2017. Masters Thesis, The Ohio State University. Accessed May 30, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1483676715726685.

MLA Handbook (7th Edition):

Barat, Aakriti. “Analysis and Design of Phase Locked Loops with insight into Wavelet Analysis.” 2017. Web. 30 May 2020.

Vancouver:

Barat A. Analysis and Design of Phase Locked Loops with insight into Wavelet Analysis. [Internet] [Masters thesis]. The Ohio State University; 2017. [cited 2020 May 30]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1483676715726685.

Council of Science Editors:

Barat A. Analysis and Design of Phase Locked Loops with insight into Wavelet Analysis. [Masters Thesis]. The Ohio State University; 2017. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1483676715726685

14. Abdelmoaty, Ahmed A. Circuit and System Techniques for Energy-Harvesting Platforms for Mobile Applications.

Degree: PhD, Electrical and Computer Engineering, 2017, The Ohio State University

 With the widespread use of mobile devices, such cellular phones, tablets, laptops, and navigation devices, consumers are demanding higher performance, more functionality, reduced weight, and… (more)

Subjects/Keywords: Electrical Engineering; Systems Design

…Fields of Study Major Field: Electrical and Computer Engineering vii Table of Contents… …52 5.3 SYSTEM AND CIRCUIT DESIGN OF THE PROPOSED MPPT CIRCUIT… …conversion stage to deliver the demand power to the loads. In this design, the proposed power… …chapter four covers the operation and design of the proposed power management platform using a… …Furthermore, chapters five and six presents the design and implementation of control circuits that… 

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APA (6th Edition):

Abdelmoaty, A. A. (2017). Circuit and System Techniques for Energy-Harvesting Platforms for Mobile Applications. (Doctoral Dissertation). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1481832223757049

Chicago Manual of Style (16th Edition):

Abdelmoaty, Ahmed A. “Circuit and System Techniques for Energy-Harvesting Platforms for Mobile Applications.” 2017. Doctoral Dissertation, The Ohio State University. Accessed May 30, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1481832223757049.

MLA Handbook (7th Edition):

Abdelmoaty, Ahmed A. “Circuit and System Techniques for Energy-Harvesting Platforms for Mobile Applications.” 2017. Web. 30 May 2020.

Vancouver:

Abdelmoaty AA. Circuit and System Techniques for Energy-Harvesting Platforms for Mobile Applications. [Internet] [Doctoral dissertation]. The Ohio State University; 2017. [cited 2020 May 30]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1481832223757049.

Council of Science Editors:

Abdelmoaty AA. Circuit and System Techniques for Energy-Harvesting Platforms for Mobile Applications. [Doctoral Dissertation]. The Ohio State University; 2017. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1481832223757049


University of New Mexico

15. Dey, Preyom. Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits.

Degree: Electrical and Computer Engineering, 2015, University of New Mexico

  The demand of extremely long battery life for electronic devices is the driving force for modern semiconductor industry in recent years. Supply voltage scaling… (more)

Subjects/Keywords: Ultra Low Voltage Design; Electrical and Computer Engineering

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APA (6th Edition):

Dey, P. (2015). Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/27922

Chicago Manual of Style (16th Edition):

Dey, Preyom. “Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits.” 2015. Masters Thesis, University of New Mexico. Accessed May 30, 2020. http://hdl.handle.net/1928/27922.

MLA Handbook (7th Edition):

Dey, Preyom. “Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits.” 2015. Web. 30 May 2020.

Vancouver:

Dey P. Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits. [Internet] [Masters thesis]. University of New Mexico; 2015. [cited 2020 May 30]. Available from: http://hdl.handle.net/1928/27922.

Council of Science Editors:

Dey P. Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits. [Masters Thesis]. University of New Mexico; 2015. Available from: http://hdl.handle.net/1928/27922


University of New Mexico

16. Gleason, Joseph D. Software Design for Probabilistic Safety: Stochastic Reachability and Circadian Control.

Degree: Electrical and Computer Engineering, 2019, University of New Mexico

  Stochastic reachability is an important verification tool that provides probabilistic assurances of safety in a variety of contexts. In engineered systems, safety may be… (more)

Subjects/Keywords: Reachability; Software Design; Circadian Rhythms; Control Systems; Electrical and Computer Engineering

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APA (6th Edition):

Gleason, J. D. (2019). Software Design for Probabilistic Safety: Stochastic Reachability and Circadian Control. (Doctoral Dissertation). University of New Mexico. Retrieved from https://digitalrepository.unm.edu/ece_etds/486

Chicago Manual of Style (16th Edition):

Gleason, Joseph D. “Software Design for Probabilistic Safety: Stochastic Reachability and Circadian Control.” 2019. Doctoral Dissertation, University of New Mexico. Accessed May 30, 2020. https://digitalrepository.unm.edu/ece_etds/486.

MLA Handbook (7th Edition):

Gleason, Joseph D. “Software Design for Probabilistic Safety: Stochastic Reachability and Circadian Control.” 2019. Web. 30 May 2020.

Vancouver:

Gleason JD. Software Design for Probabilistic Safety: Stochastic Reachability and Circadian Control. [Internet] [Doctoral dissertation]. University of New Mexico; 2019. [cited 2020 May 30]. Available from: https://digitalrepository.unm.edu/ece_etds/486.

Council of Science Editors:

Gleason JD. Software Design for Probabilistic Safety: Stochastic Reachability and Circadian Control. [Doctoral Dissertation]. University of New Mexico; 2019. Available from: https://digitalrepository.unm.edu/ece_etds/486


Utah State University

17. Ancajas, Dean Michael B. Design of Reliable and Secure Network-On-Chip Architectures.

Degree: PhD, Electrical and Computer Engineering, 2015, Utah State University

  Network-on-Chips (NoCs) have become the standard communication platform for future massively parallel systems due to their performance, flexibility and scalability advantages. However, reliability issues… (more)

Subjects/Keywords: Design; Reliable; Secure; Network-on-chip; Architectures; Electrical and Computer Engineering

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APA (6th Edition):

Ancajas, D. M. B. (2015). Design of Reliable and Secure Network-On-Chip Architectures. (Doctoral Dissertation). Utah State University. Retrieved from https://digitalcommons.usu.edu/etd/4150

Chicago Manual of Style (16th Edition):

Ancajas, Dean Michael B. “Design of Reliable and Secure Network-On-Chip Architectures.” 2015. Doctoral Dissertation, Utah State University. Accessed May 30, 2020. https://digitalcommons.usu.edu/etd/4150.

MLA Handbook (7th Edition):

Ancajas, Dean Michael B. “Design of Reliable and Secure Network-On-Chip Architectures.” 2015. Web. 30 May 2020.

Vancouver:

Ancajas DMB. Design of Reliable and Secure Network-On-Chip Architectures. [Internet] [Doctoral dissertation]. Utah State University; 2015. [cited 2020 May 30]. Available from: https://digitalcommons.usu.edu/etd/4150.

Council of Science Editors:

Ancajas DMB. Design of Reliable and Secure Network-On-Chip Architectures. [Doctoral Dissertation]. Utah State University; 2015. Available from: https://digitalcommons.usu.edu/etd/4150


Portland State University

18. Park, Hoon. Formal Modeling and Verification of Delay-Insensitive Circuits.

Degree: PhD, Electrical and Computer Engineering, 2015, Portland State University

  Einstein's relativity theory tells us that the notion of simultaneity can only be approximated for events distributed over space. As a result, the use… (more)

Subjects/Keywords: Asynchronous circuits  – Design and construction; Integrated circuits  – Very large scale integration  – Design and construction; Digital Circuits; Electrical and Computer Engineering

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APA (6th Edition):

Park, H. (2015). Formal Modeling and Verification of Delay-Insensitive Circuits. (Doctoral Dissertation). Portland State University. Retrieved from https://pdxscholar.library.pdx.edu/open_access_etds/2639

Chicago Manual of Style (16th Edition):

Park, Hoon. “Formal Modeling and Verification of Delay-Insensitive Circuits.” 2015. Doctoral Dissertation, Portland State University. Accessed May 30, 2020. https://pdxscholar.library.pdx.edu/open_access_etds/2639.

MLA Handbook (7th Edition):

Park, Hoon. “Formal Modeling and Verification of Delay-Insensitive Circuits.” 2015. Web. 30 May 2020.

Vancouver:

Park H. Formal Modeling and Verification of Delay-Insensitive Circuits. [Internet] [Doctoral dissertation]. Portland State University; 2015. [cited 2020 May 30]. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/2639.

Council of Science Editors:

Park H. Formal Modeling and Verification of Delay-Insensitive Circuits. [Doctoral Dissertation]. Portland State University; 2015. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/2639


Utah State University

19. Tavakoli, Reza. Design of Road Embedded Dynamic Charging Systems for Electrified Transportation.

Degree: PhD, Electrical and Computer Engineering, 2020, Utah State University

  The U.S. transportation sector represented about 28% of all energy consumption in 2018. Petroleum products accounted for 92% of this total energy. Light-duty vehicles… (more)

Subjects/Keywords: Wireless Power Transfer; Dynamic Charging; Electric Vehicle; Magnetic Pad Design; Controller Design; Electrical and Computer Engineering

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APA (6th Edition):

Tavakoli, R. (2020). Design of Road Embedded Dynamic Charging Systems for Electrified Transportation. (Doctoral Dissertation). Utah State University. Retrieved from https://digitalcommons.usu.edu/etd/7715

Chicago Manual of Style (16th Edition):

Tavakoli, Reza. “Design of Road Embedded Dynamic Charging Systems for Electrified Transportation.” 2020. Doctoral Dissertation, Utah State University. Accessed May 30, 2020. https://digitalcommons.usu.edu/etd/7715.

MLA Handbook (7th Edition):

Tavakoli, Reza. “Design of Road Embedded Dynamic Charging Systems for Electrified Transportation.” 2020. Web. 30 May 2020.

Vancouver:

Tavakoli R. Design of Road Embedded Dynamic Charging Systems for Electrified Transportation. [Internet] [Doctoral dissertation]. Utah State University; 2020. [cited 2020 May 30]. Available from: https://digitalcommons.usu.edu/etd/7715.

Council of Science Editors:

Tavakoli R. Design of Road Embedded Dynamic Charging Systems for Electrified Transportation. [Doctoral Dissertation]. Utah State University; 2020. Available from: https://digitalcommons.usu.edu/etd/7715


Portland State University

20. Jamadagni, Navaneeth Prasannakumar. Evaluation of Data-Path Topologies for Self-Timed Conditional Statements.

Degree: PhD, Electrical and Computer Engineering, 2015, Portland State University

  This research presents a methodology to evaluate data path topologies that implement a conditional statement for an average-case performance that is better than the… (more)

Subjects/Keywords: Algorithms; Integrated circuits  – Design and construction; Electrical and Computer Engineering; Theory and Algorithms

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APA (6th Edition):

Jamadagni, N. P. (2015). Evaluation of Data-Path Topologies for Self-Timed Conditional Statements. (Doctoral Dissertation). Portland State University. Retrieved from https://pdxscholar.library.pdx.edu/open_access_etds/2462

Chicago Manual of Style (16th Edition):

Jamadagni, Navaneeth Prasannakumar. “Evaluation of Data-Path Topologies for Self-Timed Conditional Statements.” 2015. Doctoral Dissertation, Portland State University. Accessed May 30, 2020. https://pdxscholar.library.pdx.edu/open_access_etds/2462.

MLA Handbook (7th Edition):

Jamadagni, Navaneeth Prasannakumar. “Evaluation of Data-Path Topologies for Self-Timed Conditional Statements.” 2015. Web. 30 May 2020.

Vancouver:

Jamadagni NP. Evaluation of Data-Path Topologies for Self-Timed Conditional Statements. [Internet] [Doctoral dissertation]. Portland State University; 2015. [cited 2020 May 30]. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/2462.

Council of Science Editors:

Jamadagni NP. Evaluation of Data-Path Topologies for Self-Timed Conditional Statements. [Doctoral Dissertation]. Portland State University; 2015. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/2462


Portland State University

21. Baker, Bryant. A 3.6 GHz Doherty Power Amplifier with a 40 dBm Saturated Output Power using GaN on SiC HEMT Devices.

Degree: MS(M.S.) in Electrical and Computer Engineering, Electrical and Computer Engineering, 2014, Portland State University

  This manuscript describes the design, development, and implementation of a linear high efficiency power amplifier. The symmetrical Doherty power amplifier utilizes TriQuint's 2nd Generation… (more)

Subjects/Keywords: Power amplifiers  – Design and construction; Gallium nitride; Silicon carbide; Microwave amplifiers; Electrical and Computer Engineering

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APA (6th Edition):

Baker, B. (2014). A 3.6 GHz Doherty Power Amplifier with a 40 dBm Saturated Output Power using GaN on SiC HEMT Devices. (Masters Thesis). Portland State University. Retrieved from https://pdxscholar.library.pdx.edu/open_access_etds/1781

Chicago Manual of Style (16th Edition):

Baker, Bryant. “A 3.6 GHz Doherty Power Amplifier with a 40 dBm Saturated Output Power using GaN on SiC HEMT Devices.” 2014. Masters Thesis, Portland State University. Accessed May 30, 2020. https://pdxscholar.library.pdx.edu/open_access_etds/1781.

MLA Handbook (7th Edition):

Baker, Bryant. “A 3.6 GHz Doherty Power Amplifier with a 40 dBm Saturated Output Power using GaN on SiC HEMT Devices.” 2014. Web. 30 May 2020.

Vancouver:

Baker B. A 3.6 GHz Doherty Power Amplifier with a 40 dBm Saturated Output Power using GaN on SiC HEMT Devices. [Internet] [Masters thesis]. Portland State University; 2014. [cited 2020 May 30]. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/1781.

Council of Science Editors:

Baker B. A 3.6 GHz Doherty Power Amplifier with a 40 dBm Saturated Output Power using GaN on SiC HEMT Devices. [Masters Thesis]. Portland State University; 2014. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/1781


Portland State University

22. Tran, Linh Hoang. Reversible Circuits Synthesis Based on EXOR-sum of Products of EXOR-sums.

Degree: PhD, Electrical and Computer Engineering, 2015, Portland State University

  Power dissipation in modern technologies is an important matter and overheating is a severe concern for both manufacturer (impossibility of introducing new and smaller… (more)

Subjects/Keywords: Logic circuits  – Design and construction; Reversible computing; Quantum computers; Electrical and Computer Engineering

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APA (6th Edition):

Tran, L. H. (2015). Reversible Circuits Synthesis Based on EXOR-sum of Products of EXOR-sums. (Doctoral Dissertation). Portland State University. Retrieved from https://pdxscholar.library.pdx.edu/open_access_etds/2302

Chicago Manual of Style (16th Edition):

Tran, Linh Hoang. “Reversible Circuits Synthesis Based on EXOR-sum of Products of EXOR-sums.” 2015. Doctoral Dissertation, Portland State University. Accessed May 30, 2020. https://pdxscholar.library.pdx.edu/open_access_etds/2302.

MLA Handbook (7th Edition):

Tran, Linh Hoang. “Reversible Circuits Synthesis Based on EXOR-sum of Products of EXOR-sums.” 2015. Web. 30 May 2020.

Vancouver:

Tran LH. Reversible Circuits Synthesis Based on EXOR-sum of Products of EXOR-sums. [Internet] [Doctoral dissertation]. Portland State University; 2015. [cited 2020 May 30]. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/2302.

Council of Science Editors:

Tran LH. Reversible Circuits Synthesis Based on EXOR-sum of Products of EXOR-sums. [Doctoral Dissertation]. Portland State University; 2015. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/2302


The Ohio State University

23. Raines, Bryan Dennis. Systematic Design of Multiple Antenna Systems Using Characteristic Modes.

Degree: PhD, Electrical and Computer Engineering, 2011, The Ohio State University

  Complex multiple antenna systems are emerging today as market pressures to improve link capacity and reliability on complex integrated platforms. Complexity is therefore inherent… (more)

Subjects/Keywords: Electrical Engineering; Electromagnetics; Electromagnetism; antennas; characteristic modes; MIMO; mode tracking; antenna feed design

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APA (6th Edition):

Raines, B. D. (2011). Systematic Design of Multiple Antenna Systems Using Characteristic Modes. (Doctoral Dissertation). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1306951104

Chicago Manual of Style (16th Edition):

Raines, Bryan Dennis. “Systematic Design of Multiple Antenna Systems Using Characteristic Modes.” 2011. Doctoral Dissertation, The Ohio State University. Accessed May 30, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1306951104.

MLA Handbook (7th Edition):

Raines, Bryan Dennis. “Systematic Design of Multiple Antenna Systems Using Characteristic Modes.” 2011. Web. 30 May 2020.

Vancouver:

Raines BD. Systematic Design of Multiple Antenna Systems Using Characteristic Modes. [Internet] [Doctoral dissertation]. The Ohio State University; 2011. [cited 2020 May 30]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1306951104.

Council of Science Editors:

Raines BD. Systematic Design of Multiple Antenna Systems Using Characteristic Modes. [Doctoral Dissertation]. The Ohio State University; 2011. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1306951104


The Ohio State University

24. Asar, Sita Madhu. An Audio Processing System as an Example of Modern Circuit Board Design.

Degree: MS, Electrical and Computer Engineering, 2016, The Ohio State University

 A popular audio processing device that uses sample-and-hold to produce a stepped rectangular waveform from a guitar signal, known as a “bitcrusher” guitar pedal, is… (more)

Subjects/Keywords: Electrical Engineering; Audio; Signal Processing; Fourier; PCB; Design; Music; Circuits; Analog; Integrator; Psychoacoustics

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APA (6th Edition):

Asar, S. M. (2016). An Audio Processing System as an Example of Modern Circuit Board Design. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1480588012253634

Chicago Manual of Style (16th Edition):

Asar, Sita Madhu. “An Audio Processing System as an Example of Modern Circuit Board Design.” 2016. Masters Thesis, The Ohio State University. Accessed May 30, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1480588012253634.

MLA Handbook (7th Edition):

Asar, Sita Madhu. “An Audio Processing System as an Example of Modern Circuit Board Design.” 2016. Web. 30 May 2020.

Vancouver:

Asar SM. An Audio Processing System as an Example of Modern Circuit Board Design. [Internet] [Masters thesis]. The Ohio State University; 2016. [cited 2020 May 30]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1480588012253634.

Council of Science Editors:

Asar SM. An Audio Processing System as an Example of Modern Circuit Board Design. [Masters Thesis]. The Ohio State University; 2016. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1480588012253634


Portland State University

25. Rahman, Kamela Choudhury. Complete Design Methodology of a Massively Parallel and Pipelined Memristive Stateful IMPLY Logic Based Reconfigurable Architecture.

Degree: PhD, Electrical and Computer Engineering, 2016, Portland State University

  Continued dimensional scaling of CMOS processes is approaching fundamental limits and therefore, alternate new devices and microarchitectures are explored to address the growing need… (more)

Subjects/Keywords: Memristors; Computer architecture  – Design; Computer architecture  – Evaluation; Electrical and Computer Engineering; Nanoscience and Nanotechnology

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APA (6th Edition):

Rahman, K. C. (2016). Complete Design Methodology of a Massively Parallel and Pipelined Memristive Stateful IMPLY Logic Based Reconfigurable Architecture. (Doctoral Dissertation). Portland State University. Retrieved from http://pdxscholar.library.pdx.edu/open_access_etds/2956

Chicago Manual of Style (16th Edition):

Rahman, Kamela Choudhury. “Complete Design Methodology of a Massively Parallel and Pipelined Memristive Stateful IMPLY Logic Based Reconfigurable Architecture.” 2016. Doctoral Dissertation, Portland State University. Accessed May 30, 2020. http://pdxscholar.library.pdx.edu/open_access_etds/2956.

MLA Handbook (7th Edition):

Rahman, Kamela Choudhury. “Complete Design Methodology of a Massively Parallel and Pipelined Memristive Stateful IMPLY Logic Based Reconfigurable Architecture.” 2016. Web. 30 May 2020.

Vancouver:

Rahman KC. Complete Design Methodology of a Massively Parallel and Pipelined Memristive Stateful IMPLY Logic Based Reconfigurable Architecture. [Internet] [Doctoral dissertation]. Portland State University; 2016. [cited 2020 May 30]. Available from: http://pdxscholar.library.pdx.edu/open_access_etds/2956.

Council of Science Editors:

Rahman KC. Complete Design Methodology of a Massively Parallel and Pipelined Memristive Stateful IMPLY Logic Based Reconfigurable Architecture. [Doctoral Dissertation]. Portland State University; 2016. Available from: http://pdxscholar.library.pdx.edu/open_access_etds/2956


Portland State University

26. Slay, Tylor. Adoption of an Internet of Things Framework for Distributed Energy Resource Coordination and Control.

Degree: MS(M.S.) in Electrical and Computer Engineering, Electrical and Computer Engineering, 2018, Portland State University

  Increasing penetration of non-dispatchable renewable energy resources and greater peak power demand present growing challenges to Bulk Power System (BPS) reliability and resilience. This… (more)

Subjects/Keywords: Electric power distribution; Electric power systems  – Design; Electric power system stability; Electrical and Computer Engineering

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APA (6th Edition):

Slay, T. (2018). Adoption of an Internet of Things Framework for Distributed Energy Resource Coordination and Control. (Masters Thesis). Portland State University. Retrieved from https://pdxscholar.library.pdx.edu/open_access_etds/4464

Chicago Manual of Style (16th Edition):

Slay, Tylor. “Adoption of an Internet of Things Framework for Distributed Energy Resource Coordination and Control.” 2018. Masters Thesis, Portland State University. Accessed May 30, 2020. https://pdxscholar.library.pdx.edu/open_access_etds/4464.

MLA Handbook (7th Edition):

Slay, Tylor. “Adoption of an Internet of Things Framework for Distributed Energy Resource Coordination and Control.” 2018. Web. 30 May 2020.

Vancouver:

Slay T. Adoption of an Internet of Things Framework for Distributed Energy Resource Coordination and Control. [Internet] [Masters thesis]. Portland State University; 2018. [cited 2020 May 30]. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/4464.

Council of Science Editors:

Slay T. Adoption of an Internet of Things Framework for Distributed Energy Resource Coordination and Control. [Masters Thesis]. Portland State University; 2018. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/4464


University of California – Irvine

27. Samavaty, Behzad. 100Gbps Half-Rate Referenceless Injection-Locking Clock/Data Recovery Circuit in 0.18 µm BiCMOS Process.

Degree: Electrical and Computer Engineering, 2017, University of California – Irvine

 The demand for bandwidth intensive applications has increased significantly in the last decade. Applications such as video streaming, cloud-based computing, cloud storage and Internet of… (more)

Subjects/Keywords: Electrical engineering; CDR; Clock/data recovery system; communication circuit design; High speed analog; Injection locking

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APA (6th Edition):

Samavaty, B. (2017). 100Gbps Half-Rate Referenceless Injection-Locking Clock/Data Recovery Circuit in 0.18 µm BiCMOS Process. (Thesis). University of California – Irvine. Retrieved from http://www.escholarship.org/uc/item/1mb0001r

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Samavaty, Behzad. “100Gbps Half-Rate Referenceless Injection-Locking Clock/Data Recovery Circuit in 0.18 µm BiCMOS Process.” 2017. Thesis, University of California – Irvine. Accessed May 30, 2020. http://www.escholarship.org/uc/item/1mb0001r.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Samavaty, Behzad. “100Gbps Half-Rate Referenceless Injection-Locking Clock/Data Recovery Circuit in 0.18 µm BiCMOS Process.” 2017. Web. 30 May 2020.

Vancouver:

Samavaty B. 100Gbps Half-Rate Referenceless Injection-Locking Clock/Data Recovery Circuit in 0.18 µm BiCMOS Process. [Internet] [Thesis]. University of California – Irvine; 2017. [cited 2020 May 30]. Available from: http://www.escholarship.org/uc/item/1mb0001r.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Samavaty B. 100Gbps Half-Rate Referenceless Injection-Locking Clock/Data Recovery Circuit in 0.18 µm BiCMOS Process. [Thesis]. University of California – Irvine; 2017. Available from: http://www.escholarship.org/uc/item/1mb0001r

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Iowa

28. Mokrzycki, Brian Thomas. WvFEv3, An FPGA-based general purpose digital signal processor for space applications.

Degree: MS, Electrical and Computer Engineering, 2011, University of Iowa

  The Waves instruments aboard the Juno and Radiation Belt Storm Probe (RBSP) spacecraft represents the next generation of space radio and plasma wave instrumentation… (more)

Subjects/Keywords: computer architecture; DSP; FPGA; Juno; processor design; RBSP; Electrical and Computer Engineering

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APA (6th Edition):

Mokrzycki, B. T. (2011). WvFEv3, An FPGA-based general purpose digital signal processor for space applications. (Masters Thesis). University of Iowa. Retrieved from https://ir.uiowa.edu/etd/3355

Chicago Manual of Style (16th Edition):

Mokrzycki, Brian Thomas. “WvFEv3, An FPGA-based general purpose digital signal processor for space applications.” 2011. Masters Thesis, University of Iowa. Accessed May 30, 2020. https://ir.uiowa.edu/etd/3355.

MLA Handbook (7th Edition):

Mokrzycki, Brian Thomas. “WvFEv3, An FPGA-based general purpose digital signal processor for space applications.” 2011. Web. 30 May 2020.

Vancouver:

Mokrzycki BT. WvFEv3, An FPGA-based general purpose digital signal processor for space applications. [Internet] [Masters thesis]. University of Iowa; 2011. [cited 2020 May 30]. Available from: https://ir.uiowa.edu/etd/3355.

Council of Science Editors:

Mokrzycki BT. WvFEv3, An FPGA-based general purpose digital signal processor for space applications. [Masters Thesis]. University of Iowa; 2011. Available from: https://ir.uiowa.edu/etd/3355


The Ohio State University

29. Wang, Xiaodan. The EMI Filter Design for GaN HEMT Based Two-Level Voltage Source Inverter.

Degree: MS, Electrical and Computer Engineering, 2018, The Ohio State University

 Electromagnetic interference (EMI) is a common phenomenon as the introduction of fast switching wide bandgap devices in the high power density and high efficiency power… (more)

Subjects/Keywords: Electrical Engineering; electromagnetic interference; EMI filter design; common mode choke; motor drive

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APA (6th Edition):

Wang, X. (2018). The EMI Filter Design for GaN HEMT Based Two-Level Voltage Source Inverter. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu152424286628544

Chicago Manual of Style (16th Edition):

Wang, Xiaodan. “The EMI Filter Design for GaN HEMT Based Two-Level Voltage Source Inverter.” 2018. Masters Thesis, The Ohio State University. Accessed May 30, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu152424286628544.

MLA Handbook (7th Edition):

Wang, Xiaodan. “The EMI Filter Design for GaN HEMT Based Two-Level Voltage Source Inverter.” 2018. Web. 30 May 2020.

Vancouver:

Wang X. The EMI Filter Design for GaN HEMT Based Two-Level Voltage Source Inverter. [Internet] [Masters thesis]. The Ohio State University; 2018. [cited 2020 May 30]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu152424286628544.

Council of Science Editors:

Wang X. The EMI Filter Design for GaN HEMT Based Two-Level Voltage Source Inverter. [Masters Thesis]. The Ohio State University; 2018. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu152424286628544


Portland State University

30. Mahalik, Subrat. Automating Variation and Repeater Analysis in Physical Design of Integrated Circuits.

Degree: MS(M.S.) in Electrical and Computer Engineering, Electrical and Computer Engineering, 2018, Portland State University

  Rapid advancement and innovation in semiconductor research have continuously helped in designing efficient and complex integrated circuits in miniature size. As the device technology,… (more)

Subjects/Keywords: Automation; Integrated circuits  – Testing; Integrated circuits  – Design and construction; Electrical and Computer Engineering

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APA (6th Edition):

Mahalik, S. (2018). Automating Variation and Repeater Analysis in Physical Design of Integrated Circuits. (Masters Thesis). Portland State University. Retrieved from https://pdxscholar.library.pdx.edu/open_access_etds/4555

Chicago Manual of Style (16th Edition):

Mahalik, Subrat. “Automating Variation and Repeater Analysis in Physical Design of Integrated Circuits.” 2018. Masters Thesis, Portland State University. Accessed May 30, 2020. https://pdxscholar.library.pdx.edu/open_access_etds/4555.

MLA Handbook (7th Edition):

Mahalik, Subrat. “Automating Variation and Repeater Analysis in Physical Design of Integrated Circuits.” 2018. Web. 30 May 2020.

Vancouver:

Mahalik S. Automating Variation and Repeater Analysis in Physical Design of Integrated Circuits. [Internet] [Masters thesis]. Portland State University; 2018. [cited 2020 May 30]. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/4555.

Council of Science Editors:

Mahalik S. Automating Variation and Repeater Analysis in Physical Design of Integrated Circuits. [Masters Thesis]. Portland State University; 2018. Available from: https://pdxscholar.library.pdx.edu/open_access_etds/4555

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