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You searched for subject:(Electronic circuits). Showing records 1 – 30 of 513 total matches.

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University of Hong Kong

1. 張陽; Zhang, Yang. Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions.

Degree: PhD, 2013, University of Hong Kong

Model order reduction (MOR) is one of the general techniques in the fields of computeraided design (CAD) and electronic design automation (EDA) which accelerates the… (more)

Subjects/Keywords: Electronic circuits - Mathematical models

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APA (6th Edition):

張陽; Zhang, Y. (2013). Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions. (Doctoral Dissertation). University of Hong Kong. Retrieved from Zhang, Y. [張陽]. (2013). Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5194797 ; http://dx.doi.org/10.5353/th_b5194797 ; http://hdl.handle.net/10722/197528

Chicago Manual of Style (16th Edition):

張陽; Zhang, Yang. “Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions.” 2013. Doctoral Dissertation, University of Hong Kong. Accessed March 28, 2020. Zhang, Y. [張陽]. (2013). Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5194797 ; http://dx.doi.org/10.5353/th_b5194797 ; http://hdl.handle.net/10722/197528.

MLA Handbook (7th Edition):

張陽; Zhang, Yang. “Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions.” 2013. Web. 28 Mar 2020.

Vancouver:

張陽; Zhang Y. Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions. [Internet] [Doctoral dissertation]. University of Hong Kong; 2013. [cited 2020 Mar 28]. Available from: Zhang, Y. [張陽]. (2013). Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5194797 ; http://dx.doi.org/10.5353/th_b5194797 ; http://hdl.handle.net/10722/197528.

Council of Science Editors:

張陽; Zhang Y. Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions. [Doctoral Dissertation]. University of Hong Kong; 2013. Available from: Zhang, Y. [張陽]. (2013). Nonlinear circuits modeling and analysis by the associated transform of Volterra transfer functions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5194797 ; http://dx.doi.org/10.5353/th_b5194797 ; http://hdl.handle.net/10722/197528


McGill University

2. Fattouh, Farag S. Computational technique for the periodic response of large nonlinear circuits.

Degree: M. Eng., Department of Electrical Engineering, 1977, McGill University

Subjects/Keywords: Electronic circuits.

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APA (6th Edition):

Fattouh, F. S. (1977). Computational technique for the periodic response of large nonlinear circuits. (Masters Thesis). McGill University. Retrieved from http://digitool.library.mcgill.ca/thesisfile54179.pdf

Chicago Manual of Style (16th Edition):

Fattouh, Farag S. “Computational technique for the periodic response of large nonlinear circuits.” 1977. Masters Thesis, McGill University. Accessed March 28, 2020. http://digitool.library.mcgill.ca/thesisfile54179.pdf.

MLA Handbook (7th Edition):

Fattouh, Farag S. “Computational technique for the periodic response of large nonlinear circuits.” 1977. Web. 28 Mar 2020.

Vancouver:

Fattouh FS. Computational technique for the periodic response of large nonlinear circuits. [Internet] [Masters thesis]. McGill University; 1977. [cited 2020 Mar 28]. Available from: http://digitool.library.mcgill.ca/thesisfile54179.pdf.

Council of Science Editors:

Fattouh FS. Computational technique for the periodic response of large nonlinear circuits. [Masters Thesis]. McGill University; 1977. Available from: http://digitool.library.mcgill.ca/thesisfile54179.pdf


Oregon State University

3. Lo, Sui-Sang. Radiation losses in microstrip circuits.

Degree: MS, Electrical and Computer Engineering, 1974, Oregon State University

 The purpose of this study is to investigate radiation losses in microstrip circuits. Expressions are derived to evaluate the radiation resistances (or conductances) for single… (more)

Subjects/Keywords: Electronic circuits

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APA (6th Edition):

Lo, S. (1974). Radiation losses in microstrip circuits. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/44517

Chicago Manual of Style (16th Edition):

Lo, Sui-Sang. “Radiation losses in microstrip circuits.” 1974. Masters Thesis, Oregon State University. Accessed March 28, 2020. http://hdl.handle.net/1957/44517.

MLA Handbook (7th Edition):

Lo, Sui-Sang. “Radiation losses in microstrip circuits.” 1974. Web. 28 Mar 2020.

Vancouver:

Lo S. Radiation losses in microstrip circuits. [Internet] [Masters thesis]. Oregon State University; 1974. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/1957/44517.

Council of Science Editors:

Lo S. Radiation losses in microstrip circuits. [Masters Thesis]. Oregon State University; 1974. Available from: http://hdl.handle.net/1957/44517


Oregon State University

4. Chalfan, John Lawrence. Linear metal-oxide-semiconductor integrated circuits.

Degree: MS, Electrical and Electronics Engineering, 1968, Oregon State University

 This paper is a study of various linear Metal-Oxide- Semiconductor integrated circuit configurations with the goal of improving their operation. The operation of MOS devices… (more)

Subjects/Keywords: Electronic circuits

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APA (6th Edition):

Chalfan, J. L. (1968). Linear metal-oxide-semiconductor integrated circuits. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/46610

Chicago Manual of Style (16th Edition):

Chalfan, John Lawrence. “Linear metal-oxide-semiconductor integrated circuits.” 1968. Masters Thesis, Oregon State University. Accessed March 28, 2020. http://hdl.handle.net/1957/46610.

MLA Handbook (7th Edition):

Chalfan, John Lawrence. “Linear metal-oxide-semiconductor integrated circuits.” 1968. Web. 28 Mar 2020.

Vancouver:

Chalfan JL. Linear metal-oxide-semiconductor integrated circuits. [Internet] [Masters thesis]. Oregon State University; 1968. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/1957/46610.

Council of Science Editors:

Chalfan JL. Linear metal-oxide-semiconductor integrated circuits. [Masters Thesis]. Oregon State University; 1968. Available from: http://hdl.handle.net/1957/46610


Rutgers University

5. Yu, Baozhen, 1973-. A novel dynamic power cutoff technology (DPCT) for active leakage reduction in deep submicron VLSI CMOS circuits.

Degree: PhD, Electrical and Computer Engineering, 2007, Rutgers University

Due to the exponential increase of subthreshold and gate leakage currents with technology scaling, leakage power is increasingly significant in CMOS circuits as the technology… (more)

Subjects/Keywords: Electronic circuits

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APA (6th Edition):

Yu, Baozhen, 1. (2007). A novel dynamic power cutoff technology (DPCT) for active leakage reduction in deep submicron VLSI CMOS circuits. (Doctoral Dissertation). Rutgers University. Retrieved from http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.16802

Chicago Manual of Style (16th Edition):

Yu, Baozhen, 1973-. “A novel dynamic power cutoff technology (DPCT) for active leakage reduction in deep submicron VLSI CMOS circuits.” 2007. Doctoral Dissertation, Rutgers University. Accessed March 28, 2020. http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.16802.

MLA Handbook (7th Edition):

Yu, Baozhen, 1973-. “A novel dynamic power cutoff technology (DPCT) for active leakage reduction in deep submicron VLSI CMOS circuits.” 2007. Web. 28 Mar 2020.

Vancouver:

Yu, Baozhen 1. A novel dynamic power cutoff technology (DPCT) for active leakage reduction in deep submicron VLSI CMOS circuits. [Internet] [Doctoral dissertation]. Rutgers University; 2007. [cited 2020 Mar 28]. Available from: http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.16802.

Council of Science Editors:

Yu, Baozhen 1. A novel dynamic power cutoff technology (DPCT) for active leakage reduction in deep submicron VLSI CMOS circuits. [Doctoral Dissertation]. Rutgers University; 2007. Available from: http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.16802


University of Limerick

6. Egan, Maurice. Development and implementation of a platform for the performance characterisation of a 12-bit 25Msps SAR ADC.

Degree: 2015, University of Limerick

 A measurement platform to characterise the performance of integrated circuits is a critical component in the development of integrated circuit technologies. In the case of… (more)

Subjects/Keywords: electronic circuits; performance; data

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APA (6th Edition):

Egan, M. (2015). Development and implementation of a platform for the performance characterisation of a 12-bit 25Msps SAR ADC. (Thesis). University of Limerick. Retrieved from http://hdl.handle.net/10344/4664

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Egan, Maurice. “Development and implementation of a platform for the performance characterisation of a 12-bit 25Msps SAR ADC.” 2015. Thesis, University of Limerick. Accessed March 28, 2020. http://hdl.handle.net/10344/4664.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Egan, Maurice. “Development and implementation of a platform for the performance characterisation of a 12-bit 25Msps SAR ADC.” 2015. Web. 28 Mar 2020.

Vancouver:

Egan M. Development and implementation of a platform for the performance characterisation of a 12-bit 25Msps SAR ADC. [Internet] [Thesis]. University of Limerick; 2015. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10344/4664.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Egan M. Development and implementation of a platform for the performance characterisation of a 12-bit 25Msps SAR ADC. [Thesis]. University of Limerick; 2015. Available from: http://hdl.handle.net/10344/4664

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

7. Deb, Suman. Efficient circuit-designs using spintronic devices .

Degree: 2019, Nanyang Technological University

 The last 50 years of Moore’s Law have witnessed a continuous shrinkage of CMOS technology node in the sub-micron range. While this has facilitated more… (more)

Subjects/Keywords: Engineering::Electrical and electronic engineering::Electronic circuits

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APA (6th Edition):

Deb, S. (2019). Efficient circuit-designs using spintronic devices . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10220/49470

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Deb, Suman. “Efficient circuit-designs using spintronic devices .” 2019. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10220/49470.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Deb, Suman. “Efficient circuit-designs using spintronic devices .” 2019. Web. 28 Mar 2020.

Vancouver:

Deb S. Efficient circuit-designs using spintronic devices . [Internet] [Thesis]. Nanyang Technological University; 2019. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10220/49470.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Deb S. Efficient circuit-designs using spintronic devices . [Thesis]. Nanyang Technological University; 2019. Available from: http://hdl.handle.net/10220/49470

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Ryerson University

8. Chikhe, Jalal Mohammad. Optimized switch-level soft error detection based on advanced switch-level models.

Degree: 2010, Ryerson University

 Due to the reduction of transistor size, modern circuits are becoming more sensitive to soft errors. The development of new techniques and algorithms targeting soft… (more)

Subjects/Keywords: Electronic circuit design  – Testing; Electronic circuits  – Experiments; Integrated circuits  – Fault tolerance

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APA (6th Edition):

Chikhe, J. M. (2010). Optimized switch-level soft error detection based on advanced switch-level models. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A6264

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chikhe, Jalal Mohammad. “Optimized switch-level soft error detection based on advanced switch-level models.” 2010. Thesis, Ryerson University. Accessed March 28, 2020. https://digital.library.ryerson.ca/islandora/object/RULA%3A6264.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chikhe, Jalal Mohammad. “Optimized switch-level soft error detection based on advanced switch-level models.” 2010. Web. 28 Mar 2020.

Vancouver:

Chikhe JM. Optimized switch-level soft error detection based on advanced switch-level models. [Internet] [Thesis]. Ryerson University; 2010. [cited 2020 Mar 28]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A6264.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chikhe JM. Optimized switch-level soft error detection based on advanced switch-level models. [Thesis]. Ryerson University; 2010. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A6264

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Montana State University

9. Thurber, Kenneth James. Fault location in cellular arrays.

Degree: College of Engineering, 1969, Montana State University

Subjects/Keywords: Electronic circuits.; Printed circuits.

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APA (6th Edition):

Thurber, K. J. (1969). Fault location in cellular arrays. (Thesis). Montana State University. Retrieved from https://scholarworks.montana.edu/xmlui/handle/1/4624

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Thurber, Kenneth James. “Fault location in cellular arrays.” 1969. Thesis, Montana State University. Accessed March 28, 2020. https://scholarworks.montana.edu/xmlui/handle/1/4624.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Thurber, Kenneth James. “Fault location in cellular arrays.” 1969. Web. 28 Mar 2020.

Vancouver:

Thurber KJ. Fault location in cellular arrays. [Internet] [Thesis]. Montana State University; 1969. [cited 2020 Mar 28]. Available from: https://scholarworks.montana.edu/xmlui/handle/1/4624.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Thurber KJ. Fault location in cellular arrays. [Thesis]. Montana State University; 1969. Available from: https://scholarworks.montana.edu/xmlui/handle/1/4624

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Arizona

10. Senthinathan, Ramesh, 1961-. ELECTRICAL CHARACTERISTICS OF INTEGRATED CIRCUIT PACKAGES .

Degree: 1987, University of Arizona

Subjects/Keywords: Integrated circuits.; Electronic circuits.

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APA (6th Edition):

Senthinathan, Ramesh, 1. (1987). ELECTRICAL CHARACTERISTICS OF INTEGRATED CIRCUIT PACKAGES . (Masters Thesis). University of Arizona. Retrieved from http://hdl.handle.net/10150/276425

Chicago Manual of Style (16th Edition):

Senthinathan, Ramesh, 1961-. “ELECTRICAL CHARACTERISTICS OF INTEGRATED CIRCUIT PACKAGES .” 1987. Masters Thesis, University of Arizona. Accessed March 28, 2020. http://hdl.handle.net/10150/276425.

MLA Handbook (7th Edition):

Senthinathan, Ramesh, 1961-. “ELECTRICAL CHARACTERISTICS OF INTEGRATED CIRCUIT PACKAGES .” 1987. Web. 28 Mar 2020.

Vancouver:

Senthinathan, Ramesh 1. ELECTRICAL CHARACTERISTICS OF INTEGRATED CIRCUIT PACKAGES . [Internet] [Masters thesis]. University of Arizona; 1987. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10150/276425.

Council of Science Editors:

Senthinathan, Ramesh 1. ELECTRICAL CHARACTERISTICS OF INTEGRATED CIRCUIT PACKAGES . [Masters Thesis]. University of Arizona; 1987. Available from: http://hdl.handle.net/10150/276425


Hong Kong University of Science and Technology

11. Zheng, Jiawei ECE. Low noise CMOS circuit techniques for biopotential sensing.

Degree: 2018, Hong Kong University of Science and Technology

 Faithful recording of the biopotential signal is the prerequisite for the diagnosis and treatment of various diseases. Typical local field potentials of bio-signals such as… (more)

Subjects/Keywords: Analog CMOS integrated circuits ; Integrated circuits ; Electronic noise

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APA (6th Edition):

Zheng, J. E. (2018). Low noise CMOS circuit techniques for biopotential sensing. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-96408 ; https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zheng, Jiawei ECE. “Low noise CMOS circuit techniques for biopotential sensing.” 2018. Thesis, Hong Kong University of Science and Technology. Accessed March 28, 2020. http://repository.ust.hk/ir/Record/1783.1-96408 ; https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zheng, Jiawei ECE. “Low noise CMOS circuit techniques for biopotential sensing.” 2018. Web. 28 Mar 2020.

Vancouver:

Zheng JE. Low noise CMOS circuit techniques for biopotential sensing. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2018. [cited 2020 Mar 28]. Available from: http://repository.ust.hk/ir/Record/1783.1-96408 ; https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zheng JE. Low noise CMOS circuit techniques for biopotential sensing. [Thesis]. Hong Kong University of Science and Technology; 2018. Available from: http://repository.ust.hk/ir/Record/1783.1-96408 ; https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

12. Hsu, Shu-ching. Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates.

Degree: MS, Electrical and Computer Engineering, 2004, Oregon State University

 This thesis examines substrate noise coupling for NMOS transistors in heavily doped substrates. The study begins with the analysis of an NMOS transistor switching noise… (more)

Subjects/Keywords: Electronic circuits  – Noise

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APA (6th Edition):

Hsu, S. (2004). Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/30203

Chicago Manual of Style (16th Edition):

Hsu, Shu-ching. “Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates.” 2004. Masters Thesis, Oregon State University. Accessed March 28, 2020. http://hdl.handle.net/1957/30203.

MLA Handbook (7th Edition):

Hsu, Shu-ching. “Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates.” 2004. Web. 28 Mar 2020.

Vancouver:

Hsu S. Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates. [Internet] [Masters thesis]. Oregon State University; 2004. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/1957/30203.

Council of Science Editors:

Hsu S. Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates. [Masters Thesis]. Oregon State University; 2004. Available from: http://hdl.handle.net/1957/30203


NSYSU

13. Wang, Cheng-yuan. The Developing Strategy of Automotive Application FPC in Mektec Taiwan â The Resource-Based View Perspective.

Degree: Master, EMBA, 2015, NSYSU

 The enterprise resources are always reviewed for certain reaction activities to the target products and marketing, which should be the same preparation as FPC Company… (more)

Subjects/Keywords: Automotive Electronic; RBV; Flexible Printed Circuits; FPC

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APA (6th Edition):

Wang, C. (2015). The Developing Strategy of Automotive Application FPC in Mektec Taiwan â The Resource-Based View Perspective. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0523115-094959

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Cheng-yuan. “The Developing Strategy of Automotive Application FPC in Mektec Taiwan â The Resource-Based View Perspective.” 2015. Thesis, NSYSU. Accessed March 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0523115-094959.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Cheng-yuan. “The Developing Strategy of Automotive Application FPC in Mektec Taiwan â The Resource-Based View Perspective.” 2015. Web. 28 Mar 2020.

Vancouver:

Wang C. The Developing Strategy of Automotive Application FPC in Mektec Taiwan â The Resource-Based View Perspective. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Mar 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0523115-094959.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang C. The Developing Strategy of Automotive Application FPC in Mektec Taiwan â The Resource-Based View Perspective. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0523115-094959

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Ryerson University

14. Li, Quan. Analysis of periodically switched nonlinear circuits and nonlinear oversampled sigma-delta modulators.

Degree: 2003, Ryerson University

 This thesis proposes a new method for time domain response and sensitivity analysis of periodically switched nohnlinear circuits and nonlinear oversampled sigma-delta modulators. Using Volterra… (more)

Subjects/Keywords: Electronic circuits; Modulators

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APA (6th Edition):

Li, Q. (2003). Analysis of periodically switched nonlinear circuits and nonlinear oversampled sigma-delta modulators. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A581

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Quan. “Analysis of periodically switched nonlinear circuits and nonlinear oversampled sigma-delta modulators.” 2003. Thesis, Ryerson University. Accessed March 28, 2020. https://digital.library.ryerson.ca/islandora/object/RULA%3A581.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Quan. “Analysis of periodically switched nonlinear circuits and nonlinear oversampled sigma-delta modulators.” 2003. Web. 28 Mar 2020.

Vancouver:

Li Q. Analysis of periodically switched nonlinear circuits and nonlinear oversampled sigma-delta modulators. [Internet] [Thesis]. Ryerson University; 2003. [cited 2020 Mar 28]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A581.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li Q. Analysis of periodically switched nonlinear circuits and nonlinear oversampled sigma-delta modulators. [Thesis]. Ryerson University; 2003. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A581

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

15. Albright, Robert James. Two-integrator detector for known-signal-in-noise identification.

Degree: MS, Electrical Engineering, 1964, Oregon State University

 This thesis discusses the design and evaluation of an instrument that can detect known signals in noise. This detector uses two integrators to sense a… (more)

Subjects/Keywords: Electronic circuits  – Noise

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APA (6th Edition):

Albright, R. J. (1964). Two-integrator detector for known-signal-in-noise identification. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/48189

Chicago Manual of Style (16th Edition):

Albright, Robert James. “Two-integrator detector for known-signal-in-noise identification.” 1964. Masters Thesis, Oregon State University. Accessed March 28, 2020. http://hdl.handle.net/1957/48189.

MLA Handbook (7th Edition):

Albright, Robert James. “Two-integrator detector for known-signal-in-noise identification.” 1964. Web. 28 Mar 2020.

Vancouver:

Albright RJ. Two-integrator detector for known-signal-in-noise identification. [Internet] [Masters thesis]. Oregon State University; 1964. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/1957/48189.

Council of Science Editors:

Albright RJ. Two-integrator detector for known-signal-in-noise identification. [Masters Thesis]. Oregon State University; 1964. Available from: http://hdl.handle.net/1957/48189

16. Lang, Ian Dewi. The degradation of all-dielectric self supporting cables installed in high potential electro-magnetic fields : a theoretical and practical evaluation of optical fibre cables strung independently on overhead power transmission lines.

Degree: PhD, 2001, University of South Wales

 The operational life of all-dielectric self supporting (ADSS) optical fibre cables installed on high voltage over-head power transmission lines is limited by sheath degradation caused… (more)

Subjects/Keywords: 621.38784; Electronic circuits

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APA (6th Edition):

Lang, I. D. (2001). The degradation of all-dielectric self supporting cables installed in high potential electro-magnetic fields : a theoretical and practical evaluation of optical fibre cables strung independently on overhead power transmission lines. (Doctoral Dissertation). University of South Wales. Retrieved from https://pure.southwales.ac.uk/en/studentthesis/the-degradation-of-alldielectric-self-supporting-cables-installed-in-high-potential-electromagnetic-fields(5a7dee38-9f9b-40f8-8259-2e3d5386e292).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.416546

Chicago Manual of Style (16th Edition):

Lang, Ian Dewi. “The degradation of all-dielectric self supporting cables installed in high potential electro-magnetic fields : a theoretical and practical evaluation of optical fibre cables strung independently on overhead power transmission lines.” 2001. Doctoral Dissertation, University of South Wales. Accessed March 28, 2020. https://pure.southwales.ac.uk/en/studentthesis/the-degradation-of-alldielectric-self-supporting-cables-installed-in-high-potential-electromagnetic-fields(5a7dee38-9f9b-40f8-8259-2e3d5386e292).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.416546.

MLA Handbook (7th Edition):

Lang, Ian Dewi. “The degradation of all-dielectric self supporting cables installed in high potential electro-magnetic fields : a theoretical and practical evaluation of optical fibre cables strung independently on overhead power transmission lines.” 2001. Web. 28 Mar 2020.

Vancouver:

Lang ID. The degradation of all-dielectric self supporting cables installed in high potential electro-magnetic fields : a theoretical and practical evaluation of optical fibre cables strung independently on overhead power transmission lines. [Internet] [Doctoral dissertation]. University of South Wales; 2001. [cited 2020 Mar 28]. Available from: https://pure.southwales.ac.uk/en/studentthesis/the-degradation-of-alldielectric-self-supporting-cables-installed-in-high-potential-electromagnetic-fields(5a7dee38-9f9b-40f8-8259-2e3d5386e292).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.416546.

Council of Science Editors:

Lang ID. The degradation of all-dielectric self supporting cables installed in high potential electro-magnetic fields : a theoretical and practical evaluation of optical fibre cables strung independently on overhead power transmission lines. [Doctoral Dissertation]. University of South Wales; 2001. Available from: https://pure.southwales.ac.uk/en/studentthesis/the-degradation-of-alldielectric-self-supporting-cables-installed-in-high-potential-electromagnetic-fields(5a7dee38-9f9b-40f8-8259-2e3d5386e292).html ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.416546


Nanyang Technological University

17. Teh, Jian Sen. Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology .

Degree: 2019, Nanyang Technological University

 Aggressive scaling of CMOS technology into deep sub-micron nodes enables analog front-end circuitries to be integrated with digital back-end processors, forming System-on-Chip (SoC) solutions. However,… (more)

Subjects/Keywords: Engineering::Electrical and electronic engineering::Integrated circuits

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APA (6th Edition):

Teh, J. S. (2019). Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10220/50293

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Teh, Jian Sen. “Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology .” 2019. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10220/50293.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Teh, Jian Sen. “Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology .” 2019. Web. 28 Mar 2020.

Vancouver:

Teh JS. Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology . [Internet] [Thesis]. Nanyang Technological University; 2019. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10220/50293.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Teh JS. Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology . [Thesis]. Nanyang Technological University; 2019. Available from: http://hdl.handle.net/10220/50293

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Sydney

18. Mahendra, Andri. Electronic Photonic Integrated Circuits and Control Systems .

Degree: 2017, University of Sydney

 Photonic systems can operate at frequencies several orders of magnitude higher than electronics, whereas electronics offers extremely high density and easily built memories. Integrated photonic-electronic(more)

Subjects/Keywords: integration; system; control; circuits; photonic; electronic

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APA (6th Edition):

Mahendra, A. (2017). Electronic Photonic Integrated Circuits and Control Systems . (Thesis). University of Sydney. Retrieved from http://hdl.handle.net/2123/17806

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mahendra, Andri. “Electronic Photonic Integrated Circuits and Control Systems .” 2017. Thesis, University of Sydney. Accessed March 28, 2020. http://hdl.handle.net/2123/17806.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mahendra, Andri. “Electronic Photonic Integrated Circuits and Control Systems .” 2017. Web. 28 Mar 2020.

Vancouver:

Mahendra A. Electronic Photonic Integrated Circuits and Control Systems . [Internet] [Thesis]. University of Sydney; 2017. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/2123/17806.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mahendra A. Electronic Photonic Integrated Circuits and Control Systems . [Thesis]. University of Sydney; 2017. Available from: http://hdl.handle.net/2123/17806

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

19. Zhang, Qiming. Strain dominant failure criteria for board level pad cratering under over-stress and fatigue loading.

Degree: 2017, Hong Kong University of Science and Technology

 Pad cratering is a dominant failure mode for BGA-PCB assemblies with the non-solder mask defined pad opening configuration. Over the last 20 years, due to… (more)

Subjects/Keywords: Electronic packaging ; Cracking ; Printed circuits ; Reliability

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APA (6th Edition):

Zhang, Q. (2017). Strain dominant failure criteria for board level pad cratering under over-stress and fatigue loading. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-90930 ; https://doi.org/10.14711/thesis-991012555360903412 ; http://repository.ust.hk/ir/bitstream/1783.1-90930/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhang, Qiming. “Strain dominant failure criteria for board level pad cratering under over-stress and fatigue loading.” 2017. Thesis, Hong Kong University of Science and Technology. Accessed March 28, 2020. http://repository.ust.hk/ir/Record/1783.1-90930 ; https://doi.org/10.14711/thesis-991012555360903412 ; http://repository.ust.hk/ir/bitstream/1783.1-90930/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhang, Qiming. “Strain dominant failure criteria for board level pad cratering under over-stress and fatigue loading.” 2017. Web. 28 Mar 2020.

Vancouver:

Zhang Q. Strain dominant failure criteria for board level pad cratering under over-stress and fatigue loading. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2017. [cited 2020 Mar 28]. Available from: http://repository.ust.hk/ir/Record/1783.1-90930 ; https://doi.org/10.14711/thesis-991012555360903412 ; http://repository.ust.hk/ir/bitstream/1783.1-90930/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhang Q. Strain dominant failure criteria for board level pad cratering under over-stress and fatigue loading. [Thesis]. Hong Kong University of Science and Technology; 2017. Available from: http://repository.ust.hk/ir/Record/1783.1-90930 ; https://doi.org/10.14711/thesis-991012555360903412 ; http://repository.ust.hk/ir/bitstream/1783.1-90930/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Anna University

20. Kavithamani, A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.

Degree: Electrical and Electronics Engineering, 2014, Anna University

This research work deals with the diagnosis of soft faults in analog electronic circuits Soft faults that occur even in a single component of a… (more)

Subjects/Keywords: Analog electronic circuits; Electrical engineering; Electronic circuits; Fault diagnosis; Frequency response method

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APA (6th Edition):

Kavithamani, A. (2014). Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/24720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kavithamani, A. “Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.” 2014. Thesis, Anna University. Accessed March 28, 2020. http://shodhganga.inflibnet.ac.in/handle/10603/24720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kavithamani, A. “Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.” 2014. Web. 28 Mar 2020.

Vancouver:

Kavithamani A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. [Internet] [Thesis]. Anna University; 2014. [cited 2020 Mar 28]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/24720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kavithamani A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. [Thesis]. Anna University; 2014. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/24720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Johannesburg

21. Van Wyk, Michael Antonie. Chaos in electronics.

Degree: PhD, 2012, University of Johannesburg

 The work presented in this dissertation is concerned with the application of Chaos Theory to the field of Electrical and Electronic Engineering. A comprehensive study… (more)

Subjects/Keywords: Electronic systems; Chaotic behavior in systems; Electronic circuits  – Mathematical models

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APA (6th Edition):

Van Wyk, M. A. (2012). Chaos in electronics. (Doctoral Dissertation). University of Johannesburg. Retrieved from http://hdl.handle.net/10210/6037

Chicago Manual of Style (16th Edition):

Van Wyk, Michael Antonie. “Chaos in electronics.” 2012. Doctoral Dissertation, University of Johannesburg. Accessed March 28, 2020. http://hdl.handle.net/10210/6037.

MLA Handbook (7th Edition):

Van Wyk, Michael Antonie. “Chaos in electronics.” 2012. Web. 28 Mar 2020.

Vancouver:

Van Wyk MA. Chaos in electronics. [Internet] [Doctoral dissertation]. University of Johannesburg; 2012. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10210/6037.

Council of Science Editors:

Van Wyk MA. Chaos in electronics. [Doctoral Dissertation]. University of Johannesburg; 2012. Available from: http://hdl.handle.net/10210/6037


Nanyang Technological University

22. Zhou, Mi. Analysis and design of DC-DC converter .

Degree: 2019, Nanyang Technological University

 Nowadays, electronic products are required to be more powerful with sophisticated functionalities. Designing power management units for such devices becomes more and more challenging. The… (more)

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

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APA (6th Edition):

Zhou, M. (2019). Analysis and design of DC-DC converter . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10220/48083

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhou, Mi. “Analysis and design of DC-DC converter .” 2019. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10220/48083.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhou, Mi. “Analysis and design of DC-DC converter .” 2019. Web. 28 Mar 2020.

Vancouver:

Zhou M. Analysis and design of DC-DC converter . [Internet] [Thesis]. Nanyang Technological University; 2019. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10220/48083.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhou M. Analysis and design of DC-DC converter . [Thesis]. Nanyang Technological University; 2019. Available from: http://hdl.handle.net/10220/48083

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nanyang Technological University

23. Khaing, Yin Kyaw. Error-tolerant multiplier for high speed application .

Degree: 2011, Nanyang Technological University

 With the advent of hand held computing devices that require functionality rivaling the desktop, low-power and high-performance systems have become very important. The transistor network… (more)

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

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APA (6th Edition):

Khaing, Y. K. (2011). Error-tolerant multiplier for high speed application . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10356/45661

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Khaing, Yin Kyaw. “Error-tolerant multiplier for high speed application .” 2011. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10356/45661.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Khaing, Yin Kyaw. “Error-tolerant multiplier for high speed application .” 2011. Web. 28 Mar 2020.

Vancouver:

Khaing YK. Error-tolerant multiplier for high speed application . [Internet] [Thesis]. Nanyang Technological University; 2011. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10356/45661.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Khaing YK. Error-tolerant multiplier for high speed application . [Thesis]. Nanyang Technological University; 2011. Available from: http://hdl.handle.net/10356/45661

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nanyang Technological University

24. Xie, Juan. CMOS quadrature voltage-controlled oscillators and generators for wideband and multi-band transceivers .

Degree: 2011, Nanyang Technological University

 This thesis aims to provide a comprehensive study on the topic of CMOS quadrature voltage controlled oscillators and generators for wideband and multi-band transceivers, which… (more)

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

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APA (6th Edition):

Xie, J. (2011). CMOS quadrature voltage-controlled oscillators and generators for wideband and multi-band transceivers . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10356/46320

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Xie, Juan. “CMOS quadrature voltage-controlled oscillators and generators for wideband and multi-band transceivers .” 2011. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10356/46320.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Xie, Juan. “CMOS quadrature voltage-controlled oscillators and generators for wideband and multi-band transceivers .” 2011. Web. 28 Mar 2020.

Vancouver:

Xie J. CMOS quadrature voltage-controlled oscillators and generators for wideband and multi-band transceivers . [Internet] [Thesis]. Nanyang Technological University; 2011. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10356/46320.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Xie J. CMOS quadrature voltage-controlled oscillators and generators for wideband and multi-band transceivers . [Thesis]. Nanyang Technological University; 2011. Available from: http://hdl.handle.net/10356/46320

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nanyang Technological University

25. Zhu, Ning. Enhanced low-power high-speed probabilistic adders for error-toerant application .

Degree: 2011, Nanyang Technological University

 In modern VLSI technology, the occurrence of all kinds of errors has become inevitable. To overcome all the possible errors is a very expensive task.… (more)

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

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APA (6th Edition):

Zhu, N. (2011). Enhanced low-power high-speed probabilistic adders for error-toerant application . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10356/46273

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhu, Ning. “Enhanced low-power high-speed probabilistic adders for error-toerant application .” 2011. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10356/46273.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhu, Ning. “Enhanced low-power high-speed probabilistic adders for error-toerant application .” 2011. Web. 28 Mar 2020.

Vancouver:

Zhu N. Enhanced low-power high-speed probabilistic adders for error-toerant application . [Internet] [Thesis]. Nanyang Technological University; 2011. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10356/46273.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhu N. Enhanced low-power high-speed probabilistic adders for error-toerant application . [Thesis]. Nanyang Technological University; 2011. Available from: http://hdl.handle.net/10356/46273

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nanyang Technological University

26. Chang, Richard Weng Yew. In-circuit characterisation of device's impedance for signal integrity analysis .

Degree: 2011, Nanyang Technological University

 Rapid advances in integrated circuits (ICs) and process technology coupled with surge in consumers’ expectation for powerful processing capabilities and features dramatically change the way… (more)

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

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APA (6th Edition):

Chang, R. W. Y. (2011). In-circuit characterisation of device's impedance for signal integrity analysis . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10356/46537

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Richard Weng Yew. “In-circuit characterisation of device's impedance for signal integrity analysis .” 2011. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10356/46537.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Richard Weng Yew. “In-circuit characterisation of device's impedance for signal integrity analysis .” 2011. Web. 28 Mar 2020.

Vancouver:

Chang RWY. In-circuit characterisation of device's impedance for signal integrity analysis . [Internet] [Thesis]. Nanyang Technological University; 2011. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10356/46537.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang RWY. In-circuit characterisation of device's impedance for signal integrity analysis . [Thesis]. Nanyang Technological University; 2011. Available from: http://hdl.handle.net/10356/46537

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nanyang Technological University

27. Tay, Thian Fatt. New algorithms and VLSI architectures for efficient RNS computations .

Degree: 2016, Nanyang Technological University

 Residue Number System (RNS) is a non-weighted number system emerging as a promising substitute of two's complement number system for data representation in high-speed and… (more)

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

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APA (6th Edition):

Tay, T. F. (2016). New algorithms and VLSI architectures for efficient RNS computations . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10356/66937

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tay, Thian Fatt. “New algorithms and VLSI architectures for efficient RNS computations .” 2016. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10356/66937.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tay, Thian Fatt. “New algorithms and VLSI architectures for efficient RNS computations .” 2016. Web. 28 Mar 2020.

Vancouver:

Tay TF. New algorithms and VLSI architectures for efficient RNS computations . [Internet] [Thesis]. Nanyang Technological University; 2016. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10356/66937.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tay TF. New algorithms and VLSI architectures for efficient RNS computations . [Thesis]. Nanyang Technological University; 2016. Available from: http://hdl.handle.net/10356/66937

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nanyang Technological University

28. Adrian, Victor. Modulation schemes for digital modulators of class D amplifiers and of switched-mode DC-DC converters .

Degree: 2010, Nanyang Technological University

This thesis describes the proposal, analysis, and realization of novel modulation schemes for digital modulators of Class D amplifiers and of switched-mode dc-dc converters.

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

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APA (6th Edition):

Adrian, V. (2010). Modulation schemes for digital modulators of class D amplifiers and of switched-mode DC-DC converters . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10356/40207

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Adrian, Victor. “Modulation schemes for digital modulators of class D amplifiers and of switched-mode DC-DC converters .” 2010. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10356/40207.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Adrian, Victor. “Modulation schemes for digital modulators of class D amplifiers and of switched-mode DC-DC converters .” 2010. Web. 28 Mar 2020.

Vancouver:

Adrian V. Modulation schemes for digital modulators of class D amplifiers and of switched-mode DC-DC converters . [Internet] [Thesis]. Nanyang Technological University; 2010. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10356/40207.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Adrian V. Modulation schemes for digital modulators of class D amplifiers and of switched-mode DC-DC converters . [Thesis]. Nanyang Technological University; 2010. Available from: http://hdl.handle.net/10356/40207

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nanyang Technological University

29. Wang, Jin Ling. Top-down design verification of subranging pipelined analog-to-digital converter .

Degree: 2010, Nanyang Technological University

 High-speed high resolution analog-to-digital converter (ADC) is the key design blocks in mixed-signal chip design since the ADC is an interface between digital signal processing… (more)

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, J. L. (2010). Top-down design verification of subranging pipelined analog-to-digital converter . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10356/40888

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Jin Ling. “Top-down design verification of subranging pipelined analog-to-digital converter .” 2010. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10356/40888.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Jin Ling. “Top-down design verification of subranging pipelined analog-to-digital converter .” 2010. Web. 28 Mar 2020.

Vancouver:

Wang JL. Top-down design verification of subranging pipelined analog-to-digital converter . [Internet] [Thesis]. Nanyang Technological University; 2010. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10356/40888.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang JL. Top-down design verification of subranging pipelined analog-to-digital converter . [Thesis]. Nanyang Technological University; 2010. Available from: http://hdl.handle.net/10356/40888

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nanyang Technological University

30. Zeng, Rong. Studies on high-frequency noise characteristics in deep submicron NMOSFETs .

Degree: 2010, Nanyang Technological University

 RF noise characterstics of deep sub-micrometer MOSFETs are nvestigated in this work. The direct matrix method to extract the channel thermal noise and induced gate… (more)

Subjects/Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zeng, R. (2010). Studies on high-frequency noise characteristics in deep submicron NMOSFETs . (Thesis). Nanyang Technological University. Retrieved from http://hdl.handle.net/10356/40925

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zeng, Rong. “Studies on high-frequency noise characteristics in deep submicron NMOSFETs .” 2010. Thesis, Nanyang Technological University. Accessed March 28, 2020. http://hdl.handle.net/10356/40925.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zeng, Rong. “Studies on high-frequency noise characteristics in deep submicron NMOSFETs .” 2010. Web. 28 Mar 2020.

Vancouver:

Zeng R. Studies on high-frequency noise characteristics in deep submicron NMOSFETs . [Internet] [Thesis]. Nanyang Technological University; 2010. [cited 2020 Mar 28]. Available from: http://hdl.handle.net/10356/40925.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zeng R. Studies on high-frequency noise characteristics in deep submicron NMOSFETs . [Thesis]. Nanyang Technological University; 2010. Available from: http://hdl.handle.net/10356/40925

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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