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Tampereen ammattikorkeakoulu
1.
Sinkkonen, Anu.
Kuvausetäisyyden vaikutus potilaan saamaan säteilyannokseen lannerangan röntgentutkimuksessa.
Degree: 2014, Tampereen ammattikorkeakoulu
URL: http://www.theseus.fi/handle/10024/85940
► Toiminnanharjoittajan velvollisuuksiin kuuluu potilaan säteilyaltistuksen seuranta. Säteilyaltistuksen seurannassa käytetään STUKin antamia vertailutasoja. Tämän opinnäytetyön tavoite oli antaa tietoa röntgenyksikköön lannerangan röntgentutkimuksen kuvausetäisyyden muutoksen vaikutuksesta potilaiden…
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▼ Toiminnanharjoittajan velvollisuuksiin kuuluu potilaan säteilyaltistuksen seuranta. Säteilyaltistuksen seurannassa käytetään STUKin antamia vertailutasoja. Tämän opinnäytetyön tavoite oli antaa tietoa röntgenyksikköön lannerangan röntgentutkimuksen kuvausetäisyyden muutoksen vaikutuksesta potilaiden saamiin säteilyannoksiin optimoinnin tueksi. Opinnäytetyön tarkoitus oli kuvailla potilaiden saamia säteilyannoksia lannerangan röntgentutkimuksessa, kun kuvausetäisyys oli 110 cm ja 150 cm. Tarkoituksena oli selvittää toteutuvatko lannerangan röntgentutkimukselle asetetut vertailutasot.
Opinnäytetyö toteutettiin kvantitatiivisena tutkimuksena. Tutkimuksessa oli kaksikymmentä normaalikokoista (70 kg ± 15 kg) potilasta. Kymmenen potilaan kuvausetäisyytenä oli 110 cm ja kymmenen potilaan 150 cm. Lannerangan röntgentutkimus suoritettiin seisten, potilailta kuvattiin anteroposteriorinen ja lateraalinen projektio. Molemmilla käytetyillä kuvausetäisyyksillä Säteilyturvakeskuksen ennen 1.7.2014 antamat vertailutasot alittuivat.
Keskimääräinen pinta-annos oli lannerangan röntgentutkimuksessa 150 cm:n kuvausetäisyydellä AP-projektiossa 45 % ja LAT-projektiossa 58 % pienempi kuin 110 cm:n kuvausetäisyydellä. Keskimääräinen annoksen ja pinta-alan tulo (AP+LAT) oli 150 cm:n kuvausetäisyydellä 42 % pienempi kuin 110 cm:n kuvausetäisyydellä. Keskimääräinen luuytimen säteilyannos oli 150 cm:n kuvausetäisyydellä AP-projektiossa 25 % ja LAT-projektiossa 44 % pienempi kuin 110 cm:n kuvausetäisyydellä. Keskimääräinen virtsarakon säteilyannos oli 150 cm:n kuvausetäisyydellä AP-projektiossa 39 % ja LAT-projektiossa 19 % pienempi kuin 110 cm:n kuvausetäisyydellä. Sukurauhasten saama keskimääräinen säteilyannos oli molemmissa projektioissa suurempi käytettäessä 150 cm kuvausetäisyyttä. Keskimääräinen efektiivinen annos oli 150 cm:n kuvausetäisyydellä AP-projektiossa 38 % ja LAT-projektiossa 45 % pienempi kuin kuvattaessa 110 cm:n kuvausetäisyydellä.
Radiologinen laitetekniikka oli Euroopan Unionin suositusten mukainen kaikilta muilta osin paitsi hilasuhteen ja lamellitiheyden sekä AP-projektiossa kuvareseptorin herkkyyden osalta.
Tulosten perusteella kuvausetäisyys vaikuttaa potilaan saamaan säteilyannokseen niin, että käytettäessä pidempää kuvausetäisyyttä potilaiden saamat säteilyannokset ja elinkohtaiset annokset olivat pienemmät. Tulosten perusteella näyttäisi siltä, että röntgenyksikön kannattaisi jatkaa seisten tehtävässä lannerangan röntgentutkimuksessa 150 cm:n etäisyyden käyttöä.
Jatkotutkimusehdotuksena opinnäytetyön tekijä ehdottaa tutkimusta, kuinka kuvausetäisyyden muutos pidemmäksi vaikuttaa röntgenkuvan laatuun.
The purpose of this study was to measure the radiation doses received by patients in lumbar spine x-ray examinations when focus-film distances were 110 cm or 150 cm. The study examined the dose levels in lumbar spine X-ray examinations with relation to the reference dose levels. The study examined patient’s received entrance surface doses (ESD), dose area products (DAP), effective doses and equivalent…
Advisors/Committee Members: Tampereen ammattikorkeakoulu.
Subjects/Keywords: ESD
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APA (6th Edition):
Sinkkonen, A. (2014). Kuvausetäisyyden vaikutus potilaan saamaan säteilyannokseen lannerangan röntgentutkimuksessa. (Thesis). Tampereen ammattikorkeakoulu. Retrieved from http://www.theseus.fi/handle/10024/85940
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Sinkkonen, Anu. “Kuvausetäisyyden vaikutus potilaan saamaan säteilyannokseen lannerangan röntgentutkimuksessa.” 2014. Thesis, Tampereen ammattikorkeakoulu. Accessed January 23, 2021.
http://www.theseus.fi/handle/10024/85940.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Sinkkonen, Anu. “Kuvausetäisyyden vaikutus potilaan saamaan säteilyannokseen lannerangan röntgentutkimuksessa.” 2014. Web. 23 Jan 2021.
Vancouver:
Sinkkonen A. Kuvausetäisyyden vaikutus potilaan saamaan säteilyannokseen lannerangan röntgentutkimuksessa. [Internet] [Thesis]. Tampereen ammattikorkeakoulu; 2014. [cited 2021 Jan 23].
Available from: http://www.theseus.fi/handle/10024/85940.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Sinkkonen A. Kuvausetäisyyden vaikutus potilaan saamaan säteilyannokseen lannerangan röntgentutkimuksessa. [Thesis]. Tampereen ammattikorkeakoulu; 2014. Available from: http://www.theseus.fi/handle/10024/85940
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

University of Illinois – Urbana-Champaign
2.
Chen, Zaichen.
Uncalibrated TCAD methodology for analysis of ESD protection devices.
Degree: MS, Electrical & Computer Engr, 2016, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/90497
► In this work, an uncalibrated TCAD methodology for simulation of electrostatic discharge (ESD) devices is presented. The methodology addresses TCAD setup issues including device construction,…
(more)
▼ In this work, an uncalibrated TCAD methodology for simulation of electrostatic discharge (ESD) devices is presented. The methodology addresses TCAD setup issues including device construction, boundary conditions, and choosing a physical model and parameters. A major trade-off between computation complexity and accuracy, 2D vs. 3D simulations, is examined in detail. TCAD simulation results for the GGNMOS in 32 nm CMOS technology is compared with published measurement results for methodology validation. The established TCAD methodology is then applied to ESD protection silicon controlled rectifier (SCR) devices to identify physical causes for high overshoot of a certain SCR layout, and to verify proposed improvements. The performance of the SCR with the improved layout structure is characterized in silicon to prove its consistency with TCAD prediction.
Subjects/Keywords: ESD; TCAD
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Chen, Z. (2016). Uncalibrated TCAD methodology for analysis of ESD protection devices. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/90497
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Chen, Zaichen. “Uncalibrated TCAD methodology for analysis of ESD protection devices.” 2016. Thesis, University of Illinois – Urbana-Champaign. Accessed January 23, 2021.
http://hdl.handle.net/2142/90497.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Chen, Zaichen. “Uncalibrated TCAD methodology for analysis of ESD protection devices.” 2016. Web. 23 Jan 2021.
Vancouver:
Chen Z. Uncalibrated TCAD methodology for analysis of ESD protection devices. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2016. [cited 2021 Jan 23].
Available from: http://hdl.handle.net/2142/90497.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Chen Z. Uncalibrated TCAD methodology for analysis of ESD protection devices. [Thesis]. University of Illinois – Urbana-Champaign; 2016. Available from: http://hdl.handle.net/2142/90497
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

University of Waterloo
3.
Elghazali, Mahdi.
Low-Leakage ESD Power Supply Clamps in General Purpose 65 nm CMOS Technology.
Degree: 2017, University of Waterloo
URL: http://hdl.handle.net/10012/11232
► Electrostatic discharge (ESD) is a well-known contributor that reduces the reliability and yield of the integrated circuits (ICs). As ICs become more complex, they are…
(more)
▼ Electrostatic discharge (ESD) is a well-known contributor that reduces the reliability and yield of the integrated circuits (ICs). As ICs become more complex, they are increasingly susceptible to such failures due to the scaling of physical dimensions of devices and interconnect on a chip [1]. These failures are caused by excessive electric field and/or excessive current densities and result in the dielectric breakdown, electromigration of metal lines and contacts. ESD can affect the IC in its different life stages, from wafer fabrication process to failure in the field. Furthermore, ESD events can damage the integrated circuit permanently (hard failure), or cause a latent damage (soft failure) [2]. ESD protection circuits consisting of I/O protection and ESD power supply clamps are routinely used in ICs to protect them against ESD damage. The main objective of the ESD protection circuit is to provide a low-resistive discharge path between any two pins of the chip to harmlessly discharge ESD energy without damaging the sensitive circuits.
The main target of this thesis is to design ESD power supply clamps that have the lowest possible leakage current without degrading the ESD protection ability in general purpose TSMC 65 nm CMOS technology. ESD clamps should have a very low-leakage current and should be stable and immune to the power supply noise under the normal operating conditions of the circuit core. Also, the ESD clamps must be able to handle high currents under an ESD event. All designs published in the general purpose 65 nm CMOS technology have used the SCR as the clamping element since the SCR has a higher current carrying capability compared to an MOS transistor of the same area [3]. The ESD power supply clamp should provide a low-resistive path in both directions to be able to deal with both PSD and NDS zapping modes.
The SCR based design does not provide the best ESD protection for the NDS zapping mode (positive ESD stress at VSS with grounded VDD node) since it has two parasitic resistances (RNwell and RPsub) and one parasitic diode (the collector to base junction diode of the PNP transistor) in the path from the VSS to VDD. Furthermore, SCR-based designs are not suitable for application that exposed to hot switching or ionizing radiation [2]. In GP process, the gate oxide thickness of core transistors is reduced compared with LP process counterpart to achieve higher performance designs for high-frequency applications using 1 V core transistors and 2.5 V I/O option. The thinner gate oxide layer results in higher leakage current due to gate tunneling [4]. Therefore, using large thin oxide MOS transistors as clamping elements will result in a huge leakage. In this thesis, four power supply ESD clamps are proposed in which thick oxide MOS transistors are used as the main clamping element. Therefore, the low-leakage current feature is achieved without significantly degrading the ESD performance. In addition, the parasitic diode of the MOS transistors provides the protection against NSD-mode.
In this…
Subjects/Keywords: ElectroStatic Discharge (ESD); ESD Power Supply Clamp; Zapping modes; Transient ESD clamps; Static ESD Clamps; Hybrid ESD clamps
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Elghazali, M. (2017). Low-Leakage ESD Power Supply Clamps in General Purpose 65 nm CMOS Technology. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/11232
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Elghazali, Mahdi. “Low-Leakage ESD Power Supply Clamps in General Purpose 65 nm CMOS Technology.” 2017. Thesis, University of Waterloo. Accessed January 23, 2021.
http://hdl.handle.net/10012/11232.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Elghazali, Mahdi. “Low-Leakage ESD Power Supply Clamps in General Purpose 65 nm CMOS Technology.” 2017. Web. 23 Jan 2021.
Vancouver:
Elghazali M. Low-Leakage ESD Power Supply Clamps in General Purpose 65 nm CMOS Technology. [Internet] [Thesis]. University of Waterloo; 2017. [cited 2021 Jan 23].
Available from: http://hdl.handle.net/10012/11232.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Elghazali M. Low-Leakage ESD Power Supply Clamps in General Purpose 65 nm CMOS Technology. [Thesis]. University of Waterloo; 2017. Available from: http://hdl.handle.net/10012/11232
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

University of California – Riverside
4.
Ma, Rui.
Advanced ESD Protection Using Graphene Technologies.
Degree: Electrical Engineering, 2016, University of California – Riverside
URL: http://www.escholarship.org/uc/item/0jv84981
► One of the most pervasive reliability problems of the IC (integrated circuits) industry is the ESD (electrostatic discharging) induced. It causes up to 35% of…
(more)
▼ One of the most pervasive reliability problems of the IC (integrated circuits) industry is the ESD (electrostatic discharging) induced. It causes up to 35% of total IC field failures and billions of dollars are lost annually. Therefore, on-chip ESD protection structures are commonly used to protect IC parts from being damaged by ESD stresses. And ESD protection design becomes one of the most challenging IC design problems.The popular ESD protection structures may or may not be suitable for ESD protection at sub-32nm. ESD-protected I/O dummy monitor circuits can be used to evaluate ESD protection capability and suitability for general ICs. Various simple diode ESD protection structures is studied by mixed-mode ESD simulation and conducted comprehensive TLP (transmission line pulse) characterization for both individual ESD diodes and ESD-protected monitor circuit blocks. Stand-alone SCR and DTSCR are also studied to utilize the large current handling ability of SCR. TCAD simulation is discussed to provide design predictions. The goal is to provide practical design guidelines for robust ESD protection circuit design at 28nm node and beyond.Compared to Si based ESD structures, 2D material graphene have unique electronic properties, it has been a rapidly rising star since it was found experimentally at 2004. Experimental results from transport measurements show that graphene has remarkably high electron mobility at room temperature. The structure of an electromechanical switch using graphene films is demonstrated. The graphene film is pulled into electrical contact with the bottom silicon by application of voltage bias between the layers. Contact is broken by mechanical restoring forces after bias is removed. The device switches several times without tearing. TLP testing confirmed that graphene is an attractive material for electromechanical switches which can be used as novel ESD protection structure.Technology innovation is the key to IC design advances. However, conventional spiral inductors which have large size, poor Q-factor do not benefit from CMOS scaling. Novel IC inductors with vertical nano-particle magnetic cores could increase the L-density and thus reduce the area of the RF system-on-a-chip (SoC). A prototype LC-VCO using such a new magnetic-cored inductor is designed in an 180nm SOI CMOS.
Subjects/Keywords: Electrical engineering; ESD; Graphene; VCO
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Ma, R. (2016). Advanced ESD Protection Using Graphene Technologies. (Thesis). University of California – Riverside. Retrieved from http://www.escholarship.org/uc/item/0jv84981
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Ma, Rui. “Advanced ESD Protection Using Graphene Technologies.” 2016. Thesis, University of California – Riverside. Accessed January 23, 2021.
http://www.escholarship.org/uc/item/0jv84981.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Ma, Rui. “Advanced ESD Protection Using Graphene Technologies.” 2016. Web. 23 Jan 2021.
Vancouver:
Ma R. Advanced ESD Protection Using Graphene Technologies. [Internet] [Thesis]. University of California – Riverside; 2016. [cited 2021 Jan 23].
Available from: http://www.escholarship.org/uc/item/0jv84981.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Ma R. Advanced ESD Protection Using Graphene Technologies. [Thesis]. University of California – Riverside; 2016. Available from: http://www.escholarship.org/uc/item/0jv84981
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
5.
Arndt, Bastian.
Simulation der Zerstörwirkung von elektrostatischen Entladungen (ESD) auf Kfz-Elektroniksysteme.
Degree: 2013, Technische Universität Dortmund
URL: http://dx.doi.org/10.17877/DE290R-16364
► Die Eigenschaften von elektrostatischen Entladungen stellen ein erhebliches Störpotential für elektronische Bauelemente und Geräte dar. Es sind daher Maßnahmen notwendig um empfindliche Bauelemente zu schützen.…
(more)
▼ Die Eigenschaften von elektrostatischen Entladungen stellen ein erhebliches Störpotential für elektronische Bauelemente und Geräte dar. Es sind daher Maßnahmen notwendig um empfindliche Bauelemente zu schützen. Im Rahmen dieser Arbeit wurde eine Simulationsmethode erarbeitet, welche es erlaubt, die leitungsgebundene Auswirkung von transienten Pulsen auf Kfz-Elektroniksystemen zu analysieren und zu bewerten. Der Simulationsansatz kann dazu verwendet werden um
ESD-Schutzstrategien in Kfz-System zu beurteilen, die dafür notwendigen Komponenten zu dimensionieren und die dabei entstehenden Phänomene und Effekte zu analysieren. Mit den dabei erstellten Modellen ist es möglich, sowohl das elektrische Verhalten als auch die Ausfallschwelle der belasteten Systeme mittels gängiger Simulatoren zu ermitteln. Die dabei erarbeiteten Verfahren zur Modellierung der einzelnen Komponenten erlauben es das
ESD Verhalten der betrachteten Systeme mit einem vertretbaren
Modellierungsaufwand zu bewerten. Hierbei konnte unter anderem ein Ansatz entwickelt werden, welcher das nichtlineare Verhalten von
ESD- Schutzkomponenten und IC-Eingängen unter Pulsbelastung beschreibt. Darauf aufbauend wurde ein thermisches Ausfallmodell entwickelt. Bei der Erstellung der Verfahren wurde darauf geachtet, dass alle notwendigen Modellparameter mithilfe von Messungen ermittelt werden können. Dies gilt sowohl für das nichtlineare Verhalten von diskreten Bauelementen, als auch für die Parameter zur Beschreibung des Verhaltens von IC-Eingängen unter Pulsbelastung und die darauf aufbauenden thermischen Ausfallmodelle.
Advisors/Committee Members: Frei, Stephan (advisor), Pommerenke, David (referee).
Subjects/Keywords: ESD; Simulation; IC Modell; 620
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Arndt, B. (2013). Simulation der Zerstörwirkung von elektrostatischen Entladungen (ESD) auf Kfz-Elektroniksysteme. (Doctoral Dissertation). Technische Universität Dortmund. Retrieved from http://dx.doi.org/10.17877/DE290R-16364
Chicago Manual of Style (16th Edition):
Arndt, Bastian. “Simulation der Zerstörwirkung von elektrostatischen Entladungen (ESD) auf Kfz-Elektroniksysteme.” 2013. Doctoral Dissertation, Technische Universität Dortmund. Accessed January 23, 2021.
http://dx.doi.org/10.17877/DE290R-16364.
MLA Handbook (7th Edition):
Arndt, Bastian. “Simulation der Zerstörwirkung von elektrostatischen Entladungen (ESD) auf Kfz-Elektroniksysteme.” 2013. Web. 23 Jan 2021.
Vancouver:
Arndt B. Simulation der Zerstörwirkung von elektrostatischen Entladungen (ESD) auf Kfz-Elektroniksysteme. [Internet] [Doctoral dissertation]. Technische Universität Dortmund; 2013. [cited 2021 Jan 23].
Available from: http://dx.doi.org/10.17877/DE290R-16364.
Council of Science Editors:
Arndt B. Simulation der Zerstörwirkung von elektrostatischen Entladungen (ESD) auf Kfz-Elektroniksysteme. [Doctoral Dissertation]. Technische Universität Dortmund; 2013. Available from: http://dx.doi.org/10.17877/DE290R-16364
6.
Escudié, Fabien.
Optimisation de modèles comportementaux de composants pour la prédiction de défaillances fonctionnelles et matérielles liées aux décharges électrostatiques (ESD) : Behavioral model optimization of components for the prediction of soft and hard failures caused by electrostatic discharge (ESD).
Degree: Docteur es, Génie Electrique, 2018, Université Toulouse III – Paul Sabatier
URL: http://www.theses.fr/2018TOU30266
► Les événements transitoires de forte puissance (EFT - Electrical Fast Transient) sont l'une des préoccupations des concepteurs de systèmes embarqués. Ils peuvent conduire au dysfonctionnement…
(more)
▼ Les événements transitoires de forte puissance (EFT - Electrical Fast Transient) sont l'une des préoccupations des concepteurs de systèmes embarqués. Ils peuvent conduire au dysfonctionnement du système et sont à l'origine d'un grand nombre de défaillances matérielles et fonctionnelles. Notre étude est principalement portée sur l'impact des décharges électrostatique (ESD - Electro Static Discharge) sur l'électronique embarquée dans un véhicule. D'après une étude de Renault, un véhicule peut subir deux décharges par jour durant sa vie. Les ingénieurs systèmes ne disposent pas de moyen pour prédire l'impact de ces décharges dans les systèmes, et les solutions actuelles sont essentiellement basées sur l'expérience. Afin de prédire le chemin d'un ESD dans tout le système électronique et la stratégie de protection à adopter pour protéger les composants les plus sensibles, des recherches dans le monde entier sont en cours. Les travaux de recherche du groupe ESE du LAAS-CNRS ont mené à des méthodologies de modélisation de composant passif, de circuit intégré et de carte électronique en VHDL-AMS. Les circuits intégrés sont dotés d'un réseau de protection ESD interne qui permet de détourner le stress des zones critiques. La méthodologie développée au cours des précédentes années permet de modéliser le comportement de ce réseau de protection. Cependant, ces modèles sont rudimentaires, ils décrivent uniquement le niveau de déclenchement de la protection et son impédance quasi-statique en fonction du niveau de stress ESD. Aucune information sur le comportement transitoire de la protection n'est décrite dans le modèle. Il est donc difficile de prévoir certaines défaillances liées aux phénomènes transitoires de déclenchement des protections faisant apparaitre de très fortes surtensions ou des niveaux de courant mal évalués. Les différents aspects abordés durant cette thèse permettent de résoudre ces problèmes en proposant des modèles dynamiques, et différentes méthodes pour pouvoir extraire les paramètres des modèles.[...]
Electrical Fast Transient (EFT) are one of the concerns of embedded system engineers. They can lead to system malfunction. EFT are the cause of a large number of hardware and software failures. Our study is mainly focused on the impact of Electro Static Discharge (ESD) on embedded electronic systems, focusing on car's applications. According to a Renault's study, a car can suffer two discharges per day during its entire life. System engineers do not have any tools to predict the ESD impact on the systems. In order to predict the ESD path throughout the electronic system and adjust the ESD protection strategy to provide proper protection for all critical components, some researches around the world are in process. The research results from ESE working group from the LAAS-CNRS laboratory, were mainly on passive components, integrated circuits and electronics boards modeling methods, implemented in VHDL-AMS language. Integrated circuits have an internal ESD protection network that helps to deflect the stress…
Advisors/Committee Members: Caignet, Fabrice (thesis director).
Subjects/Keywords: ESD; EMC; EFT; Modélisation; ESD; EMC; EFT; Modeling
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Escudié, F. (2018). Optimisation de modèles comportementaux de composants pour la prédiction de défaillances fonctionnelles et matérielles liées aux décharges électrostatiques (ESD) : Behavioral model optimization of components for the prediction of soft and hard failures caused by electrostatic discharge (ESD). (Doctoral Dissertation). Université Toulouse III – Paul Sabatier. Retrieved from http://www.theses.fr/2018TOU30266
Chicago Manual of Style (16th Edition):
Escudié, Fabien. “Optimisation de modèles comportementaux de composants pour la prédiction de défaillances fonctionnelles et matérielles liées aux décharges électrostatiques (ESD) : Behavioral model optimization of components for the prediction of soft and hard failures caused by electrostatic discharge (ESD).” 2018. Doctoral Dissertation, Université Toulouse III – Paul Sabatier. Accessed January 23, 2021.
http://www.theses.fr/2018TOU30266.
MLA Handbook (7th Edition):
Escudié, Fabien. “Optimisation de modèles comportementaux de composants pour la prédiction de défaillances fonctionnelles et matérielles liées aux décharges électrostatiques (ESD) : Behavioral model optimization of components for the prediction of soft and hard failures caused by electrostatic discharge (ESD).” 2018. Web. 23 Jan 2021.
Vancouver:
Escudié F. Optimisation de modèles comportementaux de composants pour la prédiction de défaillances fonctionnelles et matérielles liées aux décharges électrostatiques (ESD) : Behavioral model optimization of components for the prediction of soft and hard failures caused by electrostatic discharge (ESD). [Internet] [Doctoral dissertation]. Université Toulouse III – Paul Sabatier; 2018. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2018TOU30266.
Council of Science Editors:
Escudié F. Optimisation de modèles comportementaux de composants pour la prédiction de défaillances fonctionnelles et matérielles liées aux décharges électrostatiques (ESD) : Behavioral model optimization of components for the prediction of soft and hard failures caused by electrostatic discharge (ESD). [Doctoral Dissertation]. Université Toulouse III – Paul Sabatier; 2018. Available from: http://www.theses.fr/2018TOU30266
7.
Cao, Yiqun.
High-voltage ESD structures and ESD protection concepts in smart power technologies.
Degree: 2019, Technische Universität Dortmund
URL: http://dx.doi.org/10.17877/DE290R-20313
► Electro-static discharge (ESD) event can cause upset or permanent damage of integrated circuits (IC) and electrical systems. The risk of ESD fails needs to be…
(more)
▼ Electro-static discharge (
ESD) event can cause upset or permanent damage of integrated circuits (IC) and electrical systems. The risk of
ESD fails needs to be mitigated or prevented.
ESD robustness of IC products and electrical systems is specified, verified and qualified according to respective
ESD standards. For high-voltage IC products based on smart power semiconductor technologies for industrial, power and automotive applications, design of effective and cost-efficient
ESD protection is a big challenge, demanding wide and deep technical knowledge throughout high-frequency and high-power characterization techniques, semiconductor device physic, circuit design as well as modeling and simulation. The required measurement setups and tester components are developed and introduced. The characterization of
ESD protection devices, IC and off-chip circuit elements is enabled and improved. The rise-time filters are important for the study of rise-time
dependent
ESD robustness. The human metal model (HMM) tester as an alternative to IEC
ESD generators provides voltage waveform measurement with good quality in addition to current waveform measurement. It can be used for wafer-level or package-level device characterization. The measurement results of HMM tester and IEC
ESD generator are compared. The on-chip
ESD protection design relies on proper choice of different types of
ESD protection devices and structures, depending on
ESD specifications and IC applications. Typical on-chip
ESD protection, whether snapback or non-snapback, single device or
ESD circuit is introduced. The failure levels studies give a systematic benchmark of the
ESD protection devices and structures, concerning device area, clamping voltage and other relevant parameters. The trade-off between those parameters and limitation of different
ESD protection is discussed. Moreover, understanding of
ESD failure modes is the key to implement effective
ESD design. A
unique
ESD failure mode of smart power semiconductor device is discovered and investigated in detail. In the scope of finding
ESD solutions, new active
ESD clamps have been further developed in this work. The study of
ESD protection is extended to the system-level involving on- and off-chip
ESD protection elements. The characteristics of typical off-chip elements as well as the interaction between IC and off-chip protection elements plays essential role on the system robustness. A system-level
ESD simulation incorporating IC and off-chip protection elements is desired for system efficient
ESD design (SEED). A behavioral
ESD model is developed which reproduces pulse-energy-dependent failure levels and self-heating effects. This modeling methodology can be used for assessment of system robustness even beyond
ESD time-domain. The validation of the models is given by representative application examples. Several main challenges of high-voltage
ESD design in smart power technologies have
been addressed in this work, which can serve as guidance for
ESD development and product support in future power…
Advisors/Committee Members: Frei, Stephan (advisor), Deutschmann, Bernd (referee).
Subjects/Keywords: ESD; Smart power technologies; High-voltage; ESD protection; ESD modeling; 620; Smart Grid; Elektrischer Überschlag; Hochspannung
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APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Cao, Y. (2019). High-voltage ESD structures and ESD protection concepts in smart power technologies. (Doctoral Dissertation). Technische Universität Dortmund. Retrieved from http://dx.doi.org/10.17877/DE290R-20313
Chicago Manual of Style (16th Edition):
Cao, Yiqun. “High-voltage ESD structures and ESD protection concepts in smart power technologies.” 2019. Doctoral Dissertation, Technische Universität Dortmund. Accessed January 23, 2021.
http://dx.doi.org/10.17877/DE290R-20313.
MLA Handbook (7th Edition):
Cao, Yiqun. “High-voltage ESD structures and ESD protection concepts in smart power technologies.” 2019. Web. 23 Jan 2021.
Vancouver:
Cao Y. High-voltage ESD structures and ESD protection concepts in smart power technologies. [Internet] [Doctoral dissertation]. Technische Universität Dortmund; 2019. [cited 2021 Jan 23].
Available from: http://dx.doi.org/10.17877/DE290R-20313.
Council of Science Editors:
Cao Y. High-voltage ESD structures and ESD protection concepts in smart power technologies. [Doctoral Dissertation]. Technische Universität Dortmund; 2019. Available from: http://dx.doi.org/10.17877/DE290R-20313

NSYSU
8.
Yang, Shih-Chi.
Preparation and characterization of thin CGO electrolyte films by ESD method for solid oxide fuel cells.
Degree: Master, Materials and Optoelectronic Science, 2013, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0205113-144132
► In the past few years, YSZ (Yttria Stabilized Zirconia) had been the dominate electrolyte material of high temperature (> 1000 °C) solid oxide fuel cell…
(more)
▼ In the past few years, YSZ (Yttria Stabilized Zirconia) had been the dominate electrolyte material of high temperature (> 1000 °C) solid oxide fuel cell (SOFC). In recent years, CGO (Cerium Gadolinium Oxide) has been considered that excellent oxygen-ion conductivity compared toYSZ in intermediate temperature (600 °C ~ 800 °C), therefore, CGO is used as electrolyte material in this study.
In this study, single solid oxide fuel cells were prepared using Tape casting,
ESD(Electrostatic spray deposition) and screen printing methods. Tape casting was employed to fabricate the NiO-CGO anode,
ESD method was employed to deposit films as electrolyte on anode and screen
printing was used to prepare Sm0.5Sr0.5CoO3-δ (SSC) cathodes on half cells. The SOFC single cell was designed with a configuration of CGO-Ni / CGO / SSC.
In this study, deposition parameters such as deposition temperature, solution flow rate and concentration of precursor solution were varied to figure out their effects for the resultant films. The optimum deposition temperature is 350 °C, flow rate is 2.1 ml/hr , concentration of precursor solution is 0.02 M, and the thickness of CGO film is 7-10 μm.
Advisors/Committee Members: Chun-Liang Chang (chair), Bing-Huai Huang (committee member), Wei-Hung Su (chair).
Subjects/Keywords: electrolyte; CGO; tape casting; SOFC; ESD
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APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
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APA (6th Edition):
Yang, S. (2013). Preparation and characterization of thin CGO electrolyte films by ESD method for solid oxide fuel cells. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0205113-144132
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Yang, Shih-Chi. “Preparation and characterization of thin CGO electrolyte films by ESD method for solid oxide fuel cells.” 2013. Thesis, NSYSU. Accessed January 23, 2021.
http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0205113-144132.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Yang, Shih-Chi. “Preparation and characterization of thin CGO electrolyte films by ESD method for solid oxide fuel cells.” 2013. Web. 23 Jan 2021.
Vancouver:
Yang S. Preparation and characterization of thin CGO electrolyte films by ESD method for solid oxide fuel cells. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Jan 23].
Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0205113-144132.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Yang S. Preparation and characterization of thin CGO electrolyte films by ESD method for solid oxide fuel cells. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0205113-144132
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Universiteit Utrecht
9.
Koopman, Y.
Educatie voor duurzame ontwikkeling bij aardrijkskunde & biologie in het voortgezet onderwijs.
Degree: 2012, Universiteit Utrecht
URL: http://dspace.library.uu.nl:8080/handle/1874/254041
► This study is about the knowledge of student teachers about Education for Sustainable Development (ESD) in secondary schools in the Netherlands. Student teachers must know…
(more)
▼ This study is about the knowledge of student teachers about Education for Sustainable Development (
ESD) in secondary schools in the Netherlands. Student teachers must know about the concepts, competences and didactics concerning sustainability.
The research has shown that sustainability or sustainable development has no unambiguous definition. Most literature states that an accurate definition of sustainability consists of three components, namely a social, economic and natural (ecological / biological) component.
There are also no key issues which have to be educated to students in secondary school. There is still discussion about these main issues. Most scientists agree that issues about sustainability should consider the three previously mentioned components.
There is also discussion about the key competences and didactics considering
ESD. Teachers should have enough knowledge about their own
subject but they must also be able to see the cross curricular dimension of sustainability issues. They should also think in solutions for the (near) future, not only in problems.
The conclusion of this research is that geographical en biological student teachers are thematically well prepared to teach about
ESD. There is definitely some notion about the main issues concerning sustainability. However, geographical and biological student teachers should know more about the main didactical competences a teacher should have. Not all of the main didactical competences are known to these students.
Advisors/Committee Members: Béneker, T..
Subjects/Keywords: Geowetenschappen; ESD, sustainability, didactics, student teachers
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APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Koopman, Y. (2012). Educatie voor duurzame ontwikkeling bij aardrijkskunde & biologie in het voortgezet onderwijs. (Masters Thesis). Universiteit Utrecht. Retrieved from http://dspace.library.uu.nl:8080/handle/1874/254041
Chicago Manual of Style (16th Edition):
Koopman, Y. “Educatie voor duurzame ontwikkeling bij aardrijkskunde & biologie in het voortgezet onderwijs.” 2012. Masters Thesis, Universiteit Utrecht. Accessed January 23, 2021.
http://dspace.library.uu.nl:8080/handle/1874/254041.
MLA Handbook (7th Edition):
Koopman, Y. “Educatie voor duurzame ontwikkeling bij aardrijkskunde & biologie in het voortgezet onderwijs.” 2012. Web. 23 Jan 2021.
Vancouver:
Koopman Y. Educatie voor duurzame ontwikkeling bij aardrijkskunde & biologie in het voortgezet onderwijs. [Internet] [Masters thesis]. Universiteit Utrecht; 2012. [cited 2021 Jan 23].
Available from: http://dspace.library.uu.nl:8080/handle/1874/254041.
Council of Science Editors:
Koopman Y. Educatie voor duurzame ontwikkeling bij aardrijkskunde & biologie in het voortgezet onderwijs. [Masters Thesis]. Universiteit Utrecht; 2012. Available from: http://dspace.library.uu.nl:8080/handle/1874/254041
10.
Courivaud, Bertrand.
Développement et réalisation de nouvelles structures de protection contre les décharges électrostatiques : Development and realization of new ESD protection against electrostatic discharge.
Degree: Docteur es, Génie électrique, 2015, Université Toulouse III – Paul Sabatier
URL: http://www.theses.fr/2015TOU30273
► Le cadre de cette étude se focalise sur le développement de protections contre les décharges électrostatiques (ESD) externes aux composants électroniques à protéger. Pour des…
(more)
▼ Le cadre de cette étude se focalise sur le développement de protections contre les décharges électrostatiques (ESD) externes aux composants électroniques à protéger. Pour des raisons applicatives, ou l'encombrement devient une préoccupation majeure, ces protections ESD doivent répondre à des contraintes de taille toujours plus difficiles à satisfaire tout en gardant les mêmes performances en robustesse. Ce travail présente un nouveau concept de structure de protection ESD bidirectionnel basé sur une technologie industrielle originellement dédié à la réalisation de capacités à haute densité d'intégration. Le procédé technologique possède une étape de fabrication de tranchées profonde qui est mise à profit dans cette étude pour la réalisation de diodes tridimensionnelles. L'optimisation de la configuration de ces structure a été menée par une étude théorique à l'aide des outils de simulation TCAD afin de mieux appréhender le fonctionnement physique et d'apporter des règles de conception. De nombreux résultats expérimentaux sont présentés et des comparaisons seront également menées afin de quantifier l'apport de cette nouvelle technologie. La meilleure configuration permet de garantir une réduction de 25% de la taille des structures tout en garantissant un niveau de robustesse élevé.
As part of this study focuses on the development of external protection against electrostatic discharge (ESD) to the electronic components to protect. For many applicative reasons where taken area becomes a major concern, the ESD protection must meet size constraints increasingly difficult to satisfy while keeping the same performance in robustness. This work presents a new concept of bi-directional ESD protection structure based on industrial technology originally dedicated to achieving high-density integration capabilities. The technological process has a deep trench production step which is used in this study for the realization of three-dimensional diodes. Optimizing configuration of the structure was conducted by a theoretical study using TCAD simulation tools to better understand the physical functioning and provide design rules. Many experimental results are presented and comparisons will also be conducted to quantify the contribution of this new technology. The best configuration ensures a 25% reduction in the size of structures while ensuring a high level of robustness.
Advisors/Committee Members: Nolhier, Nicolas (thesis director), Ferru, Gilles (thesis director).
Subjects/Keywords: ESD; Tranchée profonde; Robustesse; TCAD simulation
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Courivaud, B. (2015). Développement et réalisation de nouvelles structures de protection contre les décharges électrostatiques : Development and realization of new ESD protection against electrostatic discharge. (Doctoral Dissertation). Université Toulouse III – Paul Sabatier. Retrieved from http://www.theses.fr/2015TOU30273
Chicago Manual of Style (16th Edition):
Courivaud, Bertrand. “Développement et réalisation de nouvelles structures de protection contre les décharges électrostatiques : Development and realization of new ESD protection against electrostatic discharge.” 2015. Doctoral Dissertation, Université Toulouse III – Paul Sabatier. Accessed January 23, 2021.
http://www.theses.fr/2015TOU30273.
MLA Handbook (7th Edition):
Courivaud, Bertrand. “Développement et réalisation de nouvelles structures de protection contre les décharges électrostatiques : Development and realization of new ESD protection against electrostatic discharge.” 2015. Web. 23 Jan 2021.
Vancouver:
Courivaud B. Développement et réalisation de nouvelles structures de protection contre les décharges électrostatiques : Development and realization of new ESD protection against electrostatic discharge. [Internet] [Doctoral dissertation]. Université Toulouse III – Paul Sabatier; 2015. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2015TOU30273.
Council of Science Editors:
Courivaud B. Développement et réalisation de nouvelles structures de protection contre les décharges électrostatiques : Development and realization of new ESD protection against electrostatic discharge. [Doctoral Dissertation]. Université Toulouse III – Paul Sabatier; 2015. Available from: http://www.theses.fr/2015TOU30273

University of Plymouth
11.
O'Sullivan, Ciaran Francis.
Sustainability in secondary education in England : an ethnographic study.
Degree: PhD, 2014, University of Plymouth
URL: http://hdl.handle.net/10026.1/3140
► This research sets out to establish both the extent to which and the ways in which English Secondary schools have a school culture focusing upon…
(more)
▼ This research sets out to establish both the extent to which and the ways in which English Secondary schools have a school culture focusing upon sustainability. I visited three case study schools for six weeks each: these were carefully selected to represent a range of progress towards becoming sustainable schools. I visited two other ‘benchmark’ schools for two days each: these were chosen on the recommendations of school sustainability experts, and visiting them helped me judge the progress my case-study schools had made. I took an ethnographic approach to the research, conducting about 80 interviews with various members of my three case study schools, also consulting school documents and undertaking observations of lessons and other aspects of school life. I discovered that the case-study schools had generally made little progress on sustainability, with most school members unaware or uncertain of the basic principles of sustainability. The schools focused much more on students’ examination results and behaviour than sustainability. Leadership structures and formal student involvement in leadership at the case study schools were not conducive to sustainability. Links between campus operations and the taught curriculum were mostly absent, and where sustainability was included in lessons, it tended to be largely theoretical, with few references to its impact on the students and daily life. In the light of the case-study findings and a wide-ranging literature review, a series of recommendations are made, both for secondary schools and for national education policy. These relate, for example, to patterns of school leadership, to the Continuing Professional Development (CPD) of school leaders and teachers, to strengthening the role of sustainability in both the formal and informal curriculum, and to ensuring that students emerge better equipped for a world in which sustainability agendas will be of increasing importance.
Subjects/Keywords: 371.2; Sustainability, Education, Secondary, ESD, EfS
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
O'Sullivan, C. F. (2014). Sustainability in secondary education in England : an ethnographic study. (Doctoral Dissertation). University of Plymouth. Retrieved from http://hdl.handle.net/10026.1/3140
Chicago Manual of Style (16th Edition):
O'Sullivan, Ciaran Francis. “Sustainability in secondary education in England : an ethnographic study.” 2014. Doctoral Dissertation, University of Plymouth. Accessed January 23, 2021.
http://hdl.handle.net/10026.1/3140.
MLA Handbook (7th Edition):
O'Sullivan, Ciaran Francis. “Sustainability in secondary education in England : an ethnographic study.” 2014. Web. 23 Jan 2021.
Vancouver:
O'Sullivan CF. Sustainability in secondary education in England : an ethnographic study. [Internet] [Doctoral dissertation]. University of Plymouth; 2014. [cited 2021 Jan 23].
Available from: http://hdl.handle.net/10026.1/3140.
Council of Science Editors:
O'Sullivan CF. Sustainability in secondary education in England : an ethnographic study. [Doctoral Dissertation]. University of Plymouth; 2014. Available from: http://hdl.handle.net/10026.1/3140

Uppsala University
12.
Willner, Hannes.
Vem får vara hållbar? : En studie om exkludering av gymnasieelever från utbildning för hållbar utveckling utifrån klass och identitet.
Degree: Education, 2015, Uppsala University
URL: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-256775
► Denna studie syftar till att undersöka hur gymnasieelevers uppfattningar om hållbar utveckling formas och vilken betydelse faktorer som social klass, identitet och utbildning har…
(more)
▼ Denna studie syftar till att undersöka hur gymnasieelevers uppfattningar om hållbar utveckling formas och vilken betydelse faktorer som social klass, identitet och utbildning har för detta. Därigenom försöker studien bidra med kunskap om hur sociala strukturer som klass och identitetsprocesser påverkar elevers tillgängliggörande av hållbar utveckling som ett undervisningsinnehåll och därmed säga något om huruvida implementering av utbildning för hållbar utveckling, ESD (Education for Sustainable Development), som utbildningsprojekt riskerar att exkludera elever med arbetarklassbakgrund. Undersökningen genomfördes med kvalitativa intervjuer som metod och urvalet bestod av åtta elever från två olika skolor, en studieförberedande och en yrkesförberedande. Materialet analyserades utifrån Bourdieus teorier om kulturellt kapital, habitus och kulturell reproduktion. Resultaten av studien visar att det finns skillnader i hur elever med olika kulturellt kapital ser på hållbar utveckling, att social klass och identitet har stor betydelse för hur eleverna tillägnar sig hållbar utveckling som ett undervisningsinnehåll, samt att detta riskerar att exkludera grupper av lägre social klass som studerar på yrkesförberedande program från att lära sig om och bli engagerade i frågor om hållbar utveckling. Men studien visar också att skolan har stora möjligheter att påverka detta om implementeringen av ESD kan anpassas till en mer pluralistisk ansats som bättre tillgodoser alla elevgruppers unika behov och preferenser. Vidare framträder att styrningen av skolan har betydelse för vilken form av kulturell reproduktion som sker inom ESD. Av detta drar författaren slutsatsen att implementeringen av ESD bör prioriteras politiskt för alla typer av skolor och elevgrupper i samhället och implementeras med pluralistiska metoder som inkluderar alla elever oavsett klasstillhörighet.
Subjects/Keywords: hållbar utveckling; ESD; klass; identitet; Bourdieu
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Willner, H. (2015). Vem får vara hållbar? : En studie om exkludering av gymnasieelever från utbildning för hållbar utveckling utifrån klass och identitet. (Thesis). Uppsala University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-256775
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Willner, Hannes. “Vem får vara hållbar? : En studie om exkludering av gymnasieelever från utbildning för hållbar utveckling utifrån klass och identitet.” 2015. Thesis, Uppsala University. Accessed January 23, 2021.
http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-256775.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Willner, Hannes. “Vem får vara hållbar? : En studie om exkludering av gymnasieelever från utbildning för hållbar utveckling utifrån klass och identitet.” 2015. Web. 23 Jan 2021.
Vancouver:
Willner H. Vem får vara hållbar? : En studie om exkludering av gymnasieelever från utbildning för hållbar utveckling utifrån klass och identitet. [Internet] [Thesis]. Uppsala University; 2015. [cited 2021 Jan 23].
Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-256775.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Willner H. Vem får vara hållbar? : En studie om exkludering av gymnasieelever från utbildning för hållbar utveckling utifrån klass och identitet. [Thesis]. Uppsala University; 2015. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-256775
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
13.
Enqvist, Erik.
Synthesis and Characterisation of Non-Evaporable Getter Films Based on Ti, Zr and V.
Degree: The Institute of Technology, 2011, Linköping UniversityLinköping University
URL: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77473
► Non-evaporable getters (NEG) are widely used in ultra high vacuum (UHV) systems for particle accelerators to assure distributed pumping speed. By heating the NEG…
(more)
▼ Non-evaporable getters (NEG) are widely used in ultra high vacuum (UHV) systems for particle accelerators to assure distributed pumping speed. By heating the NEG to an activation temperature, the oxide layer on the surface dissolves into the material, leaving a clean (activated) surface. The activated NEG surface is capable of chemisorbing most of the residual gases present in a UHV system and will act as a vacuum pump. NEG can be sputter deposited on the inner wall of vacuum chambers, turning the whole wall from a source of gas into a pump. At the largest particle accelerator in the world, the Large Hadron Collider, more than 6 km of beam pipe has been NEG coated.
In this work, a DC magnetron sputtering system dedicated for coating cylindrical vacuum chambers with NEG has been assembled, installed and commissioned. The system has been used to do NEG depositions on inner walls of vacuum chambers. The vacuum performance of the coating has been measured in terms of pumping speed, electron stimulated desorption and activation temperature. In addition, the thin film composition and morphology has been investigated by scanning electron microscopy (SEM).
The work has resulted in an operational DC magnetron sputtering system, which can be used for further studies of NEG materials and compositions.
Subjects/Keywords: NEG; LHC; Sputtering; Sticking probability; ESD; coating
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Enqvist, E. (2011). Synthesis and Characterisation of Non-Evaporable Getter Films Based on Ti, Zr and V. (Thesis). Linköping UniversityLinköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77473
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Enqvist, Erik. “Synthesis and Characterisation of Non-Evaporable Getter Films Based on Ti, Zr and V.” 2011. Thesis, Linköping UniversityLinköping University. Accessed January 23, 2021.
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77473.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Enqvist, Erik. “Synthesis and Characterisation of Non-Evaporable Getter Films Based on Ti, Zr and V.” 2011. Web. 23 Jan 2021.
Vancouver:
Enqvist E. Synthesis and Characterisation of Non-Evaporable Getter Films Based on Ti, Zr and V. [Internet] [Thesis]. Linköping UniversityLinköping University; 2011. [cited 2021 Jan 23].
Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77473.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Enqvist E. Synthesis and Characterisation of Non-Evaporable Getter Films Based on Ti, Zr and V. [Thesis]. Linköping UniversityLinköping University; 2011. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77473
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

University of New Mexico
14.
Martinez, Francis.
Explosive Safety with Regards to Electrostatic Discharge.
Degree: Electrical and Computer Engineering, 2014, University of New Mexico
URL: http://hdl.handle.net/1928/24265
► Static charge is something that most individuals recognize as something that happens when they walk across a carpet, touch their refrigerator and get shocked. Most…
(more)
▼ Static charge is something that most individuals recognize as something that happens when they walk across a carpet, touch their refrigerator and get shocked. Most people seldom recognize that a shock due to static charge, or properly called, Electrostatic Discharge (
ESD) is a phenomenon that has significantly damaging effects. Most people who stay informed of the current news, have heard stories of static charge causing a pump at a gas station to start on fire. Some individuals may even recognize that when they change the memory on a computer, they need to ensure that they are properly electrically grounded to prevent damage to any of the sensitive electronic components within their computers. However, it is unlikely that very many individuals would ever consider that an
ESD event may be significant enough to initiate an explosive material. Explosives materials are materials that many people might recognize as susceptible to initiation due to mechanical insults. Plastic and foam materials are often used to protect explosives. Unfortunately, often many of these materials are dielectric materials which are susceptible to triboelectric charge transfer, or build-up of static charge, and thus, become a potential hazardous electrical source that may cause the explosive to inadvertently initiate. To eliminate the generation of static electricity, it is important to understand the methods in which static electricity is generated on these types of materials. If the method of triboelectric charge transfer is understood, it is possible to minimize the effects to ensure that the device that is designed to prevent mechanical insults to the explosive materials does not become its greatest electrical insult. Once the method of charge transfer is understood, a potential method of charge removal might be possible to ensure that explosive devices are protected from both mechanical and electrical insults.
Advisors/Committee Members: Christodoulou, Christos, Gilmore, Mark, Tawk, Youssef.
Subjects/Keywords: ESD; Electrostatic Discharge; Explosives; Surface Resistivity
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
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APA (6th Edition):
Martinez, F. (2014). Explosive Safety with Regards to Electrostatic Discharge. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/24265
Chicago Manual of Style (16th Edition):
Martinez, Francis. “Explosive Safety with Regards to Electrostatic Discharge.” 2014. Masters Thesis, University of New Mexico. Accessed January 23, 2021.
http://hdl.handle.net/1928/24265.
MLA Handbook (7th Edition):
Martinez, Francis. “Explosive Safety with Regards to Electrostatic Discharge.” 2014. Web. 23 Jan 2021.
Vancouver:
Martinez F. Explosive Safety with Regards to Electrostatic Discharge. [Internet] [Masters thesis]. University of New Mexico; 2014. [cited 2021 Jan 23].
Available from: http://hdl.handle.net/1928/24265.
Council of Science Editors:
Martinez F. Explosive Safety with Regards to Electrostatic Discharge. [Masters Thesis]. University of New Mexico; 2014. Available from: http://hdl.handle.net/1928/24265

University of Illinois – Urbana-Champaign
15.
Xiu, Yang.
Logic upset induced by substrate current during power-on ESD.
Degree: MS, 1200, 2015, University of Illinois – Urbana-Champaign
URL: http://hdl.handle.net/2142/73003
► In this thesis, we will describe an experimental study of one possible soft failure mechanism during power-on electrostatic discharge (ESD). For contact discharge into a…
(more)
▼ In this thesis, we will describe an experimental study of one possible soft failure mechanism during power-on electrostatic discharge (
ESD). For contact discharge into a test chip mounted on a board, logic upsets can be triggered by a parasitic NPN structure which couples the
ESD protection to an N+ diffusion in the core circuitry.
This type of upset often involves contention between the transistor and the parasitic structure. Therefore, the likelihood for logic upsets to occur is sensitive to transistor sizing, as well as the collection efficiency of the parasitic structure. The collection efficiency is affected by various factors, including spacing and collector size.
The occurrence of logic upsets is dependent on the
ESD pulse injected. They are observed during transmission line pulses of various widths, where the upset pattern changes according to the pulse width. Upsets are also observed during system-level
ESD tests, such as the ISO 10605 stress.
Advisors/Committee Members: Rosenbaum, Elyse (advisor).
Subjects/Keywords: power-on electrostatic discharge (ESD); soft failure; substrate current; system-level electrostatic discharge (ESD)
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Xiu, Y. (2015). Logic upset induced by substrate current during power-on ESD. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/73003
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Xiu, Yang. “Logic upset induced by substrate current during power-on ESD.” 2015. Thesis, University of Illinois – Urbana-Champaign. Accessed January 23, 2021.
http://hdl.handle.net/2142/73003.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Xiu, Yang. “Logic upset induced by substrate current during power-on ESD.” 2015. Web. 23 Jan 2021.
Vancouver:
Xiu Y. Logic upset induced by substrate current during power-on ESD. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2015. [cited 2021 Jan 23].
Available from: http://hdl.handle.net/2142/73003.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Xiu Y. Logic upset induced by substrate current during power-on ESD. [Thesis]. University of Illinois – Urbana-Champaign; 2015. Available from: http://hdl.handle.net/2142/73003
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Brno University of Technology
16.
Šeliga, Ladislav.
Vysokonapěťové součástky v moderních bipolárních technologiích: High-Voltage Devices in Smart Power Technology.
Degree: 2019, Brno University of Technology
URL: http://hdl.handle.net/11012/32074
► This work describes fundamental characteristics of LDMOS transistors. In the first part of work are described properties of LDMOS transistors, the basic parameters and techniques…
(more)
▼ This work describes fundamental characteristics of LDMOS transistors. In the first part of work are described properties of LDMOS transistors, the basic parameters and techniques to improve parameters of transistors. The next section discusses the reliability of LDMOS transistors. This section describes the safe operating area (SOA), hot carrier injection (HCI) and negative bias temperature instability (NBTI). The last theoretical section describes models used to simulate
ESD events. The practical part is focused on simulation of the basic parameters PLDMOS and NLDMOS transistors and comparison of simulated and measured concentration profiles. Furthermore the thesis deals with simulation of the impact of changes in geometrical parameters of the PLDMOS transistor and the impact of these changes on the electrical parameters. The last part contains TLP simulations which examines electrical properties of PLDMOS transistor when is used as
ESD protection.
Advisors/Committee Members: Hégr, Ondřej (advisor), Boušek, Jaroslav (referee).
Subjects/Keywords: TCAD; LDMOS; ESD; sensitivity to geometrical parameters; TCAD; LDMOS; ESD; citlivost k geometrickým parametrům
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Šeliga, L. (2019). Vysokonapěťové součástky v moderních bipolárních technologiích: High-Voltage Devices in Smart Power Technology. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/32074
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Šeliga, Ladislav. “Vysokonapěťové součástky v moderních bipolárních technologiích: High-Voltage Devices in Smart Power Technology.” 2019. Thesis, Brno University of Technology. Accessed January 23, 2021.
http://hdl.handle.net/11012/32074.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Šeliga, Ladislav. “Vysokonapěťové součástky v moderních bipolárních technologiích: High-Voltage Devices in Smart Power Technology.” 2019. Web. 23 Jan 2021.
Vancouver:
Šeliga L. Vysokonapěťové součástky v moderních bipolárních technologiích: High-Voltage Devices in Smart Power Technology. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Jan 23].
Available from: http://hdl.handle.net/11012/32074.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Šeliga L. Vysokonapěťové součástky v moderních bipolárních technologiích: High-Voltage Devices in Smart Power Technology. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/32074
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
17.
Viale, Benjamin.
Development of predictive analysis solutions for the ESD robustness of integrated circuits in advanced CMOS technologies : Développement de solutions d’analyse prédictive pour la robustesse ESD des circuits intégrés en technologies CMOS avancées.
Degree: Docteur es, Génie électrique, 2017, Lyon
URL: http://www.theses.fr/2017LYSEI117
► Les circuits intégrés (CI) devenant de plus en plus complexes et vulnérables face aux décharges électrostatiques (ESD pour ElectroStatic Discharge), la capacité à vérifier de…
(more)
▼ Les circuits intégrés (CI) devenant de plus en plus complexes et vulnérables face aux décharges électrostatiques (ESD pour ElectroStatic Discharge), la capacité à vérifier de manière fiable la présence de défauts de conception ESD sur des puces comptant plusieurs milliards de transistors avant tout envoi en fabrication est devenu un enjeu majeur dans l’industrie des semi-conducteurs. Des outils commerciaux automatisés de dessin électronique (EDA pour Electronic Design Automation) et leur flot de vérification associé permettent d’effectuer différents types de contrôles qui se sont révélés être efficaces pour des circuits avec une architecture classique. Cependant, ils souffrent de limitations lorsqu’ils sont confrontés à des architectures inhabituelles, dites custom. De plus, ces méthodes de vérification sont généralement effectuées tard dans le flot de conception, rendant toute rectification de dessin coûteuse en termes d’efforts correctifs et de temps. Cette thèse de doctorat propose une méthodologie de vérification ESD systématique et multi-échelle introduite dans un outil appelé ESD IP Explorer qui a été spécifiquement implémenté pour couvrir le flot de conception dans sa globalité et pour adresser des circuits dits custom. Il est composé d’un module de reconnaissance et d’un module de vérification. Le module de reconnaissance identifie tout d’abord et de manière automatisée les structures de protection ESD, embarquées sur silicium dans le circuit intégré pour améliorer leur robustesse ESD, selon un mécanisme de reconnaissance topologique. Le module de vérification convertit ensuite le réseau de protection ESD, formé des structures de protection ESD, en un graphe dirigé. Finalement, une analyse ESD quasi-statique reposant sur des algorithmes génériques issus de la théorie des graphes est effectuée sur la globalité du circuit à vérifier. Des algorithmes d’apprentissage automatique ont été employés pour prédire les comportements quasi-statiques des protections ESD à partir des paramètres d’instance de leurs composants élémentaires sous la forme d’une liste d’interconnexions. L’avantage ici est qu’aucune simulation électrique n’est requise pendant toute la durée d’exécution d’ESD IP Explorer, ce qui simplifie l’architecture de l’outil et accélère l’analyse. Les efforts d’implémentation ont été concentrés sur la compatibilité d’ESD IP Explorer avec le nœud technologique 28nm FD-SOI (pour Fully Depleted Silicon On Insulator). L’outil de vérification développé a été utilisé avec succès pour l’analyse d’un circuit incorporant des parties numériques et à signaux mixtes et comprenant plus de 1,5 milliard de transistors en seulement quelques heures. Des circuits custom qui n’ont pas pu être vérifiés au moyen d’outils de vérification traditionnels du fait de problèmes d’incompatibilité ont également pu être soumis à analyse grâce à ESD IP Explorer.
As Integrated Circuits (ICs) become more complex and susceptible to ElectroStatic Discharges (ESD), the ability to reliably verify the presence of ESD design weaknesses over a…
Advisors/Committee Members: Allard, Bruno (thesis director).
Subjects/Keywords: Electronique; Circuit intégré; Décharges électrostatiques - ESD; Vérification ESD multi-Échelle; Reconnaissance ESD topologique; Apprentissage automatique; Analyse basée sur la théorie des graphes; 28nm FD-SOI (Fully Depleted Silison On Insulator; Electronics; Integrated circuits; ESD - Electrostatic discharge; Full-Chip ESD verification; Topology-Aware ESD network recognition; Machine learning; Graph-Based analysis; 28nm FD-SOI (Fully Depleted Silison On Insulator); 621.381 044 072
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Viale, B. (2017). Development of predictive analysis solutions for the ESD robustness of integrated circuits in advanced CMOS technologies : Développement de solutions d’analyse prédictive pour la robustesse ESD des circuits intégrés en technologies CMOS avancées. (Doctoral Dissertation). Lyon. Retrieved from http://www.theses.fr/2017LYSEI117
Chicago Manual of Style (16th Edition):
Viale, Benjamin. “Development of predictive analysis solutions for the ESD robustness of integrated circuits in advanced CMOS technologies : Développement de solutions d’analyse prédictive pour la robustesse ESD des circuits intégrés en technologies CMOS avancées.” 2017. Doctoral Dissertation, Lyon. Accessed January 23, 2021.
http://www.theses.fr/2017LYSEI117.
MLA Handbook (7th Edition):
Viale, Benjamin. “Development of predictive analysis solutions for the ESD robustness of integrated circuits in advanced CMOS technologies : Développement de solutions d’analyse prédictive pour la robustesse ESD des circuits intégrés en technologies CMOS avancées.” 2017. Web. 23 Jan 2021.
Vancouver:
Viale B. Development of predictive analysis solutions for the ESD robustness of integrated circuits in advanced CMOS technologies : Développement de solutions d’analyse prédictive pour la robustesse ESD des circuits intégrés en technologies CMOS avancées. [Internet] [Doctoral dissertation]. Lyon; 2017. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2017LYSEI117.
Council of Science Editors:
Viale B. Development of predictive analysis solutions for the ESD robustness of integrated circuits in advanced CMOS technologies : Développement de solutions d’analyse prédictive pour la robustesse ESD des circuits intégrés en technologies CMOS avancées. [Doctoral Dissertation]. Lyon; 2017. Available from: http://www.theses.fr/2017LYSEI117

Université de Grenoble
18.
Solaro, Yohann.
Conception, fabrication et caractérisation de dispositifs innovants de protection contre les décharges électrostatiques en technologie FDSOI : Design, fabrication and characterization of innovative ESD protection devices for 28 nm and 14 nm FDSOI technologies.
Degree: Docteur es, Nano électronique et nano technologies, 2014, Université de Grenoble
URL: http://www.theses.fr/2014GRENT098
► L’architecture FDSOI (silicium sur isolant totalement déserté) permet une amélioration significative du comportement électrostatique des transistors MOSFETs pour les technologies avancées et est employée industriellement…
(more)
▼ L’architecture FDSOI (silicium sur isolant totalement déserté) permet une amélioration significative du comportement électrostatique des transistors MOSFETs pour les technologies avancées et est employée industriellement à partir du noeud 28 nm.L’implémentation de protections contre les décharges électrostatiques (ESD pour« Electro Static Discharge ») dans ces technologies reste un défi. Alors que l’approche standard repose sur l’hybridation du substrat SOI (gravure de l’oxyde enterré : BOX)permettant de fabriquer des dispositifs de puissance verticaux, nous nous intéressons ici à des structures dans lesquelles la conduction s’effectue latéralement, dans le film de silicium. Dans ces travaux, des approches alternatives utilisant des dispositifs innovants(Z²-FET et BBC-T) sont proposées. Leurs caractéristiques statiques, quasi-statiques et transitoires sont étudiées, par le biais de simulations TCAD et de caractérisations électriques.
FDSOI architecture (Fully Depleted Silicon On Insulator) allows a significantimprovement of the electrostatic behavior of the MOSFETs transistors for the advancedtechnologies. It is industrially employed from the 28 nm node. However, theimplementation of ESD (Electrostatic Discharges) protections in these technologies isstill a challenge. While the standard approach relies on SOI substrate hybridization (byetching the BOX (buried oxide)), allowing to fabricate vertical power devices, we focushere on structures where the current flows laterally, in the silicon film. In this work,alternative approaches using innovative devices (Z²-FET and BBC-T) are proposed. Theirstatic, quasi-static and transient characteristics are studied in detail, with TCADsimulations and electrical characterizations.
Advisors/Committee Members: Ferrari, Philippe (thesis director), Cristoloveanu, Sorin (thesis director), Fontenau, Pascal (thesis director), Fenouillet-Béranger, Claire (thesis director).
Subjects/Keywords: FDSOI; Protections; ESD; Caractérisations électriques; TLP; CMOS avancé; FDSOI; Protections; ESD; Electrical characterization; TLP; Advanced CMOS; 620
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Solaro, Y. (2014). Conception, fabrication et caractérisation de dispositifs innovants de protection contre les décharges électrostatiques en technologie FDSOI : Design, fabrication and characterization of innovative ESD protection devices for 28 nm and 14 nm FDSOI technologies. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2014GRENT098
Chicago Manual of Style (16th Edition):
Solaro, Yohann. “Conception, fabrication et caractérisation de dispositifs innovants de protection contre les décharges électrostatiques en technologie FDSOI : Design, fabrication and characterization of innovative ESD protection devices for 28 nm and 14 nm FDSOI technologies.” 2014. Doctoral Dissertation, Université de Grenoble. Accessed January 23, 2021.
http://www.theses.fr/2014GRENT098.
MLA Handbook (7th Edition):
Solaro, Yohann. “Conception, fabrication et caractérisation de dispositifs innovants de protection contre les décharges électrostatiques en technologie FDSOI : Design, fabrication and characterization of innovative ESD protection devices for 28 nm and 14 nm FDSOI technologies.” 2014. Web. 23 Jan 2021.
Vancouver:
Solaro Y. Conception, fabrication et caractérisation de dispositifs innovants de protection contre les décharges électrostatiques en technologie FDSOI : Design, fabrication and characterization of innovative ESD protection devices for 28 nm and 14 nm FDSOI technologies. [Internet] [Doctoral dissertation]. Université de Grenoble; 2014. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2014GRENT098.
Council of Science Editors:
Solaro Y. Conception, fabrication et caractérisation de dispositifs innovants de protection contre les décharges électrostatiques en technologie FDSOI : Design, fabrication and characterization of innovative ESD protection devices for 28 nm and 14 nm FDSOI technologies. [Doctoral Dissertation]. Université de Grenoble; 2014. Available from: http://www.theses.fr/2014GRENT098

Université de Grenoble
19.
Lim, Tek Fouy.
Dispositifs de protection contre les décharges électrostatiques pour les applications radio fréquences et millimétriques : Development of an ElectroStatic Discharges (ESD) protection circuit for millimeter-wave frequencies applications.
Degree: Docteur es, Sciences et technologie industrielles, 2013, Université de Grenoble
URL: http://www.theses.fr/2013GRENT033
► Ces travaux s'inscrivent dans un contexte où les contraintes vis-à-vis des décharges électrostatiques sont de plus en plus fortes, les circuits de protection sont un…
(more)
▼ Ces travaux s'inscrivent dans un contexte où les contraintes vis-à-vis des décharges électrostatiques sont de plus en plus fortes, les circuits de protection sont un problème récurrent pour les circuits fonctionnant à hautes fréquences. La capacité parasite des composants de protection limite fortement la transmission du signal et peut perturber fortement le fonctionnement normal d'un circuit. Les travaux présentés dans ce mémoire font suite à une volonté de fournir aux concepteurs de circuits fonctionnant aux fréquences millimétriques un circuit de protection robuste présentant de faibles pertes en transmission, avec des dimensions très petites et fonctionnant sur une très large bande de fréquences, allant du courant continu à 100 GHz. Pour cela, une étude approfondie des lignes de transmission et des composants de protection a été réalisée à l'aide de simulations électromagnétiques et de circuits. Placés et fragmentées le long de ces lignes de transmission, les composants de protection ont été optimisés afin de perturber le moins possible la transmission du signal, tout en gardant une forte robustesse face aux décharges électrostatiques. Cette stratégie de protection a été réalisée et validée en technologies CMOS avancées par des mesures fréquentielles, électriques et de courant de fuite.
Advanced CMOS technologies provide an easier way to realize radio-frequency integrated circuits (RFICs). However, the lithography dimension shrink make electrostatic discharges (ESD) issues become more significant. Specific ESD protection devices are embedded in RFICs to avoid any damage. Unfortunately, ESD protections parasitic capacitance limits the operating bandwidth of RFICs. ESD protection size dimensions are also an issue for the protection of RFICs, in order to avoid a significant increase in production costs. This work focuses on a broadband ESD solution (DC-100 GHz) able to be implemented in an I/O pad to protect RFICs in advanced CMOS technologies. Thanks to the signal transmission properties of coplanar / microstrip lines, a broadband ESD solution is achieved by implementing ESD components under a transmission line. The silicon proved structure is broadband; it can be used in any RF circuits and fulfill ESD target. The physical dimensions also enable easy on-chip integration.
Advisors/Committee Members: Benech, Pierre (thesis director), Fournier, Jean-Michel (thesis director).
Subjects/Keywords: Fréquences millimétriques; CMOS; Décharges électrostatiques (ESD); RF; Millimeter-wave frequencies (mmW); Advanced CMOS; Electrostatic Discharges (ESD); RF
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Lim, T. F. (2013). Dispositifs de protection contre les décharges électrostatiques pour les applications radio fréquences et millimétriques : Development of an ElectroStatic Discharges (ESD) protection circuit for millimeter-wave frequencies applications. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2013GRENT033
Chicago Manual of Style (16th Edition):
Lim, Tek Fouy. “Dispositifs de protection contre les décharges électrostatiques pour les applications radio fréquences et millimétriques : Development of an ElectroStatic Discharges (ESD) protection circuit for millimeter-wave frequencies applications.” 2013. Doctoral Dissertation, Université de Grenoble. Accessed January 23, 2021.
http://www.theses.fr/2013GRENT033.
MLA Handbook (7th Edition):
Lim, Tek Fouy. “Dispositifs de protection contre les décharges électrostatiques pour les applications radio fréquences et millimétriques : Development of an ElectroStatic Discharges (ESD) protection circuit for millimeter-wave frequencies applications.” 2013. Web. 23 Jan 2021.
Vancouver:
Lim TF. Dispositifs de protection contre les décharges électrostatiques pour les applications radio fréquences et millimétriques : Development of an ElectroStatic Discharges (ESD) protection circuit for millimeter-wave frequencies applications. [Internet] [Doctoral dissertation]. Université de Grenoble; 2013. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2013GRENT033.
Council of Science Editors:
Lim TF. Dispositifs de protection contre les décharges électrostatiques pour les applications radio fréquences et millimétriques : Development of an ElectroStatic Discharges (ESD) protection circuit for millimeter-wave frequencies applications. [Doctoral Dissertation]. Université de Grenoble; 2013. Available from: http://www.theses.fr/2013GRENT033

Linnaeus University
20.
Holmer, Ann-Katrin.
Hållbar utveckling, ska det vara så svårt att förstå? : Pedagogers undervisning om ämnet i förskolan.
Degree: Education, 2015, Linnaeus University
URL: http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-48430
► Utifrån litteratur kan man läsa om vad hållbar utveckling innebär och att det är ett komplext ämne. Det finns däremot inte mycket information som…
(more)
▼ Utifrån litteratur kan man läsa om vad hållbar utveckling innebär och att det är ett komplext ämne. Det finns däremot inte mycket information som visar på hur man inom förskolans verksamhet arbetar med hållbar utveckling. I studien har vi valt presentera olika begrepp samt utgå från både det sociokulturella och pragmatiska perspektivet, för att undersöka våra frågeställningar baserat på barnens intressen och erfarenheter. Det pragmatiska perspektivet är relevant för vår studie, då det visar hur undervisning sker utifrån ett praktiskt lärande där barnen hela tiden är delaktiga. Utifrån det sociokulturella perspektivet vill vi även undersöka hur barnens ålder har betydelse för lärande av hållbar utveckling utifrån den proximala utvecklingszonen. Studiens syfte är att undersöka hur pedagogerna från tre olika förskolor i södra Sverige, förmedlar sina kunskaper till barnen och varför detta är betydelsefullt redan i förskolans verksamhet. Syftet är även att synliggöra hur pedagoger i förskolan tolkar hållbar utveckling utifrån styrdokumenten. Resultatet av studien visar att pedagogerna arbetar med hållbar utveckling genom att bryta ner lärandet i exempelvis olika vardagssituationer, detta för att anpassa undervisningen även till de yngsta barnen. Resultatet visar även att pedagogerna vill arbeta med detta ämne för att få barnen intresserade av vad hållbar utveckling handlar om, bland annat genom att låta barnen få vara med och se matens väg från jord till bord, men också att låta dem får vara med ute i naturen. När barnen får vara delaktiga i undervisningen leder detta till att barnen får ett intresse för att värna för en hållbar framtid.
Based on the literature you can read about what sustainable development means and that it is a complex topic. However, there is not much information that shows how the preschool is working on sustainable development. In the study, we have chosen to present different concepts and adopt both the socio-cultural and pragmatic perspective, to examine our issues based on children's interests and experiences. The pragmatic approach is relevant to our study, as it shows how teaching is based on a practical learning where kids are involved all the time. Based on the socio-cultural perspective, we also want examine how the age of the children is important for learning about sustainable development from the proximal development zone. The study aims at examine how teachers from three different preschools in southern Sweden, convey their knowledge to their children and why this is important already in preschool. It also aims at highlighting how teachers in preschool interpret sustainable development based on the policy documents. The results of the study show that the preschool teachers work with sustainable development by breaking down learning inot, for example, everyday situations, in order to adapt the teaching even for the youngest children. The results also show that teachers want to work with this topic to get kids interested in what…
Subjects/Keywords: Sustainable Development; ESD; Outdoor Education and Preschool.; Hållbar utveckling; ESD; Utomhuspedagogik och Förskola.; Educational Sciences; Utbildningsvetenskap
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APA ·
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MLA ·
Vancouver ·
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APA (6th Edition):
Holmer, A. (2015). Hållbar utveckling, ska det vara så svårt att förstå? : Pedagogers undervisning om ämnet i förskolan. (Thesis). Linnaeus University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-48430
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Holmer, Ann-Katrin. “Hållbar utveckling, ska det vara så svårt att förstå? : Pedagogers undervisning om ämnet i förskolan.” 2015. Thesis, Linnaeus University. Accessed January 23, 2021.
http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-48430.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Holmer, Ann-Katrin. “Hållbar utveckling, ska det vara så svårt att förstå? : Pedagogers undervisning om ämnet i förskolan.” 2015. Web. 23 Jan 2021.
Vancouver:
Holmer A. Hållbar utveckling, ska det vara så svårt att förstå? : Pedagogers undervisning om ämnet i förskolan. [Internet] [Thesis]. Linnaeus University; 2015. [cited 2021 Jan 23].
Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-48430.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Holmer A. Hållbar utveckling, ska det vara så svårt att förstå? : Pedagogers undervisning om ämnet i förskolan. [Thesis]. Linnaeus University; 2015. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-48430
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Jönköping University
21.
Segerström, Emma.
Att förstå komplexiteten i hållbar utveckling : En kvalitativ studie om hur lärare i årskurs 4-6 bedriver undervisning om hållbar utveckling ämnesövergripande i NO & teknik.
Degree: Education and Communication, 2019, Jönköping University
URL: http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-44244
► Allt levande på jorden är beroende av de tillgångar som erhålls av naturens olika ekosystem. På senare tid har dock människans påverkan på miljön…
(more)
▼ Allt levande på jorden är beroende av de tillgångar som erhålls av naturens olika ekosystem. På senare tid har dock människans påverkan på miljön och naturen fått stora konsekvenser som utsätter livet på jorden för fara. Mot denna bakgrund har ett intresse utvecklats för hur lärare bedriver undervisning om hållbar utveckling i syfte att utbilda samhällsmedborgare som besitter handlingsberedskap och konsekvenstänkande. Syftet med studien är därför att undersöka och analysera hur lärare undervisar ämnesövergripande om hållbar utveckling i NO och teknik i årskurs 4-6, samt vilken inställning lärare har till vikten av att behandla hållbar utveckling i dessa åldrar. De forskningsfrågor som används handlar om hur undervisningen organiseras, hur den bedrivs med fokus på de didaktiska frågorna vad, hur och varför samt hur lärarna beskriver att elever mottar undervisning om hållbar utveckling. För att uppnå syftet används en kvalitativ metod i form av semistrukturerade intervjuer med åtta lärare i Sävsjö kommun. Materialet analyseras med hjälp av metoden kvalitativ innehållsanalys. Genom att använda grundtankar ur det sociokulturella perspektivet och gestaltad didaktik möjliggörs ett djup i materialanalysen. Resultatet visar att lärarna i studien anser att hållbar utveckling är ett viktigt ämnesinnehåll i årskurs 4-6. Vidare framhävs att lärarna är medvetna om lärandemiljöns betydelse för inlärning och konkreta exempel ges på hur samtliga lärare arbetar ämnesövergripande om hållbar utveckling i NO och teknik. Lärarna uttrycker att det finns eventuella hinder för ämnesövergripande arbete med hållbar utveckling, men samtidigt är de fördelar som räknas upp övervägande i förhållande till antalet hinder. I beskrivningen av hur elever uppfattar undervisning om hållbar utveckling visar resultatet att de flesta är medvetna och engagerade. Slutsatsen är att ämnesövergripande arbete är positivt för elevers utvecklande av helhetsförståelse för hållbar utveckling.
Life on earth is depending on the assets received from different ecosystems. Lately, the human impact on the environment and nature has resulted in enormous consequences that imply danger to life on earth. Due to this fact, an interest evolved towards how education for sustainable development conducts with the aim to educate citizens to take action and think about the consequences of their choices. The aim of this study is therefore to investigate and analyse how teachers teach sustainable development interdisciplinary in science and technology in grades 4-6 and how important it is according to the teachers. The research questions that are being used is about how education is organized, how it is conducted with focus on the didactic questions what, how and why and how students receive education for sustainable development according to the teachers. To achieve the aim of the study it is carried through by a qualitative method in form of semi-structured interviews with eight teachers in the county of Sävsjö in…
Subjects/Keywords: Sustainable development; teaching; ESD; interdisciplinary; environment; education; Hållbar utveckling; undervisning; ESD; ämnesövergripande; miljö; utbildning; Natural Sciences; Naturvetenskap
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Segerström, E. (2019). Att förstå komplexiteten i hållbar utveckling : En kvalitativ studie om hur lärare i årskurs 4-6 bedriver undervisning om hållbar utveckling ämnesövergripande i NO & teknik. (Thesis). Jönköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-44244
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Segerström, Emma. “Att förstå komplexiteten i hållbar utveckling : En kvalitativ studie om hur lärare i årskurs 4-6 bedriver undervisning om hållbar utveckling ämnesövergripande i NO & teknik.” 2019. Thesis, Jönköping University. Accessed January 23, 2021.
http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-44244.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Segerström, Emma. “Att förstå komplexiteten i hållbar utveckling : En kvalitativ studie om hur lärare i årskurs 4-6 bedriver undervisning om hållbar utveckling ämnesövergripande i NO & teknik.” 2019. Web. 23 Jan 2021.
Vancouver:
Segerström E. Att förstå komplexiteten i hållbar utveckling : En kvalitativ studie om hur lärare i årskurs 4-6 bedriver undervisning om hållbar utveckling ämnesövergripande i NO & teknik. [Internet] [Thesis]. Jönköping University; 2019. [cited 2021 Jan 23].
Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-44244.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Segerström E. Att förstå komplexiteten i hållbar utveckling : En kvalitativ studie om hur lärare i årskurs 4-6 bedriver undervisning om hållbar utveckling ämnesövergripande i NO & teknik. [Thesis]. Jönköping University; 2019. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-44244
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
22.
Dumaz, Philippe.
Comportement électrochimique de matériaux à haut potentiel : LiCoPO4 et LiNi1/3Mn3/2O4, en électrodes couches minces ou composites. : Electrochemical behavior of high potential materials : LiCoPO4 and LiNi1/3Mn3/2O4 as thin films or composites electrodes.
Degree: Docteur es, Matériaux, Mécanique, Génie civil, Electrochimie, 2017, Université Grenoble Alpes (ComUE)
URL: http://www.theses.fr/2017GREAI095
► L'utilisation de sources naturelles illimitées telles que l'énergie solaire, éolienne ou hydraulique est en plein essor. Cependant leurs productions énergétiques sont fortement liées aux conditions…
(more)
▼ L'utilisation de sources naturelles illimitées telles que l'énergie solaire, éolienne ou hydraulique est en plein essor. Cependant leurs productions énergétiques sont fortement liées aux conditions climatiques et sont donc intermittentes. Ces systèmes nécessitent donc d'être associés à du stockage d'énergie, afin de lisser la production avant injection sur le réseau. Pour toutes ces raisons, les batteries Li-ion doivent intégrer de nouveaux matériaux d'électrode permettant d'obtenir une grande puissance et une haute densité d'énergie, tout en conservant une durée de vie élevée et une sécurité d'utilisation.Dans ce contexte, notre travail a consisté à préparer des matériaux à hauts potentiels, le LiCoPO4 (LCP) et le LiNi0.5Mn1.5O4 (LNMO). Ces derniers s'inscrivent parfaitement dans le contexte de développement de matériaux à haute densité d'énergie puisqu'ils possèdent des potentiels d'oxydation de 4,8 et 4,7 V vs Li +/Li et des densités d'énergies massiques théoriques de 802 et 691 Wh.kg-1 par rapport au lithium, respectivement.Ces matériaux ont d'abord été synthétisés sous forme de couches minces afin d'obtenir des électrodes modèles pour étudier de manière fondamentale les propriétés de transport des matériaux et ses interactions en présence d'un électrolyte liquide notamment les phénomènes à l'interface électrode/électrolyte. La compréhension des matériaux acquise au cours de ce premier axe a permis de transposer et d'adapter ces techniques de caractérisation aux systèmes plus complexes que sont les électrodes composites.Les propriétés de ces matériaux vis-à-vis de l'insertion et la désinsertion du lithium ont ensuite été testées et caractérisées en cellules électrochimiques. De nombreux paramètres cinétiques et thermodynamiques ont été extrait grâce à plusieurs techniques électrochimiques telles que la titration intermittente (GITT), la spectroscopie d'impédance (PEIS et GEIS), le cyclage galvano-statique et les tests de puissance. Nous proposons d'ailleurs une méthode simple, à partir de ces tests de puissance, pour déterminer le coefficient de diffusion du lithium. Enfin, nous tentons de répondre à plusieurs questions qui demeurent en suspens concernant la cyclabilité et la perte de capacité de ces matériaux à haut potentiel au cours de cyclage long et nous proposons une technique très simple permettant d'améliorer de façon étonnamment efficace la cyclabilité d'électrodes composites de LNMO.
The use of unlimited natural sources such as solar, wind or hydraulic power is booming. However, their energy production is dependant of climatic conditions and is therefore intermittent. These systems are usually associated with energy storage, in order to smooth the production before injection on the network. For all these reasons, Li-ion batteries need to incorporate new electrode materials to achieve high power and high energy density while maintaining a long life and safe use.In this context, our work consisted in preparing high potential materials, LiCoPO4 (LCP) and LiNi0.5Mn1.5O4 (LNMO). The latter are perfectly…
Advisors/Committee Members: Bouchet, Renaud (thesis director), Rossignol, Cécile (thesis director).
Subjects/Keywords: Batteries lithium-Ion; Ald; Haut potentiel; Lnmo; LiCoPO4; Esd; Lithium-Ion battery; Ald; High potential; Lnmo; LiCoPO4; Esd; 600
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Record Details
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Dumaz, P. (2017). Comportement électrochimique de matériaux à haut potentiel : LiCoPO4 et LiNi1/3Mn3/2O4, en électrodes couches minces ou composites. : Electrochemical behavior of high potential materials : LiCoPO4 and LiNi1/3Mn3/2O4 as thin films or composites electrodes. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2017GREAI095
Chicago Manual of Style (16th Edition):
Dumaz, Philippe. “Comportement électrochimique de matériaux à haut potentiel : LiCoPO4 et LiNi1/3Mn3/2O4, en électrodes couches minces ou composites. : Electrochemical behavior of high potential materials : LiCoPO4 and LiNi1/3Mn3/2O4 as thin films or composites electrodes.” 2017. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed January 23, 2021.
http://www.theses.fr/2017GREAI095.
MLA Handbook (7th Edition):
Dumaz, Philippe. “Comportement électrochimique de matériaux à haut potentiel : LiCoPO4 et LiNi1/3Mn3/2O4, en électrodes couches minces ou composites. : Electrochemical behavior of high potential materials : LiCoPO4 and LiNi1/3Mn3/2O4 as thin films or composites electrodes.” 2017. Web. 23 Jan 2021.
Vancouver:
Dumaz P. Comportement électrochimique de matériaux à haut potentiel : LiCoPO4 et LiNi1/3Mn3/2O4, en électrodes couches minces ou composites. : Electrochemical behavior of high potential materials : LiCoPO4 and LiNi1/3Mn3/2O4 as thin films or composites electrodes. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2017. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2017GREAI095.
Council of Science Editors:
Dumaz P. Comportement électrochimique de matériaux à haut potentiel : LiCoPO4 et LiNi1/3Mn3/2O4, en électrodes couches minces ou composites. : Electrochemical behavior of high potential materials : LiCoPO4 and LiNi1/3Mn3/2O4 as thin films or composites electrodes. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2017. Available from: http://www.theses.fr/2017GREAI095
23.
De conti, Louise.
Conception de protection 3D contre les décharges électrostatiques (ESD) en technologie silicium avancée sur isolant (FD SOI) film mince multi couches : Design of 3D protection against electrostatic discharges (ESD) in advanced silicon on insulator FDSOI thin film multilayer technology.
Degree: Docteur es, Nanoélectronique et nanotechnologie, 2019, Université Grenoble Alpes (ComUE)
URL: http://www.theses.fr/2019GREAT051
► L’objectif de la thèse était de concevoir des composants de protection contre les décharges électrostatiques (ESD) sur film mince de silicium en technologie 28nm FD-SOI…
(more)
▼ L’objectif de la thèse était de concevoir des composants de protection contre les décharges électrostatiques (ESD) sur film mince de silicium en technologie 28nm FD-SOI de chez STMicroelectronics (technologie silicium sur isolant « Silicon-On-Insulator » (SOI) entièrement déplété « Fully Depleted » (FD)). Cette technologie est caractérisée par un film de silicium, un oxyde enterré ultra minces (UTBB), et par une grille métallique avec oxyde à haute permittivité (high-k). En prenant en compte ces caractéristiques, des composants existants ont été étudiés et de nouvelles solutions technologiques ont été proposées pour les améliorer. De plus, de nouveaux composants ont été élaborés. Ils ont été simulés en 3D avec le logiciel TCAD afin de comprendre leur comportement électrique. Des plaques de silicium ont été mesurées afin de vérifier la réponse des composants lors de tests typiques pour les ESD. Ce travail ouvre la voie pour des composants de protection contre les décharges électrostatiques conçus dans le film mince avec une attention spéciale pour l’aspect 3D, tel que (i) la possibilité d’implémenter la protection dans un circuit intégré 3D monolithique, (ii) la conception de matrice en tant que composant de protection, et (iii) la fusion de différents composants pour bénéficier d’une conduction de courant en 3D.
The thesis objective was to design protection devices against electrostatic discharges (ESD) in the silicon thin-film using the 28 nm node ultra-thin Body and Buried Oxide (UTBB) Fully Depleted Silicon-On-Insulator (FD-SOI) technology with high-k metal gate. Existing devices were studied and new technological solutions were proposed to improve them. Besides, new devices were elaborated. 3D TCAD simulation was used for understanding their electrical behavior. Silicon characterization were performed to verify the response of devices to typical ESD tests. This work paves the way of innovative ESD protection devices built in the thin film with a special care given to 3D concerns, such as (i) the possibility of implementing the protection in a 3D monolithic integrated circuit, (ii) building a matrix as a protection device, and (iii) merging different devices such as benefiting from a 3D conduction of current.
Advisors/Committee Members: Galy, Philippe (thesis director), Cristoloveanu, Sorin (thesis director), Vinet, Maud (thesis director).
Subjects/Keywords: Esd; Fd-Soi; 3d; Film mince; Décharges électrostatiques; Tcad; Esd; Fd-Soi; 3d; Thin film; Electrostatic discharges; Tcad; 620
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
De conti, L. (2019). Conception de protection 3D contre les décharges électrostatiques (ESD) en technologie silicium avancée sur isolant (FD SOI) film mince multi couches : Design of 3D protection against electrostatic discharges (ESD) in advanced silicon on insulator FDSOI thin film multilayer technology. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2019GREAT051
Chicago Manual of Style (16th Edition):
De conti, Louise. “Conception de protection 3D contre les décharges électrostatiques (ESD) en technologie silicium avancée sur isolant (FD SOI) film mince multi couches : Design of 3D protection against electrostatic discharges (ESD) in advanced silicon on insulator FDSOI thin film multilayer technology.” 2019. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed January 23, 2021.
http://www.theses.fr/2019GREAT051.
MLA Handbook (7th Edition):
De conti, Louise. “Conception de protection 3D contre les décharges électrostatiques (ESD) en technologie silicium avancée sur isolant (FD SOI) film mince multi couches : Design of 3D protection against electrostatic discharges (ESD) in advanced silicon on insulator FDSOI thin film multilayer technology.” 2019. Web. 23 Jan 2021.
Vancouver:
De conti L. Conception de protection 3D contre les décharges électrostatiques (ESD) en technologie silicium avancée sur isolant (FD SOI) film mince multi couches : Design of 3D protection against electrostatic discharges (ESD) in advanced silicon on insulator FDSOI thin film multilayer technology. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2019. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2019GREAT051.
Council of Science Editors:
De conti L. Conception de protection 3D contre les décharges électrostatiques (ESD) en technologie silicium avancée sur isolant (FD SOI) film mince multi couches : Design of 3D protection against electrostatic discharges (ESD) in advanced silicon on insulator FDSOI thin film multilayer technology. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2019. Available from: http://www.theses.fr/2019GREAT051
24.
Athanasiou, Sotirios.
Conception, fabrication et caractérisation de nouveaux dispositifs de FDSOI avancés pour protection contre les décharges électrostatiques : Conception, fabrication and characterization of new advanced FDSOI devices for ESD robustness and performance.
Degree: Docteur es, Nanoélectronique et nanotechnologie, 2017, Université Grenoble Alpes (ComUE)
URL: http://www.theses.fr/2017GREAT003
► Ce sujet de thèse a pour objectif principal la conception de protection contre les décharges électrostatiques (ESD) en technologie silicium avancée sur isolant film mince…
(more)
▼ Ce sujet de thèse a pour objectif principal la conception de protection contre les décharges électrostatiques (
ESD) en technologie silicium avancée sur isolant film mince (FDSOI) avec la compatibilité substrat massif. Ceci suppose une caractérisation
ESD des dispositifs élémentaires déjà existants et une conception complète de nouveaux dispositifs sur technologie FDSOI. Ces caractérisations se feront, soit en collaboration avec les équipes de caractérisation
ESD présents à STMicroelectronics-Crolles, soit directement par le doctorant grâce au banc de test
ESD présent dans le laboratoire pour les développements plus en amont si besoin. La caractérisation fine des mécanismes physiques et des performances des composants sera menée à IMEP qui dispose des équipements adéquats (bancs de mesures en basse et haute température, bruit, pompage de charge, etc) et d’une compétence scientifique incontournable. Il sera ensuite nécessaire d’effectuer des choix de stratégies de protection
ESD en fonction des applications et des circuits visés par les équipes de STMicroelectronics. On gardera à l’esprit la notion de fiabilité dès la conception de la protection. Une des stratégies envisagée pour la réalisation de protections
ESD compatibles avec des films ultra-minces est l’intégration de ces dispositifs sur substrats hybrides. En effet, il a été démontré chez STMicroelectronics en partenariat avec le LETI qu’il était possible de co-intégrer à partir d’un substrat SOI des dispositifs FDSOI ainsi que des dispositifs bulk. Ceci est rendu possible au moyen d’un réticule supplémentaire qui permet de venir retirer le film de silicium et l’oxyde enterré aux endroits voulus. Ainsi la protection
ESD est similaire à celle réalisée sur silicium massif mais avec des implantations compatibles avec des dispositifs à film mince. Les dispositifs sont donc sensiblement différents de ceux réalisés sur bulk et nécessitent une caractérisation approfondie afin de les optimiser au mieux. Une approche ambitieuse vise à concevoir des composants SOI inédits, utilisables pour la protection
ESD. Ce volet du travail sera en autre effectué sous la responsabilité de l’IMEP qui a récemment inventé et publié plusieurs types de transistors révolutionnaires : Z2-FET, TFET et BET-FET [12-14].Les études se feront sur des dispositifs silicium sur isolant issus des technologies de fabrication STMicroelectronics. Pour ce faire, il sera nécessaire d’appréhender les techniques de fabrication. Dans ce cadre, une simulation des processus de fabrication est envisagée sous la chaîne d’outil ISE-TCAD en C20nm et technologies futures. Tout d’abord ceci permettra d’embrasser l’ensemble des possibilités inhérentes à la création de nouveaux composants dans la technologie considérée et ensuite cette étude préliminaire fournira des structures de simulation pour les configurations
ESD. Parallèlement, les outils TCAD de simulation physique du semi-conducteur à gap indirect type silicium seront mis à profit pour étudier plus précisément le comportement du composant élémentaire de…
Advisors/Committee Members: Cristoloveanu, Sorin (thesis director).
Subjects/Keywords: Fd-Soi; Cmos avancé; Caractérisation electrique; Tcad; Esd; Fabrication; Fd-Soi; Advanced cmos; Electrical characterization; Tcad; Esd; Fabrication; 620
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Athanasiou, S. (2017). Conception, fabrication et caractérisation de nouveaux dispositifs de FDSOI avancés pour protection contre les décharges électrostatiques : Conception, fabrication and characterization of new advanced FDSOI devices for ESD robustness and performance. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2017GREAT003
Chicago Manual of Style (16th Edition):
Athanasiou, Sotirios. “Conception, fabrication et caractérisation de nouveaux dispositifs de FDSOI avancés pour protection contre les décharges électrostatiques : Conception, fabrication and characterization of new advanced FDSOI devices for ESD robustness and performance.” 2017. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed January 23, 2021.
http://www.theses.fr/2017GREAT003.
MLA Handbook (7th Edition):
Athanasiou, Sotirios. “Conception, fabrication et caractérisation de nouveaux dispositifs de FDSOI avancés pour protection contre les décharges électrostatiques : Conception, fabrication and characterization of new advanced FDSOI devices for ESD robustness and performance.” 2017. Web. 23 Jan 2021.
Vancouver:
Athanasiou S. Conception, fabrication et caractérisation de nouveaux dispositifs de FDSOI avancés pour protection contre les décharges électrostatiques : Conception, fabrication and characterization of new advanced FDSOI devices for ESD robustness and performance. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2017. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2017GREAT003.
Council of Science Editors:
Athanasiou S. Conception, fabrication et caractérisation de nouveaux dispositifs de FDSOI avancés pour protection contre les décharges électrostatiques : Conception, fabrication and characterization of new advanced FDSOI devices for ESD robustness and performance. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2017. Available from: http://www.theses.fr/2017GREAT003

Brno University of Technology
25.
Běťák, Petr.
Modelování a návrh ESD ochran v integrovaných obvodech: Modelling and Design of the IC`s ESD Protection Structures.
Degree: 2019, Brno University of Technology
URL: http://hdl.handle.net/11012/3938
► The thesis introduces new semiconductor structures that are used as protections against Electrostatic Discharge occuring in integrated circuits. The fundamental structure for modeling and simulation…
(more)
▼ The thesis introduces new semiconductor structures that are used as protections against Electrostatic Discharge occuring in integrated circuits. The fundamental structure for modeling and simulation has been lateral Silicon Controlled Rectifier. This SCR structure has been modificated to enable tuning of the triggering and holding voltages by changing geometrical mask dimensions. On the base of modeling and simulation the new proposed structures have been published. Also several protection structures have been designed to be manufactured and measured on a testchip. The final electrical behavior has been verified by measurement. Finally, the focus has been aided to protection circuit with bipolar transistor. This approach has been also simulated and verified by measurement. Advantages and disadvantages of the proposed protection structures are commented in the thesis.
Advisors/Committee Members: Musil, Vladislav (advisor), Sládek,, Petr (referee), Bartoň,, Zdeněk (referee).
Subjects/Keywords: ESD; LVTSCR; HVASCR; VLSCR; SCR; tyristor; DIAC; TRIAC; ESD; LVTSCR; HVASCR; VLSCR; SCR; tyristor; DIAC; TRIAC
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APA ·
Chicago ·
MLA ·
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Export
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APA (6th Edition):
Běťák, P. (2019). Modelování a návrh ESD ochran v integrovaných obvodech: Modelling and Design of the IC`s ESD Protection Structures. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/3938
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Běťák, Petr. “Modelování a návrh ESD ochran v integrovaných obvodech: Modelling and Design of the IC`s ESD Protection Structures.” 2019. Thesis, Brno University of Technology. Accessed January 23, 2021.
http://hdl.handle.net/11012/3938.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Běťák, Petr. “Modelování a návrh ESD ochran v integrovaných obvodech: Modelling and Design of the IC`s ESD Protection Structures.” 2019. Web. 23 Jan 2021.
Vancouver:
Běťák P. Modelování a návrh ESD ochran v integrovaných obvodech: Modelling and Design of the IC`s ESD Protection Structures. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Jan 23].
Available from: http://hdl.handle.net/11012/3938.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Běťák P. Modelování a návrh ESD ochran v integrovaných obvodech: Modelling and Design of the IC`s ESD Protection Structures. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/3938
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
26.
Borel, Thomas.
Study of synergistic effects in integrated circuits subjected to ionizing and neutral radiation in space : Etude des effets de synergie dans les circuits intégrés soumis à l'environnement spatial de rayonnements ionisants et neutres.
Degree: Docteur es, Électronique, 2018, Montpellier
URL: http://www.theses.fr/2018MONTS040
► Tout composant envoyé dans l'espace est soumis à de nombreuses contraintes (radiations, température) qui peuvent conduire à une défaillance de l'ensemble du système. Dans un…
(more)
▼ Tout composant envoyé dans l'espace est soumis à de nombreuses contraintes (radiations, température) qui peuvent conduire à une défaillance de l'ensemble du système. Dans un avenir proche, ces contraintes deviendront de plus en plus critiques à mesure que les agences spatiales développeront des missions visant d'autres planètes, telles que Jupiter, pour lesquelles la contrainte radiative est extrême. Dans ce travail, deux types d'effets dus aux radiations sont étudiés : les effets cumulatifs et les effets transitoires. L'un correspond à la dégradation induite par les radiations au cours du temps, tandis que l'autre correspond à un événement ponctuel qui peut se produire à tout moment lorsque le système est dans l'espace. Pour garantir le bon fonctionnement en vol, des normes de qualification des composants électroniques ont été élaborées par différentes agences spatiales. Toutes ces normes précisent que les effets cumulatifs et transitoires doivent être vérifiés à l'aide de composants intacts pour chaque essai. Par conséquent, les effets cumulatifs sont traités séparément des effets transitoires, alors qu'il y a une forte probabilité qu'ils apparaissent simultanément pendant une mission spatiale. L'étude des effets de synergie est alors le thème principal de cette thèse.Sur un amplificateur opérationnel bipolaire, la réponse de sortie du composant due à un événement transitoire est directement liée aux paramètres internes du composant, qui varient sous l’effet des radiations. A l’aide d’une comparaison entre trois amplificateurs opérationnels différents partageant la même référence, l'impact du design sur la dégradation due aux radiation est étudié.Récemment, des défaillances imprévues ont été reportées pour lesquelles le mode de défaillance semblait indiquer qu'une structure de protection contre les décharges électrostatiques (ESD) était en cause. Par conséquent, pour comprendre si ces protections peuvent causer des défaillances inattendues, la dégradation des « Gate Grounded n-MOSFET » (GGnMOS) est également étudiée.
Any system sent to space is submitted to many constraints (radiations, temperature) which may lead to a failure of the whole system. In a close future, these constraints will become more and more critical as the space agencies are developing missions aiming at others planets such as Jupiter for which the radiative constraint is extremely harsh. In this work, two types of radiation effects are studied: the cumulative effects and the transient effects. One corresponds to the radiation-induced degradation over time, while the other corresponds to a punctual event that can happen at any time when the system is in space. To ensure a proper functioning of a system sent to space, qualifications standards for electronic components have been developed by different space agencies. All of these standards specify that the components must be tested for cumulative and transient effects, using pristine components for each test. Therefore, cumulative effects are treated separately from transient effects, while…
Advisors/Committee Members: Dusseau, Laurent (thesis director).
Subjects/Keywords: Electronique; Radiation; Effet de synergie; Bipolaire; Protection ESD; Décharge Electrostatic; Electronics; Radiation; Synergistic effects; Bipolar; ESD protection; Electrostatic Discharges
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Borel, T. (2018). Study of synergistic effects in integrated circuits subjected to ionizing and neutral radiation in space : Etude des effets de synergie dans les circuits intégrés soumis à l'environnement spatial de rayonnements ionisants et neutres. (Doctoral Dissertation). Montpellier. Retrieved from http://www.theses.fr/2018MONTS040
Chicago Manual of Style (16th Edition):
Borel, Thomas. “Study of synergistic effects in integrated circuits subjected to ionizing and neutral radiation in space : Etude des effets de synergie dans les circuits intégrés soumis à l'environnement spatial de rayonnements ionisants et neutres.” 2018. Doctoral Dissertation, Montpellier. Accessed January 23, 2021.
http://www.theses.fr/2018MONTS040.
MLA Handbook (7th Edition):
Borel, Thomas. “Study of synergistic effects in integrated circuits subjected to ionizing and neutral radiation in space : Etude des effets de synergie dans les circuits intégrés soumis à l'environnement spatial de rayonnements ionisants et neutres.” 2018. Web. 23 Jan 2021.
Vancouver:
Borel T. Study of synergistic effects in integrated circuits subjected to ionizing and neutral radiation in space : Etude des effets de synergie dans les circuits intégrés soumis à l'environnement spatial de rayonnements ionisants et neutres. [Internet] [Doctoral dissertation]. Montpellier; 2018. [cited 2021 Jan 23].
Available from: http://www.theses.fr/2018MONTS040.
Council of Science Editors:
Borel T. Study of synergistic effects in integrated circuits subjected to ionizing and neutral radiation in space : Etude des effets de synergie dans les circuits intégrés soumis à l'environnement spatial de rayonnements ionisants et neutres. [Doctoral Dissertation]. Montpellier; 2018. Available from: http://www.theses.fr/2018MONTS040

NSYSU
27.
Fu, Cheng-yun.
Deposition of porous LSCF films by EAVD method.
Degree: Master, Materials Science and Engineering, 2004, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825104-113011
► In this study, a deposition system called EAVD was made to deposite porous LSCF films used as cathode material in the solid oxide fuel cell…
(more)
▼ In this study, a deposition system called EAVD was made to deposite porous LSCF films used as cathode material in the solid oxide fuel cell (SOFC). The relation of deposition parameters to morphology was discussed. Porous La0.8Sr0.2Co0.2Fe0.8O3 films were successfully deposited on Corning glass and ceria substrates, and a pseudo-cubic perovskite phase was obtained after a post-calcination at 750â for 2 hrs.
Deposition parameters, such as deposition time, deposition temperature, flow rate, voltage applied, different kinds of set-ups (downward spraying or upward spraying), were discussed. The obtained calcined films were characterized by X-ray diffraction (XRD) and energy dispersive X-ray analysis (EDX). On the other hand, surface and cross-section morphology were examined using SEM.
In the series using downward spraying system, deposition temperature and deposition time showed profound effect on morphology. With increasing the extent of these two factors, porous films were obtained. With decreasing the extent of these two factors, however, dense films were obtained. The effects of other parameters to morphology were less obvious. Under proper conditions, cauliflower-like films with high porosity were obtained.
In the series using upward spraying system (vertical set-up), reticular films were successfully obtained using deposition temperature ranging from 275~320â, flow rate 1.0~1.5 ml/hr, and deposition time within 2 hrs. In the series of flow rate, the pores of reticular structure seemed to grow up with increasing flow rate. Under the condition of prolonged deposition (4 hrs), a stalactitc structure with micropores on it was obtained. The highly porous structures obtained in this study are very suitable for applications in gas sensor and electrodes in SOFC.
Advisors/Committee Members: Bing-hwait Hwang (committee member), Hong-yang Lu (chair), Bae-heng Tseng (chair), Tzu-chien Hsu (chair).
Subjects/Keywords: SOFC; EAVD; CATHODE; LSCF; ESD
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Fu, C. (2004). Deposition of porous LSCF films by EAVD method. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825104-113011
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Fu, Cheng-yun. “Deposition of porous LSCF films by EAVD method.” 2004. Thesis, NSYSU. Accessed January 23, 2021.
http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825104-113011.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Fu, Cheng-yun. “Deposition of porous LSCF films by EAVD method.” 2004. Web. 23 Jan 2021.
Vancouver:
Fu C. Deposition of porous LSCF films by EAVD method. [Internet] [Thesis]. NSYSU; 2004. [cited 2021 Jan 23].
Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825104-113011.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Fu C. Deposition of porous LSCF films by EAVD method. [Thesis]. NSYSU; 2004. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825104-113011
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

University of California – Riverside
28.
Wang, Chenkun.
Radio Frequency Switch Design with Interference Suppression and Electrostatic Discharge for 5th Generation of Mobile Network.
Degree: Electrical Engineering, 2018, University of California – Riverside
URL: http://www.escholarship.org/uc/item/7cc3p5vs
► In the next few years, the 5th generation of mobile network employing the massive multiple input multiple output (MIMO), beam-forming, mm-wave frequency bands and carrier…
(more)
▼ In the next few years, the 5th generation of mobile network employing the massive multiple input multiple output (MIMO), beam-forming, mm-wave frequency bands and carrier aggregation techniques will further increase the data rate to enrich the growing of mobile devices at the price of more complex multi-band, multi-frequency front end module (FEM). As an indispensable part of radio-frequency front end (RFFE), antenna switch circuit needs more restrict performance not only the basic insertion loss, isolation and power handling capability, but the requirements from higher data rate, low interference and better reliability of 5G application. To achieve those additional requirements for 5G RF switch with 45nm silicon-on-insulator (SOI) CMOS technology, this dissertation presents a novel multi-bands switch array structure to analysis the interference between switches in a single chip. The comprehensive study of switch array reveals that existing noise isolation techniques are insufficient and calls for novel in-die interference elimination. To reduce this in-die crosstalk, an above-silicon through back-end-of-line (BEOL) metal wall is developed as a practical solution with about 18.5dB (~98.6%) suppression. To reach a higher data rate with available frequency bands, millimeter wave (mm-wave) switches (28GHz/38GHz) has been demonstrated with the consideration of reliability issue of electrostatic discharge (ESD) which will introduce severe parasitic effects under this frequency level and degrade the performance of RFICs. The insertion loss and isolation together with ESD protection capability have been compared which shows the importance of ESD-RFIC co-design. Considering the necessity of accurate estimation for ESD performance, a novel methodology for both human body model (HBM) and charged device model (CDM) ESD protections using combined TCAD simulation and TLP/VFTLP measurements is depicted. To improve the accuracy of parasitic capacitance extraction, this dissertation introduces an enhanced de-embedded method with the help of HFSS simulation which reduces one third of the testchip size and gives a better reference for co-design.
Subjects/Keywords: Electrical engineering; 5G; CMOS; ESD; isolation; RFIC; switch
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Wang, C. (2018). Radio Frequency Switch Design with Interference Suppression and Electrostatic Discharge for 5th Generation of Mobile Network. (Thesis). University of California – Riverside. Retrieved from http://www.escholarship.org/uc/item/7cc3p5vs
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Wang, Chenkun. “Radio Frequency Switch Design with Interference Suppression and Electrostatic Discharge for 5th Generation of Mobile Network.” 2018. Thesis, University of California – Riverside. Accessed January 23, 2021.
http://www.escholarship.org/uc/item/7cc3p5vs.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Wang, Chenkun. “Radio Frequency Switch Design with Interference Suppression and Electrostatic Discharge for 5th Generation of Mobile Network.” 2018. Web. 23 Jan 2021.
Vancouver:
Wang C. Radio Frequency Switch Design with Interference Suppression and Electrostatic Discharge for 5th Generation of Mobile Network. [Internet] [Thesis]. University of California – Riverside; 2018. [cited 2021 Jan 23].
Available from: http://www.escholarship.org/uc/item/7cc3p5vs.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Wang C. Radio Frequency Switch Design with Interference Suppression and Electrostatic Discharge for 5th Generation of Mobile Network. [Thesis]. University of California – Riverside; 2018. Available from: http://www.escholarship.org/uc/item/7cc3p5vs
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

University of California – Riverside
29.
Wang, Xin.
Full-Band Impulse-Radio Ultra Wideband Transceivers With Integrated ESD Protection.
Degree: Electrical Engineering, 2011, University of California – Riverside
URL: http://www.escholarship.org/uc/item/68x477nd
► The past decade has witnessed rapid proliferation of wireless communications, which continues to enjoy a booming growth driven by unprecedented technology advances and strong consumer…
(more)
▼ The past decade has witnessed rapid proliferation of wireless communications, which continues to enjoy a booming growth driven by unprecedented technology advances and strong consumer demands. New wireless technologies are being developed to provide people with high-speed low-cost multi-mode multi-task wireless communication environments with high quality of service (QoS). Of all the proposed wireless techniques, ultra wideband (UWB) is a promising technology, which becomes a front contender for various extremely high data throughput wireless applications, particularly for wireless video streaming and wireless sea-volume data transformation typically requiring a data speed up to several giga bit per second (Gbps).This dissertation describes research and integrated circuit (IC) implementation of a single-full-band carrier-free impulse-radio ultra wideband (IR-UWB) system. The IR-UWB transceiver adopts a simple-most-digital architecture with low design complexity, aiming to achieve the whole IR-UWB system-on-a-chip (SoC) in standard complementary metal-oxide-semiconductor (CMOS) process. Detail analysis for the IR-UWB system architecture is provided. Critical circuit building blocks, such as pulse generator (PG), BPSK modulation, receiver front-end low-noise amplifier (LNA) and correlator, are described both theoretically and experimentally. Adequate on-chip electrostatic discharge (ESD) protection is required for all IC chips and ESD protection design for radio-frequency (RF) IC emerges as a challenging design task as semiconductor IC technologies continue to advance into the very-deep-sub-micron (VDSM) regime. ESD protection for IR-UWB ICs is more challenging compared with narrow band IC designs. In this thesis, a novel ESD-RFIC co-design technique for UWB ICs was developed and experimentally verified. The interactions between ESD protection unit and core UWB IC were thoroughly investigated. The IR-UWB transmitter, front-end LNA and correlator ICs were designed with full ESD protection using the new ESD-RFIC co-design technique in this work.
Subjects/Keywords: Electrical Engineering; Co-design; ESD; Impulse Radio; RFIC; Transceiver; UWB
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Wang, X. (2011). Full-Band Impulse-Radio Ultra Wideband Transceivers With Integrated ESD Protection. (Thesis). University of California – Riverside. Retrieved from http://www.escholarship.org/uc/item/68x477nd
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Wang, Xin. “Full-Band Impulse-Radio Ultra Wideband Transceivers With Integrated ESD Protection.” 2011. Thesis, University of California – Riverside. Accessed January 23, 2021.
http://www.escholarship.org/uc/item/68x477nd.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Wang, Xin. “Full-Band Impulse-Radio Ultra Wideband Transceivers With Integrated ESD Protection.” 2011. Web. 23 Jan 2021.
Vancouver:
Wang X. Full-Band Impulse-Radio Ultra Wideband Transceivers With Integrated ESD Protection. [Internet] [Thesis]. University of California – Riverside; 2011. [cited 2021 Jan 23].
Available from: http://www.escholarship.org/uc/item/68x477nd.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Wang X. Full-Band Impulse-Radio Ultra Wideband Transceivers With Integrated ESD Protection. [Thesis]. University of California – Riverside; 2011. Available from: http://www.escholarship.org/uc/item/68x477nd
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

University of Michigan
30.
Chen, Yen-Po.
Low Power Techniques for Analog Building Blocks of the Ultra Low Power Systems.
Degree: PhD, Electrical Engineering, 2016, University of Michigan
URL: http://hdl.handle.net/2027.42/135872
► By the Moore’s law of technology scaling and Bell’s Law of prediction on the next generation small form factor computer class, the mm-scale sensor nodes…
(more)
▼ By the Moore’s law of technology scaling and Bell’s Law of prediction on the next generation small form factor computer class, the mm-scale sensor nodes are widely considered to be the next generation of computer class. With the limited size of the sensor nodes, the capacity of the battery is extremely small or can be even battery less. Therefore, the ultra-low power design technique is critical for those sensor nodes to sustain reasonable lifetime.
Among all the building blocks of those sensor nodes, power consumption of analog parts benefits least from the technology scaling compared to the digital and the memory counterparts and widely becomes the dominant part of the power consumption of the system. Therefore, this thesis is focus on bringing down the power consumption of the analog circuits. The following techniques are described in this thesis with the order: First, an advanced sample and hold technique for bandgap voltage reference to duty-cycled the blocks and reducing the power consumption is presented. Second, a technique for reducing leakage power of the
ESD clamp circuits by addressing both GIDL leakage and subthreshold leakage is presented. Third, a new trade-off technique between noise and bandwidth for the amplifier design is established in an ECG amplifier example. Fourth, an ECG sensor system shows the possibility to bring down the analog power consumption and balance the power consumption between analog and digital blocks by co-design with digital algorithm.
Advisors/Committee Members: Sylvester, Dennis Michael (committee member), Chestek, Cynthia Anne (committee member), Blaauw, David (committee member), Wentzloff, David D (committee member).
Subjects/Keywords: Circuits; Low Power; Analog; Bandgap; ESD; ECG; Electrical Engineering; Engineering
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Chen, Y. (2016). Low Power Techniques for Analog Building Blocks of the Ultra Low Power Systems. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/135872
Chicago Manual of Style (16th Edition):
Chen, Yen-Po. “Low Power Techniques for Analog Building Blocks of the Ultra Low Power Systems.” 2016. Doctoral Dissertation, University of Michigan. Accessed January 23, 2021.
http://hdl.handle.net/2027.42/135872.
MLA Handbook (7th Edition):
Chen, Yen-Po. “Low Power Techniques for Analog Building Blocks of the Ultra Low Power Systems.” 2016. Web. 23 Jan 2021.
Vancouver:
Chen Y. Low Power Techniques for Analog Building Blocks of the Ultra Low Power Systems. [Internet] [Doctoral dissertation]. University of Michigan; 2016. [cited 2021 Jan 23].
Available from: http://hdl.handle.net/2027.42/135872.
Council of Science Editors:
Chen Y. Low Power Techniques for Analog Building Blocks of the Ultra Low Power Systems. [Doctoral Dissertation]. University of Michigan; 2016. Available from: http://hdl.handle.net/2027.42/135872
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