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University of Texas – Austin

1. -9907-6069. Simulation and optimization techniques applied in semiconductor assembly and test operations.

Degree: PhD, Operations research and industrial engineering, 2016, University of Texas – Austin

The importance of back-end operations in semiconductor manufacturing has been growing steadily in the face of higher customer expectations and stronger competition in the industry. In order to achieve low cycle times, high throughput, and high utilization while improving due-date performance, more effective tools are needed to support machine setup and lot dispatching decisions. In previous work, the problem of maximizing the weighted throughput of lots undergoing assembly and test (AT), while ensuring that critical lots are given priority, was investigated and a greedy randomized adaptive search procedure (GRASP) developed to find solutions. Optimization techniques have long been used for scheduling manufacturing operations on a daily basis. Solutions provide a prescription for machine setups and job processing over a finite the planning horizon. In contrast, simulation provides more detail but in a normative sense. It tells you how the system will evolve in real time for a given demand, a given set of resources and rules for using them. A simulation model can also accommodate changeovers, initial setups and multi-pass requirements easily. The first part of the research is to show how the results of an optimization model can be integrated with the decisions made within a simulation model. The problem addressed is defined in terms of four hierarchical objectives: minimize the weighted sum of key device shortages, maximize weighted throughput, minimize the number of machines used, and minimize makespan for a given set of lots in queue, and a set of resources that includes machines and tooling. The facility can be viewed as a reentrant flow shop. The basic simulation was written in AutoSched AP (ASAP) and then enhanced with the help of customization features available in the software. Several new dispatch rules were developed. Rule_First_setup is able to initialize the simulation with the setups obtained with the GRASP. Rule_All_setups enables a machine to select the setup provided by the optimization solution whenever a decision is about to be made on which setup to choose subsequent to the initial setup. Rule_Hotlot was also proposed to prioritize the processing of the hot lots that contain key devices. The objective of the second part of the research is to design and implement heuristics within the simulation model to schedule back-end operations in a semiconductor AT facility. Rule_Setupnum lets the machines determine which key device to process according to a machine setup frequency table constructed from the GRASP solution. GRASP_asap embeds a more robust selection features of GRASP in the ASAP model through customization. This allows ASAP to explore a larger portion of the feasible region at each decision point by randomizing machine setups using adaptive probability distributions that are a function of solution quality. Rule_Greedy, which is a simplification of GRASP_asap, always picks the setup for a particular machine that gives the greatest marginal improvement in the objective function among all candidates.… Advisors/Committee Members: Bard, Jonathan F. (advisor), Morrice, Douglas J (committee member), Hasenbein, John (committee member), Khajavirad, Aida (committee member), Gao, Zhufeng (committee member).

Subjects/Keywords: Semiconductor assembly and test; AutoSched; GRASP; Dispatch rules; Statistical analysis; Machine setup; Reentrant flow

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APA (6th Edition):

-9907-6069. (2016). Simulation and optimization techniques applied in semiconductor assembly and test operations. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/40318

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Chicago Manual of Style (16th Edition):

-9907-6069. “Simulation and optimization techniques applied in semiconductor assembly and test operations.” 2016. Doctoral Dissertation, University of Texas – Austin. Accessed February 28, 2021. http://hdl.handle.net/2152/40318.

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Author name may be incomplete

MLA Handbook (7th Edition):

-9907-6069. “Simulation and optimization techniques applied in semiconductor assembly and test operations.” 2016. Web. 28 Feb 2021.

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Author name may be incomplete

Vancouver:

-9907-6069. Simulation and optimization techniques applied in semiconductor assembly and test operations. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2016. [cited 2021 Feb 28]. Available from: http://hdl.handle.net/2152/40318.

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Author name may be incomplete

Council of Science Editors:

-9907-6069. Simulation and optimization techniques applied in semiconductor assembly and test operations. [Doctoral Dissertation]. University of Texas – Austin; 2016. Available from: http://hdl.handle.net/2152/40318

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

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