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Degree: MS

You searched for subject:(DAC). Showing records 1 – 12 of 12 total matches.

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Oregon State University

1. Behera, Prachee Shree. A MOSCAP pipeline pseudo passive DAC.

Degree: MS, Electrical and Computer Engineering, 2005, Oregon State University

 The design of a 10-bit pipelined charge redistribution DAC employing MOSCAPs biased in their accumulation mode is presented in this thesis. A switched capacitor filter… (more)

Subjects/Keywords: DAC; Capacitors

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APA (6th Edition):

Behera, P. S. (2005). A MOSCAP pipeline pseudo passive DAC. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/465

Chicago Manual of Style (16th Edition):

Behera, Prachee Shree. “A MOSCAP pipeline pseudo passive DAC.” 2005. Masters Thesis, Oregon State University. Accessed July 21, 2019. http://hdl.handle.net/1957/465.

MLA Handbook (7th Edition):

Behera, Prachee Shree. “A MOSCAP pipeline pseudo passive DAC.” 2005. Web. 21 Jul 2019.

Vancouver:

Behera PS. A MOSCAP pipeline pseudo passive DAC. [Internet] [Masters thesis]. Oregon State University; 2005. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1957/465.

Council of Science Editors:

Behera PS. A MOSCAP pipeline pseudo passive DAC. [Masters Thesis]. Oregon State University; 2005. Available from: http://hdl.handle.net/1957/465


Oregon State University

2. Kuo, Ming-Hung. Low-power high-linearity digital-to-analog converters.

Degree: MS, Electrical and Computer Engineering, 2012, Oregon State University

 In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8 (LSB)… (more)

Subjects/Keywords: DAC; Digital-to-analog converters  – Design and construction

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APA (6th Edition):

Kuo, M. (2012). Low-power high-linearity digital-to-analog converters. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/28313

Chicago Manual of Style (16th Edition):

Kuo, Ming-Hung. “Low-power high-linearity digital-to-analog converters.” 2012. Masters Thesis, Oregon State University. Accessed July 21, 2019. http://hdl.handle.net/1957/28313.

MLA Handbook (7th Edition):

Kuo, Ming-Hung. “Low-power high-linearity digital-to-analog converters.” 2012. Web. 21 Jul 2019.

Vancouver:

Kuo M. Low-power high-linearity digital-to-analog converters. [Internet] [Masters thesis]. Oregon State University; 2012. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1957/28313.

Council of Science Editors:

Kuo M. Low-power high-linearity digital-to-analog converters. [Masters Thesis]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/28313


Texas A&M University

3. Bommireddipalli, Aditya Vighnesh Ramakanth. Design of a Precision Low Voltage Resistor Multiplying Digital-to-Analog Converter.

Degree: MS, Electrical Engineering, 2017, Texas A&M University

 This work aims to model the effect of the input offset voltage of an operational amplifier on the performance of a high-precision, voltage-mode, resistor-based multiplying… (more)

Subjects/Keywords: DAC; input offset voltage; high-precision; current buffer

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APA (6th Edition):

Bommireddipalli, A. V. R. (2017). Design of a Precision Low Voltage Resistor Multiplying Digital-to-Analog Converter. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/165708

Chicago Manual of Style (16th Edition):

Bommireddipalli, Aditya Vighnesh Ramakanth. “Design of a Precision Low Voltage Resistor Multiplying Digital-to-Analog Converter.” 2017. Masters Thesis, Texas A&M University. Accessed July 21, 2019. http://hdl.handle.net/1969.1/165708.

MLA Handbook (7th Edition):

Bommireddipalli, Aditya Vighnesh Ramakanth. “Design of a Precision Low Voltage Resistor Multiplying Digital-to-Analog Converter.” 2017. Web. 21 Jul 2019.

Vancouver:

Bommireddipalli AVR. Design of a Precision Low Voltage Resistor Multiplying Digital-to-Analog Converter. [Internet] [Masters thesis]. Texas A&M University; 2017. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1969.1/165708.

Council of Science Editors:

Bommireddipalli AVR. Design of a Precision Low Voltage Resistor Multiplying Digital-to-Analog Converter. [Masters Thesis]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/165708


Florida International University

4. Hadjikhani, Ali. Raman Spectroscopy Study of Graphene Under High Pressure.

Degree: MS, Materials Science and Engineering, 2012, Florida International University

  Due to its exceptional mechanical and electrical properties, graphene (one layer sheet of carbon atoms) has attracted a lot of attention since its discovery… (more)

Subjects/Keywords: Graphene; High Pressure; DAC; Diamond Anvil Cell; Raman Spectroscopy

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APA (6th Edition):

Hadjikhani, A. (2012). Raman Spectroscopy Study of Graphene Under High Pressure. (Thesis). Florida International University. Retrieved from http://digitalcommons.fiu.edu/etd/656 ; 10.25148/etd.FI12071109 ; FI12071109

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hadjikhani, Ali. “Raman Spectroscopy Study of Graphene Under High Pressure.” 2012. Thesis, Florida International University. Accessed July 21, 2019. http://digitalcommons.fiu.edu/etd/656 ; 10.25148/etd.FI12071109 ; FI12071109.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hadjikhani, Ali. “Raman Spectroscopy Study of Graphene Under High Pressure.” 2012. Web. 21 Jul 2019.

Vancouver:

Hadjikhani A. Raman Spectroscopy Study of Graphene Under High Pressure. [Internet] [Thesis]. Florida International University; 2012. [cited 2019 Jul 21]. Available from: http://digitalcommons.fiu.edu/etd/656 ; 10.25148/etd.FI12071109 ; FI12071109.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hadjikhani A. Raman Spectroscopy Study of Graphene Under High Pressure. [Thesis]. Florida International University; 2012. Available from: http://digitalcommons.fiu.edu/etd/656 ; 10.25148/etd.FI12071109 ; FI12071109

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Boston University

5. Kittredge, Jeffrey Prax. High voltage, high resolution, digital-to-analog converter for driving deformable mirrors.

Degree: MS, Electrical & Computer Engineering, 2015, Boston University

 Digital-to-analog converters with a range over 50 volts are required for driving micro-electro mechanical system deformable mirrors used in adaptive optics. An existing tested and… (more)

Subjects/Keywords: Electrical engineering; DAC; Deformable; Driver; Mirror; Floating; Ground

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APA (6th Edition):

Kittredge, J. P. (2015). High voltage, high resolution, digital-to-analog converter for driving deformable mirrors. (Masters Thesis). Boston University. Retrieved from http://hdl.handle.net/2144/15209

Chicago Manual of Style (16th Edition):

Kittredge, Jeffrey Prax. “High voltage, high resolution, digital-to-analog converter for driving deformable mirrors.” 2015. Masters Thesis, Boston University. Accessed July 21, 2019. http://hdl.handle.net/2144/15209.

MLA Handbook (7th Edition):

Kittredge, Jeffrey Prax. “High voltage, high resolution, digital-to-analog converter for driving deformable mirrors.” 2015. Web. 21 Jul 2019.

Vancouver:

Kittredge JP. High voltage, high resolution, digital-to-analog converter for driving deformable mirrors. [Internet] [Masters thesis]. Boston University; 2015. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/2144/15209.

Council of Science Editors:

Kittredge JP. High voltage, high resolution, digital-to-analog converter for driving deformable mirrors. [Masters Thesis]. Boston University; 2015. Available from: http://hdl.handle.net/2144/15209


Virginia Tech

6. Perry, Jonathan. Digital to Analog Converter Design using Single Electron Transistors.

Degree: MS, Electrical and Computer Engineering, 2005, Virginia Tech

 CMOS Technology has advanced for decades under the rule of Moore's law. But all good things must come to an end. Researchers estimate that CMOS… (more)

Subjects/Keywords: Single Electron Transistor; SET; DAC; Nanotechnology

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APA (6th Edition):

Perry, J. (2005). Digital to Analog Converter Design using Single Electron Transistors. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/33871

Chicago Manual of Style (16th Edition):

Perry, Jonathan. “Digital to Analog Converter Design using Single Electron Transistors.” 2005. Masters Thesis, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/33871.

MLA Handbook (7th Edition):

Perry, Jonathan. “Digital to Analog Converter Design using Single Electron Transistors.” 2005. Web. 21 Jul 2019.

Vancouver:

Perry J. Digital to Analog Converter Design using Single Electron Transistors. [Internet] [Masters thesis]. Virginia Tech; 2005. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/33871.

Council of Science Editors:

Perry J. Digital to Analog Converter Design using Single Electron Transistors. [Masters Thesis]. Virginia Tech; 2005. Available from: http://hdl.handle.net/10919/33871


Brigham Young University

7. Savory, Daniel Chase. Power Side-Channel DAC Implementations for Xilinx FPGAs.

Degree: MS, 2014, Brigham Young University

 This thesis presents a novel power side-channel DAC (PS-DAC) which is constructed from user-controllable short circuits in FPGAs and which manipulate overall system power through… (more)

Subjects/Keywords: power; side channel; FPGA; Xilinx; killswitch; virus; DAC; short circuit; watermark; Electrical and Computer Engineering

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APA (6th Edition):

Savory, D. C. (2014). Power Side-Channel DAC Implementations for Xilinx FPGAs. (Masters Thesis). Brigham Young University. Retrieved from https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=5037&context=etd

Chicago Manual of Style (16th Edition):

Savory, Daniel Chase. “Power Side-Channel DAC Implementations for Xilinx FPGAs.” 2014. Masters Thesis, Brigham Young University. Accessed July 21, 2019. https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=5037&context=etd.

MLA Handbook (7th Edition):

Savory, Daniel Chase. “Power Side-Channel DAC Implementations for Xilinx FPGAs.” 2014. Web. 21 Jul 2019.

Vancouver:

Savory DC. Power Side-Channel DAC Implementations for Xilinx FPGAs. [Internet] [Masters thesis]. Brigham Young University; 2014. [cited 2019 Jul 21]. Available from: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=5037&context=etd.

Council of Science Editors:

Savory DC. Power Side-Channel DAC Implementations for Xilinx FPGAs. [Masters Thesis]. Brigham Young University; 2014. Available from: https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=5037&context=etd


University of Illinois – Urbana-Champaign

8. Comberiate, Thomas M. Phase noise and spur reduction in an array of direct digital synthesizers.

Degree: MS, 1200, 2010, University of Illinois – Urbana-Champaign

 Many applications, including communications, test and measurement, and radar, require the generation of signals with a high degree of spectral purity. One method for producing… (more)

Subjects/Keywords: direct digital synthesis (DDS); direct digital synthesizer; array; phase noise; spurs; phase truncation; quantization noise; nonlinear; Nonlinearity; digital-to-analog converter (DAC); sine look-up table

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APA (6th Edition):

Comberiate, T. M. (2010). Phase noise and spur reduction in an array of direct digital synthesizers. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/16173

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Comberiate, Thomas M. “Phase noise and spur reduction in an array of direct digital synthesizers.” 2010. Thesis, University of Illinois – Urbana-Champaign. Accessed July 21, 2019. http://hdl.handle.net/2142/16173.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Comberiate, Thomas M. “Phase noise and spur reduction in an array of direct digital synthesizers.” 2010. Web. 21 Jul 2019.

Vancouver:

Comberiate TM. Phase noise and spur reduction in an array of direct digital synthesizers. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2010. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/2142/16173.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Comberiate TM. Phase noise and spur reduction in an array of direct digital synthesizers. [Thesis]. University of Illinois – Urbana-Champaign; 2010. Available from: http://hdl.handle.net/2142/16173

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

9. Chen, Weiqun. A Microcontroller Configured Active Analog Phase Shifter at 1.96GHz.

Degree: MS, Engineering : Electrical Engineering, 2010, University of Cincinnati

  For digital mobile phone services in Canada, Mexico and the United States, Personal Communications Service (PCS) is one of the most popular standards, and… (more)

Subjects/Keywords: Electrical Engineering; Phase Shifter; Active; Analog; Microcontroller; compensation non-linearity; DAC

…41 Figure 4-6: DAC mini board [36]… …42 Figure 4-7: DAC SPI writing sequence [35]… …43 Figure 4-8: DAC SPI timing [35]… …46 Figure 4-11: DAC MCP4922 and power schematic… …47 Figure 4-12: Connection of the MCU/DAC/RF boards… 

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APA (6th Edition):

Chen, W. (2010). A Microcontroller Configured Active Analog Phase Shifter at 1.96GHz. (Masters Thesis). University of Cincinnati. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=ucin1273841250

Chicago Manual of Style (16th Edition):

Chen, Weiqun. “A Microcontroller Configured Active Analog Phase Shifter at 1.96GHz.” 2010. Masters Thesis, University of Cincinnati. Accessed July 21, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1273841250.

MLA Handbook (7th Edition):

Chen, Weiqun. “A Microcontroller Configured Active Analog Phase Shifter at 1.96GHz.” 2010. Web. 21 Jul 2019.

Vancouver:

Chen W. A Microcontroller Configured Active Analog Phase Shifter at 1.96GHz. [Internet] [Masters thesis]. University of Cincinnati; 2010. [cited 2019 Jul 21]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=ucin1273841250.

Council of Science Editors:

Chen W. A Microcontroller Configured Active Analog Phase Shifter at 1.96GHz. [Masters Thesis]. University of Cincinnati; 2010. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=ucin1273841250


North Carolina State University

10. Singh, Praveen Rajan. Micro-stimulator design for Retinal Prostheses.

Degree: MS, Electrical Engineering, 2004, North Carolina State University

 The purpose of this research is to design an integrated circuit (IC) to stimulate retina. The IC will be able to generate electrical stimulus specified… (more)

Subjects/Keywords: charge neutrality; discharge; demultiplexing; low power; prosthesis; prostheses; retina; DAC; current mirror; stimulator; retinal

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APA (6th Edition):

Singh, P. R. (2004). Micro-stimulator design for Retinal Prostheses. (Thesis). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/528

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Singh, Praveen Rajan. “Micro-stimulator design for Retinal Prostheses.” 2004. Thesis, North Carolina State University. Accessed July 21, 2019. http://www.lib.ncsu.edu/resolver/1840.16/528.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Singh, Praveen Rajan. “Micro-stimulator design for Retinal Prostheses.” 2004. Web. 21 Jul 2019.

Vancouver:

Singh PR. Micro-stimulator design for Retinal Prostheses. [Internet] [Thesis]. North Carolina State University; 2004. [cited 2019 Jul 21]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/528.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Singh PR. Micro-stimulator design for Retinal Prostheses. [Thesis]. North Carolina State University; 2004. Available from: http://www.lib.ncsu.edu/resolver/1840.16/528

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

11. Gaddam, Ravi Shankar. A 10-Bit Dual Plate Sampling Capacitive DAC with Auto-Zero On-Chip Reference Voltage Generation.

Degree: MS, Electrical Engineering, 2012, University of Akron

 In this thesis, a 10-bit dual plate sampling capacitor DAC with reduced offset internal reference voltage generation is proposed. Instead of using the conventional two… (more)

Subjects/Keywords: Electrical Engineering; Engineering; Dual plate sampling; switched-capacitor circuit; digital-to-analog converter; auto-zero technique; DAC; display driver; 10-bit; reference generator

…80 5.17 Layout area occupied by each block of the DAC… …x29; Internal blocks of LCD column driver ..................... 2 2.1 N-bit DAC… …5 2.2 10-bit binary weighted capacitive DAC… …7 2.3 10-bit charge transfer binary weighted capacitive DAC… …9 2.4 Two-stage binary weighted capacitive DAC… 

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APA (6th Edition):

Gaddam, R. S. (2012). A 10-Bit Dual Plate Sampling Capacitive DAC with Auto-Zero On-Chip Reference Voltage Generation. (Masters Thesis). University of Akron. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=akron1349294825

Chicago Manual of Style (16th Edition):

Gaddam, Ravi Shankar. “A 10-Bit Dual Plate Sampling Capacitive DAC with Auto-Zero On-Chip Reference Voltage Generation.” 2012. Masters Thesis, University of Akron. Accessed July 21, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=akron1349294825.

MLA Handbook (7th Edition):

Gaddam, Ravi Shankar. “A 10-Bit Dual Plate Sampling Capacitive DAC with Auto-Zero On-Chip Reference Voltage Generation.” 2012. Web. 21 Jul 2019.

Vancouver:

Gaddam RS. A 10-Bit Dual Plate Sampling Capacitive DAC with Auto-Zero On-Chip Reference Voltage Generation. [Internet] [Masters thesis]. University of Akron; 2012. [cited 2019 Jul 21]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1349294825.

Council of Science Editors:

Gaddam RS. A 10-Bit Dual Plate Sampling Capacitive DAC with Auto-Zero On-Chip Reference Voltage Generation. [Masters Thesis]. University of Akron; 2012. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1349294825

12. Mashrafi, Sheikh. X-ray microscope performance enhancement through control architecture change.

Degree: MS, 0133, 2014, University of Illinois – Urbana-Champaign

 The goal of this thesis is to apply control algorithms to improve the performance of nanopositioning devices used on the beamline in Advanced Photon Source… (more)

Subjects/Keywords: control; Control Architecture; Advanced Photon Source (APS); Argonne National Laboratory (ANL); control algorithms; nanopositioning; nanopositioning devices; Early User Instrument (EUI); X-ray; optics; robust stability; bandwidth; resolution; disturbance rejection; noise attenuation; scanning probe microscope (SPM); closed-loop properties; Proportional Integral Derivative (PID); Glover-McFarlane h-infinity algorithm; 1DOF h-infinity controller; h-infinity; Glover-McFarlane controller; Keith Glover; Duncan McFarlane; controller; controller implementation; National Instruments (NI); CompactRIO; real-time controller; Field-Programmable Gate Array (FPGA); LabVIEW; biquads structures; closed-loop bandwidth; U.S. Department of Energy (DOE); Office of Science; DE-AC02-06CH11357; DE-SC0004283; Cross Power Spectral Density (CPSD); Power Spectral Density (PSD); Degree Of Freedom (DOF); Discrete-Time Fourier Transform (DTFT); Hardware Description language (HDL); High-Level Synthesis (HLS); Hard X-ray Nanoprobe (HXN); In Situ Nanoprobe (ISN); Laser Doppler Displacement Meter (LDDM); Physik Instrumente (PI); Reconfigurable Input/Output (RIO); Advanced Photon Source (APS) beamline; full-field imaging microscopy; fluorescence mapping; nanodiffraction; transmission imaging; reliability and repeatability of positioning systems; modeling uncertainties; insensitive modeling uncertainties; quantifying trade-offs; trade-offs; design flexibility; design methodology; feedforward; feedback; performance objectives; robustness; Advanced Photon Source (APS) user; beamline scientist; imaging resolution and bandwidth; imaging resolution; nanoprobe; model fitting; curve fitting; model reduction; feedback controllers; X-ray nanoprobe instrument; third-generation synchrotron radiation source; zone plate optics; zone plate; flexure stages; piezoelectric actuators stacks; flexure; Piezoelectric; high-stiffness stages; high-resolution weak-link stages; piezoelectric-transducer; sub-nanometer resolution; subnanometer; optical heterodyning; heterodyning; Optodyne; frequency-shifted laser beam; PID controller; digital to analog converter (DAC); analog input modules; digital input modules; analog output modules; cRIO-9118; Virtex-5; Virtex-5 LX110 FPGA chassis; NI-9223; NI-9402; NI-9263; System Identification; Identification; black-box identification; parametric model; non-parametric model; welch; pwelch; tfestimate; invfreqs; time domain data; band-limited uniform Gaussian white noise; band-limited; white noise; resonant peak; Balance Realization; minimal realization; controllability; observability; Experimental Frequency response; transfer function; Hankel singular values; Hankel norm; balanced truncation; noise histogram; Open Loop Resolution; closed Loop Resolution; Simulink simulation; LabVIEW simulation; discrete controller; continuous controllers; discrete; Tustin; tustins method; discretization; complementary sensitivity transfer function; sensitivity transfer function; robust stabilization; coprime factorization; Bezout identity; Bezout; stability margin; algebraic Riccati equation; Riccati equation; sub-optimal; suboptimal; sub-optimal controller; optimal controller; mixed-sensitivity optimization; sensitivity optimization; generalized framework; generalized controller framework; stabilizing controller; closed-loop objectives; generalized plant; nominal plant; linear fractional transformation; weighting transfer functions; weighted sensitivity; hinfsyn; bode integral law; waterbed effect; second waterbed formula; Skogestad; Poslethwaite; sensitivity weighting; sensitivity weighting transfer function; nanopositioner; nanopositioning device; nanopositioning system; second order sections; ASPE 28th Annual Meeting; American Society for Precision Engineering (ASPE); Synchrotron Radiation Instrumentation; Synchrotron; Nanoprobe Instrument

…the controller output after passing though a digital to analog converter (DAC)… 

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APA (6th Edition):

Mashrafi, S. (2014). X-ray microscope performance enhancement through control architecture change. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/46671

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mashrafi, Sheikh. “X-ray microscope performance enhancement through control architecture change.” 2014. Thesis, University of Illinois – Urbana-Champaign. Accessed July 21, 2019. http://hdl.handle.net/2142/46671.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mashrafi, Sheikh. “X-ray microscope performance enhancement through control architecture change.” 2014. Web. 21 Jul 2019.

Vancouver:

Mashrafi S. X-ray microscope performance enhancement through control architecture change. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2014. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/2142/46671.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mashrafi S. X-ray microscope performance enhancement through control architecture change. [Thesis]. University of Illinois – Urbana-Champaign; 2014. Available from: http://hdl.handle.net/2142/46671

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

.