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You searched for subject:(Computer architecture). Showing records 1 – 30 of 1874 total matches.

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Nelson Mandela Metropolitan University

1. Barnes, Meredith Anne. A comprehensive evaluation framework for system modernization : a case study using data services.

Degree: Faculty of Science, 2011, Nelson Mandela Metropolitan University

 Modernization is a solution to migrate cumbersome existing systems to a new architecture for improved longevity of business processes. Three modernization approaches exist. White-box and… (more)

Subjects/Keywords: Computer architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Barnes, M. A. (2011). A comprehensive evaluation framework for system modernization : a case study using data services. (Thesis). Nelson Mandela Metropolitan University. Retrieved from http://hdl.handle.net/10948/1499

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Barnes, Meredith Anne. “A comprehensive evaluation framework for system modernization : a case study using data services.” 2011. Thesis, Nelson Mandela Metropolitan University. Accessed February 28, 2020. http://hdl.handle.net/10948/1499.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Barnes, Meredith Anne. “A comprehensive evaluation framework for system modernization : a case study using data services.” 2011. Web. 28 Feb 2020.

Vancouver:

Barnes MA. A comprehensive evaluation framework for system modernization : a case study using data services. [Internet] [Thesis]. Nelson Mandela Metropolitan University; 2011. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/10948/1499.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Barnes MA. A comprehensive evaluation framework for system modernization : a case study using data services. [Thesis]. Nelson Mandela Metropolitan University; 2011. Available from: http://hdl.handle.net/10948/1499

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidad Nacional de Colombia

2. Hincapié Sánchez, Andrés Felipe. Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas.

Degree: http://www.bdigital.unal.edu.co/54641/, 2016, Universidad Nacional de Colombia

 Al establecer estos diálogos pretendo generar laboratorios de enfrentamiento y ejercicio transdisciplinar en el campo de las prácticas artísticas, haciendo uso de técnicas y tecnologías… (more)

Subjects/Keywords: 72 Arquitectura / Architecture; 77 Fotografía y fotografias / Photography & computer art

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APA (6th Edition):

Hincapié Sánchez, A. F. (2016). Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas. (Thesis). Universidad Nacional de Colombia. Retrieved from http://www.bdigital.unal.edu.co/54641/1/1036931897.2016.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hincapié Sánchez, Andrés Felipe. “Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas.” 2016. Thesis, Universidad Nacional de Colombia. Accessed February 28, 2020. http://www.bdigital.unal.edu.co/54641/1/1036931897.2016.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hincapié Sánchez, Andrés Felipe. “Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas.” 2016. Web. 28 Feb 2020.

Vancouver:

Hincapié Sánchez AF. Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas. [Internet] [Thesis]. Universidad Nacional de Colombia; 2016. [cited 2020 Feb 28]. Available from: http://www.bdigital.unal.edu.co/54641/1/1036931897.2016.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hincapié Sánchez AF. Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas. [Thesis]. Universidad Nacional de Colombia; 2016. Available from: http://www.bdigital.unal.edu.co/54641/1/1036931897.2016.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

3. Larsen, Steen K. Offloading of I/O transactions in current CPU architectures.

Degree: PhD, Electrical and Computer Engineering, 2015, Oregon State University

 I/O transactions within a computer system have evolved along with other system components (i.e., CPU, memory, video) from programmed I/O (PIO). In current mainstream systems… (more)

Subjects/Keywords: CPU; Computer architecture

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APA (6th Edition):

Larsen, S. K. (2015). Offloading of I/O transactions in current CPU architectures. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/55572

Chicago Manual of Style (16th Edition):

Larsen, Steen K. “Offloading of I/O transactions in current CPU architectures.” 2015. Doctoral Dissertation, Oregon State University. Accessed February 28, 2020. http://hdl.handle.net/1957/55572.

MLA Handbook (7th Edition):

Larsen, Steen K. “Offloading of I/O transactions in current CPU architectures.” 2015. Web. 28 Feb 2020.

Vancouver:

Larsen SK. Offloading of I/O transactions in current CPU architectures. [Internet] [Doctoral dissertation]. Oregon State University; 2015. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/1957/55572.

Council of Science Editors:

Larsen SK. Offloading of I/O transactions in current CPU architectures. [Doctoral Dissertation]. Oregon State University; 2015. Available from: http://hdl.handle.net/1957/55572


University of Johannesburg

4. Naidoo, Chintal Krishna. Fitting an information security architecture to an enterprise architecture.

Degree: 2009, University of Johannesburg

M.Phil. (Computer Science)

Despite the efforts at international and national level, security continues to pose challenging problems. Firstly, attacks on information systems are increasingly motivated… (more)

Subjects/Keywords: Computer security; Computer architecture

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APA (6th Edition):

Naidoo, C. K. (2009). Fitting an information security architecture to an enterprise architecture. (Thesis). University of Johannesburg. Retrieved from http://hdl.handle.net/10210/2539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Naidoo, Chintal Krishna. “Fitting an information security architecture to an enterprise architecture.” 2009. Thesis, University of Johannesburg. Accessed February 28, 2020. http://hdl.handle.net/10210/2539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Naidoo, Chintal Krishna. “Fitting an information security architecture to an enterprise architecture.” 2009. Web. 28 Feb 2020.

Vancouver:

Naidoo CK. Fitting an information security architecture to an enterprise architecture. [Internet] [Thesis]. University of Johannesburg; 2009. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/10210/2539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Naidoo CK. Fitting an information security architecture to an enterprise architecture. [Thesis]. University of Johannesburg; 2009. Available from: http://hdl.handle.net/10210/2539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Michigan

5. Kloosterman, John. Data Resource Management in Throughput Processors.

Degree: PhD, Computer Science & Engineering, 2018, University of Michigan

 Graphics Processing Units (GPUs) are becoming common in data centers for tasks like neural network training and image processing due to their high performance and… (more)

Subjects/Keywords: Computer Architecture; Computer Science; Engineering

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APA (6th Edition):

Kloosterman, J. (2018). Data Resource Management in Throughput Processors. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/146122

Chicago Manual of Style (16th Edition):

Kloosterman, John. “Data Resource Management in Throughput Processors.” 2018. Doctoral Dissertation, University of Michigan. Accessed February 28, 2020. http://hdl.handle.net/2027.42/146122.

MLA Handbook (7th Edition):

Kloosterman, John. “Data Resource Management in Throughput Processors.” 2018. Web. 28 Feb 2020.

Vancouver:

Kloosterman J. Data Resource Management in Throughput Processors. [Internet] [Doctoral dissertation]. University of Michigan; 2018. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/2027.42/146122.

Council of Science Editors:

Kloosterman J. Data Resource Management in Throughput Processors. [Doctoral Dissertation]. University of Michigan; 2018. Available from: http://hdl.handle.net/2027.42/146122


Universidad Nacional de Colombia

6. Vela Oñate, Luis Alejandro. Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales.

Degree: http://www.bdigital.unal.edu.co/52083/, 2016, Universidad Nacional de Colombia

Los procesos tradicionales para la elaboración de diseños técnicos en proyectos de vivienda multifamiliar de mediana complejidad en Bogotá presentan deficiencias en la integración y… (more)

Subjects/Keywords: 0 Generalidades / Computer science, information & general works; 69 Construcción / Building & construction; 72 Arquitectura / Architecture

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APA (6th Edition):

Vela Oñate, L. A. (2016). Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales. (Thesis). Universidad Nacional de Colombia. Retrieved from http://www.bdigital.unal.edu.co/52083/1/luisalejandrovelao%C3%B1ate.2016.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vela Oñate, Luis Alejandro. “Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales.” 2016. Thesis, Universidad Nacional de Colombia. Accessed February 28, 2020. http://www.bdigital.unal.edu.co/52083/1/luisalejandrovelao%C3%B1ate.2016.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vela Oñate, Luis Alejandro. “Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales.” 2016. Web. 28 Feb 2020.

Vancouver:

Vela Oñate LA. Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales. [Internet] [Thesis]. Universidad Nacional de Colombia; 2016. [cited 2020 Feb 28]. Available from: http://www.bdigital.unal.edu.co/52083/1/luisalejandrovelao%C3%B1ate.2016.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vela Oñate LA. Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales. [Thesis]. Universidad Nacional de Colombia; 2016. Available from: http://www.bdigital.unal.edu.co/52083/1/luisalejandrovelao%C3%B1ate.2016.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Euskal Herriko Unibertsitatea / Universidad del País Vasco

7. Zorrilla Berasategui, Mikel Joseba. Interoperable technologies for multi-device media services .

Degree: 2016, Euskal Herriko Unibertsitatea / Universidad del País Vasco

 Estamos viviendo una clara y poderosa tendencia hacia aplicaciones basadas en la Web, sustentadas en el progreso de HTML5 y, cada vez, con más dispositivos… (more)

Subjects/Keywords: computer architecture; broadcasting, sound and television; arquitectura de ordenadores; radiodifusión, sonido y televisión

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APA (6th Edition):

Zorrilla Berasategui, M. J. (2016). Interoperable technologies for multi-device media services . (Doctoral Dissertation). Euskal Herriko Unibertsitatea / Universidad del País Vasco. Retrieved from http://hdl.handle.net/10810/19636

Chicago Manual of Style (16th Edition):

Zorrilla Berasategui, Mikel Joseba. “Interoperable technologies for multi-device media services .” 2016. Doctoral Dissertation, Euskal Herriko Unibertsitatea / Universidad del País Vasco. Accessed February 28, 2020. http://hdl.handle.net/10810/19636.

MLA Handbook (7th Edition):

Zorrilla Berasategui, Mikel Joseba. “Interoperable technologies for multi-device media services .” 2016. Web. 28 Feb 2020.

Vancouver:

Zorrilla Berasategui MJ. Interoperable technologies for multi-device media services . [Internet] [Doctoral dissertation]. Euskal Herriko Unibertsitatea / Universidad del País Vasco; 2016. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/10810/19636.

Council of Science Editors:

Zorrilla Berasategui MJ. Interoperable technologies for multi-device media services . [Doctoral Dissertation]. Euskal Herriko Unibertsitatea / Universidad del País Vasco; 2016. Available from: http://hdl.handle.net/10810/19636

8. Raghavan, Arun. Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems.

Degree: 2013, University of Pennsylvania

 Although process technology trends predict that transistor sizes will continue to shrink for a few more generations, voltage scaling has stalled and thus future chips… (more)

Subjects/Keywords: Energy efficient computer architecture; Parallel mobile architecture; Themal-aware computer architecture; Computer Engineering; Computer Sciences

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APA (6th Edition):

Raghavan, A. (2013). Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems. (Thesis). University of Pennsylvania. Retrieved from https://repository.upenn.edu/edissertations/915

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Raghavan, Arun. “Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems.” 2013. Thesis, University of Pennsylvania. Accessed February 28, 2020. https://repository.upenn.edu/edissertations/915.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Raghavan, Arun. “Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems.” 2013. Web. 28 Feb 2020.

Vancouver:

Raghavan A. Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems. [Internet] [Thesis]. University of Pennsylvania; 2013. [cited 2020 Feb 28]. Available from: https://repository.upenn.edu/edissertations/915.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Raghavan A. Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems. [Thesis]. University of Pennsylvania; 2013. Available from: https://repository.upenn.edu/edissertations/915

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Columbia University

9. Garcia Cota, Emilio. Scalable Emulation of Heterogeneous Systems.

Degree: 2019, Columbia University

 The breakdown of Dennard's transistor scaling has driven computing systems toward application-specific accelerators, which can provide orders-of-magnitude improvements in performance and energy efficiency over general-purpose… (more)

Subjects/Keywords: Computer science; Emulators (Computer programs); Computer architecture

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APA (6th Edition):

Garcia Cota, E. (2019). Scalable Emulation of Heterogeneous Systems. (Doctoral Dissertation). Columbia University. Retrieved from https://doi.org/10.7916/d8-a78j-z392

Chicago Manual of Style (16th Edition):

Garcia Cota, Emilio. “Scalable Emulation of Heterogeneous Systems.” 2019. Doctoral Dissertation, Columbia University. Accessed February 28, 2020. https://doi.org/10.7916/d8-a78j-z392.

MLA Handbook (7th Edition):

Garcia Cota, Emilio. “Scalable Emulation of Heterogeneous Systems.” 2019. Web. 28 Feb 2020.

Vancouver:

Garcia Cota E. Scalable Emulation of Heterogeneous Systems. [Internet] [Doctoral dissertation]. Columbia University; 2019. [cited 2020 Feb 28]. Available from: https://doi.org/10.7916/d8-a78j-z392.

Council of Science Editors:

Garcia Cota E. Scalable Emulation of Heterogeneous Systems. [Doctoral Dissertation]. Columbia University; 2019. Available from: https://doi.org/10.7916/d8-a78j-z392


ETH Zürich

10. Hua, Hao. Architectural design as combined modeling.

Degree: 2013, ETH Zürich

Subjects/Keywords: COMPUTER APPLICATIONS IN ARCHITECTURE; COMPUTERANWENDUNGEN IN DER ARCHITEKTUR; CAD (RECHNERGESTÜTZTES ENTWERFEN UND KONSTRUIEREN); CAD (COMPUTER AIDED DESIGN); PROJEKTIERUNG, ENTWURF, PLANUNG (ARCHITEKTUR); PROJECT, DESIGN, PLANNING (ARCHITECTURE); info:eu-repo/classification/ddc/720; Architecture

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APA (6th Edition):

Hua, H. (2013). Architectural design as combined modeling. (Doctoral Dissertation). ETH Zürich. Retrieved from http://hdl.handle.net/20.500.11850/77858

Chicago Manual of Style (16th Edition):

Hua, Hao. “Architectural design as combined modeling.” 2013. Doctoral Dissertation, ETH Zürich. Accessed February 28, 2020. http://hdl.handle.net/20.500.11850/77858.

MLA Handbook (7th Edition):

Hua, Hao. “Architectural design as combined modeling.” 2013. Web. 28 Feb 2020.

Vancouver:

Hua H. Architectural design as combined modeling. [Internet] [Doctoral dissertation]. ETH Zürich; 2013. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/20.500.11850/77858.

Council of Science Editors:

Hua H. Architectural design as combined modeling. [Doctoral Dissertation]. ETH Zürich; 2013. Available from: http://hdl.handle.net/20.500.11850/77858


ETH Zürich

11. Lang, Silke Berit. The impact of video systems on architecture.

Degree: 2005, ETH Zürich

 Today, computers and digital media are common tools and supplies in the field of architecture. Recently, architects also integrate modern information and communication technologies in… (more)

Subjects/Keywords: VIDEO ENGINEERING; COMPUTER APPLICATIONS IN ARCHITECTURE; COMPUTERANWENDUNGEN IN DER ARCHITEKTUR; SPACE + SPATIAL COMPOSITION (ARCHITECTURE); RAUM + RAUMKOMPOSITION (ARCHITEKTUR); VIDEOTECHNIK; info:eu-repo/classification/ddc/720; info:eu-repo/classification/ddc/004; Architecture; Data processing, computer science

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lang, S. B. (2005). The impact of video systems on architecture. (Doctoral Dissertation). ETH Zürich. Retrieved from http://hdl.handle.net/20.500.11850/49138

Chicago Manual of Style (16th Edition):

Lang, Silke Berit. “The impact of video systems on architecture.” 2005. Doctoral Dissertation, ETH Zürich. Accessed February 28, 2020. http://hdl.handle.net/20.500.11850/49138.

MLA Handbook (7th Edition):

Lang, Silke Berit. “The impact of video systems on architecture.” 2005. Web. 28 Feb 2020.

Vancouver:

Lang SB. The impact of video systems on architecture. [Internet] [Doctoral dissertation]. ETH Zürich; 2005. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/20.500.11850/49138.

Council of Science Editors:

Lang SB. The impact of video systems on architecture. [Doctoral Dissertation]. ETH Zürich; 2005. Available from: http://hdl.handle.net/20.500.11850/49138


UCLA

12. Zhou, Peipei. A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture).

Degree: Electrical Engineering, 2014, UCLA

 Future processor will not be limited by the transistor resources, but will be mainly constrained by energy efficiency. Reconfigurable architecture offers higher energy efficiency than… (more)

Subjects/Keywords: Electrical engineering; Computer engineering; Computer science; CGRA; composable architecture; computer architecture; full pipeline; reconfigurable architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhou, P. (2014). A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture). (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/9446s3nx

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhou, Peipei. “A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture).” 2014. Thesis, UCLA. Accessed February 28, 2020. http://www.escholarship.org/uc/item/9446s3nx.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhou, Peipei. “A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture).” 2014. Web. 28 Feb 2020.

Vancouver:

Zhou P. A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture). [Internet] [Thesis]. UCLA; 2014. [cited 2020 Feb 28]. Available from: http://www.escholarship.org/uc/item/9446s3nx.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhou P. A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture). [Thesis]. UCLA; 2014. Available from: http://www.escholarship.org/uc/item/9446s3nx

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Utah

13. Shevgoor, Manjunath. Enabling big memory with emerging technologies.

Degree: PhD, School of Computing, 2016, University of Utah

 The demand for main memory capacity has been increasing for many years and will continue to do so. In the past, Dynamic Random Access Memory… (more)

Subjects/Keywords: computer architecture; DRAM; memory

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APA (6th Edition):

Shevgoor, M. (2016). Enabling big memory with emerging technologies. (Doctoral Dissertation). University of Utah. Retrieved from http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4108/rec/865

Chicago Manual of Style (16th Edition):

Shevgoor, Manjunath. “Enabling big memory with emerging technologies.” 2016. Doctoral Dissertation, University of Utah. Accessed February 28, 2020. http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4108/rec/865.

MLA Handbook (7th Edition):

Shevgoor, Manjunath. “Enabling big memory with emerging technologies.” 2016. Web. 28 Feb 2020.

Vancouver:

Shevgoor M. Enabling big memory with emerging technologies. [Internet] [Doctoral dissertation]. University of Utah; 2016. [cited 2020 Feb 28]. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4108/rec/865.

Council of Science Editors:

Shevgoor M. Enabling big memory with emerging technologies. [Doctoral Dissertation]. University of Utah; 2016. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4108/rec/865


University of Utah

14. Kopta, Daniel. Ray tracing from a data movement perspective.

Degree: PhD, School of Computing, 2016, University of Utah

 Ray tracing is becoming more widely adopted in offline rendering systems due to itsnatural support for high quality lighting. Since quality is also a concern… (more)

Subjects/Keywords: Computer Architecture; Ray Tracing

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APA (6th Edition):

Kopta, D. (2016). Ray tracing from a data movement perspective. (Doctoral Dissertation). University of Utah. Retrieved from http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4083/rec/2026

Chicago Manual of Style (16th Edition):

Kopta, Daniel. “Ray tracing from a data movement perspective.” 2016. Doctoral Dissertation, University of Utah. Accessed February 28, 2020. http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4083/rec/2026.

MLA Handbook (7th Edition):

Kopta, Daniel. “Ray tracing from a data movement perspective.” 2016. Web. 28 Feb 2020.

Vancouver:

Kopta D. Ray tracing from a data movement perspective. [Internet] [Doctoral dissertation]. University of Utah; 2016. [cited 2020 Feb 28]. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4083/rec/2026.

Council of Science Editors:

Kopta D. Ray tracing from a data movement perspective. [Doctoral Dissertation]. University of Utah; 2016. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4083/rec/2026


Texas A&M University

15. Stenner, Jack Eric. Critical reflection in a digital media artwork. Playas| Homeland Mirage.

Degree: 2007, Texas A&M University

  The introduction of digital media into the working practice of artists has produced challenges previously unknown to the field of art. This inquiry follows… (more)

Subjects/Keywords: Fine Arts; Architecture; Computer Science

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APA (6th Edition):

Stenner, J. E. (2007). Critical reflection in a digital media artwork. Playas| Homeland Mirage. (Thesis). Texas A&M University. Retrieved from http://pqdtopen.proquest.com/#viewpdf?dispub=3281007

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Stenner, Jack Eric. “Critical reflection in a digital media artwork. Playas| Homeland Mirage.” 2007. Thesis, Texas A&M University. Accessed February 28, 2020. http://pqdtopen.proquest.com/#viewpdf?dispub=3281007.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Stenner, Jack Eric. “Critical reflection in a digital media artwork. Playas| Homeland Mirage.” 2007. Web. 28 Feb 2020.

Vancouver:

Stenner JE. Critical reflection in a digital media artwork. Playas| Homeland Mirage. [Internet] [Thesis]. Texas A&M University; 2007. [cited 2020 Feb 28]. Available from: http://pqdtopen.proquest.com/#viewpdf?dispub=3281007.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Stenner JE. Critical reflection in a digital media artwork. Playas| Homeland Mirage. [Thesis]. Texas A&M University; 2007. Available from: http://pqdtopen.proquest.com/#viewpdf?dispub=3281007

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Hong Kong

16. 賀子文; Hor, Tze-man. The design and programming of a powerful short-wordlength processor using context-dependent machine instructions.

Degree: M. Phil., 1985, University of Hong Kong

published_or_final_version

Computer Science

Master

Master of Philosophy

Subjects/Keywords: Computer architecture.

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APA (6th Edition):

賀子文; Hor, T. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Masters Thesis). University of Hong Kong. Retrieved from Hor, T. [賀子文]. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b3120690 ; http://dx.doi.org/10.5353/th_b3120690 ; http://hdl.handle.net/10722/32254

Chicago Manual of Style (16th Edition):

賀子文; Hor, Tze-man. “The design and programming of a powerful short-wordlength processor using context-dependent machine instructions.” 1985. Masters Thesis, University of Hong Kong. Accessed February 28, 2020. Hor, T. [賀子文]. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b3120690 ; http://dx.doi.org/10.5353/th_b3120690 ; http://hdl.handle.net/10722/32254.

MLA Handbook (7th Edition):

賀子文; Hor, Tze-man. “The design and programming of a powerful short-wordlength processor using context-dependent machine instructions.” 1985. Web. 28 Feb 2020.

Vancouver:

賀子文; Hor T. The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. [Internet] [Masters thesis]. University of Hong Kong; 1985. [cited 2020 Feb 28]. Available from: Hor, T. [賀子文]. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b3120690 ; http://dx.doi.org/10.5353/th_b3120690 ; http://hdl.handle.net/10722/32254.

Council of Science Editors:

賀子文; Hor T. The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. [Masters Thesis]. University of Hong Kong; 1985. Available from: Hor, T. [賀子文]. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b3120690 ; http://dx.doi.org/10.5353/th_b3120690 ; http://hdl.handle.net/10722/32254

17. Virmani, Deepali. Design and analysis for sensor network architecture with new features; -.

Degree: Computer Science, 2012, University of Delhi

Wireless sensor networks can provide low cost solution to a variety of real-world problems. Sensors are low cost tiny devices with limited storage, computational capability… (more)

Subjects/Keywords: Computer Science; sensor network architecture

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APA (6th Edition):

Virmani, D. (2012). Design and analysis for sensor network architecture with new features; -. (Thesis). University of Delhi. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/13619

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Virmani, Deepali. “Design and analysis for sensor network architecture with new features; -.” 2012. Thesis, University of Delhi. Accessed February 28, 2020. http://shodhganga.inflibnet.ac.in/handle/10603/13619.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Virmani, Deepali. “Design and analysis for sensor network architecture with new features; -.” 2012. Web. 28 Feb 2020.

Vancouver:

Virmani D. Design and analysis for sensor network architecture with new features; -. [Internet] [Thesis]. University of Delhi; 2012. [cited 2020 Feb 28]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/13619.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Virmani D. Design and analysis for sensor network architecture with new features; -. [Thesis]. University of Delhi; 2012. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/13619

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Illinois – Urbana-Champaign

18. Pothukuchi, Raghavendra Pradyumna. Systematically controlling the error rates in variation-prone networks-on-chip for energy efficiency.

Degree: MS, 0112, 2015, University of Illinois – Urbana-Champaign

 Networks-on-Chip (NoCs) are prone to within-die process variation as they span the whole chip. To tolerate variation, their voltages (Vdd) carry overprovisioned guardbands. As a… (more)

Subjects/Keywords: Computer Architecture; Reliability; Energy efficiency

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APA (6th Edition):

Pothukuchi, R. P. (2015). Systematically controlling the error rates in variation-prone networks-on-chip for energy efficiency. (Thesis). University of Illinois – Urbana-Champaign. Retrieved from http://hdl.handle.net/2142/73090

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Pothukuchi, Raghavendra Pradyumna. “Systematically controlling the error rates in variation-prone networks-on-chip for energy efficiency.” 2015. Thesis, University of Illinois – Urbana-Champaign. Accessed February 28, 2020. http://hdl.handle.net/2142/73090.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Pothukuchi, Raghavendra Pradyumna. “Systematically controlling the error rates in variation-prone networks-on-chip for energy efficiency.” 2015. Web. 28 Feb 2020.

Vancouver:

Pothukuchi RP. Systematically controlling the error rates in variation-prone networks-on-chip for energy efficiency. [Internet] [Thesis]. University of Illinois – Urbana-Champaign; 2015. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/2142/73090.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Pothukuchi RP. Systematically controlling the error rates in variation-prone networks-on-chip for energy efficiency. [Thesis]. University of Illinois – Urbana-Champaign; 2015. Available from: http://hdl.handle.net/2142/73090

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


North Carolina State University

19. Cui, Hanyu. Extending Data Prefetching to Cope with Context Switch Misses.

Degree: PhD, Computer Engineering, 2009, North Carolina State University

 Among the various costs of a context switch, its impact on the performance of L2 caches is the most significant because of the resulting high… (more)

Subjects/Keywords: computer architecture; prefetching; context switching

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APA (6th Edition):

Cui, H. (2009). Extending Data Prefetching to Cope with Context Switch Misses. (Doctoral Dissertation). North Carolina State University. Retrieved from http://www.lib.ncsu.edu/resolver/1840.16/3328

Chicago Manual of Style (16th Edition):

Cui, Hanyu. “Extending Data Prefetching to Cope with Context Switch Misses.” 2009. Doctoral Dissertation, North Carolina State University. Accessed February 28, 2020. http://www.lib.ncsu.edu/resolver/1840.16/3328.

MLA Handbook (7th Edition):

Cui, Hanyu. “Extending Data Prefetching to Cope with Context Switch Misses.” 2009. Web. 28 Feb 2020.

Vancouver:

Cui H. Extending Data Prefetching to Cope with Context Switch Misses. [Internet] [Doctoral dissertation]. North Carolina State University; 2009. [cited 2020 Feb 28]. Available from: http://www.lib.ncsu.edu/resolver/1840.16/3328.

Council of Science Editors:

Cui H. Extending Data Prefetching to Cope with Context Switch Misses. [Doctoral Dissertation]. North Carolina State University; 2009. Available from: http://www.lib.ncsu.edu/resolver/1840.16/3328


Oregon State University

20. Zier, David A. The dynamic speculation and performance prediction of parallel loops.

Degree: PhD, Electrical and Computer Engineering, 2009, Oregon State University

 General purpose computer systems have seen increased performance potential through the parallel processing capabilities of multicore processors. Yet this potential performance can only be attained… (more)

Subjects/Keywords: Computer Architecture; Simultaneous multithreading processors

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APA (6th Edition):

Zier, D. A. (2009). The dynamic speculation and performance prediction of parallel loops. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/11579

Chicago Manual of Style (16th Edition):

Zier, David A. “The dynamic speculation and performance prediction of parallel loops.” 2009. Doctoral Dissertation, Oregon State University. Accessed February 28, 2020. http://hdl.handle.net/1957/11579.

MLA Handbook (7th Edition):

Zier, David A. “The dynamic speculation and performance prediction of parallel loops.” 2009. Web. 28 Feb 2020.

Vancouver:

Zier DA. The dynamic speculation and performance prediction of parallel loops. [Internet] [Doctoral dissertation]. Oregon State University; 2009. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/1957/11579.

Council of Science Editors:

Zier DA. The dynamic speculation and performance prediction of parallel loops. [Doctoral Dissertation]. Oregon State University; 2009. Available from: http://hdl.handle.net/1957/11579

21. Rankin, Linda J. A dual-ported real memory architecture for the g-machine.

Degree: MS, 1986, Oregon Health Sciences University

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Rankin, L. J. (1986). A dual-ported real memory architecture for the g-machine. (Thesis). Oregon Health Sciences University. Retrieved from doi:10.6083/M4BC3WGW ; http://digitalcommons.ohsu.edu/etd/214

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rankin, Linda J. “A dual-ported real memory architecture for the g-machine.” 1986. Thesis, Oregon Health Sciences University. Accessed February 28, 2020. doi:10.6083/M4BC3WGW ; http://digitalcommons.ohsu.edu/etd/214.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rankin, Linda J. “A dual-ported real memory architecture for the g-machine.” 1986. Web. 28 Feb 2020.

Vancouver:

Rankin LJ. A dual-ported real memory architecture for the g-machine. [Internet] [Thesis]. Oregon Health Sciences University; 1986. [cited 2020 Feb 28]. Available from: doi:10.6083/M4BC3WGW ; http://digitalcommons.ohsu.edu/etd/214.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rankin LJ. A dual-ported real memory architecture for the g-machine. [Thesis]. Oregon Health Sciences University; 1986. Available from: doi:10.6083/M4BC3WGW ; http://digitalcommons.ohsu.edu/etd/214

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nelson Mandela Metropolitan University

22. Saunders, Evan. A framework for mobile SOA using compression.

Degree: Faculty of Science, 2010, Nelson Mandela Metropolitan University

 The widely accepted standards of Service-Oriented Architecture (SOA) have changed the way many organisations conduct their everyday business. The significant popularity of mobile devices has… (more)

Subjects/Keywords: Service-oriented architecture (Computer science)

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APA (6th Edition):

Saunders, E. (2010). A framework for mobile SOA using compression. (Thesis). Nelson Mandela Metropolitan University. Retrieved from http://hdl.handle.net/10948/1500

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Saunders, Evan. “A framework for mobile SOA using compression.” 2010. Thesis, Nelson Mandela Metropolitan University. Accessed February 28, 2020. http://hdl.handle.net/10948/1500.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Saunders, Evan. “A framework for mobile SOA using compression.” 2010. Web. 28 Feb 2020.

Vancouver:

Saunders E. A framework for mobile SOA using compression. [Internet] [Thesis]. Nelson Mandela Metropolitan University; 2010. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/10948/1500.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Saunders E. A framework for mobile SOA using compression. [Thesis]. Nelson Mandela Metropolitan University; 2010. Available from: http://hdl.handle.net/10948/1500

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Louisiana State University

23. Michael, Christopher Joseph. The weakening of branch predictor performance as an inevitable side effect of exploiting control independence.

Degree: PhD, Electrical and Computer Engineering, 2010, Louisiana State University

 Many algorithms are inherently sequential and hard to explicitly parallelize. Cores designed to aggressively handle these problems exhibit deeper pipelines and wider fetch widths to… (more)

Subjects/Keywords: Branch Prediction; Computer Architecture

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APA (6th Edition):

Michael, C. J. (2010). The weakening of branch predictor performance as an inevitable side effect of exploiting control independence. (Doctoral Dissertation). Louisiana State University. Retrieved from etd-04142010-005228 ; https://digitalcommons.lsu.edu/gradschool_dissertations/1856

Chicago Manual of Style (16th Edition):

Michael, Christopher Joseph. “The weakening of branch predictor performance as an inevitable side effect of exploiting control independence.” 2010. Doctoral Dissertation, Louisiana State University. Accessed February 28, 2020. etd-04142010-005228 ; https://digitalcommons.lsu.edu/gradschool_dissertations/1856.

MLA Handbook (7th Edition):

Michael, Christopher Joseph. “The weakening of branch predictor performance as an inevitable side effect of exploiting control independence.” 2010. Web. 28 Feb 2020.

Vancouver:

Michael CJ. The weakening of branch predictor performance as an inevitable side effect of exploiting control independence. [Internet] [Doctoral dissertation]. Louisiana State University; 2010. [cited 2020 Feb 28]. Available from: etd-04142010-005228 ; https://digitalcommons.lsu.edu/gradschool_dissertations/1856.

Council of Science Editors:

Michael CJ. The weakening of branch predictor performance as an inevitable side effect of exploiting control independence. [Doctoral Dissertation]. Louisiana State University; 2010. Available from: etd-04142010-005228 ; https://digitalcommons.lsu.edu/gradschool_dissertations/1856


University of Victoria

24. Homayoun, Houman. Using lazy instruction prediction to reduce processor wakeup power dissipation.

Degree: Dept. of Electrical and Computer Engineering, 2008, University of Victoria

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Homayoun, H. (2008). Using lazy instruction prediction to reduce processor wakeup power dissipation. (Thesis). University of Victoria. Retrieved from http://hdl.handle.net/1828/581

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Homayoun, Houman. “Using lazy instruction prediction to reduce processor wakeup power dissipation.” 2008. Thesis, University of Victoria. Accessed February 28, 2020. http://hdl.handle.net/1828/581.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Homayoun, Houman. “Using lazy instruction prediction to reduce processor wakeup power dissipation.” 2008. Web. 28 Feb 2020.

Vancouver:

Homayoun H. Using lazy instruction prediction to reduce processor wakeup power dissipation. [Internet] [Thesis]. University of Victoria; 2008. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/1828/581.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Homayoun H. Using lazy instruction prediction to reduce processor wakeup power dissipation. [Thesis]. University of Victoria; 2008. Available from: http://hdl.handle.net/1828/581

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Victoria

25. Zarrabi, Sepehr. Performance and energy efficiency of clustered processors.

Degree: Dept. of Electrical and Computer Engineering, 2008, University of Victoria

 Modern processors aim to achieve ILP by utilizing numerous functional units, large onchip structures and wider issue windows. This leads to extremely complex designs, which… (more)

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Zarrabi, S. (2008). Performance and energy efficiency of clustered processors. (Thesis). University of Victoria. Retrieved from http://hdl.handle.net/1828/586

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zarrabi, Sepehr. “Performance and energy efficiency of clustered processors.” 2008. Thesis, University of Victoria. Accessed February 28, 2020. http://hdl.handle.net/1828/586.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zarrabi, Sepehr. “Performance and energy efficiency of clustered processors.” 2008. Web. 28 Feb 2020.

Vancouver:

Zarrabi S. Performance and energy efficiency of clustered processors. [Internet] [Thesis]. University of Victoria; 2008. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/1828/586.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zarrabi S. Performance and energy efficiency of clustered processors. [Thesis]. University of Victoria; 2008. Available from: http://hdl.handle.net/1828/586

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Victoria

26. Khosrow-Khavar, Farzad. Assigning cost to branches for speculation control in superscalar processors.

Degree: Dept. of Electrical and Computer Engineering, 2008, University of Victoria

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Khosrow-Khavar, F. (2008). Assigning cost to branches for speculation control in superscalar processors. (Thesis). University of Victoria. Retrieved from http://hdl.handle.net/1828/580

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Khosrow-Khavar, Farzad. “Assigning cost to branches for speculation control in superscalar processors.” 2008. Thesis, University of Victoria. Accessed February 28, 2020. http://hdl.handle.net/1828/580.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Khosrow-Khavar, Farzad. “Assigning cost to branches for speculation control in superscalar processors.” 2008. Web. 28 Feb 2020.

Vancouver:

Khosrow-Khavar F. Assigning cost to branches for speculation control in superscalar processors. [Internet] [Thesis]. University of Victoria; 2008. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/1828/580.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Khosrow-Khavar F. Assigning cost to branches for speculation control in superscalar processors. [Thesis]. University of Victoria; 2008. Available from: http://hdl.handle.net/1828/580

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Harvard University

27. Bitton, Joelle. Measure of Abstraction: Embodied Fabrication and the Materiality of Intimacy.

Degree: DDes, 2016, Harvard University

 This thesis presents a theoretical and practical research conducted for the last 4 years on interactive fabrication. Interactive fabrication is an emerging field and takes… (more)

Subjects/Keywords: Architecture; Information Science; Computer Science

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APA (6th Edition):

Bitton, J. (2016). Measure of Abstraction: Embodied Fabrication and the Materiality of Intimacy. (Doctoral Dissertation). Harvard University. Retrieved from http://nrs.harvard.edu/urn-3:HUL.InstRepos:30499026

Chicago Manual of Style (16th Edition):

Bitton, Joelle. “Measure of Abstraction: Embodied Fabrication and the Materiality of Intimacy.” 2016. Doctoral Dissertation, Harvard University. Accessed February 28, 2020. http://nrs.harvard.edu/urn-3:HUL.InstRepos:30499026.

MLA Handbook (7th Edition):

Bitton, Joelle. “Measure of Abstraction: Embodied Fabrication and the Materiality of Intimacy.” 2016. Web. 28 Feb 2020.

Vancouver:

Bitton J. Measure of Abstraction: Embodied Fabrication and the Materiality of Intimacy. [Internet] [Doctoral dissertation]. Harvard University; 2016. [cited 2020 Feb 28]. Available from: http://nrs.harvard.edu/urn-3:HUL.InstRepos:30499026.

Council of Science Editors:

Bitton J. Measure of Abstraction: Embodied Fabrication and the Materiality of Intimacy. [Doctoral Dissertation]. Harvard University; 2016. Available from: http://nrs.harvard.edu/urn-3:HUL.InstRepos:30499026


McGill University

28. Hum, Herbert Hing-Jing. The super-actor machine : a hybrid dataflowvon Neumann architecture.

Degree: PhD, School of Computer Science., 1992, McGill University

Emerging VLSI/ULSI technologies have created new opportunities in designing computer architectures capable of hiding the latencies and synchronization overheads associated with von Neumann-style multiprocessing. Pure… (more)

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Hum, H. H. (1992). The super-actor machine : a hybrid dataflowvon Neumann architecture. (Doctoral Dissertation). McGill University. Retrieved from http://digitool.library.mcgill.ca/thesisfile39346.pdf

Chicago Manual of Style (16th Edition):

Hum, Herbert Hing-Jing. “The super-actor machine : a hybrid dataflowvon Neumann architecture.” 1992. Doctoral Dissertation, McGill University. Accessed February 28, 2020. http://digitool.library.mcgill.ca/thesisfile39346.pdf.

MLA Handbook (7th Edition):

Hum, Herbert Hing-Jing. “The super-actor machine : a hybrid dataflowvon Neumann architecture.” 1992. Web. 28 Feb 2020.

Vancouver:

Hum HH. The super-actor machine : a hybrid dataflowvon Neumann architecture. [Internet] [Doctoral dissertation]. McGill University; 1992. [cited 2020 Feb 28]. Available from: http://digitool.library.mcgill.ca/thesisfile39346.pdf.

Council of Science Editors:

Hum HH. The super-actor machine : a hybrid dataflowvon Neumann architecture. [Doctoral Dissertation]. McGill University; 1992. Available from: http://digitool.library.mcgill.ca/thesisfile39346.pdf

29. Liu, Qingrui. Compiler-Directed Error Resilience for Reliable Computing.

Degree: PhD, Electrical and Computer Engineering, 2018, Virginia Tech

 Error resilience has become as important as power and performance in modern computing architecture. There are various sources of errors that can paralyze real-world computing… (more)

Subjects/Keywords: Reliability; Compiler Optimization; Computer Architecture

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APA (6th Edition):

Liu, Q. (2018). Compiler-Directed Error Resilience for Reliable Computing. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/84526

Chicago Manual of Style (16th Edition):

Liu, Qingrui. “Compiler-Directed Error Resilience for Reliable Computing.” 2018. Doctoral Dissertation, Virginia Tech. Accessed February 28, 2020. http://hdl.handle.net/10919/84526.

MLA Handbook (7th Edition):

Liu, Qingrui. “Compiler-Directed Error Resilience for Reliable Computing.” 2018. Web. 28 Feb 2020.

Vancouver:

Liu Q. Compiler-Directed Error Resilience for Reliable Computing. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/10919/84526.

Council of Science Editors:

Liu Q. Compiler-Directed Error Resilience for Reliable Computing. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/84526


Oregon State University

30. Raisinghani, Manoj H. Allocation of SISAL program graphs to processors using BLAS.

Degree: MS, Electrical and Computer Engineering, 1994, Oregon State University

 There are a number of well known techniques for extracting parallelism from a given program. They range from hardware implementations, building restructuring compilers or reorganizing… (more)

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Raisinghani, M. H. (1994). Allocation of SISAL program graphs to processors using BLAS. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/35764

Chicago Manual of Style (16th Edition):

Raisinghani, Manoj H. “Allocation of SISAL program graphs to processors using BLAS.” 1994. Masters Thesis, Oregon State University. Accessed February 28, 2020. http://hdl.handle.net/1957/35764.

MLA Handbook (7th Edition):

Raisinghani, Manoj H. “Allocation of SISAL program graphs to processors using BLAS.” 1994. Web. 28 Feb 2020.

Vancouver:

Raisinghani MH. Allocation of SISAL program graphs to processors using BLAS. [Internet] [Masters thesis]. Oregon State University; 1994. [cited 2020 Feb 28]. Available from: http://hdl.handle.net/1957/35764.

Council of Science Editors:

Raisinghani MH. Allocation of SISAL program graphs to processors using BLAS. [Masters Thesis]. Oregon State University; 1994. Available from: http://hdl.handle.net/1957/35764

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