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You searched for subject:(Computer architecture). Showing records 1 – 30 of 1792 total matches.

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Euskal Herriko Unibertsitatea / Universidad del País Vasco

1. Pérez Miguel, Carlos. Contributions to High-Throughput Computing Based on the Peer-to-Peer Paradigm .

Degree: 2015, Euskal Herriko Unibertsitatea / Universidad del País Vasco

 This dissertation focuses on High Throughput Computing (HTC) systems and how to build a working HTC system using Peer-to-Peer (P2P) technologies. The traditional HTC systems,… (more)

Subjects/Keywords: computer architecture; software; arquitectura de ordenadores

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APA (6th Edition):

Pérez Miguel, C. (2015). Contributions to High-Throughput Computing Based on the Peer-to-Peer Paradigm . (Doctoral Dissertation). Euskal Herriko Unibertsitatea / Universidad del País Vasco. Retrieved from http://hdl.handle.net/10810/16422

Chicago Manual of Style (16th Edition):

Pérez Miguel, Carlos. “Contributions to High-Throughput Computing Based on the Peer-to-Peer Paradigm .” 2015. Doctoral Dissertation, Euskal Herriko Unibertsitatea / Universidad del País Vasco. Accessed April 26, 2019. http://hdl.handle.net/10810/16422.

MLA Handbook (7th Edition):

Pérez Miguel, Carlos. “Contributions to High-Throughput Computing Based on the Peer-to-Peer Paradigm .” 2015. Web. 26 Apr 2019.

Vancouver:

Pérez Miguel C. Contributions to High-Throughput Computing Based on the Peer-to-Peer Paradigm . [Internet] [Doctoral dissertation]. Euskal Herriko Unibertsitatea / Universidad del País Vasco; 2015. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/10810/16422.

Council of Science Editors:

Pérez Miguel C. Contributions to High-Throughput Computing Based on the Peer-to-Peer Paradigm . [Doctoral Dissertation]. Euskal Herriko Unibertsitatea / Universidad del País Vasco; 2015. Available from: http://hdl.handle.net/10810/16422


Nelson Mandela Metropolitan University

2. Barnes, Meredith Anne. A comprehensive evaluation framework for system modernization : a case study using data services.

Degree: Faculty of Science, 2011, Nelson Mandela Metropolitan University

 Modernization is a solution to migrate cumbersome existing systems to a new architecture for improved longevity of business processes. Three modernization approaches exist. White-box and… (more)

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Barnes, M. A. (2011). A comprehensive evaluation framework for system modernization : a case study using data services. (Thesis). Nelson Mandela Metropolitan University. Retrieved from http://hdl.handle.net/10948/1499

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Barnes, Meredith Anne. “A comprehensive evaluation framework for system modernization : a case study using data services.” 2011. Thesis, Nelson Mandela Metropolitan University. Accessed April 26, 2019. http://hdl.handle.net/10948/1499.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Barnes, Meredith Anne. “A comprehensive evaluation framework for system modernization : a case study using data services.” 2011. Web. 26 Apr 2019.

Vancouver:

Barnes MA. A comprehensive evaluation framework for system modernization : a case study using data services. [Internet] [Thesis]. Nelson Mandela Metropolitan University; 2011. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/10948/1499.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Barnes MA. A comprehensive evaluation framework for system modernization : a case study using data services. [Thesis]. Nelson Mandela Metropolitan University; 2011. Available from: http://hdl.handle.net/10948/1499

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidad Nacional de Colombia

3. Hincapié Sánchez, Andrés Felipe. Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas.

Degree: http://www.bdigital.unal.edu.co/54641/, 2016, Universidad Nacional de Colombia

 Al establecer estos diálogos pretendo generar laboratorios de enfrentamiento y ejercicio transdisciplinar en el campo de las prácticas artísticas, haciendo uso de técnicas y tecnologías… (more)

Subjects/Keywords: 72 Arquitectura / Architecture; 77 Fotografía y fotografias / Photography & computer art

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APA (6th Edition):

Hincapié Sánchez, A. F. (2016). Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas. (Thesis). Universidad Nacional de Colombia. Retrieved from http://www.bdigital.unal.edu.co/54641/1/1036931897.2016.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hincapié Sánchez, Andrés Felipe. “Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas.” 2016. Thesis, Universidad Nacional de Colombia. Accessed April 26, 2019. http://www.bdigital.unal.edu.co/54641/1/1036931897.2016.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hincapié Sánchez, Andrés Felipe. “Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas.” 2016. Web. 26 Apr 2019.

Vancouver:

Hincapié Sánchez AF. Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas. [Internet] [Thesis]. Universidad Nacional de Colombia; 2016. [cited 2019 Apr 26]. Available from: http://www.bdigital.unal.edu.co/54641/1/1036931897.2016.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hincapié Sánchez AF. Disrupción digital: diálogos entre arquitectura - Téchne - prácticas artísticas. [Thesis]. Universidad Nacional de Colombia; 2016. Available from: http://www.bdigital.unal.edu.co/54641/1/1036931897.2016.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Euskal Herriko Unibertsitatea / Universidad del País Vasco

4. López Novoa, Unai. Contributions to the efficient use of general purpose coprocessors: kernel density estimation as case study .

Degree: 2015, Euskal Herriko Unibertsitatea / Universidad del País Vasco

 The high performance computing landscape is shifting from assemblies of homogeneous nodes towards heterogeneous systems, in which nodes consist of a combination of traditional out-of-order… (more)

Subjects/Keywords: artificial intelligence; computer architecture; inteligencia artificial; arquitectura de ordenadores

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APA (6th Edition):

López Novoa, U. (2015). Contributions to the efficient use of general purpose coprocessors: kernel density estimation as case study . (Doctoral Dissertation). Euskal Herriko Unibertsitatea / Universidad del País Vasco. Retrieved from http://hdl.handle.net/10810/15955

Chicago Manual of Style (16th Edition):

López Novoa, Unai. “Contributions to the efficient use of general purpose coprocessors: kernel density estimation as case study .” 2015. Doctoral Dissertation, Euskal Herriko Unibertsitatea / Universidad del País Vasco. Accessed April 26, 2019. http://hdl.handle.net/10810/15955.

MLA Handbook (7th Edition):

López Novoa, Unai. “Contributions to the efficient use of general purpose coprocessors: kernel density estimation as case study .” 2015. Web. 26 Apr 2019.

Vancouver:

López Novoa U. Contributions to the efficient use of general purpose coprocessors: kernel density estimation as case study . [Internet] [Doctoral dissertation]. Euskal Herriko Unibertsitatea / Universidad del País Vasco; 2015. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/10810/15955.

Council of Science Editors:

López Novoa U. Contributions to the efficient use of general purpose coprocessors: kernel density estimation as case study . [Doctoral Dissertation]. Euskal Herriko Unibertsitatea / Universidad del País Vasco; 2015. Available from: http://hdl.handle.net/10810/15955


Oregon State University

5. Larsen, Steen K. Offloading of I/O transactions in current CPU architectures.

Degree: PhD, Electrical and Computer Engineering, 2015, Oregon State University

 I/O transactions within a computer system have evolved along with other system components (i.e., CPU, memory, video) from programmed I/O (PIO). In current mainstream systems… (more)

Subjects/Keywords: CPU; Computer architecture

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APA (6th Edition):

Larsen, S. K. (2015). Offloading of I/O transactions in current CPU architectures. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/55572

Chicago Manual of Style (16th Edition):

Larsen, Steen K. “Offloading of I/O transactions in current CPU architectures.” 2015. Doctoral Dissertation, Oregon State University. Accessed April 26, 2019. http://hdl.handle.net/1957/55572.

MLA Handbook (7th Edition):

Larsen, Steen K. “Offloading of I/O transactions in current CPU architectures.” 2015. Web. 26 Apr 2019.

Vancouver:

Larsen SK. Offloading of I/O transactions in current CPU architectures. [Internet] [Doctoral dissertation]. Oregon State University; 2015. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/1957/55572.

Council of Science Editors:

Larsen SK. Offloading of I/O transactions in current CPU architectures. [Doctoral Dissertation]. Oregon State University; 2015. Available from: http://hdl.handle.net/1957/55572


University of Johannesburg

6. Naidoo, Chintal Krishna. Fitting an information security architecture to an enterprise architecture.

Degree: 2009, University of Johannesburg

M.Phil. (Computer Science)

Despite the efforts at international and national level, security continues to pose challenging problems. Firstly, attacks on information systems are increasingly motivated… (more)

Subjects/Keywords: Computer security; Computer architecture

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APA (6th Edition):

Naidoo, C. K. (2009). Fitting an information security architecture to an enterprise architecture. (Thesis). University of Johannesburg. Retrieved from http://hdl.handle.net/10210/2539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Naidoo, Chintal Krishna. “Fitting an information security architecture to an enterprise architecture.” 2009. Thesis, University of Johannesburg. Accessed April 26, 2019. http://hdl.handle.net/10210/2539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Naidoo, Chintal Krishna. “Fitting an information security architecture to an enterprise architecture.” 2009. Web. 26 Apr 2019.

Vancouver:

Naidoo CK. Fitting an information security architecture to an enterprise architecture. [Internet] [Thesis]. University of Johannesburg; 2009. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/10210/2539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Naidoo CK. Fitting an information security architecture to an enterprise architecture. [Thesis]. University of Johannesburg; 2009. Available from: http://hdl.handle.net/10210/2539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Michigan

7. Kloosterman, John. Data Resource Management in Throughput Processors.

Degree: PhD, Computer Science & Engineering, 2018, University of Michigan

 Graphics Processing Units (GPUs) are becoming common in data centers for tasks like neural network training and image processing due to their high performance and… (more)

Subjects/Keywords: Computer Architecture; Computer Science; Engineering

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APA (6th Edition):

Kloosterman, J. (2018). Data Resource Management in Throughput Processors. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/146122

Chicago Manual of Style (16th Edition):

Kloosterman, John. “Data Resource Management in Throughput Processors.” 2018. Doctoral Dissertation, University of Michigan. Accessed April 26, 2019. http://hdl.handle.net/2027.42/146122.

MLA Handbook (7th Edition):

Kloosterman, John. “Data Resource Management in Throughput Processors.” 2018. Web. 26 Apr 2019.

Vancouver:

Kloosterman J. Data Resource Management in Throughput Processors. [Internet] [Doctoral dissertation]. University of Michigan; 2018. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/2027.42/146122.

Council of Science Editors:

Kloosterman J. Data Resource Management in Throughput Processors. [Doctoral Dissertation]. University of Michigan; 2018. Available from: http://hdl.handle.net/2027.42/146122

8. Arronategui Arribalzaga, Unai. STaRS: A scalable task routing approach to distributed scheduling.

Degree: 2013, Universidad de Zaragoza, Prensas de la Universidad

 La planificación de muchas tareas en entornos de millones de nodos no confiables representa un gran reto. Las plataformas de computación más conocidas normalmente confían… (more)

Subjects/Keywords: arquitectura de ordenadores; redes de ordenadores; simulación; computer architecture; computer networks; simulation

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APA (6th Edition):

Arronategui Arribalzaga, U. (2013). STaRS: A scalable task routing approach to distributed scheduling. (Thesis). Universidad de Zaragoza, Prensas de la Universidad. Retrieved from http://zaguan.unizar.es/record/12579

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Arronategui Arribalzaga, Unai. “STaRS: A scalable task routing approach to distributed scheduling.” 2013. Thesis, Universidad de Zaragoza, Prensas de la Universidad. Accessed April 26, 2019. http://zaguan.unizar.es/record/12579.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Arronategui Arribalzaga, Unai. “STaRS: A scalable task routing approach to distributed scheduling.” 2013. Web. 26 Apr 2019.

Vancouver:

Arronategui Arribalzaga U. STaRS: A scalable task routing approach to distributed scheduling. [Internet] [Thesis]. Universidad de Zaragoza, Prensas de la Universidad; 2013. [cited 2019 Apr 26]. Available from: http://zaguan.unizar.es/record/12579.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Arronategui Arribalzaga U. STaRS: A scalable task routing approach to distributed scheduling. [Thesis]. Universidad de Zaragoza, Prensas de la Universidad; 2013. Available from: http://zaguan.unizar.es/record/12579

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

9. Raghavan, Arun. Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems.

Degree: 2013, University of Pennsylvania

 Although process technology trends predict that transistor sizes will continue to shrink for a few more generations, voltage scaling has stalled and thus future chips… (more)

Subjects/Keywords: Energy efficient computer architecture; Parallel mobile architecture; Themal-aware computer architecture; Computer Engineering; Computer Sciences

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APA (6th Edition):

Raghavan, A. (2013). Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems. (Thesis). University of Pennsylvania. Retrieved from https://repository.upenn.edu/edissertations/915

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Raghavan, Arun. “Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems.” 2013. Thesis, University of Pennsylvania. Accessed April 26, 2019. https://repository.upenn.edu/edissertations/915.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Raghavan, Arun. “Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems.” 2013. Web. 26 Apr 2019.

Vancouver:

Raghavan A. Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems. [Internet] [Thesis]. University of Pennsylvania; 2013. [cited 2019 Apr 26]. Available from: https://repository.upenn.edu/edissertations/915.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Raghavan A. Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems. [Thesis]. University of Pennsylvania; 2013. Available from: https://repository.upenn.edu/edissertations/915

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidad Nacional de Colombia

10. Vela Oñate, Luis Alejandro. Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales.

Degree: http://www.bdigital.unal.edu.co/52083/, 2016, Universidad Nacional de Colombia

Los procesos tradicionales para la elaboración de diseños técnicos en proyectos de vivienda multifamiliar de mediana complejidad en Bogotá presentan deficiencias en la integración y… (more)

Subjects/Keywords: 0 Generalidades / Computer science, information & general works; 69 Construcción / Building & construction; 72 Arquitectura / Architecture

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APA (6th Edition):

Vela Oñate, L. A. (2016). Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales. (Thesis). Universidad Nacional de Colombia. Retrieved from http://www.bdigital.unal.edu.co/52083/1/luisalejandrovelao%C3%B1ate.2016.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vela Oñate, Luis Alejandro. “Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales.” 2016. Thesis, Universidad Nacional de Colombia. Accessed April 26, 2019. http://www.bdigital.unal.edu.co/52083/1/luisalejandrovelao%C3%B1ate.2016.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vela Oñate, Luis Alejandro. “Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales.” 2016. Web. 26 Apr 2019.

Vancouver:

Vela Oñate LA. Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales. [Internet] [Thesis]. Universidad Nacional de Colombia; 2016. [cited 2019 Apr 26]. Available from: http://www.bdigital.unal.edu.co/52083/1/luisalejandrovelao%C3%B1ate.2016.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vela Oñate LA. Metodología para la coordinación de diseños técnicos en proyectos de construcción para vivienda de mediana complejidad en Bogotá apoyado en medios digitales. [Thesis]. Universidad Nacional de Colombia; 2016. Available from: http://www.bdigital.unal.edu.co/52083/1/luisalejandrovelao%C3%B1ate.2016.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Euskal Herriko Unibertsitatea / Universidad del País Vasco

11. Zorrilla Berasategui, Mikel Joseba. Interoperable technologies for multi-device media services .

Degree: 2016, Euskal Herriko Unibertsitatea / Universidad del País Vasco

 Estamos viviendo una clara y poderosa tendencia hacia aplicaciones basadas en la Web, sustentadas en el progreso de HTML5 y, cada vez, con más dispositivos… (more)

Subjects/Keywords: computer architecture; broadcasting, sound and television; arquitectura de ordenadores; radiodifusión, sonido y televisión

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APA (6th Edition):

Zorrilla Berasategui, M. J. (2016). Interoperable technologies for multi-device media services . (Doctoral Dissertation). Euskal Herriko Unibertsitatea / Universidad del País Vasco. Retrieved from http://hdl.handle.net/10810/19636

Chicago Manual of Style (16th Edition):

Zorrilla Berasategui, Mikel Joseba. “Interoperable technologies for multi-device media services .” 2016. Doctoral Dissertation, Euskal Herriko Unibertsitatea / Universidad del País Vasco. Accessed April 26, 2019. http://hdl.handle.net/10810/19636.

MLA Handbook (7th Edition):

Zorrilla Berasategui, Mikel Joseba. “Interoperable technologies for multi-device media services .” 2016. Web. 26 Apr 2019.

Vancouver:

Zorrilla Berasategui MJ. Interoperable technologies for multi-device media services . [Internet] [Doctoral dissertation]. Euskal Herriko Unibertsitatea / Universidad del País Vasco; 2016. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/10810/19636.

Council of Science Editors:

Zorrilla Berasategui MJ. Interoperable technologies for multi-device media services . [Doctoral Dissertation]. Euskal Herriko Unibertsitatea / Universidad del País Vasco; 2016. Available from: http://hdl.handle.net/10810/19636


UCLA

12. Zhou, Peipei. A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture).

Degree: Electrical Engineering, 2014, UCLA

 Future processor will not be limited by the transistor resources, but will be mainly constrained by energy efficiency. Reconfigurable architecture offers higher energy efficiency than… (more)

Subjects/Keywords: Electrical engineering; Computer engineering; Computer science; CGRA; composable architecture; computer architecture; full pipeline; reconfigurable architecture

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APA (6th Edition):

Zhou, P. (2014). A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture). (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/9446s3nx

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhou, Peipei. “A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture).” 2014. Thesis, UCLA. Accessed April 26, 2019. http://www.escholarship.org/uc/item/9446s3nx.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhou, Peipei. “A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture).” 2014. Web. 26 Apr 2019.

Vancouver:

Zhou P. A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture). [Internet] [Thesis]. UCLA; 2014. [cited 2019 Apr 26]. Available from: http://www.escholarship.org/uc/item/9446s3nx.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhou P. A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture). [Thesis]. UCLA; 2014. Available from: http://www.escholarship.org/uc/item/9446s3nx

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


ETH Zürich

13. Hua, Hao. Architectural design as combined modeling.

Degree: 2013, ETH Zürich

Subjects/Keywords: COMPUTER APPLICATIONS IN ARCHITECTURE; COMPUTERANWENDUNGEN IN DER ARCHITEKTUR; CAD (RECHNERGESTÜTZTES ENTWERFEN UND KONSTRUIEREN); CAD (COMPUTER AIDED DESIGN); PROJEKTIERUNG, ENTWURF, PLANUNG (ARCHITEKTUR); PROJECT, DESIGN, PLANNING (ARCHITECTURE); info:eu-repo/classification/ddc/720; Architecture

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APA (6th Edition):

Hua, H. (2013). Architectural design as combined modeling. (Doctoral Dissertation). ETH Zürich. Retrieved from http://hdl.handle.net/20.500.11850/77858

Chicago Manual of Style (16th Edition):

Hua, Hao. “Architectural design as combined modeling.” 2013. Doctoral Dissertation, ETH Zürich. Accessed April 26, 2019. http://hdl.handle.net/20.500.11850/77858.

MLA Handbook (7th Edition):

Hua, Hao. “Architectural design as combined modeling.” 2013. Web. 26 Apr 2019.

Vancouver:

Hua H. Architectural design as combined modeling. [Internet] [Doctoral dissertation]. ETH Zürich; 2013. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/20.500.11850/77858.

Council of Science Editors:

Hua H. Architectural design as combined modeling. [Doctoral Dissertation]. ETH Zürich; 2013. Available from: http://hdl.handle.net/20.500.11850/77858


ETH Zürich

14. Lang, Silke Berit. The impact of video systems on architecture.

Degree: 2005, ETH Zürich

 Today, computers and digital media are common tools and supplies in the field of architecture. Recently, architects also integrate modern information and communication technologies in… (more)

Subjects/Keywords: VIDEO ENGINEERING; COMPUTER APPLICATIONS IN ARCHITECTURE; COMPUTERANWENDUNGEN IN DER ARCHITEKTUR; SPACE + SPATIAL COMPOSITION (ARCHITECTURE); RAUM + RAUMKOMPOSITION (ARCHITEKTUR); VIDEOTECHNIK; info:eu-repo/classification/ddc/720; info:eu-repo/classification/ddc/004; Architecture; Data processing, computer science

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APA (6th Edition):

Lang, S. B. (2005). The impact of video systems on architecture. (Doctoral Dissertation). ETH Zürich. Retrieved from http://hdl.handle.net/20.500.11850/49138

Chicago Manual of Style (16th Edition):

Lang, Silke Berit. “The impact of video systems on architecture.” 2005. Doctoral Dissertation, ETH Zürich. Accessed April 26, 2019. http://hdl.handle.net/20.500.11850/49138.

MLA Handbook (7th Edition):

Lang, Silke Berit. “The impact of video systems on architecture.” 2005. Web. 26 Apr 2019.

Vancouver:

Lang SB. The impact of video systems on architecture. [Internet] [Doctoral dissertation]. ETH Zürich; 2005. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/20.500.11850/49138.

Council of Science Editors:

Lang SB. The impact of video systems on architecture. [Doctoral Dissertation]. ETH Zürich; 2005. Available from: http://hdl.handle.net/20.500.11850/49138


University of Utah

15. Shevgoor, Manjunath. Enabling big memory with emerging technologies.

Degree: PhD, School of Computing, 2016, University of Utah

 The demand for main memory capacity has been increasing for many years and will continue to do so. In the past, Dynamic Random Access Memory… (more)

Subjects/Keywords: computer architecture; DRAM; memory

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APA (6th Edition):

Shevgoor, M. (2016). Enabling big memory with emerging technologies. (Doctoral Dissertation). University of Utah. Retrieved from http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4108/rec/865

Chicago Manual of Style (16th Edition):

Shevgoor, Manjunath. “Enabling big memory with emerging technologies.” 2016. Doctoral Dissertation, University of Utah. Accessed April 26, 2019. http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4108/rec/865.

MLA Handbook (7th Edition):

Shevgoor, Manjunath. “Enabling big memory with emerging technologies.” 2016. Web. 26 Apr 2019.

Vancouver:

Shevgoor M. Enabling big memory with emerging technologies. [Internet] [Doctoral dissertation]. University of Utah; 2016. [cited 2019 Apr 26]. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4108/rec/865.

Council of Science Editors:

Shevgoor M. Enabling big memory with emerging technologies. [Doctoral Dissertation]. University of Utah; 2016. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4108/rec/865


University of Utah

16. Kopta, Daniel. Ray tracing from a data movement perspective.

Degree: PhD, School of Computing, 2016, University of Utah

 Ray tracing is becoming more widely adopted in offline rendering systems due to itsnatural support for high quality lighting. Since quality is also a concern… (more)

Subjects/Keywords: Computer Architecture; Ray Tracing

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kopta, D. (2016). Ray tracing from a data movement perspective. (Doctoral Dissertation). University of Utah. Retrieved from http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4083/rec/2026

Chicago Manual of Style (16th Edition):

Kopta, Daniel. “Ray tracing from a data movement perspective.” 2016. Doctoral Dissertation, University of Utah. Accessed April 26, 2019. http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4083/rec/2026.

MLA Handbook (7th Edition):

Kopta, Daniel. “Ray tracing from a data movement perspective.” 2016. Web. 26 Apr 2019.

Vancouver:

Kopta D. Ray tracing from a data movement perspective. [Internet] [Doctoral dissertation]. University of Utah; 2016. [cited 2019 Apr 26]. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4083/rec/2026.

Council of Science Editors:

Kopta D. Ray tracing from a data movement perspective. [Doctoral Dissertation]. University of Utah; 2016. Available from: http://content.lib.utah.edu/cdm/singleitem/collection/etd3/id/4083/rec/2026


Texas A&M University

17. Stenner, Jack Eric. Critical reflection in a digital media artwork. Playas| Homeland Mirage.

Degree: 2007, Texas A&M University

  The introduction of digital media into the working practice of artists has produced challenges previously unknown to the field of art. This inquiry follows… (more)

Subjects/Keywords: Fine Arts; Architecture; Computer Science

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APA (6th Edition):

Stenner, J. E. (2007). Critical reflection in a digital media artwork. Playas| Homeland Mirage. (Thesis). Texas A&M University. Retrieved from http://pqdtopen.proquest.com/#viewpdf?dispub=3281007

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Stenner, Jack Eric. “Critical reflection in a digital media artwork. Playas| Homeland Mirage.” 2007. Thesis, Texas A&M University. Accessed April 26, 2019. http://pqdtopen.proquest.com/#viewpdf?dispub=3281007.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Stenner, Jack Eric. “Critical reflection in a digital media artwork. Playas| Homeland Mirage.” 2007. Web. 26 Apr 2019.

Vancouver:

Stenner JE. Critical reflection in a digital media artwork. Playas| Homeland Mirage. [Internet] [Thesis]. Texas A&M University; 2007. [cited 2019 Apr 26]. Available from: http://pqdtopen.proquest.com/#viewpdf?dispub=3281007.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Stenner JE. Critical reflection in a digital media artwork. Playas| Homeland Mirage. [Thesis]. Texas A&M University; 2007. Available from: http://pqdtopen.proquest.com/#viewpdf?dispub=3281007

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of British Columbia

18. Wong, Henry Ting-Hei. Architectures and limits of GPU-CPU heterogeneous systems .

Degree: 2008, University of British Columbia

 As we continue to be able to put an increasing number of transistors on a single chip, the answer to the perpetual question of what… (more)

Subjects/Keywords: Multicore processors; Computer architecture; GPU

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APA (6th Edition):

Wong, H. T. (2008). Architectures and limits of GPU-CPU heterogeneous systems . (Thesis). University of British Columbia. Retrieved from http://hdl.handle.net/2429/2529

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wong, Henry Ting-Hei. “Architectures and limits of GPU-CPU heterogeneous systems .” 2008. Thesis, University of British Columbia. Accessed April 26, 2019. http://hdl.handle.net/2429/2529.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wong, Henry Ting-Hei. “Architectures and limits of GPU-CPU heterogeneous systems .” 2008. Web. 26 Apr 2019.

Vancouver:

Wong HT. Architectures and limits of GPU-CPU heterogeneous systems . [Internet] [Thesis]. University of British Columbia; 2008. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/2429/2529.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wong HT. Architectures and limits of GPU-CPU heterogeneous systems . [Thesis]. University of British Columbia; 2008. Available from: http://hdl.handle.net/2429/2529

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Virginia Commonwealth University

19. Huangfu, Yijie. IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs.

Degree: PhD, Engineering, 2017, Virginia Commonwealth University

  Graphic Processing Units (GPUs) are originally mainly designed to accelerate graphic applications. Now the capability of GPUs to accelerate applications that can be parallelized… (more)

Subjects/Keywords: Computer and Systems Architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huangfu, Y. (2017). IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs. (Doctoral Dissertation). Virginia Commonwealth University. Retrieved from https://scholarscompass.vcu.edu/etd/4930

Chicago Manual of Style (16th Edition):

Huangfu, Yijie. “IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs.” 2017. Doctoral Dissertation, Virginia Commonwealth University. Accessed April 26, 2019. https://scholarscompass.vcu.edu/etd/4930.

MLA Handbook (7th Edition):

Huangfu, Yijie. “IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs.” 2017. Web. 26 Apr 2019.

Vancouver:

Huangfu Y. IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs. [Internet] [Doctoral dissertation]. Virginia Commonwealth University; 2017. [cited 2019 Apr 26]. Available from: https://scholarscompass.vcu.edu/etd/4930.

Council of Science Editors:

Huangfu Y. IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs. [Doctoral Dissertation]. Virginia Commonwealth University; 2017. Available from: https://scholarscompass.vcu.edu/etd/4930


Texas A&M University

20. Devpura, Priyank. Packet Compression in GPU Architectures.

Degree: 2017, Texas A&M University

 Graphical processing unit (GPU) can support multiple operations in parallel by executing it on multiple thread unit known as warp i.e. multiple threads running the… (more)

Subjects/Keywords: Compression; GPU; Computer Architecture

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APA (6th Edition):

Devpura, P. (2017). Packet Compression in GPU Architectures. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/161544

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Devpura, Priyank. “Packet Compression in GPU Architectures.” 2017. Thesis, Texas A&M University. Accessed April 26, 2019. http://hdl.handle.net/1969.1/161544.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Devpura, Priyank. “Packet Compression in GPU Architectures.” 2017. Web. 26 Apr 2019.

Vancouver:

Devpura P. Packet Compression in GPU Architectures. [Internet] [Thesis]. Texas A&M University; 2017. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/1969.1/161544.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Devpura P. Packet Compression in GPU Architectures. [Thesis]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/161544

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

21. Virmani, Deepali. Design and analysis for sensor network architecture with new features; -.

Degree: Computer Science, 2012, University of Delhi

Wireless sensor networks can provide low cost solution to a variety of real-world problems. Sensors are low cost tiny devices with limited storage, computational capability… (more)

Subjects/Keywords: Computer Science; sensor network architecture

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APA (6th Edition):

Virmani, D. (2012). Design and analysis for sensor network architecture with new features; -. (Thesis). University of Delhi. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/13619

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Virmani, Deepali. “Design and analysis for sensor network architecture with new features; -.” 2012. Thesis, University of Delhi. Accessed April 26, 2019. http://shodhganga.inflibnet.ac.in/handle/10603/13619.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Virmani, Deepali. “Design and analysis for sensor network architecture with new features; -.” 2012. Web. 26 Apr 2019.

Vancouver:

Virmani D. Design and analysis for sensor network architecture with new features; -. [Internet] [Thesis]. University of Delhi; 2012. [cited 2019 Apr 26]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/13619.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Virmani D. Design and analysis for sensor network architecture with new features; -. [Thesis]. University of Delhi; 2012. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/13619

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

22. Zier, David A. The dynamic speculation and performance prediction of parallel loops.

Degree: PhD, Electrical and Computer Engineering, 2009, Oregon State University

 General purpose computer systems have seen increased performance potential through the parallel processing capabilities of multicore processors. Yet this potential performance can only be attained… (more)

Subjects/Keywords: Computer Architecture; Simultaneous multithreading processors

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APA (6th Edition):

Zier, D. A. (2009). The dynamic speculation and performance prediction of parallel loops. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/11579

Chicago Manual of Style (16th Edition):

Zier, David A. “The dynamic speculation and performance prediction of parallel loops.” 2009. Doctoral Dissertation, Oregon State University. Accessed April 26, 2019. http://hdl.handle.net/1957/11579.

MLA Handbook (7th Edition):

Zier, David A. “The dynamic speculation and performance prediction of parallel loops.” 2009. Web. 26 Apr 2019.

Vancouver:

Zier DA. The dynamic speculation and performance prediction of parallel loops. [Internet] [Doctoral dissertation]. Oregon State University; 2009. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/1957/11579.

Council of Science Editors:

Zier DA. The dynamic speculation and performance prediction of parallel loops. [Doctoral Dissertation]. Oregon State University; 2009. Available from: http://hdl.handle.net/1957/11579

23. Rankin, Linda J. A dual-ported real memory architecture for the g-machine.

Degree: MS, 1986, Oregon Health Sciences University

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Rankin, L. J. (1986). A dual-ported real memory architecture for the g-machine. (Thesis). Oregon Health Sciences University. Retrieved from doi:10.6083/M4BC3WGW ; http://digitalcommons.ohsu.edu/etd/214

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rankin, Linda J. “A dual-ported real memory architecture for the g-machine.” 1986. Thesis, Oregon Health Sciences University. Accessed April 26, 2019. doi:10.6083/M4BC3WGW ; http://digitalcommons.ohsu.edu/etd/214.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rankin, Linda J. “A dual-ported real memory architecture for the g-machine.” 1986. Web. 26 Apr 2019.

Vancouver:

Rankin LJ. A dual-ported real memory architecture for the g-machine. [Internet] [Thesis]. Oregon Health Sciences University; 1986. [cited 2019 Apr 26]. Available from: doi:10.6083/M4BC3WGW ; http://digitalcommons.ohsu.edu/etd/214.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rankin LJ. A dual-ported real memory architecture for the g-machine. [Thesis]. Oregon Health Sciences University; 1986. Available from: doi:10.6083/M4BC3WGW ; http://digitalcommons.ohsu.edu/etd/214

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Hong Kong

24. 賀子文; Hor, Tze-man. The design and programming of a powerful short-wordlength processor using context-dependent machine instructions.

Degree: M. Phil., 1985, University of Hong Kong

published_or_final_version

Computer Science

Master

Master of Philosophy

Subjects/Keywords: Computer architecture.

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APA (6th Edition):

賀子文; Hor, T. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Masters Thesis). University of Hong Kong. Retrieved from Hor, T. [賀子文]. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b3120690 ; http://dx.doi.org/10.5353/th_b3120690 ; http://hdl.handle.net/10722/32254

Chicago Manual of Style (16th Edition):

賀子文; Hor, Tze-man. “The design and programming of a powerful short-wordlength processor using context-dependent machine instructions.” 1985. Masters Thesis, University of Hong Kong. Accessed April 26, 2019. Hor, T. [賀子文]. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b3120690 ; http://dx.doi.org/10.5353/th_b3120690 ; http://hdl.handle.net/10722/32254.

MLA Handbook (7th Edition):

賀子文; Hor, Tze-man. “The design and programming of a powerful short-wordlength processor using context-dependent machine instructions.” 1985. Web. 26 Apr 2019.

Vancouver:

賀子文; Hor T. The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. [Internet] [Masters thesis]. University of Hong Kong; 1985. [cited 2019 Apr 26]. Available from: Hor, T. [賀子文]. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b3120690 ; http://dx.doi.org/10.5353/th_b3120690 ; http://hdl.handle.net/10722/32254.

Council of Science Editors:

賀子文; Hor T. The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. [Masters Thesis]. University of Hong Kong; 1985. Available from: Hor, T. [賀子文]. (1985). The design and programming of a powerful short-wordlength processor using context-dependent machine instructions. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b3120690 ; http://dx.doi.org/10.5353/th_b3120690 ; http://hdl.handle.net/10722/32254


Nelson Mandela Metropolitan University

25. Saunders, Evan. A framework for mobile SOA using compression.

Degree: Faculty of Science, 2010, Nelson Mandela Metropolitan University

 The widely accepted standards of Service-Oriented Architecture (SOA) have changed the way many organisations conduct their everyday business. The significant popularity of mobile devices has… (more)

Subjects/Keywords: Service-oriented architecture (Computer science)

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APA (6th Edition):

Saunders, E. (2010). A framework for mobile SOA using compression. (Thesis). Nelson Mandela Metropolitan University. Retrieved from http://hdl.handle.net/10948/1500

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Saunders, Evan. “A framework for mobile SOA using compression.” 2010. Thesis, Nelson Mandela Metropolitan University. Accessed April 26, 2019. http://hdl.handle.net/10948/1500.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Saunders, Evan. “A framework for mobile SOA using compression.” 2010. Web. 26 Apr 2019.

Vancouver:

Saunders E. A framework for mobile SOA using compression. [Internet] [Thesis]. Nelson Mandela Metropolitan University; 2010. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/10948/1500.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Saunders E. A framework for mobile SOA using compression. [Thesis]. Nelson Mandela Metropolitan University; 2010. Available from: http://hdl.handle.net/10948/1500

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Toronto

26. Chin, Stephen Alexander. Reusable OpenCL FPGA Infrastructure.

Degree: 2012, University of Toronto

OpenCL has emerged as a standard programming model for heterogeneous systems. Recent work combining OpenCL and FPGAs has focused on high-level synthesis. Building a complete… (more)

Subjects/Keywords: FPGA; OpenCL; SDRAM; computer architecture

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APA (6th Edition):

Chin, S. A. (2012). Reusable OpenCL FPGA Infrastructure. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/32567

Chicago Manual of Style (16th Edition):

Chin, Stephen Alexander. “Reusable OpenCL FPGA Infrastructure.” 2012. Masters Thesis, University of Toronto. Accessed April 26, 2019. http://hdl.handle.net/1807/32567.

MLA Handbook (7th Edition):

Chin, Stephen Alexander. “Reusable OpenCL FPGA Infrastructure.” 2012. Web. 26 Apr 2019.

Vancouver:

Chin SA. Reusable OpenCL FPGA Infrastructure. [Internet] [Masters thesis]. University of Toronto; 2012. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/1807/32567.

Council of Science Editors:

Chin SA. Reusable OpenCL FPGA Infrastructure. [Masters Thesis]. University of Toronto; 2012. Available from: http://hdl.handle.net/1807/32567


Louisiana State University

27. Michael, Christopher Joseph. The weakening of branch predictor performance as an inevitable side effect of exploiting control independence.

Degree: PhD, Electrical and Computer Engineering, 2010, Louisiana State University

 Many algorithms are inherently sequential and hard to explicitly parallelize. Cores designed to aggressively handle these problems exhibit deeper pipelines and wider fetch widths to… (more)

Subjects/Keywords: Branch Prediction; Computer Architecture

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APA (6th Edition):

Michael, C. J. (2010). The weakening of branch predictor performance as an inevitable side effect of exploiting control independence. (Doctoral Dissertation). Louisiana State University. Retrieved from etd-04142010-005228 ; https://digitalcommons.lsu.edu/gradschool_dissertations/1856

Chicago Manual of Style (16th Edition):

Michael, Christopher Joseph. “The weakening of branch predictor performance as an inevitable side effect of exploiting control independence.” 2010. Doctoral Dissertation, Louisiana State University. Accessed April 26, 2019. etd-04142010-005228 ; https://digitalcommons.lsu.edu/gradschool_dissertations/1856.

MLA Handbook (7th Edition):

Michael, Christopher Joseph. “The weakening of branch predictor performance as an inevitable side effect of exploiting control independence.” 2010. Web. 26 Apr 2019.

Vancouver:

Michael CJ. The weakening of branch predictor performance as an inevitable side effect of exploiting control independence. [Internet] [Doctoral dissertation]. Louisiana State University; 2010. [cited 2019 Apr 26]. Available from: etd-04142010-005228 ; https://digitalcommons.lsu.edu/gradschool_dissertations/1856.

Council of Science Editors:

Michael CJ. The weakening of branch predictor performance as an inevitable side effect of exploiting control independence. [Doctoral Dissertation]. Louisiana State University; 2010. Available from: etd-04142010-005228 ; https://digitalcommons.lsu.edu/gradschool_dissertations/1856


University of Victoria

28. Homayoun, Houman. Using lazy instruction prediction to reduce processor wakeup power dissipation.

Degree: Dept. of Electrical and Computer Engineering, 2008, University of Victoria

Subjects/Keywords: Computer architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Homayoun, H. (2008). Using lazy instruction prediction to reduce processor wakeup power dissipation. (Thesis). University of Victoria. Retrieved from http://hdl.handle.net/1828/581

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Homayoun, Houman. “Using lazy instruction prediction to reduce processor wakeup power dissipation.” 2008. Thesis, University of Victoria. Accessed April 26, 2019. http://hdl.handle.net/1828/581.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Homayoun, Houman. “Using lazy instruction prediction to reduce processor wakeup power dissipation.” 2008. Web. 26 Apr 2019.

Vancouver:

Homayoun H. Using lazy instruction prediction to reduce processor wakeup power dissipation. [Internet] [Thesis]. University of Victoria; 2008. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/1828/581.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Homayoun H. Using lazy instruction prediction to reduce processor wakeup power dissipation. [Thesis]. University of Victoria; 2008. Available from: http://hdl.handle.net/1828/581

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Victoria

29. Zarrabi, Sepehr. Performance and energy efficiency of clustered processors.

Degree: Dept. of Electrical and Computer Engineering, 2008, University of Victoria

 Modern processors aim to achieve ILP by utilizing numerous functional units, large onchip structures and wider issue windows. This leads to extremely complex designs, which… (more)

Subjects/Keywords: Computer architecture

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APA (6th Edition):

Zarrabi, S. (2008). Performance and energy efficiency of clustered processors. (Thesis). University of Victoria. Retrieved from http://hdl.handle.net/1828/586

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zarrabi, Sepehr. “Performance and energy efficiency of clustered processors.” 2008. Thesis, University of Victoria. Accessed April 26, 2019. http://hdl.handle.net/1828/586.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zarrabi, Sepehr. “Performance and energy efficiency of clustered processors.” 2008. Web. 26 Apr 2019.

Vancouver:

Zarrabi S. Performance and energy efficiency of clustered processors. [Internet] [Thesis]. University of Victoria; 2008. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/1828/586.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zarrabi S. Performance and energy efficiency of clustered processors. [Thesis]. University of Victoria; 2008. Available from: http://hdl.handle.net/1828/586

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Victoria

30. Khosrow-Khavar, Farzad. Assigning cost to branches for speculation control in superscalar processors.

Degree: Dept. of Electrical and Computer Engineering, 2008, University of Victoria

Subjects/Keywords: Computer architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Khosrow-Khavar, F. (2008). Assigning cost to branches for speculation control in superscalar processors. (Thesis). University of Victoria. Retrieved from http://hdl.handle.net/1828/580

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Khosrow-Khavar, Farzad. “Assigning cost to branches for speculation control in superscalar processors.” 2008. Thesis, University of Victoria. Accessed April 26, 2019. http://hdl.handle.net/1828/580.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Khosrow-Khavar, Farzad. “Assigning cost to branches for speculation control in superscalar processors.” 2008. Web. 26 Apr 2019.

Vancouver:

Khosrow-Khavar F. Assigning cost to branches for speculation control in superscalar processors. [Internet] [Thesis]. University of Victoria; 2008. [cited 2019 Apr 26]. Available from: http://hdl.handle.net/1828/580.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Khosrow-Khavar F. Assigning cost to branches for speculation control in superscalar processors. [Thesis]. University of Victoria; 2008. Available from: http://hdl.handle.net/1828/580

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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