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You searched for subject:(Computer AND Systems Architecture). Showing records 1 – 30 of 8219 total matches.

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Virginia Commonwealth University

1. Huangfu, Yijie. IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs.

Degree: PhD, Engineering, 2017, Virginia Commonwealth University

  Graphic Processing Units (GPUs) are originally mainly designed to accelerate graphic applications. Now the capability of GPUs to accelerate applications that can be parallelized… (more)

Subjects/Keywords: Computer and Systems Architecture

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APA (6th Edition):

Huangfu, Y. (2017). IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs. (Doctoral Dissertation). Virginia Commonwealth University. Retrieved from https://scholarscompass.vcu.edu/etd/4930

Chicago Manual of Style (16th Edition):

Huangfu, Yijie. “IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs.” 2017. Doctoral Dissertation, Virginia Commonwealth University. Accessed May 20, 2019. https://scholarscompass.vcu.edu/etd/4930.

MLA Handbook (7th Edition):

Huangfu, Yijie. “IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs.” 2017. Web. 20 May 2019.

Vancouver:

Huangfu Y. IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs. [Internet] [Doctoral dissertation]. Virginia Commonwealth University; 2017. [cited 2019 May 20]. Available from: https://scholarscompass.vcu.edu/etd/4930.

Council of Science Editors:

Huangfu Y. IMPROVING THE PERFORMANCE AND TIME-PREDICTABILITY OF GPUs. [Doctoral Dissertation]. Virginia Commonwealth University; 2017. Available from: https://scholarscompass.vcu.edu/etd/4930


California State University – San Bernardino

2. Chanamolu, Charitha. REVIEWS TO RATING CONVERSION AND ANALYSIS USING MACHINE LEARNING TECHNIQUES.

Degree: MSin Computer Science, School of Computer Science and Engineering, 2019, California State University – San Bernardino

  With the advent of technology in recent years, people depend more on online reviews to purchase a product. It is hard to determine whether… (more)

Subjects/Keywords: Reviews; Computer and Systems Architecture

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APA (6th Edition):

Chanamolu, C. (2019). REVIEWS TO RATING CONVERSION AND ANALYSIS USING MACHINE LEARNING TECHNIQUES. (Thesis). California State University – San Bernardino. Retrieved from https://scholarworks.lib.csusb.edu/etd/792

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chanamolu, Charitha. “REVIEWS TO RATING CONVERSION AND ANALYSIS USING MACHINE LEARNING TECHNIQUES.” 2019. Thesis, California State University – San Bernardino. Accessed May 20, 2019. https://scholarworks.lib.csusb.edu/etd/792.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chanamolu, Charitha. “REVIEWS TO RATING CONVERSION AND ANALYSIS USING MACHINE LEARNING TECHNIQUES.” 2019. Web. 20 May 2019.

Vancouver:

Chanamolu C. REVIEWS TO RATING CONVERSION AND ANALYSIS USING MACHINE LEARNING TECHNIQUES. [Internet] [Thesis]. California State University – San Bernardino; 2019. [cited 2019 May 20]. Available from: https://scholarworks.lib.csusb.edu/etd/792.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chanamolu C. REVIEWS TO RATING CONVERSION AND ANALYSIS USING MACHINE LEARNING TECHNIQUES. [Thesis]. California State University – San Bernardino; 2019. Available from: https://scholarworks.lib.csusb.edu/etd/792

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Drexel University

3. Wang, Yue. Singular value decomposition based pipeline architecture for MIMO communication systems.

Degree: 2010, Drexel University

This thesis presents a design, implementation and performance benchmark of custom hardware for computing Singular Value Decomposition (SVD) of the radio communication channel characteristic matrix.… (more)

Subjects/Keywords: Computer engineering; Computer architecture; Mimo Systems

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APA (6th Edition):

Wang, Y. (2010). Singular value decomposition based pipeline architecture for MIMO communication systems. (Thesis). Drexel University. Retrieved from http://hdl.handle.net/1860/3305

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Yue. “Singular value decomposition based pipeline architecture for MIMO communication systems.” 2010. Thesis, Drexel University. Accessed May 20, 2019. http://hdl.handle.net/1860/3305.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Yue. “Singular value decomposition based pipeline architecture for MIMO communication systems.” 2010. Web. 20 May 2019.

Vancouver:

Wang Y. Singular value decomposition based pipeline architecture for MIMO communication systems. [Internet] [Thesis]. Drexel University; 2010. [cited 2019 May 20]. Available from: http://hdl.handle.net/1860/3305.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang Y. Singular value decomposition based pipeline architecture for MIMO communication systems. [Thesis]. Drexel University; 2010. Available from: http://hdl.handle.net/1860/3305

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Cornell University

4. Lo, Daniel. Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems .

Degree: 2015, Cornell University

 The last decade has seen an increased ubiquity of computers with the widespread adoption of smartphones and tablets and the continued spread of embedded cyber-physical… (more)

Subjects/Keywords: computer architecture; real-time systems; computer security

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APA (6th Edition):

Lo, D. (2015). Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems . (Thesis). Cornell University. Retrieved from http://hdl.handle.net/1813/40913

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lo, Daniel. “Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems .” 2015. Thesis, Cornell University. Accessed May 20, 2019. http://hdl.handle.net/1813/40913.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lo, Daniel. “Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems .” 2015. Web. 20 May 2019.

Vancouver:

Lo D. Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems . [Internet] [Thesis]. Cornell University; 2015. [cited 2019 May 20]. Available from: http://hdl.handle.net/1813/40913.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lo D. Hardware Architectures For Secure, Reliable, And Energy-Efficient Real-Time Systems . [Thesis]. Cornell University; 2015. Available from: http://hdl.handle.net/1813/40913

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Pennsylvania

5. Blundell, Colin. Mechanisms for Unbounded, Conflict-Robust Hardware Transactional Memory.

Degree: 2010, University of Pennsylvania

 Conventional lock implementations serialize access to critical sections guarded by the same lock, presenting programmers with a difficult tradeoff between granularity of synchronization and amount… (more)

Subjects/Keywords: transactional memory; computer architecture; parallel programming; Computer and Systems Architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Blundell, C. (2010). Mechanisms for Unbounded, Conflict-Robust Hardware Transactional Memory. (Thesis). University of Pennsylvania. Retrieved from https://repository.upenn.edu/edissertations/253

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Blundell, Colin. “Mechanisms for Unbounded, Conflict-Robust Hardware Transactional Memory.” 2010. Thesis, University of Pennsylvania. Accessed May 20, 2019. https://repository.upenn.edu/edissertations/253.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Blundell, Colin. “Mechanisms for Unbounded, Conflict-Robust Hardware Transactional Memory.” 2010. Web. 20 May 2019.

Vancouver:

Blundell C. Mechanisms for Unbounded, Conflict-Robust Hardware Transactional Memory. [Internet] [Thesis]. University of Pennsylvania; 2010. [cited 2019 May 20]. Available from: https://repository.upenn.edu/edissertations/253.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Blundell C. Mechanisms for Unbounded, Conflict-Robust Hardware Transactional Memory. [Thesis]. University of Pennsylvania; 2010. Available from: https://repository.upenn.edu/edissertations/253

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Virginia Commonwealth University

6. Li, Min. Privacy Protection on Cloud Computing.

Degree: PhD, Computer Science, 2015, Virginia Commonwealth University

  Cloud is becoming the most popular computing infrastructure because it can attract more and more traditional companies due to flexibility and cost-effectiveness. However, privacy… (more)

Subjects/Keywords: Cloud; Security; Computer and Systems Architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, M. (2015). Privacy Protection on Cloud Computing. (Doctoral Dissertation). Virginia Commonwealth University. Retrieved from https://scholarscompass.vcu.edu/etd/3844

Chicago Manual of Style (16th Edition):

Li, Min. “Privacy Protection on Cloud Computing.” 2015. Doctoral Dissertation, Virginia Commonwealth University. Accessed May 20, 2019. https://scholarscompass.vcu.edu/etd/3844.

MLA Handbook (7th Edition):

Li, Min. “Privacy Protection on Cloud Computing.” 2015. Web. 20 May 2019.

Vancouver:

Li M. Privacy Protection on Cloud Computing. [Internet] [Doctoral dissertation]. Virginia Commonwealth University; 2015. [cited 2019 May 20]. Available from: https://scholarscompass.vcu.edu/etd/3844.

Council of Science Editors:

Li M. Privacy Protection on Cloud Computing. [Doctoral Dissertation]. Virginia Commonwealth University; 2015. Available from: https://scholarscompass.vcu.edu/etd/3844


Ryerson University

7. Ivanova, Irina. Generic framework for multi-objective design space exploration for dynamically reconfigurable systems.

Degree: 2013, Ryerson University

 In recent years the Run-Time-Reconfigurable (RTR) computing systems have become the core of next generation of adaptive embedded systems. One of the major problems in… (more)

Subjects/Keywords: Adaptive computing systems; Computer architecture; System design

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APA (6th Edition):

Ivanova, I. (2013). Generic framework for multi-objective design space exploration for dynamically reconfigurable systems. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A3046

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ivanova, Irina. “Generic framework for multi-objective design space exploration for dynamically reconfigurable systems.” 2013. Thesis, Ryerson University. Accessed May 20, 2019. https://digital.library.ryerson.ca/islandora/object/RULA%3A3046.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ivanova, Irina. “Generic framework for multi-objective design space exploration for dynamically reconfigurable systems.” 2013. Web. 20 May 2019.

Vancouver:

Ivanova I. Generic framework for multi-objective design space exploration for dynamically reconfigurable systems. [Internet] [Thesis]. Ryerson University; 2013. [cited 2019 May 20]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A3046.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ivanova I. Generic framework for multi-objective design space exploration for dynamically reconfigurable systems. [Thesis]. Ryerson University; 2013. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A3046

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Ryerson University

8. Dumitriu, Victor. A framework and method for the run-time on -chip synthesis of multi-mode self-organized reconfigurable stream processors.

Degree: 2015, Ryerson University

 A number of modern digital processing systems implement complex multi-mode applications with high performance requirements and strict operating constraints; examples include video processing and telecommunication… (more)

Subjects/Keywords: Computer architecture; Operating systems (Computers); System design

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Dumitriu, V. (2015). A framework and method for the run-time on -chip synthesis of multi-mode self-organized reconfigurable stream processors. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A3733

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Dumitriu, Victor. “A framework and method for the run-time on -chip synthesis of multi-mode self-organized reconfigurable stream processors.” 2015. Thesis, Ryerson University. Accessed May 20, 2019. https://digital.library.ryerson.ca/islandora/object/RULA%3A3733.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Dumitriu, Victor. “A framework and method for the run-time on -chip synthesis of multi-mode self-organized reconfigurable stream processors.” 2015. Web. 20 May 2019.

Vancouver:

Dumitriu V. A framework and method for the run-time on -chip synthesis of multi-mode self-organized reconfigurable stream processors. [Internet] [Thesis]. Ryerson University; 2015. [cited 2019 May 20]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A3733.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Dumitriu V. A framework and method for the run-time on -chip synthesis of multi-mode self-organized reconfigurable stream processors. [Thesis]. Ryerson University; 2015. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A3733

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Cornell University

9. Ghose, Saugata. Criticality-Aware Memory Systems .

Degree: 2014, Cornell University

 Research on computer memory systems has been of increasing importance over the last decade, as they have become a significant bottleneck for application performance. While… (more)

Subjects/Keywords: load criticality; memory systems; computer architecture

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APA (6th Edition):

Ghose, S. (2014). Criticality-Aware Memory Systems . (Thesis). Cornell University. Retrieved from http://hdl.handle.net/1813/38922

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ghose, Saugata. “Criticality-Aware Memory Systems .” 2014. Thesis, Cornell University. Accessed May 20, 2019. http://hdl.handle.net/1813/38922.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ghose, Saugata. “Criticality-Aware Memory Systems .” 2014. Web. 20 May 2019.

Vancouver:

Ghose S. Criticality-Aware Memory Systems . [Internet] [Thesis]. Cornell University; 2014. [cited 2019 May 20]. Available from: http://hdl.handle.net/1813/38922.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ghose S. Criticality-Aware Memory Systems . [Thesis]. Cornell University; 2014. Available from: http://hdl.handle.net/1813/38922

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Tian, Jiannan. Analyzing Spark Performance on Spot Instances.

Degree: 2017, University of Massachusetts

  Amazon Spot Instances provide inexpensive service for high-performance computing. With spot instances, it is possible to get at most 90% off as discount in… (more)

Subjects/Keywords: cloud computing infrastructure; Computer and Systems Architecture

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APA (6th Edition):

Tian, J. (2017). Analyzing Spark Performance on Spot Instances. (Thesis). University of Massachusetts. Retrieved from https://scholarworks.umass.edu/masters_theses_2/587

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tian, Jiannan. “Analyzing Spark Performance on Spot Instances.” 2017. Thesis, University of Massachusetts. Accessed May 20, 2019. https://scholarworks.umass.edu/masters_theses_2/587.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tian, Jiannan. “Analyzing Spark Performance on Spot Instances.” 2017. Web. 20 May 2019.

Vancouver:

Tian J. Analyzing Spark Performance on Spot Instances. [Internet] [Thesis]. University of Massachusetts; 2017. [cited 2019 May 20]. Available from: https://scholarworks.umass.edu/masters_theses_2/587.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tian J. Analyzing Spark Performance on Spot Instances. [Thesis]. University of Massachusetts; 2017. Available from: https://scholarworks.umass.edu/masters_theses_2/587

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Arkansas

11. Fakhari, Azad. Designing Customizable Network-on-Chip with support for Embedded Private Memory for Multi-Processor System-on-Chips.

Degree: MSCmpE, 2014, University of Arkansas

  The computer industry's transition to multiprocessor systems on chip (MPSoC) architectures is increasing the need for new scalable high-bandwidth on-chip communication backbones. Network-on-Chip (NoC)… (more)

Subjects/Keywords: Applied sciences; Computer and Systems Architecture

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APA (6th Edition):

Fakhari, A. (2014). Designing Customizable Network-on-Chip with support for Embedded Private Memory for Multi-Processor System-on-Chips. (Masters Thesis). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/1058

Chicago Manual of Style (16th Edition):

Fakhari, Azad. “Designing Customizable Network-on-Chip with support for Embedded Private Memory for Multi-Processor System-on-Chips.” 2014. Masters Thesis, University of Arkansas. Accessed May 20, 2019. https://scholarworks.uark.edu/etd/1058.

MLA Handbook (7th Edition):

Fakhari, Azad. “Designing Customizable Network-on-Chip with support for Embedded Private Memory for Multi-Processor System-on-Chips.” 2014. Web. 20 May 2019.

Vancouver:

Fakhari A. Designing Customizable Network-on-Chip with support for Embedded Private Memory for Multi-Processor System-on-Chips. [Internet] [Masters thesis]. University of Arkansas; 2014. [cited 2019 May 20]. Available from: https://scholarworks.uark.edu/etd/1058.

Council of Science Editors:

Fakhari A. Designing Customizable Network-on-Chip with support for Embedded Private Memory for Multi-Processor System-on-Chips. [Masters Thesis]. University of Arkansas; 2014. Available from: https://scholarworks.uark.edu/etd/1058


University of Arkansas

12. Lo, Chien-Wei. Energy and Performance Balancing Architecture for Asynchronous Data Processing Platforms.

Degree: PhD, 2017, University of Arkansas

  The semiconductor industry has been increasingly focused on the energy consumption and heat generation in CMOS-based integrated circuits (ICs) for its dominating impact on… (more)

Subjects/Keywords: Computer and Systems Architecture; Digital Circuits

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lo, C. (2017). Energy and Performance Balancing Architecture for Asynchronous Data Processing Platforms. (Doctoral Dissertation). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/2387

Chicago Manual of Style (16th Edition):

Lo, Chien-Wei. “Energy and Performance Balancing Architecture for Asynchronous Data Processing Platforms.” 2017. Doctoral Dissertation, University of Arkansas. Accessed May 20, 2019. https://scholarworks.uark.edu/etd/2387.

MLA Handbook (7th Edition):

Lo, Chien-Wei. “Energy and Performance Balancing Architecture for Asynchronous Data Processing Platforms.” 2017. Web. 20 May 2019.

Vancouver:

Lo C. Energy and Performance Balancing Architecture for Asynchronous Data Processing Platforms. [Internet] [Doctoral dissertation]. University of Arkansas; 2017. [cited 2019 May 20]. Available from: https://scholarworks.uark.edu/etd/2387.

Council of Science Editors:

Lo C. Energy and Performance Balancing Architecture for Asynchronous Data Processing Platforms. [Doctoral Dissertation]. University of Arkansas; 2017. Available from: https://scholarworks.uark.edu/etd/2387


University of California – Berkeley

13. Liu, Isaac Suyu. Precision Timed Machines.

Degree: Electrical Engineering & Computer Sciences, 2012, University of California – Berkeley

 Cyber-Physical Systems (CPS) are integrations of computation with physical processes. These systems must be equipped to handle the inherent concurrency and inexorable passage of time… (more)

Subjects/Keywords: Computer engineering; Computer Architecture; Cyber-Physical Systems; Predictability; Real-time Systems

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APA (6th Edition):

Liu, I. S. (2012). Precision Timed Machines. (Thesis). University of California – Berkeley. Retrieved from http://www.escholarship.org/uc/item/49w8c7t9

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Isaac Suyu. “Precision Timed Machines.” 2012. Thesis, University of California – Berkeley. Accessed May 20, 2019. http://www.escholarship.org/uc/item/49w8c7t9.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Isaac Suyu. “Precision Timed Machines.” 2012. Web. 20 May 2019.

Vancouver:

Liu IS. Precision Timed Machines. [Internet] [Thesis]. University of California – Berkeley; 2012. [cited 2019 May 20]. Available from: http://www.escholarship.org/uc/item/49w8c7t9.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu IS. Precision Timed Machines. [Thesis]. University of California – Berkeley; 2012. Available from: http://www.escholarship.org/uc/item/49w8c7t9

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of North Texas

14. Bani, Ruchi Rastogi. A New N-way Reconfigurable Data Cache Architecture for Embedded Systems.

Degree: 2009, University of North Texas

 Performance and power consumption are most important issues while designing embedded systems. Several studies have shown that cache memory consumes about 50% of the total… (more)

Subjects/Keywords: Reconfigurable architecture; embedded systems; data cache memory; Cache memory.; Computer architecture.; Embedded computer systems.

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APA (6th Edition):

Bani, R. R. (2009). A New N-way Reconfigurable Data Cache Architecture for Embedded Systems. (Thesis). University of North Texas. Retrieved from https://digital.library.unt.edu/ark:/67531/metadc12079/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Bani, Ruchi Rastogi. “A New N-way Reconfigurable Data Cache Architecture for Embedded Systems.” 2009. Thesis, University of North Texas. Accessed May 20, 2019. https://digital.library.unt.edu/ark:/67531/metadc12079/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Bani, Ruchi Rastogi. “A New N-way Reconfigurable Data Cache Architecture for Embedded Systems.” 2009. Web. 20 May 2019.

Vancouver:

Bani RR. A New N-way Reconfigurable Data Cache Architecture for Embedded Systems. [Internet] [Thesis]. University of North Texas; 2009. [cited 2019 May 20]. Available from: https://digital.library.unt.edu/ark:/67531/metadc12079/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Bani RR. A New N-way Reconfigurable Data Cache Architecture for Embedded Systems. [Thesis]. University of North Texas; 2009. Available from: https://digital.library.unt.edu/ark:/67531/metadc12079/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


McMaster University

15. Huang, Jingjing. An FPTAS for Total Weighted Earliness Tardiness Problem with Constant Number of Distinct Due Dates and Polynomially Related Weights.

Degree: MSc, 2013, McMaster University

We are given a sequence of jobs on a single machine, and each job has a weight, processing time and a due date. A… (more)

Subjects/Keywords: Scheduling Problem; TWET; FPTAS; Computer and Systems Architecture; Computer and Systems Architecture

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APA (6th Edition):

Huang, J. (2013). An FPTAS for Total Weighted Earliness Tardiness Problem with Constant Number of Distinct Due Dates and Polynomially Related Weights. (Masters Thesis). McMaster University. Retrieved from http://hdl.handle.net/11375/12972

Chicago Manual of Style (16th Edition):

Huang, Jingjing. “An FPTAS for Total Weighted Earliness Tardiness Problem with Constant Number of Distinct Due Dates and Polynomially Related Weights.” 2013. Masters Thesis, McMaster University. Accessed May 20, 2019. http://hdl.handle.net/11375/12972.

MLA Handbook (7th Edition):

Huang, Jingjing. “An FPTAS for Total Weighted Earliness Tardiness Problem with Constant Number of Distinct Due Dates and Polynomially Related Weights.” 2013. Web. 20 May 2019.

Vancouver:

Huang J. An FPTAS for Total Weighted Earliness Tardiness Problem with Constant Number of Distinct Due Dates and Polynomially Related Weights. [Internet] [Masters thesis]. McMaster University; 2013. [cited 2019 May 20]. Available from: http://hdl.handle.net/11375/12972.

Council of Science Editors:

Huang J. An FPTAS for Total Weighted Earliness Tardiness Problem with Constant Number of Distinct Due Dates and Polynomially Related Weights. [Masters Thesis]. McMaster University; 2013. Available from: http://hdl.handle.net/11375/12972


Florida International University

16. Hariri, Abla. Secure Large Scale Penetration of Electric Vehicles in the Power Grid.

Degree: PhD, Electrical Engineering, 2018, Florida International University

  As part of the approaches used to meet climate goals set by international environmental agreements, policies are being applied worldwide for promoting the uptake… (more)

Subjects/Keywords: computer and systems architecture; electrical and electronics; Computer and Systems Architecture; Electrical and Electronics

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APA (6th Edition):

Hariri, A. (2018). Secure Large Scale Penetration of Electric Vehicles in the Power Grid. (Doctoral Dissertation). Florida International University. Retrieved from https://digitalcommons.fiu.edu/etd/3848 ; FIDC007054

Chicago Manual of Style (16th Edition):

Hariri, Abla. “Secure Large Scale Penetration of Electric Vehicles in the Power Grid.” 2018. Doctoral Dissertation, Florida International University. Accessed May 20, 2019. https://digitalcommons.fiu.edu/etd/3848 ; FIDC007054.

MLA Handbook (7th Edition):

Hariri, Abla. “Secure Large Scale Penetration of Electric Vehicles in the Power Grid.” 2018. Web. 20 May 2019.

Vancouver:

Hariri A. Secure Large Scale Penetration of Electric Vehicles in the Power Grid. [Internet] [Doctoral dissertation]. Florida International University; 2018. [cited 2019 May 20]. Available from: https://digitalcommons.fiu.edu/etd/3848 ; FIDC007054.

Council of Science Editors:

Hariri A. Secure Large Scale Penetration of Electric Vehicles in the Power Grid. [Doctoral Dissertation]. Florida International University; 2018. Available from: https://digitalcommons.fiu.edu/etd/3848 ; FIDC007054


University of Western Ontario

17. Brightwell, Kevin. lmproving Microcontroller and Computer Architecture Education through Software Simulation.

Degree: 2017, University of Western Ontario

 In this thesis, we aim to improve the outcomes of students learning Computer Architecture and Embedded Systems topics within Software and Computer Engineering programs. We… (more)

Subjects/Keywords: embedded systems; computer architecture; computer architecture simulation; pedagogy; cross-platform application development; Computer and Systems Architecture; Digital Circuits; Engineering Education

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APA (6th Edition):

Brightwell, K. (2017). lmproving Microcontroller and Computer Architecture Education through Software Simulation. (Thesis). University of Western Ontario. Retrieved from https://ir.lib.uwo.ca/etd/4886

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Brightwell, Kevin. “lmproving Microcontroller and Computer Architecture Education through Software Simulation.” 2017. Thesis, University of Western Ontario. Accessed May 20, 2019. https://ir.lib.uwo.ca/etd/4886.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Brightwell, Kevin. “lmproving Microcontroller and Computer Architecture Education through Software Simulation.” 2017. Web. 20 May 2019.

Vancouver:

Brightwell K. lmproving Microcontroller and Computer Architecture Education through Software Simulation. [Internet] [Thesis]. University of Western Ontario; 2017. [cited 2019 May 20]. Available from: https://ir.lib.uwo.ca/etd/4886.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Brightwell K. lmproving Microcontroller and Computer Architecture Education through Software Simulation. [Thesis]. University of Western Ontario; 2017. Available from: https://ir.lib.uwo.ca/etd/4886

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Nelson Mandela Metropolitan University

18. Zadeh, Seyed Amirsaleh Saleh. The selection and evaluation of a sensory technology for interaction in a warehouse environment.

Degree: Faculty of Business and Economic Sciences, 2016, Nelson Mandela Metropolitan University

 In recent years, Human-Computer Interaction (HCI) has become a significant part of modern life as it has improved human performance in the completion of daily… (more)

Subjects/Keywords: Human-computer interaction; User interfaces (Computer systems); Computer architecture

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APA (6th Edition):

Zadeh, S. A. S. (2016). The selection and evaluation of a sensory technology for interaction in a warehouse environment. (Thesis). Nelson Mandela Metropolitan University. Retrieved from http://hdl.handle.net/10948/13193

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zadeh, Seyed Amirsaleh Saleh. “The selection and evaluation of a sensory technology for interaction in a warehouse environment.” 2016. Thesis, Nelson Mandela Metropolitan University. Accessed May 20, 2019. http://hdl.handle.net/10948/13193.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zadeh, Seyed Amirsaleh Saleh. “The selection and evaluation of a sensory technology for interaction in a warehouse environment.” 2016. Web. 20 May 2019.

Vancouver:

Zadeh SAS. The selection and evaluation of a sensory technology for interaction in a warehouse environment. [Internet] [Thesis]. Nelson Mandela Metropolitan University; 2016. [cited 2019 May 20]. Available from: http://hdl.handle.net/10948/13193.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zadeh SAS. The selection and evaluation of a sensory technology for interaction in a warehouse environment. [Thesis]. Nelson Mandela Metropolitan University; 2016. Available from: http://hdl.handle.net/10948/13193

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Columbia University

19. Dall, Christoffer. The Design, Implementation, and Evaluation of Software and Architectural Support for ARM Virtualization.

Degree: 2018, Columbia University

 The ARM architecture is dominating in the mobile and embedded markets and is making an upwards push into the server and networking markets where virtualization… (more)

Subjects/Keywords: Computer science; Computer architecture; Virtual computer systems; RISC microprocessors

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APA (6th Edition):

Dall, C. (2018). The Design, Implementation, and Evaluation of Software and Architectural Support for ARM Virtualization. (Doctoral Dissertation). Columbia University. Retrieved from https://doi.org/10.7916/D8HT4171

Chicago Manual of Style (16th Edition):

Dall, Christoffer. “The Design, Implementation, and Evaluation of Software and Architectural Support for ARM Virtualization.” 2018. Doctoral Dissertation, Columbia University. Accessed May 20, 2019. https://doi.org/10.7916/D8HT4171.

MLA Handbook (7th Edition):

Dall, Christoffer. “The Design, Implementation, and Evaluation of Software and Architectural Support for ARM Virtualization.” 2018. Web. 20 May 2019.

Vancouver:

Dall C. The Design, Implementation, and Evaluation of Software and Architectural Support for ARM Virtualization. [Internet] [Doctoral dissertation]. Columbia University; 2018. [cited 2019 May 20]. Available from: https://doi.org/10.7916/D8HT4171.

Council of Science Editors:

Dall C. The Design, Implementation, and Evaluation of Software and Architectural Support for ARM Virtualization. [Doctoral Dissertation]. Columbia University; 2018. Available from: https://doi.org/10.7916/D8HT4171


Georgia Tech

20. Athreya, Manoj B. Subverting Linux on-the-fly using hardware virtualization technology.

Degree: MS, Electrical and Computer Engineering, 2010, Georgia Tech

 In this thesis, we address the problem faced by modern operating systems due to the exploitation of Hardware-Assisted Full-Virtualization technology by attackers. Virtualization technology has… (more)

Subjects/Keywords: Secure architecture; Virtual machine based rootkits; Encryption; Virtual computer systems; Computer security; Computer architecture

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APA (6th Edition):

Athreya, M. B. (2010). Subverting Linux on-the-fly using hardware virtualization technology. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/34844

Chicago Manual of Style (16th Edition):

Athreya, Manoj B. “Subverting Linux on-the-fly using hardware virtualization technology.” 2010. Masters Thesis, Georgia Tech. Accessed May 20, 2019. http://hdl.handle.net/1853/34844.

MLA Handbook (7th Edition):

Athreya, Manoj B. “Subverting Linux on-the-fly using hardware virtualization technology.” 2010. Web. 20 May 2019.

Vancouver:

Athreya MB. Subverting Linux on-the-fly using hardware virtualization technology. [Internet] [Masters thesis]. Georgia Tech; 2010. [cited 2019 May 20]. Available from: http://hdl.handle.net/1853/34844.

Council of Science Editors:

Athreya MB. Subverting Linux on-the-fly using hardware virtualization technology. [Masters Thesis]. Georgia Tech; 2010. Available from: http://hdl.handle.net/1853/34844


Northeastern University

21. Martinez Santos, Juan Carlos. Architectural support for software security.

Degree: PhD, Department of Electrical and Computer Engineering, 2013, Northeastern University

 Software vulnerabilities cost software vendors the equivalent of $0.86 billion per vulnerability disclosed, and they are being discovered every day. For example, only in year… (more)

Subjects/Keywords: computer architecture; hardware support; software security; Computer and Systems Architecture; Computer Engineering

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APA (6th Edition):

Martinez Santos, J. C. (2013). Architectural support for software security. (Doctoral Dissertation). Northeastern University. Retrieved from http://hdl.handle.net/2047/d20003253

Chicago Manual of Style (16th Edition):

Martinez Santos, Juan Carlos. “Architectural support for software security.” 2013. Doctoral Dissertation, Northeastern University. Accessed May 20, 2019. http://hdl.handle.net/2047/d20003253.

MLA Handbook (7th Edition):

Martinez Santos, Juan Carlos. “Architectural support for software security.” 2013. Web. 20 May 2019.

Vancouver:

Martinez Santos JC. Architectural support for software security. [Internet] [Doctoral dissertation]. Northeastern University; 2013. [cited 2019 May 20]. Available from: http://hdl.handle.net/2047/d20003253.

Council of Science Editors:

Martinez Santos JC. Architectural support for software security. [Doctoral Dissertation]. Northeastern University; 2013. Available from: http://hdl.handle.net/2047/d20003253


Florida Atlantic University

22. Bonilla Villarreal, Isaura Nathaly. Towards a portal and search engine to facilitate academic and research collaboration in engineering and.

Degree: MS, 2014, Florida Atlantic University

Summary: While international academic and research collaborations are of great importance at this time, it is not easy to find researchers in the engineering field… (more)

Subjects/Keywords: Computer network architecture; Critical theory; Embedded computer systems; Interdisciplinary research; Software architecture; UML (Computer science)

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APA (6th Edition):

Bonilla Villarreal, I. N. (2014). Towards a portal and search engine to facilitate academic and research collaboration in engineering and. (Masters Thesis). Florida Atlantic University. Retrieved from http://purl.flvc.org/fau/fd/FA00004179 ; (URL) http://purl.flvc.org/fau/fd/FA00004179

Chicago Manual of Style (16th Edition):

Bonilla Villarreal, Isaura Nathaly. “Towards a portal and search engine to facilitate academic and research collaboration in engineering and.” 2014. Masters Thesis, Florida Atlantic University. Accessed May 20, 2019. http://purl.flvc.org/fau/fd/FA00004179 ; (URL) http://purl.flvc.org/fau/fd/FA00004179.

MLA Handbook (7th Edition):

Bonilla Villarreal, Isaura Nathaly. “Towards a portal and search engine to facilitate academic and research collaboration in engineering and.” 2014. Web. 20 May 2019.

Vancouver:

Bonilla Villarreal IN. Towards a portal and search engine to facilitate academic and research collaboration in engineering and. [Internet] [Masters thesis]. Florida Atlantic University; 2014. [cited 2019 May 20]. Available from: http://purl.flvc.org/fau/fd/FA00004179 ; (URL) http://purl.flvc.org/fau/fd/FA00004179.

Council of Science Editors:

Bonilla Villarreal IN. Towards a portal and search engine to facilitate academic and research collaboration in engineering and. [Masters Thesis]. Florida Atlantic University; 2014. Available from: http://purl.flvc.org/fau/fd/FA00004179 ; (URL) http://purl.flvc.org/fau/fd/FA00004179


Florida International University

23. Lizarraga, Gabriel M. A Neuroimaging Web Interface for Data Acquisition, Processing and Visualization of Multimodal Brain Images.

Degree: PhD, Computer Science, 2018, Florida International University

  Structural and functional brain images are generated as essential modalities for medical experts to learn about the different functions of the brain. These images… (more)

Subjects/Keywords: Biomedical; Computer and Systems Architecture; Data Storage Systems; Neurosciences; Biomedical; Computer and Systems Architecture; Data Storage Systems; Neurosciences

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APA (6th Edition):

Lizarraga, G. M. (2018). A Neuroimaging Web Interface for Data Acquisition, Processing and Visualization of Multimodal Brain Images. (Doctoral Dissertation). Florida International University. Retrieved from https://digitalcommons.fiu.edu/etd/3855 ; FIDC007047

Chicago Manual of Style (16th Edition):

Lizarraga, Gabriel M. “A Neuroimaging Web Interface for Data Acquisition, Processing and Visualization of Multimodal Brain Images.” 2018. Doctoral Dissertation, Florida International University. Accessed May 20, 2019. https://digitalcommons.fiu.edu/etd/3855 ; FIDC007047.

MLA Handbook (7th Edition):

Lizarraga, Gabriel M. “A Neuroimaging Web Interface for Data Acquisition, Processing and Visualization of Multimodal Brain Images.” 2018. Web. 20 May 2019.

Vancouver:

Lizarraga GM. A Neuroimaging Web Interface for Data Acquisition, Processing and Visualization of Multimodal Brain Images. [Internet] [Doctoral dissertation]. Florida International University; 2018. [cited 2019 May 20]. Available from: https://digitalcommons.fiu.edu/etd/3855 ; FIDC007047.

Council of Science Editors:

Lizarraga GM. A Neuroimaging Web Interface for Data Acquisition, Processing and Visualization of Multimodal Brain Images. [Doctoral Dissertation]. Florida International University; 2018. Available from: https://digitalcommons.fiu.edu/etd/3855 ; FIDC007047


University of Colorado

24. Alzabarah, Ali. Towards a Next-Generation Runtime Infrastructure Engine for Configuration Management Systems.

Degree: PhD, Computer Science, 2014, University of Colorado

  A common approach to configuration management is to couple a high-level declarative programming language with a runtime engine. The language is used to specify… (more)

Subjects/Keywords: synchronization; CMS design; CMS architecture; Computer Sciences; Systems Architecture

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APA (6th Edition):

Alzabarah, A. (2014). Towards a Next-Generation Runtime Infrastructure Engine for Configuration Management Systems. (Doctoral Dissertation). University of Colorado. Retrieved from http://scholar.colorado.edu/csci_gradetds/84

Chicago Manual of Style (16th Edition):

Alzabarah, Ali. “Towards a Next-Generation Runtime Infrastructure Engine for Configuration Management Systems.” 2014. Doctoral Dissertation, University of Colorado. Accessed May 20, 2019. http://scholar.colorado.edu/csci_gradetds/84.

MLA Handbook (7th Edition):

Alzabarah, Ali. “Towards a Next-Generation Runtime Infrastructure Engine for Configuration Management Systems.” 2014. Web. 20 May 2019.

Vancouver:

Alzabarah A. Towards a Next-Generation Runtime Infrastructure Engine for Configuration Management Systems. [Internet] [Doctoral dissertation]. University of Colorado; 2014. [cited 2019 May 20]. Available from: http://scholar.colorado.edu/csci_gradetds/84.

Council of Science Editors:

Alzabarah A. Towards a Next-Generation Runtime Infrastructure Engine for Configuration Management Systems. [Doctoral Dissertation]. University of Colorado; 2014. Available from: http://scholar.colorado.edu/csci_gradetds/84


University of Colorado

25. Ismail, Ali Yasser. Cloud RTR: Cloud Infrastructure for Apps with Hardware.

Degree: MS, Electrical, Computer & Energy Engineering, 2015, University of Colorado

  There has been a great deal of innovation in the software space for smart phones, however, there has been virtually no room to innovate… (more)

Subjects/Keywords: mobware; field programmable gate array; mobile phone; software; hardware; software architecture; Computer and Systems Architecture; Hardware Systems; Systems Architecture

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APA (6th Edition):

Ismail, A. Y. (2015). Cloud RTR: Cloud Infrastructure for Apps with Hardware. (Masters Thesis). University of Colorado. Retrieved from https://scholar.colorado.edu/ecen_gradetds/109

Chicago Manual of Style (16th Edition):

Ismail, Ali Yasser. “Cloud RTR: Cloud Infrastructure for Apps with Hardware.” 2015. Masters Thesis, University of Colorado. Accessed May 20, 2019. https://scholar.colorado.edu/ecen_gradetds/109.

MLA Handbook (7th Edition):

Ismail, Ali Yasser. “Cloud RTR: Cloud Infrastructure for Apps with Hardware.” 2015. Web. 20 May 2019.

Vancouver:

Ismail AY. Cloud RTR: Cloud Infrastructure for Apps with Hardware. [Internet] [Masters thesis]. University of Colorado; 2015. [cited 2019 May 20]. Available from: https://scholar.colorado.edu/ecen_gradetds/109.

Council of Science Editors:

Ismail AY. Cloud RTR: Cloud Infrastructure for Apps with Hardware. [Masters Thesis]. University of Colorado; 2015. Available from: https://scholar.colorado.edu/ecen_gradetds/109


Georgia Tech

26. Venkataramani, Guru Prasadh V. Low-cost and efficient architectural support for correctness and performance debugging.

Degree: PhD, Computing, 2009, Georgia Tech

 With rapid growth in computer hardware technologies and architectures, software programs have become increasingly complex and error-prone. This software complexity has resulted in program crashes… (more)

Subjects/Keywords: Scalability in multi-cores; Debugging; Computer architecture; Computer programs Correctness; Debugging in computer science; Computer systems Reliability; Computer architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Venkataramani, G. P. V. (2009). Low-cost and efficient architectural support for correctness and performance debugging. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/31747

Chicago Manual of Style (16th Edition):

Venkataramani, Guru Prasadh V. “Low-cost and efficient architectural support for correctness and performance debugging.” 2009. Doctoral Dissertation, Georgia Tech. Accessed May 20, 2019. http://hdl.handle.net/1853/31747.

MLA Handbook (7th Edition):

Venkataramani, Guru Prasadh V. “Low-cost and efficient architectural support for correctness and performance debugging.” 2009. Web. 20 May 2019.

Vancouver:

Venkataramani GPV. Low-cost and efficient architectural support for correctness and performance debugging. [Internet] [Doctoral dissertation]. Georgia Tech; 2009. [cited 2019 May 20]. Available from: http://hdl.handle.net/1853/31747.

Council of Science Editors:

Venkataramani GPV. Low-cost and efficient architectural support for correctness and performance debugging. [Doctoral Dissertation]. Georgia Tech; 2009. Available from: http://hdl.handle.net/1853/31747


California State University – San Bernardino

27. Zhou, Yu. AUTOMATIC GENERATION OF WEB APPLICATIONS AND MANAGEMENT SYSTEM.

Degree: MSin Computer Science, School of Computer Science and Engineering, 2017, California State University – San Bernardino

  One of the major difficulties in web application design is the tediousness of constructing new web pages from scratch. For traditional web application projects,… (more)

Subjects/Keywords: web generator; BPMN; process; Computer and Systems Architecture; Data Storage Systems

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APA (6th Edition):

Zhou, Y. (2017). AUTOMATIC GENERATION OF WEB APPLICATIONS AND MANAGEMENT SYSTEM. (Thesis). California State University – San Bernardino. Retrieved from http://scholarworks.lib.csusb.edu/etd/434

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhou, Yu. “AUTOMATIC GENERATION OF WEB APPLICATIONS AND MANAGEMENT SYSTEM.” 2017. Thesis, California State University – San Bernardino. Accessed May 20, 2019. http://scholarworks.lib.csusb.edu/etd/434.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhou, Yu. “AUTOMATIC GENERATION OF WEB APPLICATIONS AND MANAGEMENT SYSTEM.” 2017. Web. 20 May 2019.

Vancouver:

Zhou Y. AUTOMATIC GENERATION OF WEB APPLICATIONS AND MANAGEMENT SYSTEM. [Internet] [Thesis]. California State University – San Bernardino; 2017. [cited 2019 May 20]. Available from: http://scholarworks.lib.csusb.edu/etd/434.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhou Y. AUTOMATIC GENERATION OF WEB APPLICATIONS AND MANAGEMENT SYSTEM. [Thesis]. California State University – San Bernardino; 2017. Available from: http://scholarworks.lib.csusb.edu/etd/434

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Ryerson University

28. Chun, Pil Woo (Peter). Architecture synthesis methodology of run-time reconfigurable multi-task and multi-mode systems with self-assembling micro-architecture.

Degree: 2009, Ryerson University

 Despite the success that programmable devices have enjoyed in the last two decades, architecture synthesis methodologies for Run-Time Reconfigurable (RTR) systems are still in their… (more)

Subjects/Keywords: Adaptive computing systems.; Computer architecture.; Operating systems (Computers); System design

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APA (6th Edition):

Chun, P. W. (. (2009). Architecture synthesis methodology of run-time reconfigurable multi-task and multi-mode systems with self-assembling micro-architecture. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A6729

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chun, Pil Woo (Peter). “Architecture synthesis methodology of run-time reconfigurable multi-task and multi-mode systems with self-assembling micro-architecture.” 2009. Thesis, Ryerson University. Accessed May 20, 2019. https://digital.library.ryerson.ca/islandora/object/RULA%3A6729.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chun, Pil Woo (Peter). “Architecture synthesis methodology of run-time reconfigurable multi-task and multi-mode systems with self-assembling micro-architecture.” 2009. Web. 20 May 2019.

Vancouver:

Chun PW(. Architecture synthesis methodology of run-time reconfigurable multi-task and multi-mode systems with self-assembling micro-architecture. [Internet] [Thesis]. Ryerson University; 2009. [cited 2019 May 20]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A6729.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chun PW(. Architecture synthesis methodology of run-time reconfigurable multi-task and multi-mode systems with self-assembling micro-architecture. [Thesis]. Ryerson University; 2009. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A6729

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Tennessee – Knoxville

29. Liao, Jilong. A Privacy-Aware Distributed Storage and Replication Middleware for Heterogeneous Computing Platform.

Degree: MS, Computer Science, 2013, University of Tennessee – Knoxville

  Cloud computing is an emerging research area that has drawn considerable interest in recent years. However, the current infrastructure raises significant concerns about how… (more)

Subjects/Keywords: privacy; middleware; replication; smartphone; Computer and Systems Architecture; Data Storage Systems

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APA (6th Edition):

Liao, J. (2013). A Privacy-Aware Distributed Storage and Replication Middleware for Heterogeneous Computing Platform. (Thesis). University of Tennessee – Knoxville. Retrieved from https://trace.tennessee.edu/utk_gradthes/2619

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liao, Jilong. “A Privacy-Aware Distributed Storage and Replication Middleware for Heterogeneous Computing Platform.” 2013. Thesis, University of Tennessee – Knoxville. Accessed May 20, 2019. https://trace.tennessee.edu/utk_gradthes/2619.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liao, Jilong. “A Privacy-Aware Distributed Storage and Replication Middleware for Heterogeneous Computing Platform.” 2013. Web. 20 May 2019.

Vancouver:

Liao J. A Privacy-Aware Distributed Storage and Replication Middleware for Heterogeneous Computing Platform. [Internet] [Thesis]. University of Tennessee – Knoxville; 2013. [cited 2019 May 20]. Available from: https://trace.tennessee.edu/utk_gradthes/2619.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liao J. A Privacy-Aware Distributed Storage and Replication Middleware for Heterogeneous Computing Platform. [Thesis]. University of Tennessee – Knoxville; 2013. Available from: https://trace.tennessee.edu/utk_gradthes/2619

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

30. Liu, Xiaobin. ENERGY EFFICIENCY EXPLORATION OF COARSE-GRAIN RECONFIGURABLE ARCHITECTURE WITH EMERGING NONVOLATILE MEMORY.

Degree: 2015, University of Massachusetts

  With the rapid growth in consumer electronics, people expect thin, smart and powerful devices, e.g. Google Glass and other wearable devices. However, as portable… (more)

Subjects/Keywords: CGRA; MRAM; time-scheduled interconnect; Computer and Systems Architecture; Hardware Systems

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APA (6th Edition):

Liu, X. (2015). ENERGY EFFICIENCY EXPLORATION OF COARSE-GRAIN RECONFIGURABLE ARCHITECTURE WITH EMERGING NONVOLATILE MEMORY. (Thesis). University of Massachusetts. Retrieved from https://scholarworks.umass.edu/masters_theses_2/159

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Xiaobin. “ENERGY EFFICIENCY EXPLORATION OF COARSE-GRAIN RECONFIGURABLE ARCHITECTURE WITH EMERGING NONVOLATILE MEMORY.” 2015. Thesis, University of Massachusetts. Accessed May 20, 2019. https://scholarworks.umass.edu/masters_theses_2/159.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Xiaobin. “ENERGY EFFICIENCY EXPLORATION OF COARSE-GRAIN RECONFIGURABLE ARCHITECTURE WITH EMERGING NONVOLATILE MEMORY.” 2015. Web. 20 May 2019.

Vancouver:

Liu X. ENERGY EFFICIENCY EXPLORATION OF COARSE-GRAIN RECONFIGURABLE ARCHITECTURE WITH EMERGING NONVOLATILE MEMORY. [Internet] [Thesis]. University of Massachusetts; 2015. [cited 2019 May 20]. Available from: https://scholarworks.umass.edu/masters_theses_2/159.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu X. ENERGY EFFICIENCY EXPLORATION OF COARSE-GRAIN RECONFIGURABLE ARCHITECTURE WITH EMERGING NONVOLATILE MEMORY. [Thesis]. University of Massachusetts; 2015. Available from: https://scholarworks.umass.edu/masters_theses_2/159

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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