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You searched for subject:(Complementary Metal Oxide). Showing records 1 – 30 of 423 total matches.

[1] [2] [3] [4] [5] … [15]

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University of New Mexico

1. Mallajosyula, Aahlad. Single event upset hardened CMOS combinational logic and clock buffer design.

Degree: Electrical and Computer Engineering, 2009, University of New Mexico

 A radiation strike on semiconductor device may lead to charge collection, which may manifest as a wrong logic level causing failure. Soft errors or Single… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary

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APA (6th Edition):

Mallajosyula, A. (2009). Single event upset hardened CMOS combinational logic and clock buffer design. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/7631

Chicago Manual of Style (16th Edition):

Mallajosyula, Aahlad. “Single event upset hardened CMOS combinational logic and clock buffer design.” 2009. Masters Thesis, University of New Mexico. Accessed October 16, 2019. http://hdl.handle.net/1928/7631.

MLA Handbook (7th Edition):

Mallajosyula, Aahlad. “Single event upset hardened CMOS combinational logic and clock buffer design.” 2009. Web. 16 Oct 2019.

Vancouver:

Mallajosyula A. Single event upset hardened CMOS combinational logic and clock buffer design. [Internet] [Masters thesis]. University of New Mexico; 2009. [cited 2019 Oct 16]. Available from: http://hdl.handle.net/1928/7631.

Council of Science Editors:

Mallajosyula A. Single event upset hardened CMOS combinational logic and clock buffer design. [Masters Thesis]. University of New Mexico; 2009. Available from: http://hdl.handle.net/1928/7631


Dalhousie University

2. Yu, Haoran. Techniques for enhancing the performance of bulk-driven circuits in nano-scale CMOS technology.

Degree: PhD, Department of Electrical & Computer Engineering, 2014, Dalhousie University

 Bulk-driven (BD) technique has been proposed to remedy the voltage swing limitation problem in modern CMOS technology. However, challenges exist when the CMOS technologies move… (more)

Subjects/Keywords: CMOS; bulk-driven; Metal oxide semiconductors, Complementary; Metal oxide semiconductors, Complementary

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APA (6th Edition):

Yu, H. (2014). Techniques for enhancing the performance of bulk-driven circuits in nano-scale CMOS technology. (Doctoral Dissertation). Dalhousie University. Retrieved from http://hdl.handle.net/10222/55992

Chicago Manual of Style (16th Edition):

Yu, Haoran. “Techniques for enhancing the performance of bulk-driven circuits in nano-scale CMOS technology.” 2014. Doctoral Dissertation, Dalhousie University. Accessed October 16, 2019. http://hdl.handle.net/10222/55992.

MLA Handbook (7th Edition):

Yu, Haoran. “Techniques for enhancing the performance of bulk-driven circuits in nano-scale CMOS technology.” 2014. Web. 16 Oct 2019.

Vancouver:

Yu H. Techniques for enhancing the performance of bulk-driven circuits in nano-scale CMOS technology. [Internet] [Doctoral dissertation]. Dalhousie University; 2014. [cited 2019 Oct 16]. Available from: http://hdl.handle.net/10222/55992.

Council of Science Editors:

Yu H. Techniques for enhancing the performance of bulk-driven circuits in nano-scale CMOS technology. [Doctoral Dissertation]. Dalhousie University; 2014. Available from: http://hdl.handle.net/10222/55992

3. Meganathan D. A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;.

Degree: A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits, 2014, Anna University

High speed and medium resolution Analog to Digital Converters newline ADC are widely used in commercial applications including data newlinecommunication and image signal processing In… (more)

Subjects/Keywords: Analog to Digital Converters; Complementary Metal Oxide

Page 1

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APA (6th Edition):

D, M. (2014). A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/29245

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

D, Meganathan. “A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;.” 2014. Thesis, Anna University. Accessed October 16, 2019. http://shodhganga.inflibnet.ac.in/handle/10603/29245.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

D, Meganathan. “A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;.” 2014. Web. 16 Oct 2019.

Vancouver:

D M. A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;. [Internet] [Thesis]. Anna University; 2014. [cited 2019 Oct 16]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/29245.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

D M. A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;. [Thesis]. Anna University; 2014. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/29245

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

4. Zeng, Fan. Silicon-migration technology and its applications to micro-electro-mechanical systems.

Degree: 2014, Hong Kong University of Science and Technology

 It is difficult for traditional micro-engineering methods to generate a suspended structural layer for micro-electro-mechanical systems (MEMS) applications without a releasing step. The limitation becomes… (more)

Subjects/Keywords: Microelectromechanical systems; Metal oxide semiconductors, Complementary; Silicon

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APA (6th Edition):

Zeng, F. (2014). Silicon-migration technology and its applications to micro-electro-mechanical systems. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1432232 ; http://repository.ust.hk/ir/bitstream/1783.1-72513/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zeng, Fan. “Silicon-migration technology and its applications to micro-electro-mechanical systems.” 2014. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1432232 ; http://repository.ust.hk/ir/bitstream/1783.1-72513/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zeng, Fan. “Silicon-migration technology and its applications to micro-electro-mechanical systems.” 2014. Web. 16 Oct 2019.

Vancouver:

Zeng F. Silicon-migration technology and its applications to micro-electro-mechanical systems. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2014. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1432232 ; http://repository.ust.hk/ir/bitstream/1783.1-72513/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zeng F. Silicon-migration technology and its applications to micro-electro-mechanical systems. [Thesis]. Hong Kong University of Science and Technology; 2014. Available from: https://doi.org/10.14711/thesis-b1432232 ; http://repository.ust.hk/ir/bitstream/1783.1-72513/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

5. Zheng, Shiyuan. A CMOS digital polar transmitter with low noise ADPLL and high linear PA.

Degree: 2013, Hong Kong University of Science and Technology

 Digitally-intensive RF design has attracted a lot of attention recently because it is highly programmable for multi-standard operation and enables high system integration with digital… (more)

Subjects/Keywords: Radio; Transmitter-receivers; Metal oxide semiconductors, Complementary

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APA (6th Edition):

Zheng, S. (2013). A CMOS digital polar transmitter with low noise ADPLL and high linear PA. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1214710 ; http://repository.ust.hk/ir/bitstream/1783.1-76066/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zheng, Shiyuan. “A CMOS digital polar transmitter with low noise ADPLL and high linear PA.” 2013. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1214710 ; http://repository.ust.hk/ir/bitstream/1783.1-76066/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zheng, Shiyuan. “A CMOS digital polar transmitter with low noise ADPLL and high linear PA.” 2013. Web. 16 Oct 2019.

Vancouver:

Zheng S. A CMOS digital polar transmitter with low noise ADPLL and high linear PA. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2013. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1214710 ; http://repository.ust.hk/ir/bitstream/1783.1-76066/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zheng S. A CMOS digital polar transmitter with low noise ADPLL and high linear PA. [Thesis]. Hong Kong University of Science and Technology; 2013. Available from: https://doi.org/10.14711/thesis-b1214710 ; http://repository.ust.hk/ir/bitstream/1783.1-76066/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

6. Zhang, Milin. Compressive acquisition CMOS image sensor : from algorithm to hardware implementation.

Degree: 2010, Hong Kong University of Science and Technology

 In recent years, image sensors have been widely used in various applications, such as biomedical micro-system applications, mobile imaging, internetvideo and video cameras. Since the… (more)

Subjects/Keywords: Metal oxide semiconductors, Complementary; Image converters

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APA (6th Edition):

Zhang, M. (2010). Compressive acquisition CMOS image sensor : from algorithm to hardware implementation. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1115913 ; http://repository.ust.hk/ir/bitstream/1783.1-7909/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhang, Milin. “Compressive acquisition CMOS image sensor : from algorithm to hardware implementation.” 2010. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1115913 ; http://repository.ust.hk/ir/bitstream/1783.1-7909/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhang, Milin. “Compressive acquisition CMOS image sensor : from algorithm to hardware implementation.” 2010. Web. 16 Oct 2019.

Vancouver:

Zhang M. Compressive acquisition CMOS image sensor : from algorithm to hardware implementation. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2010. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1115913 ; http://repository.ust.hk/ir/bitstream/1783.1-7909/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhang M. Compressive acquisition CMOS image sensor : from algorithm to hardware implementation. [Thesis]. Hong Kong University of Science and Technology; 2010. Available from: https://doi.org/10.14711/thesis-b1115913 ; http://repository.ust.hk/ir/bitstream/1783.1-7909/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

7. Liu, Bing. CMOS image sensor for computed tomography applications.

Degree: 2011, Hong Kong University of Science and Technology

 Computed tomography (CT) is a primary non-invasive medical diagnostic modality. In a CT system, X-ray radiation is normally converted into visible light by a scintillator… (more)

Subjects/Keywords: Metal oxide semiconductors, Complementary; Image converters; Tomography

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APA (6th Edition):

Liu, B. (2011). CMOS image sensor for computed tomography applications. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1155553 ; http://repository.ust.hk/ir/bitstream/1783.1-7612/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Bing. “CMOS image sensor for computed tomography applications.” 2011. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1155553 ; http://repository.ust.hk/ir/bitstream/1783.1-7612/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Bing. “CMOS image sensor for computed tomography applications.” 2011. Web. 16 Oct 2019.

Vancouver:

Liu B. CMOS image sensor for computed tomography applications. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2011. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1155553 ; http://repository.ust.hk/ir/bitstream/1783.1-7612/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu B. CMOS image sensor for computed tomography applications. [Thesis]. Hong Kong University of Science and Technology; 2011. Available from: https://doi.org/10.14711/thesis-b1155553 ; http://repository.ust.hk/ir/bitstream/1783.1-7612/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Hong Kong

8. Li, Chunxia. A study on gate dielectrics for Ge MOS devices.

Degree: PhD, 2010, University of Hong Kong

published_or_final_version

Electrical and Electronic Engineering

Doctoral

Doctor of Philosophy

Advisors/Committee Members: Lai, PT.

Subjects/Keywords: Germanium.; Dielectrics.; Metal oxide semiconductors, Complementary.

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APA (6th Edition):

Li, C. (2010). A study on gate dielectrics for Ge MOS devices. (Doctoral Dissertation). University of Hong Kong. Retrieved from Li, C. [李春霞]. (2010). A study on gate dielectrics for Ge MOS devices. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4370387 ; http://dx.doi.org/10.5353/th_b4370387 ; http://hdl.handle.net/10722/57560

Chicago Manual of Style (16th Edition):

Li, Chunxia. “A study on gate dielectrics for Ge MOS devices.” 2010. Doctoral Dissertation, University of Hong Kong. Accessed October 16, 2019. Li, C. [李春霞]. (2010). A study on gate dielectrics for Ge MOS devices. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4370387 ; http://dx.doi.org/10.5353/th_b4370387 ; http://hdl.handle.net/10722/57560.

MLA Handbook (7th Edition):

Li, Chunxia. “A study on gate dielectrics for Ge MOS devices.” 2010. Web. 16 Oct 2019.

Vancouver:

Li C. A study on gate dielectrics for Ge MOS devices. [Internet] [Doctoral dissertation]. University of Hong Kong; 2010. [cited 2019 Oct 16]. Available from: Li, C. [李春霞]. (2010). A study on gate dielectrics for Ge MOS devices. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4370387 ; http://dx.doi.org/10.5353/th_b4370387 ; http://hdl.handle.net/10722/57560.

Council of Science Editors:

Li C. A study on gate dielectrics for Ge MOS devices. [Doctoral Dissertation]. University of Hong Kong; 2010. Available from: Li, C. [李春霞]. (2010). A study on gate dielectrics for Ge MOS devices. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b4370387 ; http://dx.doi.org/10.5353/th_b4370387 ; http://hdl.handle.net/10722/57560

9. Joplin, Matt. A method for characterization of single-event latchup technologies as a function of geometric variation.

Degree: 2018, University of Tennessee – Chattanooga

Complementary metal-oxide-semiconductor (CMOS) technology is the dominant integrated circuit (IC) technology in modern electronics systems. As CMOS comprises of p-channel and n-channel transistors, there are… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary  – Design and construction

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APA (6th Edition):

Joplin, M. (2018). A method for characterization of single-event latchup technologies as a function of geometric variation. (Masters Thesis). University of Tennessee – Chattanooga. Retrieved from https://scholar.utc.edu/theses/567

Chicago Manual of Style (16th Edition):

Joplin, Matt. “A method for characterization of single-event latchup technologies as a function of geometric variation.” 2018. Masters Thesis, University of Tennessee – Chattanooga. Accessed October 16, 2019. https://scholar.utc.edu/theses/567.

MLA Handbook (7th Edition):

Joplin, Matt. “A method for characterization of single-event latchup technologies as a function of geometric variation.” 2018. Web. 16 Oct 2019.

Vancouver:

Joplin M. A method for characterization of single-event latchup technologies as a function of geometric variation. [Internet] [Masters thesis]. University of Tennessee – Chattanooga; 2018. [cited 2019 Oct 16]. Available from: https://scholar.utc.edu/theses/567.

Council of Science Editors:

Joplin M. A method for characterization of single-event latchup technologies as a function of geometric variation. [Masters Thesis]. University of Tennessee – Chattanooga; 2018. Available from: https://scholar.utc.edu/theses/567


Dublin City University

10. Liu, Jun. Compact modelling in RF CMOS technology.

Degree: School of Electronic Engineering, 2011, Dublin City University

 With the continuous downscaling of complementary metal-oxide-semiconductor (CMOS) technology, the RF performance of metal-oxide-semiconductor field transistors (MOSFETs) has considerably improved over the past years. Today,… (more)

Subjects/Keywords: Electronic engineering; complementary metal-oxide-semiconductor; CMOS

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APA (6th Edition):

Liu, J. (2011). Compact modelling in RF CMOS technology. (Thesis). Dublin City University. Retrieved from http://doras.dcu.ie/16590/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Jun. “Compact modelling in RF CMOS technology.” 2011. Thesis, Dublin City University. Accessed October 16, 2019. http://doras.dcu.ie/16590/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Jun. “Compact modelling in RF CMOS technology.” 2011. Web. 16 Oct 2019.

Vancouver:

Liu J. Compact modelling in RF CMOS technology. [Internet] [Thesis]. Dublin City University; 2011. [cited 2019 Oct 16]. Available from: http://doras.dcu.ie/16590/.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu J. Compact modelling in RF CMOS technology. [Thesis]. Dublin City University; 2011. Available from: http://doras.dcu.ie/16590/

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Columbia University

11. Irez, Kagan. Use of Monotonic Static Logic in Scaled, Leaky CMOS Technologies.

Degree: 2015, Columbia University

 This dissertation explores the characteristics of Monotonic-Static CMOS and its potential applications in leakage reduction in ultra scaled Bulk-Si technology with significant gate leakage currents.… (more)

Subjects/Keywords: Metal oxide semiconductors, Complementary – Testing; Electric circuits; Electric leakage; Metal oxide semiconductors, Complementary; Electrical engineering

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APA (6th Edition):

Irez, K. (2015). Use of Monotonic Static Logic in Scaled, Leaky CMOS Technologies. (Doctoral Dissertation). Columbia University. Retrieved from https://doi.org/10.7916/D86D5S5P

Chicago Manual of Style (16th Edition):

Irez, Kagan. “Use of Monotonic Static Logic in Scaled, Leaky CMOS Technologies.” 2015. Doctoral Dissertation, Columbia University. Accessed October 16, 2019. https://doi.org/10.7916/D86D5S5P.

MLA Handbook (7th Edition):

Irez, Kagan. “Use of Monotonic Static Logic in Scaled, Leaky CMOS Technologies.” 2015. Web. 16 Oct 2019.

Vancouver:

Irez K. Use of Monotonic Static Logic in Scaled, Leaky CMOS Technologies. [Internet] [Doctoral dissertation]. Columbia University; 2015. [cited 2019 Oct 16]. Available from: https://doi.org/10.7916/D86D5S5P.

Council of Science Editors:

Irez K. Use of Monotonic Static Logic in Scaled, Leaky CMOS Technologies. [Doctoral Dissertation]. Columbia University; 2015. Available from: https://doi.org/10.7916/D86D5S5P


Anna University

12. Suveetha dhanaselvam P. Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;.

Degree: Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects, 2015, Anna University

The steady down scaling of complementary metal oxide newlinesemiconductor CMOS device dimensions have lifted the era of micro newlineelectronics and computer aided ultra large scale… (more)

Subjects/Keywords: Complementary metal oxide semiconductor; Ultra large scale integration

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APA (6th Edition):

P, S. d. (2015). Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/43541

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

P, Suveetha dhanaselvam. “Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;.” 2015. Thesis, Anna University. Accessed October 16, 2019. http://shodhganga.inflibnet.ac.in/handle/10603/43541.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

P, Suveetha dhanaselvam. “Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;.” 2015. Web. 16 Oct 2019.

Vancouver:

P Sd. Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;. [Internet] [Thesis]. Anna University; 2015. [cited 2019 Oct 16]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/43541.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

P Sd. Analytical modeling and simulation Of fully depleted triple material Surrounding gate mosfets Considering short channel effects;. [Thesis]. Anna University; 2015. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/43541

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

13. Hsieh, Min-chun. Implementation of Polysilicon Subwavelength Grating Reflectors in Standard Bulk CMOS Foundry Process.

Degree: Master, Electro-Optical Engineering, 2016, NSYSU

 We have successfully demonstrated HCG reflectors in standard bulk CMOS by simply employing polysilicon gate as the high-index grating layer to reflect the 1310-nm and… (more)

Subjects/Keywords: complementary metal oxide semiconductor; polysilicon; High-index-contrast grating

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APA (6th Edition):

Hsieh, M. (2016). Implementation of Polysilicon Subwavelength Grating Reflectors in Standard Bulk CMOS Foundry Process. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0103116-005316

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsieh, Min-chun. “Implementation of Polysilicon Subwavelength Grating Reflectors in Standard Bulk CMOS Foundry Process.” 2016. Thesis, NSYSU. Accessed October 16, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0103116-005316.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsieh, Min-chun. “Implementation of Polysilicon Subwavelength Grating Reflectors in Standard Bulk CMOS Foundry Process.” 2016. Web. 16 Oct 2019.

Vancouver:

Hsieh M. Implementation of Polysilicon Subwavelength Grating Reflectors in Standard Bulk CMOS Foundry Process. [Internet] [Thesis]. NSYSU; 2016. [cited 2019 Oct 16]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0103116-005316.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsieh M. Implementation of Polysilicon Subwavelength Grating Reflectors in Standard Bulk CMOS Foundry Process. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0103116-005316

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

14. Desikachari, Ranganathan. High-speed CMOS dual-modulus presalers for frequency synthesis.

Degree: MS, Electrical and Computer Engineering, 2003, Oregon State University

 Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary

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APA (6th Edition):

Desikachari, R. (2003). High-speed CMOS dual-modulus presalers for frequency synthesis. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/11724

Chicago Manual of Style (16th Edition):

Desikachari, Ranganathan. “High-speed CMOS dual-modulus presalers for frequency synthesis.” 2003. Masters Thesis, Oregon State University. Accessed October 16, 2019. http://hdl.handle.net/1957/11724.

MLA Handbook (7th Edition):

Desikachari, Ranganathan. “High-speed CMOS dual-modulus presalers for frequency synthesis.” 2003. Web. 16 Oct 2019.

Vancouver:

Desikachari R. High-speed CMOS dual-modulus presalers for frequency synthesis. [Internet] [Masters thesis]. Oregon State University; 2003. [cited 2019 Oct 16]. Available from: http://hdl.handle.net/1957/11724.

Council of Science Editors:

Desikachari R. High-speed CMOS dual-modulus presalers for frequency synthesis. [Masters Thesis]. Oregon State University; 2003. Available from: http://hdl.handle.net/1957/11724


Oregon State University

15. Natesan, Peroly. Comparison and analysis of jitter in CMOS ring oscillators.

Degree: MS, Electrical and Computer Engineering, 2003, Oregon State University

 A comparison and analysis of jitter for five different architectures of ring oscillators using a novel simulation technique developed by Professor Forbes' group is presented.… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary

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APA (6th Edition):

Natesan, P. (2003). Comparison and analysis of jitter in CMOS ring oscillators. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/11795

Chicago Manual of Style (16th Edition):

Natesan, Peroly. “Comparison and analysis of jitter in CMOS ring oscillators.” 2003. Masters Thesis, Oregon State University. Accessed October 16, 2019. http://hdl.handle.net/1957/11795.

MLA Handbook (7th Edition):

Natesan, Peroly. “Comparison and analysis of jitter in CMOS ring oscillators.” 2003. Web. 16 Oct 2019.

Vancouver:

Natesan P. Comparison and analysis of jitter in CMOS ring oscillators. [Internet] [Masters thesis]. Oregon State University; 2003. [cited 2019 Oct 16]. Available from: http://hdl.handle.net/1957/11795.

Council of Science Editors:

Natesan P. Comparison and analysis of jitter in CMOS ring oscillators. [Masters Thesis]. Oregon State University; 2003. Available from: http://hdl.handle.net/1957/11795


Oregon State University

16. Sadate, Aline C. A substrate noise coupling model for lightly doped CMOS processes.

Degree: MS, Electrical and Computer Engineering, 2000, Oregon State University

 This thesis presents a design-oriented model for lightly doped CMOS substrates. The model predicts the substrate noise coupling between noisy digital and sensitive analog blocks… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary

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APA (6th Edition):

Sadate, A. C. (2000). A substrate noise coupling model for lightly doped CMOS processes. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/8280

Chicago Manual of Style (16th Edition):

Sadate, Aline C. “A substrate noise coupling model for lightly doped CMOS processes.” 2000. Masters Thesis, Oregon State University. Accessed October 16, 2019. http://hdl.handle.net/1957/8280.

MLA Handbook (7th Edition):

Sadate, Aline C. “A substrate noise coupling model for lightly doped CMOS processes.” 2000. Web. 16 Oct 2019.

Vancouver:

Sadate AC. A substrate noise coupling model for lightly doped CMOS processes. [Internet] [Masters thesis]. Oregon State University; 2000. [cited 2019 Oct 16]. Available from: http://hdl.handle.net/1957/8280.

Council of Science Editors:

Sadate AC. A substrate noise coupling model for lightly doped CMOS processes. [Masters Thesis]. Oregon State University; 2000. Available from: http://hdl.handle.net/1957/8280


Oregon State University

17. Sharma, Ajit. Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates.

Degree: MS, Electrical and Computer Engineering, 2003, Oregon State University

 This thesis presents an automated methodology to calibrate the substrate profile for accurate prediction of substrate parasitics using Green's function based extractors. The technique requires… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary

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APA (6th Edition):

Sharma, A. (2003). Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/31842

Chicago Manual of Style (16th Edition):

Sharma, Ajit. “Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates.” 2003. Masters Thesis, Oregon State University. Accessed October 16, 2019. http://hdl.handle.net/1957/31842.

MLA Handbook (7th Edition):

Sharma, Ajit. “Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates.” 2003. Web. 16 Oct 2019.

Vancouver:

Sharma A. Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates. [Internet] [Masters thesis]. Oregon State University; 2003. [cited 2019 Oct 16]. Available from: http://hdl.handle.net/1957/31842.

Council of Science Editors:

Sharma A. Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates. [Masters Thesis]. Oregon State University; 2003. Available from: http://hdl.handle.net/1957/31842


Oregon State University

18. Maskai, Sailesh R. Design of complex digital blocks using folded source-coupled logic for mixed-mode applications.

Degree: MS, Electrical and Computer Engineering, 1991, Oregon State University

 A series of complex digital blocks have been designed and fabricated using the newly developed current-mode differential CMOS logic family viz. the Folded Source-Coupled Logic… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary

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APA (6th Edition):

Maskai, S. R. (1991). Design of complex digital blocks using folded source-coupled logic for mixed-mode applications. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/37131

Chicago Manual of Style (16th Edition):

Maskai, Sailesh R. “Design of complex digital blocks using folded source-coupled logic for mixed-mode applications.” 1991. Masters Thesis, Oregon State University. Accessed October 16, 2019. http://hdl.handle.net/1957/37131.

MLA Handbook (7th Edition):

Maskai, Sailesh R. “Design of complex digital blocks using folded source-coupled logic for mixed-mode applications.” 1991. Web. 16 Oct 2019.

Vancouver:

Maskai SR. Design of complex digital blocks using folded source-coupled logic for mixed-mode applications. [Internet] [Masters thesis]. Oregon State University; 1991. [cited 2019 Oct 16]. Available from: http://hdl.handle.net/1957/37131.

Council of Science Editors:

Maskai SR. Design of complex digital blocks using folded source-coupled logic for mixed-mode applications. [Masters Thesis]. Oregon State University; 1991. Available from: http://hdl.handle.net/1957/37131


Oregon State University

19. Fiez, Theresa S. Design of CMOS switched-current filters.

Degree: PhD, Electrical and Computer Engineering, 1990, Oregon State University

 The design and implementation of Switched-Current (SI) ladder filters is described. SI filters require only a standard digital CMOS process and the power supply voltage… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary

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APA (6th Edition):

Fiez, T. S. (1990). Design of CMOS switched-current filters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/37183

Chicago Manual of Style (16th Edition):

Fiez, Theresa S. “Design of CMOS switched-current filters.” 1990. Doctoral Dissertation, Oregon State University. Accessed October 16, 2019. http://hdl.handle.net/1957/37183.

MLA Handbook (7th Edition):

Fiez, Theresa S. “Design of CMOS switched-current filters.” 1990. Web. 16 Oct 2019.

Vancouver:

Fiez TS. Design of CMOS switched-current filters. [Internet] [Doctoral dissertation]. Oregon State University; 1990. [cited 2019 Oct 16]. Available from: http://hdl.handle.net/1957/37183.

Council of Science Editors:

Fiez TS. Design of CMOS switched-current filters. [Doctoral Dissertation]. Oregon State University; 1990. Available from: http://hdl.handle.net/1957/37183


Hong Kong University of Science and Technology

20. Liu, Rui. CMOS class-C VCO and QVCO for WLAN applications.

Degree: 2013, Hong Kong University of Science and Technology

 WLAN (Wireless Local Area Network) applications based on 802.11 protocol family have enjoyed a tremendous growth in both home and enterprise market since it was… (more)

Subjects/Keywords: Voltage-controlled oscillators; Wireless LANs; Metal oxide semiconductors, Complementary

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APA (6th Edition):

Liu, R. (2013). CMOS class-C VCO and QVCO for WLAN applications. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1255633 ; http://repository.ust.hk/ir/bitstream/1783.1-62320/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Rui. “CMOS class-C VCO and QVCO for WLAN applications.” 2013. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1255633 ; http://repository.ust.hk/ir/bitstream/1783.1-62320/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Rui. “CMOS class-C VCO and QVCO for WLAN applications.” 2013. Web. 16 Oct 2019.

Vancouver:

Liu R. CMOS class-C VCO and QVCO for WLAN applications. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2013. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1255633 ; http://repository.ust.hk/ir/bitstream/1783.1-62320/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu R. CMOS class-C VCO and QVCO for WLAN applications. [Thesis]. Hong Kong University of Science and Technology; 2013. Available from: https://doi.org/10.14711/thesis-b1255633 ; http://repository.ust.hk/ir/bitstream/1783.1-62320/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

21. Hou, Zhengxiong. CMOS photodetector and limiting amplifier for high speed optical communication.

Degree: 2014, Hong Kong University of Science and Technology

 Optical communication is essential in industrial applications and the consumer market. Active optical fiber has great potential to replace copper in short-distance wire line communication.… (more)

Subjects/Keywords: Optical detectors; Metal oxide semiconductors, Complementary; Light amplifiers; Optical communications

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hou, Z. (2014). CMOS photodetector and limiting amplifier for high speed optical communication. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1333704 ; http://repository.ust.hk/ir/bitstream/1783.1-71020/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hou, Zhengxiong. “CMOS photodetector and limiting amplifier for high speed optical communication.” 2014. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1333704 ; http://repository.ust.hk/ir/bitstream/1783.1-71020/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hou, Zhengxiong. “CMOS photodetector and limiting amplifier for high speed optical communication.” 2014. Web. 16 Oct 2019.

Vancouver:

Hou Z. CMOS photodetector and limiting amplifier for high speed optical communication. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2014. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1333704 ; http://repository.ust.hk/ir/bitstream/1783.1-71020/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hou Z. CMOS photodetector and limiting amplifier for high speed optical communication. [Thesis]. Hong Kong University of Science and Technology; 2014. Available from: https://doi.org/10.14711/thesis-b1333704 ; http://repository.ust.hk/ir/bitstream/1783.1-71020/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

22. Wang, Yijin. Gold nanoparticles based DNA chips utilizing CMOS technologies.

Degree: 2010, Hong Kong University of Science and Technology

 Biochip fabricated with micro-electronic technology has become a new powerful tool in molecular biology. In particular, high-density deoxyribonucleic acid (DNA) micro-array can significantly reduce cost… (more)

Subjects/Keywords: Biosensors; DNA  – Analysis; Nanoparticles; Metal oxide semiconductors, Complementary

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APA (6th Edition):

Wang, Y. (2010). Gold nanoparticles based DNA chips utilizing CMOS technologies. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1115856 ; http://repository.ust.hk/ir/bitstream/1783.1-6891/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Yijin. “Gold nanoparticles based DNA chips utilizing CMOS technologies.” 2010. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1115856 ; http://repository.ust.hk/ir/bitstream/1783.1-6891/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Yijin. “Gold nanoparticles based DNA chips utilizing CMOS technologies.” 2010. Web. 16 Oct 2019.

Vancouver:

Wang Y. Gold nanoparticles based DNA chips utilizing CMOS technologies. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2010. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1115856 ; http://repository.ust.hk/ir/bitstream/1783.1-6891/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang Y. Gold nanoparticles based DNA chips utilizing CMOS technologies. [Thesis]. Hong Kong University of Science and Technology; 2010. Available from: https://doi.org/10.14711/thesis-b1115856 ; http://repository.ust.hk/ir/bitstream/1783.1-6891/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

23. Pan, Xiaofang. Performance enhanced gas sensors through nanomaterial/nanostructure for functional electronic nose applications.

Degree: 2015, Hong Kong University of Science and Technology

 In the past decade, there has been a growing interest for the development of olfactory machines and Electronic Nose systems in order to fulfill a… (more)

Subjects/Keywords: Gas detectors; Metal oxide semiconductors, Complementary; Nanostructured materials

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APA (6th Edition):

Pan, X. (2015). Performance enhanced gas sensors through nanomaterial/nanostructure for functional electronic nose applications. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1450632 ; http://repository.ust.hk/ir/bitstream/1783.1-83688/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Pan, Xiaofang. “Performance enhanced gas sensors through nanomaterial/nanostructure for functional electronic nose applications.” 2015. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1450632 ; http://repository.ust.hk/ir/bitstream/1783.1-83688/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Pan, Xiaofang. “Performance enhanced gas sensors through nanomaterial/nanostructure for functional electronic nose applications.” 2015. Web. 16 Oct 2019.

Vancouver:

Pan X. Performance enhanced gas sensors through nanomaterial/nanostructure for functional electronic nose applications. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2015. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1450632 ; http://repository.ust.hk/ir/bitstream/1783.1-83688/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Pan X. Performance enhanced gas sensors through nanomaterial/nanostructure for functional electronic nose applications. [Thesis]. Hong Kong University of Science and Technology; 2015. Available from: https://doi.org/10.14711/thesis-b1450632 ; http://repository.ust.hk/ir/bitstream/1783.1-83688/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

24. Pan, Quan. Optoelectronic receivers in standard CMOS for short-range optical communications.

Degree: 2014, Hong Kong University of Science and Technology

 Short-range optical communications with data rates above 10 Gb/s have drawn significant research efforts in recent years as conventional copper cables have become less competitive… (more)

Subjects/Keywords: Optoelectronic devices; Integrated optics; Metal oxide semiconductors, Complementary

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APA (6th Edition):

Pan, Q. (2014). Optoelectronic receivers in standard CMOS for short-range optical communications. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1288896 ; http://repository.ust.hk/ir/bitstream/1783.1-84790/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Pan, Quan. “Optoelectronic receivers in standard CMOS for short-range optical communications.” 2014. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1288896 ; http://repository.ust.hk/ir/bitstream/1783.1-84790/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Pan, Quan. “Optoelectronic receivers in standard CMOS for short-range optical communications.” 2014. Web. 16 Oct 2019.

Vancouver:

Pan Q. Optoelectronic receivers in standard CMOS for short-range optical communications. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2014. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1288896 ; http://repository.ust.hk/ir/bitstream/1783.1-84790/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Pan Q. Optoelectronic receivers in standard CMOS for short-range optical communications. [Thesis]. Hong Kong University of Science and Technology; 2014. Available from: https://doi.org/10.14711/thesis-b1288896 ; http://repository.ust.hk/ir/bitstream/1783.1-84790/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

25. Raju, Salahuddin. Integration of low loss interconnects in CMOS.

Degree: 2016, Hong Kong University of Science and Technology

 In this work, an interlayer dielectric with an extremely low dielectric constant of 1.96 is achieved using SiO2 with vertically aligned cylindrical pores. Vertically grown… (more)

Subjects/Keywords: Interconnects (Integrated circuit technology); Antennas (Electronics); Metal oxide semiconductors, Complementary

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APA (6th Edition):

Raju, S. (2016). Integration of low loss interconnects in CMOS. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1627112 ; http://repository.ust.hk/ir/bitstream/1783.1-86942/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Raju, Salahuddin. “Integration of low loss interconnects in CMOS.” 2016. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1627112 ; http://repository.ust.hk/ir/bitstream/1783.1-86942/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Raju, Salahuddin. “Integration of low loss interconnects in CMOS.” 2016. Web. 16 Oct 2019.

Vancouver:

Raju S. Integration of low loss interconnects in CMOS. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2016. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1627112 ; http://repository.ust.hk/ir/bitstream/1783.1-86942/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Raju S. Integration of low loss interconnects in CMOS. [Thesis]. Hong Kong University of Science and Technology; 2016. Available from: https://doi.org/10.14711/thesis-b1627112 ; http://repository.ust.hk/ir/bitstream/1783.1-86942/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

26. Zhu, Yaguang. Column processing technology for CMOS image sensor.

Degree: 2016, Hong Kong University of Science and Technology

 In recent years, the worldwide market for image sensors has been growing rapidly and they are still in large demand, especially the CMOS image sensor… (more)

Subjects/Keywords: Image converters; Design and construction; Metal oxide semiconductors, Complementary

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APA (6th Edition):

Zhu, Y. (2016). Column processing technology for CMOS image sensor. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1627686 ; http://repository.ust.hk/ir/bitstream/1783.1-86950/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhu, Yaguang. “Column processing technology for CMOS image sensor.” 2016. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1627686 ; http://repository.ust.hk/ir/bitstream/1783.1-86950/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhu, Yaguang. “Column processing technology for CMOS image sensor.” 2016. Web. 16 Oct 2019.

Vancouver:

Zhu Y. Column processing technology for CMOS image sensor. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2016. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1627686 ; http://repository.ust.hk/ir/bitstream/1783.1-86950/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhu Y. Column processing technology for CMOS image sensor. [Thesis]. Hong Kong University of Science and Technology; 2016. Available from: https://doi.org/10.14711/thesis-b1627686 ; http://repository.ust.hk/ir/bitstream/1783.1-86950/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

27. Tang, Fang. Low power techniques and energy harvesting for CMOS image sensor.

Degree: 2013, Hong Kong University of Science and Technology

 CMOS image sensor technology is developing rapidly as the device feature size is continuously being scaled down according to Moore’s Law. With pixel resolution and… (more)

Subjects/Keywords: Image converters; Metal oxide semiconductors, Complementary; Image processing; Digital techniques

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APA (6th Edition):

Tang, F. (2013). Low power techniques and energy harvesting for CMOS image sensor. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1214722 ; http://repository.ust.hk/ir/bitstream/1783.1-76064/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tang, Fang. “Low power techniques and energy harvesting for CMOS image sensor.” 2013. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1214722 ; http://repository.ust.hk/ir/bitstream/1783.1-76064/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tang, Fang. “Low power techniques and energy harvesting for CMOS image sensor.” 2013. Web. 16 Oct 2019.

Vancouver:

Tang F. Low power techniques and energy harvesting for CMOS image sensor. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2013. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1214722 ; http://repository.ust.hk/ir/bitstream/1783.1-76064/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tang F. Low power techniques and energy harvesting for CMOS image sensor. [Thesis]. Hong Kong University of Science and Technology; 2013. Available from: https://doi.org/10.14711/thesis-b1214722 ; http://repository.ust.hk/ir/bitstream/1783.1-76064/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

28. Yin, Jun. A DC-48 GHz CMOS all-digital frequency synthesizer for software-defined radios.

Degree: 2013, Hong Kong University of Science and Technology

 Recently, various communication standards with different carrier frequencies, channel bandwidth, and modulation schemes are widely used every day. The demanding of anywhere and anytime connectivity… (more)

Subjects/Keywords: Software radio; Frequency synthesizers; Metal oxide semiconductors, Complementary

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yin, J. (2013). A DC-48 GHz CMOS all-digital frequency synthesizer for software-defined radios. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1214711 ; http://repository.ust.hk/ir/bitstream/1783.1-76065/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yin, Jun. “A DC-48 GHz CMOS all-digital frequency synthesizer for software-defined radios.” 2013. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1214711 ; http://repository.ust.hk/ir/bitstream/1783.1-76065/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yin, Jun. “A DC-48 GHz CMOS all-digital frequency synthesizer for software-defined radios.” 2013. Web. 16 Oct 2019.

Vancouver:

Yin J. A DC-48 GHz CMOS all-digital frequency synthesizer for software-defined radios. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2013. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1214711 ; http://repository.ust.hk/ir/bitstream/1783.1-76065/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yin J. A DC-48 GHz CMOS all-digital frequency synthesizer for software-defined radios. [Thesis]. Hong Kong University of Science and Technology; 2013. Available from: https://doi.org/10.14711/thesis-b1214711 ; http://repository.ust.hk/ir/bitstream/1783.1-76065/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

29. Cao, Yuan. A high dynamic range CMOS image sensor with analog implementation of gamma correction.

Degree: 2010, Hong Kong University of Science and Technology

 Gamma correction is an essential function in every modern display device suchas plasma display panel (PDP), cathode ray tube (CRT), organic light emitting diode (OLED)… (more)

Subjects/Keywords: Metal oxide semiconductors, Complementary; Image processing; Digital techniques; Gamma functions

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Cao, Y. (2010). A high dynamic range CMOS image sensor with analog implementation of gamma correction. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1115328 ; http://repository.ust.hk/ir/bitstream/1783.1-7923/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Cao, Yuan. “A high dynamic range CMOS image sensor with analog implementation of gamma correction.” 2010. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1115328 ; http://repository.ust.hk/ir/bitstream/1783.1-7923/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Cao, Yuan. “A high dynamic range CMOS image sensor with analog implementation of gamma correction.” 2010. Web. 16 Oct 2019.

Vancouver:

Cao Y. A high dynamic range CMOS image sensor with analog implementation of gamma correction. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2010. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1115328 ; http://repository.ust.hk/ir/bitstream/1783.1-7923/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Cao Y. A high dynamic range CMOS image sensor with analog implementation of gamma correction. [Thesis]. Hong Kong University of Science and Technology; 2010. Available from: https://doi.org/10.14711/thesis-b1115328 ; http://repository.ust.hk/ir/bitstream/1783.1-7923/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

30. Ng, Kwok Ping. Design of high density one time programmable memory in standard CMOS process.

Degree: 2009, Hong Kong University of Science and Technology

 One time programmable memory (OTP) is always an important part in integrated circuits and/or electronic devices. Its applications include secure key storage, implantable medical devices,… (more)

Subjects/Keywords: Semiconductor storage devices  – Design and construction; Metal oxide semiconductors, Complementary

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ng, K. P. (2009). Design of high density one time programmable memory in standard CMOS process. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1070083 ; http://repository.ust.hk/ir/bitstream/1783.1-7590/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ng, Kwok Ping. “Design of high density one time programmable memory in standard CMOS process.” 2009. Thesis, Hong Kong University of Science and Technology. Accessed October 16, 2019. https://doi.org/10.14711/thesis-b1070083 ; http://repository.ust.hk/ir/bitstream/1783.1-7590/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ng, Kwok Ping. “Design of high density one time programmable memory in standard CMOS process.” 2009. Web. 16 Oct 2019.

Vancouver:

Ng KP. Design of high density one time programmable memory in standard CMOS process. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2009. [cited 2019 Oct 16]. Available from: https://doi.org/10.14711/thesis-b1070083 ; http://repository.ust.hk/ir/bitstream/1783.1-7590/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ng KP. Design of high density one time programmable memory in standard CMOS process. [Thesis]. Hong Kong University of Science and Technology; 2009. Available from: https://doi.org/10.14711/thesis-b1070083 ; http://repository.ust.hk/ir/bitstream/1783.1-7590/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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