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You searched for subject:(Comparator). Showing records 1 – 30 of 120 total matches.

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Southern Illinois University

1. West, Paul Martin. TECHNIQUES FOR DIGITAL LOW DROPOUT REGULATOR MODELING AND TRANSIENT RESPONSE ENHANCEMENT.

Degree: MS, Electrical and Computer Engineering, 2016, Southern Illinois University

  Low dropout regulators (LDOs) are important components for power management in modern integrated circuits. With the continued scaling down of power supply voltage, digital… (more)

Subjects/Keywords: Comparator; LDO; Modeling; Transient Response; Voltage Regulator

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

West, P. M. (2016). TECHNIQUES FOR DIGITAL LOW DROPOUT REGULATOR MODELING AND TRANSIENT RESPONSE ENHANCEMENT. (Masters Thesis). Southern Illinois University. Retrieved from https://opensiuc.lib.siu.edu/theses/1878

Chicago Manual of Style (16th Edition):

West, Paul Martin. “TECHNIQUES FOR DIGITAL LOW DROPOUT REGULATOR MODELING AND TRANSIENT RESPONSE ENHANCEMENT.” 2016. Masters Thesis, Southern Illinois University. Accessed March 07, 2021. https://opensiuc.lib.siu.edu/theses/1878.

MLA Handbook (7th Edition):

West, Paul Martin. “TECHNIQUES FOR DIGITAL LOW DROPOUT REGULATOR MODELING AND TRANSIENT RESPONSE ENHANCEMENT.” 2016. Web. 07 Mar 2021.

Vancouver:

West PM. TECHNIQUES FOR DIGITAL LOW DROPOUT REGULATOR MODELING AND TRANSIENT RESPONSE ENHANCEMENT. [Internet] [Masters thesis]. Southern Illinois University; 2016. [cited 2021 Mar 07]. Available from: https://opensiuc.lib.siu.edu/theses/1878.

Council of Science Editors:

West PM. TECHNIQUES FOR DIGITAL LOW DROPOUT REGULATOR MODELING AND TRANSIENT RESPONSE ENHANCEMENT. [Masters Thesis]. Southern Illinois University; 2016. Available from: https://opensiuc.lib.siu.edu/theses/1878


NSYSU

2. Chen , Hsin-cheng. Implementation a Two-Stage Pipelined Successive Approximation Analog-to-Digital Converter.

Degree: Master, Computer Science and Engineering, 2015, NSYSU

 A high speed and low power Two-Stage Pipelined Successive Approximation Analog-to-Digital Converter is proposed in this thesis. Using only two stage in the proposed ADC… (more)

Subjects/Keywords: Successive Approximation ADC; Error correction; Dynamic comparator; Pipelined ADC; Additional comparator for MSB

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APA (6th Edition):

Chen , H. (2015). Implementation a Two-Stage Pipelined Successive Approximation Analog-to-Digital Converter. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0616115-104146

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen , Hsin-cheng. “Implementation a Two-Stage Pipelined Successive Approximation Analog-to-Digital Converter.” 2015. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0616115-104146.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen , Hsin-cheng. “Implementation a Two-Stage Pipelined Successive Approximation Analog-to-Digital Converter.” 2015. Web. 07 Mar 2021.

Vancouver:

Chen H. Implementation a Two-Stage Pipelined Successive Approximation Analog-to-Digital Converter. [Internet] [Thesis]. NSYSU; 2015. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0616115-104146.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen H. Implementation a Two-Stage Pipelined Successive Approximation Analog-to-Digital Converter. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0616115-104146

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

3. Chen, Yen-yu. On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application.

Degree: Master, Electrical Engineering, 2011, NSYSU

 In recent years, due to advances in semiconductor technology and mature integrated circuit design, complex signal processing equipment is beginning to be replaced by the… (more)

Subjects/Keywords: piezoelectric crystal; programmable frequency generator; resonance frequency; amplitude detector; latch comparator

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APA (6th Edition):

Chen, Y. (2011). On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822111-163935

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Yen-yu. “On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application.” 2011. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822111-163935.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Yen-yu. “On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application.” 2011. Web. 07 Mar 2021.

Vancouver:

Chen Y. On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application. [Internet] [Thesis]. NSYSU; 2011. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822111-163935.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen Y. On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822111-163935

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

4. Kang, Ruei-Gen. Third Order Continuous-Time Sigma-Delta Modulator with 1.5bit Quantizer.

Degree: Master, Electrical Engineering, 2011, NSYSU

 The thesis proposes a third order continuous-time sigma delta modulator used in GSM. We used a special 1.5bit quantizer, and to use its three different… (more)

Subjects/Keywords: 1.5bit quantizer; continuous-time; sigma-delta modulator; comparator

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APA (6th Edition):

Kang, R. (2011). Third Order Continuous-Time Sigma-Delta Modulator with 1.5bit Quantizer. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-145845

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kang, Ruei-Gen. “Third Order Continuous-Time Sigma-Delta Modulator with 1.5bit Quantizer.” 2011. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-145845.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kang, Ruei-Gen. “Third Order Continuous-Time Sigma-Delta Modulator with 1.5bit Quantizer.” 2011. Web. 07 Mar 2021.

Vancouver:

Kang R. Third Order Continuous-Time Sigma-Delta Modulator with 1.5bit Quantizer. [Internet] [Thesis]. NSYSU; 2011. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-145845.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kang R. Third Order Continuous-Time Sigma-Delta Modulator with 1.5bit Quantizer. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-145845

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

5. Huang, Hui-wen. A 10-bit 250MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC.

Degree: Master, Computer Science and Engineering, 2015, NSYSU

 This thesis presents the architecture of a 10-bit 250-MS/s two-step pipelined analog-to-digital converter for reducing power consumption in TSMC 90nm CMOS technology. The first stage… (more)

Subjects/Keywords: Dynamic Comparator; Bootstrapped Switch; Successive Approximation ADC; Binary Search ADC

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, H. (2015). A 10-bit 250MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0622115-183824

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Hui-wen. “A 10-bit 250MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC.” 2015. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0622115-183824.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Hui-wen. “A 10-bit 250MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC.” 2015. Web. 07 Mar 2021.

Vancouver:

Huang H. A 10-bit 250MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC. [Internet] [Thesis]. NSYSU; 2015. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0622115-183824.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang H. A 10-bit 250MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0622115-183824

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

6. Kim, Yongtae. Energy Efficient and Error Resilient Neuromorphic Computing in VLSI.

Degree: PhD, Electrical Engineering, 2013, Texas A&M University

 Realization of the conventional Von Neumann architecture faces increasing challenges due to growing process variations, device reliability and power consumption. As an appealing architectural solution,… (more)

Subjects/Keywords: neuromorphic computing; approximate computing; neuromorphic processor; approximate adder; approximate comparator

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APA (6th Edition):

Kim, Y. (2013). Energy Efficient and Error Resilient Neuromorphic Computing in VLSI. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/151721

Chicago Manual of Style (16th Edition):

Kim, Yongtae. “Energy Efficient and Error Resilient Neuromorphic Computing in VLSI.” 2013. Doctoral Dissertation, Texas A&M University. Accessed March 07, 2021. http://hdl.handle.net/1969.1/151721.

MLA Handbook (7th Edition):

Kim, Yongtae. “Energy Efficient and Error Resilient Neuromorphic Computing in VLSI.” 2013. Web. 07 Mar 2021.

Vancouver:

Kim Y. Energy Efficient and Error Resilient Neuromorphic Computing in VLSI. [Internet] [Doctoral dissertation]. Texas A&M University; 2013. [cited 2021 Mar 07]. Available from: http://hdl.handle.net/1969.1/151721.

Council of Science Editors:

Kim Y. Energy Efficient and Error Resilient Neuromorphic Computing in VLSI. [Doctoral Dissertation]. Texas A&M University; 2013. Available from: http://hdl.handle.net/1969.1/151721


Texas A&M University

7. Gao, Yang. An Energy Efficient Asynchronous Time-Domain Comparator.

Degree: MS, Electrical Engineering, 2013, Texas A&M University

 In energy-limited applications, such as wearable battery powered systems and implantable circuits for biological applications, ultra-low power analog-to-digital converters (ADCs) are essential for sustaining long… (more)

Subjects/Keywords: Analog-to-digital converter; asynchronous circuits; comparator; successive approximation

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APA (6th Edition):

Gao, Y. (2013). An Energy Efficient Asynchronous Time-Domain Comparator. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/149314

Chicago Manual of Style (16th Edition):

Gao, Yang. “An Energy Efficient Asynchronous Time-Domain Comparator.” 2013. Masters Thesis, Texas A&M University. Accessed March 07, 2021. http://hdl.handle.net/1969.1/149314.

MLA Handbook (7th Edition):

Gao, Yang. “An Energy Efficient Asynchronous Time-Domain Comparator.” 2013. Web. 07 Mar 2021.

Vancouver:

Gao Y. An Energy Efficient Asynchronous Time-Domain Comparator. [Internet] [Masters thesis]. Texas A&M University; 2013. [cited 2021 Mar 07]. Available from: http://hdl.handle.net/1969.1/149314.

Council of Science Editors:

Gao Y. An Energy Efficient Asynchronous Time-Domain Comparator. [Masters Thesis]. Texas A&M University; 2013. Available from: http://hdl.handle.net/1969.1/149314


Penn State University

8. Park, Jun Hyuk. IMPROVED TIQ FLASH ADC TRANSISTOR SIZING ALGORITHMS TO REDUCE LINEARITY ERRORS.

Degree: 2017, Penn State University

 Integral nonlinearity and differential nonlinearity are the two main performance parameters for a high speed flash analog-to-digital converter, which determine the accuracy of the converter.… (more)

Subjects/Keywords: TIQ Flash ADC; TIQ Voltage Comparator; Nonlinearity; DNL; INL; Process Variation

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APA (6th Edition):

Park, J. H. (2017). IMPROVED TIQ FLASH ADC TRANSISTOR SIZING ALGORITHMS TO REDUCE LINEARITY ERRORS. (Thesis). Penn State University. Retrieved from https://submit-etda.libraries.psu.edu/catalog/14332jzp152

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Park, Jun Hyuk. “IMPROVED TIQ FLASH ADC TRANSISTOR SIZING ALGORITHMS TO REDUCE LINEARITY ERRORS.” 2017. Thesis, Penn State University. Accessed March 07, 2021. https://submit-etda.libraries.psu.edu/catalog/14332jzp152.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Park, Jun Hyuk. “IMPROVED TIQ FLASH ADC TRANSISTOR SIZING ALGORITHMS TO REDUCE LINEARITY ERRORS.” 2017. Web. 07 Mar 2021.

Vancouver:

Park JH. IMPROVED TIQ FLASH ADC TRANSISTOR SIZING ALGORITHMS TO REDUCE LINEARITY ERRORS. [Internet] [Thesis]. Penn State University; 2017. [cited 2021 Mar 07]. Available from: https://submit-etda.libraries.psu.edu/catalog/14332jzp152.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Park JH. IMPROVED TIQ FLASH ADC TRANSISTOR SIZING ALGORITHMS TO REDUCE LINEARITY ERRORS. [Thesis]. Penn State University; 2017. Available from: https://submit-etda.libraries.psu.edu/catalog/14332jzp152

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


UCLA

9. Xu, Hao. Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs.

Degree: Electrical Engineering, 2018, UCLA

 Mixed signal circuit design often involves circuits that are time-varying or highly non-linear, which further results in systems that are difficult to characterize using established… (more)

Subjects/Keywords: Electrical engineering; ADC; Analog; comparator; Integrated circuits; mixed signal; PLL

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APA (6th Edition):

Xu, H. (2018). Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs. (Thesis). UCLA. Retrieved from http://www.escholarship.org/uc/item/88h8b5t3

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Xu, Hao. “Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs.” 2018. Thesis, UCLA. Accessed March 07, 2021. http://www.escholarship.org/uc/item/88h8b5t3.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Xu, Hao. “Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs.” 2018. Web. 07 Mar 2021.

Vancouver:

Xu H. Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs. [Internet] [Thesis]. UCLA; 2018. [cited 2021 Mar 07]. Available from: http://www.escholarship.org/uc/item/88h8b5t3.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Xu H. Mixed-Signal Circuit Design Driven by Analysis: ADCs, Comparators, and PLLs. [Thesis]. UCLA; 2018. Available from: http://www.escholarship.org/uc/item/88h8b5t3

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Sarmento, Joaquim Miranda. Do public private partnerships create value for money to the public sector? A financial analysis using the Portuguese experience.

Degree: 2009, RCAAP

JEL Classification System: G38 - Government Policy and Regulation; H54 - Infrastructures; Other Public Investment and Capital Stock

Over the last few decades, public-private partnerships… (more)

Subjects/Keywords: Public private partnerships; Value for money; Public sector comparator; Discount rate

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APA (6th Edition):

Sarmento, J. M. (2009). Do public private partnerships create value for money to the public sector? A financial analysis using the Portuguese experience. (Thesis). RCAAP. Retrieved from https://www.rcaap.pt/detail.jsp?id=oai:repositorio.iscte-iul.pt:10071/1826

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sarmento, Joaquim Miranda. “Do public private partnerships create value for money to the public sector? A financial analysis using the Portuguese experience.” 2009. Thesis, RCAAP. Accessed March 07, 2021. https://www.rcaap.pt/detail.jsp?id=oai:repositorio.iscte-iul.pt:10071/1826.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sarmento, Joaquim Miranda. “Do public private partnerships create value for money to the public sector? A financial analysis using the Portuguese experience.” 2009. Web. 07 Mar 2021.

Vancouver:

Sarmento JM. Do public private partnerships create value for money to the public sector? A financial analysis using the Portuguese experience. [Internet] [Thesis]. RCAAP; 2009. [cited 2021 Mar 07]. Available from: https://www.rcaap.pt/detail.jsp?id=oai:repositorio.iscte-iul.pt:10071/1826.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sarmento JM. Do public private partnerships create value for money to the public sector? A financial analysis using the Portuguese experience. [Thesis]. RCAAP; 2009. Available from: https://www.rcaap.pt/detail.jsp?id=oai:repositorio.iscte-iul.pt:10071/1826

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Univerzitet u Beogradu

11. Zubić, Siniša Ј., 1982-. Алгоритми за дистантне заштите на бази дигиталне фазне компарације.

Degree: Elektrotehnički fakultet, 2016, Univerzitet u Beogradu

Техничке науке - Електротехника - Електроенергетски системи / Technical science – Electrical engineering - Power Systems

У дисертацији су презентовани нови алгоритми дистантних заштита базирани… (more)

Subjects/Keywords: relay protection; distance relays; time-domain phase comparator

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APA (6th Edition):

Zubić, Siniša Ј., 1. (2016). Алгоритми за дистантне заштите на бази дигиталне фазне компарације. (Thesis). Univerzitet u Beogradu. Retrieved from https://fedorabg.bg.ac.rs/fedora/get/o:12468/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zubić, Siniša Ј., 1982-. “Алгоритми за дистантне заштите на бази дигиталне фазне компарације.” 2016. Thesis, Univerzitet u Beogradu. Accessed March 07, 2021. https://fedorabg.bg.ac.rs/fedora/get/o:12468/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zubić, Siniša Ј., 1982-. “Алгоритми за дистантне заштите на бази дигиталне фазне компарације.” 2016. Web. 07 Mar 2021.

Vancouver:

Zubić, Siniša Ј. 1. Алгоритми за дистантне заштите на бази дигиталне фазне компарације. [Internet] [Thesis]. Univerzitet u Beogradu; 2016. [cited 2021 Mar 07]. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:12468/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zubić, Siniša Ј. 1. Алгоритми за дистантне заштите на бази дигиталне фазне компарације. [Thesis]. Univerzitet u Beogradu; 2016. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:12468/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Dundee

12. Mohamad Ali, Norfadhilah. Appropriate comparator in national treatment under international investment law : relevance of GATT/WTO, EU and international human rights jurisprudences.

Degree: PhD, 2014, University of Dundee

 The minimalist state of the national treatment provision in the investment treaties has provided limited guidance for the tribunals for interpretation. As a result, there… (more)

Subjects/Keywords: 346.07; National treatment; International investment law; Non-discrimination; Likeness; Relevant comparator

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APA (6th Edition):

Mohamad Ali, N. (2014). Appropriate comparator in national treatment under international investment law : relevance of GATT/WTO, EU and international human rights jurisprudences. (Doctoral Dissertation). University of Dundee. Retrieved from https://discovery.dundee.ac.uk/en/studentTheses/59a3f88c-8750-4f0b-a04b-7edfe15a477d ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.600768

Chicago Manual of Style (16th Edition):

Mohamad Ali, Norfadhilah. “Appropriate comparator in national treatment under international investment law : relevance of GATT/WTO, EU and international human rights jurisprudences.” 2014. Doctoral Dissertation, University of Dundee. Accessed March 07, 2021. https://discovery.dundee.ac.uk/en/studentTheses/59a3f88c-8750-4f0b-a04b-7edfe15a477d ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.600768.

MLA Handbook (7th Edition):

Mohamad Ali, Norfadhilah. “Appropriate comparator in national treatment under international investment law : relevance of GATT/WTO, EU and international human rights jurisprudences.” 2014. Web. 07 Mar 2021.

Vancouver:

Mohamad Ali N. Appropriate comparator in national treatment under international investment law : relevance of GATT/WTO, EU and international human rights jurisprudences. [Internet] [Doctoral dissertation]. University of Dundee; 2014. [cited 2021 Mar 07]. Available from: https://discovery.dundee.ac.uk/en/studentTheses/59a3f88c-8750-4f0b-a04b-7edfe15a477d ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.600768.

Council of Science Editors:

Mohamad Ali N. Appropriate comparator in national treatment under international investment law : relevance of GATT/WTO, EU and international human rights jurisprudences. [Doctoral Dissertation]. University of Dundee; 2014. Available from: https://discovery.dundee.ac.uk/en/studentTheses/59a3f88c-8750-4f0b-a04b-7edfe15a477d ; https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.600768

13. Nisar, Kashif. DC to DC converter for smart dust.

Degree: The Institute of Technology, 2012, Linköping UniversityLinköping University

  This work describes the implementation of DC to DC converter for Smart Dust in 65 nm CMOS technology. The purpose of a DC to… (more)

Subjects/Keywords: Comparator; DC to DC converter; PWM; Op-amp; Voltage regulator

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Nisar, K. (2012). DC to DC converter for smart dust. (Thesis). Linköping UniversityLinköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77247

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Nisar, Kashif. “DC to DC converter for smart dust.” 2012. Thesis, Linköping UniversityLinköping University. Accessed March 07, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77247.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Nisar, Kashif. “DC to DC converter for smart dust.” 2012. Web. 07 Mar 2021.

Vancouver:

Nisar K. DC to DC converter for smart dust. [Internet] [Thesis]. Linköping UniversityLinköping University; 2012. [cited 2021 Mar 07]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77247.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Nisar K. DC to DC converter for smart dust. [Thesis]. Linköping UniversityLinköping University; 2012. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-77247

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Linköping University

14. Hedayati, Raheleh. A Study of Successive Approximation Registers and Implementation of an Ultra-Low Power 10-bit SAR ADC in 65nm CMOS Technology.

Degree: Electronic Devices, 2011, Linköping University

  In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to-Digital Converter in medical application such as pacemaker. The demand… (more)

Subjects/Keywords: SAR ADC; SAR Logic; Dynamic Comparator; Low Power

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hedayati, R. (2011). A Study of Successive Approximation Registers and Implementation of an Ultra-Low Power 10-bit SAR ADC in 65nm CMOS Technology. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72767

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hedayati, Raheleh. “A Study of Successive Approximation Registers and Implementation of an Ultra-Low Power 10-bit SAR ADC in 65nm CMOS Technology.” 2011. Thesis, Linköping University. Accessed March 07, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72767.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hedayati, Raheleh. “A Study of Successive Approximation Registers and Implementation of an Ultra-Low Power 10-bit SAR ADC in 65nm CMOS Technology.” 2011. Web. 07 Mar 2021.

Vancouver:

Hedayati R. A Study of Successive Approximation Registers and Implementation of an Ultra-Low Power 10-bit SAR ADC in 65nm CMOS Technology. [Internet] [Thesis]. Linköping University; 2011. [cited 2021 Mar 07]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72767.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hedayati R. A Study of Successive Approximation Registers and Implementation of an Ultra-Low Power 10-bit SAR ADC in 65nm CMOS Technology. [Thesis]. Linköping University; 2011. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72767

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

15. Zhang, R. (author). A 1-Mega Pixels HDR and UV Sensitive Image Sensor With Interleaved 14-bit 64Ms/s SAR ADC.

Degree: 2015, Delft University of Technology

This thesis presents a 1-Mega pixels high-dynamic range and UV sensitive image sensor in 0.18 µm technology with 14-bit interleaved 64Ms/s SAR ADC. It can… (more)

Subjects/Keywords: UV sensitive; interleaved SAR ADC; comparator; offset calibration; high dynamic range

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APA (6th Edition):

Zhang, R. (. (2015). A 1-Mega Pixels HDR and UV Sensitive Image Sensor With Interleaved 14-bit 64Ms/s SAR ADC. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:26cd1922-1ecc-4f7e-b8bc-46c5c00f8846

Chicago Manual of Style (16th Edition):

Zhang, R (author). “A 1-Mega Pixels HDR and UV Sensitive Image Sensor With Interleaved 14-bit 64Ms/s SAR ADC.” 2015. Masters Thesis, Delft University of Technology. Accessed March 07, 2021. http://resolver.tudelft.nl/uuid:26cd1922-1ecc-4f7e-b8bc-46c5c00f8846.

MLA Handbook (7th Edition):

Zhang, R (author). “A 1-Mega Pixels HDR and UV Sensitive Image Sensor With Interleaved 14-bit 64Ms/s SAR ADC.” 2015. Web. 07 Mar 2021.

Vancouver:

Zhang R(. A 1-Mega Pixels HDR and UV Sensitive Image Sensor With Interleaved 14-bit 64Ms/s SAR ADC. [Internet] [Masters thesis]. Delft University of Technology; 2015. [cited 2021 Mar 07]. Available from: http://resolver.tudelft.nl/uuid:26cd1922-1ecc-4f7e-b8bc-46c5c00f8846.

Council of Science Editors:

Zhang R(. A 1-Mega Pixels HDR and UV Sensitive Image Sensor With Interleaved 14-bit 64Ms/s SAR ADC. [Masters Thesis]. Delft University of Technology; 2015. Available from: http://resolver.tudelft.nl/uuid:26cd1922-1ecc-4f7e-b8bc-46c5c00f8846


Brno University of Technology

16. Hylský, Josef. Návrh komparátoru s kompenzací napěťové nesymetrie v technologii CMOS: Design of a comparator with offset compensation in CMOS technology.

Degree: 2019, Brno University of Technology

 This work contains basic knowledge about comparators and its design in the CMOS technology. The first chapter deals with a wide use of a comparator,… (more)

Subjects/Keywords: Komparátor; technologie CMOS; napěťová nesymetrie.; Comparator; CMOS technology; offset.

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APA (6th Edition):

Hylský, J. (2019). Návrh komparátoru s kompenzací napěťové nesymetrie v technologii CMOS: Design of a comparator with offset compensation in CMOS technology. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/14714

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hylský, Josef. “Návrh komparátoru s kompenzací napěťové nesymetrie v technologii CMOS: Design of a comparator with offset compensation in CMOS technology.” 2019. Thesis, Brno University of Technology. Accessed March 07, 2021. http://hdl.handle.net/11012/14714.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hylský, Josef. “Návrh komparátoru s kompenzací napěťové nesymetrie v technologii CMOS: Design of a comparator with offset compensation in CMOS technology.” 2019. Web. 07 Mar 2021.

Vancouver:

Hylský J. Návrh komparátoru s kompenzací napěťové nesymetrie v technologii CMOS: Design of a comparator with offset compensation in CMOS technology. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2021 Mar 07]. Available from: http://hdl.handle.net/11012/14714.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hylský J. Návrh komparátoru s kompenzací napěťové nesymetrie v technologii CMOS: Design of a comparator with offset compensation in CMOS technology. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/14714

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

17. Polavarapu, Sai Praneeth. Design of a fully-differential charge pump for an integrated dynamic offset test bench.

Degree: MS, Electrical and Electronic Engineering, 2014, California State University – Sacramento

 Comparators are one of the most important building blocks used in analog and mixed-signal integrated circuits. As the input offset voltage is the basic specification… (more)

Subjects/Keywords: Comparator; DOTB; Offset error

…LIST OF FIGURES Page Figures 1. Figure 1 Schematic of a Latching Comparator… …2 2. Figure 2 Schematic of Comparator used in Dynamic Offset Test Bench… …Many applications require a comparator which compares the unknown input signal to a… …classic paper by Yin, Op’t Eynde & Sansen [1]. This paper describes the comparator… …shown in Figure 1, which compares the given input voltage to a “zero”. That is, the comparator… 

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APA (6th Edition):

Polavarapu, S. P. (2014). Design of a fully-differential charge pump for an integrated dynamic offset test bench. (Masters Thesis). California State University – Sacramento. Retrieved from http://hdl.handle.net/10211.3/131276

Chicago Manual of Style (16th Edition):

Polavarapu, Sai Praneeth. “Design of a fully-differential charge pump for an integrated dynamic offset test bench.” 2014. Masters Thesis, California State University – Sacramento. Accessed March 07, 2021. http://hdl.handle.net/10211.3/131276.

MLA Handbook (7th Edition):

Polavarapu, Sai Praneeth. “Design of a fully-differential charge pump for an integrated dynamic offset test bench.” 2014. Web. 07 Mar 2021.

Vancouver:

Polavarapu SP. Design of a fully-differential charge pump for an integrated dynamic offset test bench. [Internet] [Masters thesis]. California State University – Sacramento; 2014. [cited 2021 Mar 07]. Available from: http://hdl.handle.net/10211.3/131276.

Council of Science Editors:

Polavarapu SP. Design of a fully-differential charge pump for an integrated dynamic offset test bench. [Masters Thesis]. California State University – Sacramento; 2014. Available from: http://hdl.handle.net/10211.3/131276


University of Pennsylvania

18. Mianno, Todd Anthony. Drug-Drug Interactions And Kidney Disease In Hospitalized Patients.

Degree: 2019, University of Pennsylvania

 As polypharmacy becomes increasingly common in patients with kidney disease, drug-drug interactions (DDIs), the phenomenon of one drug altering the effect of another drug, grow… (more)

Subjects/Keywords: active comparator designs; acute kidney injury; drug-drug interactions; Epidemiology

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APA (6th Edition):

Mianno, T. A. (2019). Drug-Drug Interactions And Kidney Disease In Hospitalized Patients. (Thesis). University of Pennsylvania. Retrieved from https://repository.upenn.edu/edissertations/3395

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mianno, Todd Anthony. “Drug-Drug Interactions And Kidney Disease In Hospitalized Patients.” 2019. Thesis, University of Pennsylvania. Accessed March 07, 2021. https://repository.upenn.edu/edissertations/3395.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mianno, Todd Anthony. “Drug-Drug Interactions And Kidney Disease In Hospitalized Patients.” 2019. Web. 07 Mar 2021.

Vancouver:

Mianno TA. Drug-Drug Interactions And Kidney Disease In Hospitalized Patients. [Internet] [Thesis]. University of Pennsylvania; 2019. [cited 2021 Mar 07]. Available from: https://repository.upenn.edu/edissertations/3395.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mianno TA. Drug-Drug Interactions And Kidney Disease In Hospitalized Patients. [Thesis]. University of Pennsylvania; 2019. Available from: https://repository.upenn.edu/edissertations/3395

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

19. Chen, Chih-hung. 1MHz Bandwidth Switched-Current Sigma Delta Modulator.

Degree: Master, Electrical Engineering, 2010, NSYSU

 The thesis proposes an integrator with an OPAMP in the feedback loop to fulfill 1MHz bandwidth SI Sigma Delta modulator. The OPAMP is used to… (more)

Subjects/Keywords: delta-sigma modulator; sigma-delta modulator; switched-current circuit; integrator; sample and hole; current comparator

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, C. (2010). 1MHz Bandwidth Switched-Current Sigma Delta Modulator. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901110-122544

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Chih-hung. “1MHz Bandwidth Switched-Current Sigma Delta Modulator.” 2010. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901110-122544.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Chih-hung. “1MHz Bandwidth Switched-Current Sigma Delta Modulator.” 2010. Web. 07 Mar 2021.

Vancouver:

Chen C. 1MHz Bandwidth Switched-Current Sigma Delta Modulator. [Internet] [Thesis]. NSYSU; 2010. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901110-122544.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen C. 1MHz Bandwidth Switched-Current Sigma Delta Modulator. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901110-122544

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

20. Lo, Ching-Wen. High Speed SAR Analog to Digital Converter Design.

Degree: Master, Computer Science and Engineering, 2014, NSYSU

 In this thesis, the circuits are designing with TSMC 90nm CMOS process and 1.2V of supply voltage. The speed and resolution of ADC are 8-bit… (more)

Subjects/Keywords: Bootstrapped switch; Dynamic Comparator; Successive Approximation; Low power; Analog-to-Digital Converter

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lo, C. (2014). High Speed SAR Analog to Digital Converter Design. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0022114-122004

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lo, Ching-Wen. “High Speed SAR Analog to Digital Converter Design.” 2014. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0022114-122004.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lo, Ching-Wen. “High Speed SAR Analog to Digital Converter Design.” 2014. Web. 07 Mar 2021.

Vancouver:

Lo C. High Speed SAR Analog to Digital Converter Design. [Internet] [Thesis]. NSYSU; 2014. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0022114-122004.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lo C. High Speed SAR Analog to Digital Converter Design. [Thesis]. NSYSU; 2014. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0022114-122004

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

21. Liao, Yen-Qun. High Speed Low Power Two-Stage Pipelined-SAR Analog-to-Digital Converter.

Degree: Master, Computer Science and Engineering, 2013, NSYSU

 In this thesis, the circuits are designing with TSMC.18μm CMOS process and 1.8V of supply voltage. The speed and resolution of ADC are 100MS/s and… (more)

Subjects/Keywords: Symmetry Bootstrap-switch; Dynamic comparator; Switched-Opamp; Successive Approximation ADC; Pipelined ADC

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APA (6th Edition):

Liao, Y. (2013). High Speed Low Power Two-Stage Pipelined-SAR Analog-to-Digital Converter. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626113-144731

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liao, Yen-Qun. “High Speed Low Power Two-Stage Pipelined-SAR Analog-to-Digital Converter.” 2013. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626113-144731.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liao, Yen-Qun. “High Speed Low Power Two-Stage Pipelined-SAR Analog-to-Digital Converter.” 2013. Web. 07 Mar 2021.

Vancouver:

Liao Y. High Speed Low Power Two-Stage Pipelined-SAR Analog-to-Digital Converter. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626113-144731.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liao Y. High Speed Low Power Two-Stage Pipelined-SAR Analog-to-Digital Converter. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626113-144731

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Saskatchewan

22. Wang, Binben. Increasing the Performance of the Canadian Hydrological Model using Lookup Tables.

Degree: 2020, University of Saskatchewan

 The climate of cold regions is fragile and could be easily threatened by human activities. Hydrological processes play an important role in the climate of… (more)

Subjects/Keywords: Lookup tables; cold-region hydrological simulation; Function Comparator (FunC); the Canadian Hydrological Model (CHM)

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, B. (2020). Increasing the Performance of the Canadian Hydrological Model using Lookup Tables. (Thesis). University of Saskatchewan. Retrieved from http://hdl.handle.net/10388/12783

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Binben. “Increasing the Performance of the Canadian Hydrological Model using Lookup Tables.” 2020. Thesis, University of Saskatchewan. Accessed March 07, 2021. http://hdl.handle.net/10388/12783.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Binben. “Increasing the Performance of the Canadian Hydrological Model using Lookup Tables.” 2020. Web. 07 Mar 2021.

Vancouver:

Wang B. Increasing the Performance of the Canadian Hydrological Model using Lookup Tables. [Internet] [Thesis]. University of Saskatchewan; 2020. [cited 2021 Mar 07]. Available from: http://hdl.handle.net/10388/12783.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang B. Increasing the Performance of the Canadian Hydrological Model using Lookup Tables. [Thesis]. University of Saskatchewan; 2020. Available from: http://hdl.handle.net/10388/12783

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Vilnius Gediminas Technical University

23. Kilikevičius, Artūras. Ilgio matavimo mechatroninio komparatoriaus dinaminių paklaidų tyrimas.

Degree: Dissertation, Measurement Engineering, 2009, Vilnius Gediminas Technical University

Reziumė Tikslaus ir greito brūkšninių ilgio matų padalų detektavimo problemos aktualumą ir sprendimo būtinybę pirmiausia sąlygoja sparčiai didėjantys precizinių skalių kalibravimo našumo poreikiai. Vienas pagrindinių… (more)

Subjects/Keywords: Mechatroninis komparatorius; Kalibravimo tikslumas; Virpesių poveikis; Mechatronical comparator; Calibration accuracy; Vibration action

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APA (6th Edition):

Kilikevičius, A. (2009). Ilgio matavimo mechatroninio komparatoriaus dinaminių paklaidų tyrimas. (Doctoral Dissertation). Vilnius Gediminas Technical University. Retrieved from http://vddb.laba.lt/obj/LT-eLABa-0001:E.02~2009~D_20090623_110816-03177 ;

Chicago Manual of Style (16th Edition):

Kilikevičius, Artūras. “Ilgio matavimo mechatroninio komparatoriaus dinaminių paklaidų tyrimas.” 2009. Doctoral Dissertation, Vilnius Gediminas Technical University. Accessed March 07, 2021. http://vddb.laba.lt/obj/LT-eLABa-0001:E.02~2009~D_20090623_110816-03177 ;.

MLA Handbook (7th Edition):

Kilikevičius, Artūras. “Ilgio matavimo mechatroninio komparatoriaus dinaminių paklaidų tyrimas.” 2009. Web. 07 Mar 2021.

Vancouver:

Kilikevičius A. Ilgio matavimo mechatroninio komparatoriaus dinaminių paklaidų tyrimas. [Internet] [Doctoral dissertation]. Vilnius Gediminas Technical University; 2009. [cited 2021 Mar 07]. Available from: http://vddb.laba.lt/obj/LT-eLABa-0001:E.02~2009~D_20090623_110816-03177 ;.

Council of Science Editors:

Kilikevičius A. Ilgio matavimo mechatroninio komparatoriaus dinaminių paklaidų tyrimas. [Doctoral Dissertation]. Vilnius Gediminas Technical University; 2009. Available from: http://vddb.laba.lt/obj/LT-eLABa-0001:E.02~2009~D_20090623_110816-03177 ;


NSYSU

24. Lee, Yao-Lun. A Programmable Gain Amplifier with Auto Gain Control Mechanism for the CMOS Image Sensor.

Degree: Master, Computer Science and Engineering, 2018, NSYSU

 In this thesis, a programmable gain amplifier for the CMOS image sensor is implemented by using the TSMC 0.18 ï­m process technology. The main circuit… (more)

Subjects/Keywords: programmable gain amplifier; dynamic comparator; switch capacitor amplifier; bandgap reference circuit; folded cascade operational amplifier

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lee, Y. (2018). A Programmable Gain Amplifier with Auto Gain Control Mechanism for the CMOS Image Sensor. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729118-121128

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lee, Yao-Lun. “A Programmable Gain Amplifier with Auto Gain Control Mechanism for the CMOS Image Sensor.” 2018. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729118-121128.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lee, Yao-Lun. “A Programmable Gain Amplifier with Auto Gain Control Mechanism for the CMOS Image Sensor.” 2018. Web. 07 Mar 2021.

Vancouver:

Lee Y. A Programmable Gain Amplifier with Auto Gain Control Mechanism for the CMOS Image Sensor. [Internet] [Thesis]. NSYSU; 2018. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729118-121128.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lee Y. A Programmable Gain Amplifier with Auto Gain Control Mechanism for the CMOS Image Sensor. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729118-121128

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Univerzitet u Beogradu

25. Stojanović, Zoran, 1979-. Usmereni releji bazirani na digitalnom faznom komparatoru.

Degree: Elektrotehnički fakultet, 2013, Univerzitet u Beogradu

Elektrotehnika - Elektroenergetski sistemi / Electrical engineering - Power Systems

U ovoj doktorskoj disertaciji predstavljen je nov algoritam za usmereni relej baziran na digitalnoj faznoj… (more)

Subjects/Keywords: relay protection; digital relaying; directional element; phase comparator; directional earth-fault protection

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Stojanović, Zoran, 1. (2013). Usmereni releji bazirani na digitalnom faznom komparatoru. (Thesis). Univerzitet u Beogradu. Retrieved from https://fedorabg.bg.ac.rs/fedora/get/o:5473/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Stojanović, Zoran, 1979-. “Usmereni releji bazirani na digitalnom faznom komparatoru.” 2013. Thesis, Univerzitet u Beogradu. Accessed March 07, 2021. https://fedorabg.bg.ac.rs/fedora/get/o:5473/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Stojanović, Zoran, 1979-. “Usmereni releji bazirani na digitalnom faznom komparatoru.” 2013. Web. 07 Mar 2021.

Vancouver:

Stojanović, Zoran 1. Usmereni releji bazirani na digitalnom faznom komparatoru. [Internet] [Thesis]. Univerzitet u Beogradu; 2013. [cited 2021 Mar 07]. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:5473/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Stojanović, Zoran 1. Usmereni releji bazirani na digitalnom faznom komparatoru. [Thesis]. Univerzitet u Beogradu; 2013. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:5473/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Univerzitet u Beogradu

26. Krstivojević, Jelisaveta P., 1982-. Digitalna zaštita energetskih transformatora od unutrašnjih kvarova.

Degree: Elektrotehnički fakultet, 2016, Univerzitet u Beogradu

Tehničke nauke, Elektrotehnika - Elektroenergetski sistemi / Technical science, Electrical engineering - Power Systems

U ovoj doktorskoj disertaciji predstavljeni su algoritmi za digitalnu zaštitu energetskih… (more)

Subjects/Keywords: relay protection; digital relaying; power transformer protection; power transformer ground fault protection; phase comparator

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APA (6th Edition):

Krstivojević, Jelisaveta P., 1. (2016). Digitalna zaštita energetskih transformatora od unutrašnjih kvarova. (Thesis). Univerzitet u Beogradu. Retrieved from https://fedorabg.bg.ac.rs/fedora/get/o:11571/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Krstivojević, Jelisaveta P., 1982-. “Digitalna zaštita energetskih transformatora od unutrašnjih kvarova.” 2016. Thesis, Univerzitet u Beogradu. Accessed March 07, 2021. https://fedorabg.bg.ac.rs/fedora/get/o:11571/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Krstivojević, Jelisaveta P., 1982-. “Digitalna zaštita energetskih transformatora od unutrašnjih kvarova.” 2016. Web. 07 Mar 2021.

Vancouver:

Krstivojević, Jelisaveta P. 1. Digitalna zaštita energetskih transformatora od unutrašnjih kvarova. [Internet] [Thesis]. Univerzitet u Beogradu; 2016. [cited 2021 Mar 07]. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:11571/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Krstivojević, Jelisaveta P. 1. Digitalna zaštita energetskih transformatora od unutrašnjih kvarova. [Thesis]. Univerzitet u Beogradu; 2016. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:11571/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Boston University

27. Ranjan, Nikhil. Design of a 5-bit algorithmic A/D converter for potential use in a wireless neural recorder application.

Degree: MS, Electrical & Computer Engineering, 2019, Boston University

 The constant endeavor to measure and record neural signals from the human brain and anticipate the results to figure out the mechanism which governs the… (more)

Subjects/Keywords: Electrical engineering; Analogue adder; Comparator; Multiply by 2(voltage) circuit; Pre-amplifier

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ranjan, N. (2019). Design of a 5-bit algorithmic A/D converter for potential use in a wireless neural recorder application. (Masters Thesis). Boston University. Retrieved from http://hdl.handle.net/2144/36043

Chicago Manual of Style (16th Edition):

Ranjan, Nikhil. “Design of a 5-bit algorithmic A/D converter for potential use in a wireless neural recorder application.” 2019. Masters Thesis, Boston University. Accessed March 07, 2021. http://hdl.handle.net/2144/36043.

MLA Handbook (7th Edition):

Ranjan, Nikhil. “Design of a 5-bit algorithmic A/D converter for potential use in a wireless neural recorder application.” 2019. Web. 07 Mar 2021.

Vancouver:

Ranjan N. Design of a 5-bit algorithmic A/D converter for potential use in a wireless neural recorder application. [Internet] [Masters thesis]. Boston University; 2019. [cited 2021 Mar 07]. Available from: http://hdl.handle.net/2144/36043.

Council of Science Editors:

Ranjan N. Design of a 5-bit algorithmic A/D converter for potential use in a wireless neural recorder application. [Masters Thesis]. Boston University; 2019. Available from: http://hdl.handle.net/2144/36043


Hong Kong University of Science and Technology

28. Choi, Ricky Yiu-kee. An ultra-low energy SAR ADC design with ultra-low-offset pre-amplifier-less comparator latch.

Degree: 2012, Hong Kong University of Science and Technology

 Successive-approximation (SA) ADC is one of the most popular architectures for data-acquisition applications, especially when high-resolution, low power and medium speed are required. In some… (more)

Subjects/Keywords: Analog-to-digital converters  – Design and construction ; Electric filters ; Comparator circuits  – Design and construction

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Choi, R. Y. (2012). An ultra-low energy SAR ADC design with ultra-low-offset pre-amplifier-less comparator latch. (Thesis). Hong Kong University of Science and Technology. Retrieved from http://repository.ust.hk/ir/Record/1783.1-7774 ; https://doi.org/10.14711/thesis-b1197967 ; http://repository.ust.hk/ir/bitstream/1783.1-7774/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Choi, Ricky Yiu-kee. “An ultra-low energy SAR ADC design with ultra-low-offset pre-amplifier-less comparator latch.” 2012. Thesis, Hong Kong University of Science and Technology. Accessed March 07, 2021. http://repository.ust.hk/ir/Record/1783.1-7774 ; https://doi.org/10.14711/thesis-b1197967 ; http://repository.ust.hk/ir/bitstream/1783.1-7774/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Choi, Ricky Yiu-kee. “An ultra-low energy SAR ADC design with ultra-low-offset pre-amplifier-less comparator latch.” 2012. Web. 07 Mar 2021.

Vancouver:

Choi RY. An ultra-low energy SAR ADC design with ultra-low-offset pre-amplifier-less comparator latch. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2012. [cited 2021 Mar 07]. Available from: http://repository.ust.hk/ir/Record/1783.1-7774 ; https://doi.org/10.14711/thesis-b1197967 ; http://repository.ust.hk/ir/bitstream/1783.1-7774/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Choi RY. An ultra-low energy SAR ADC design with ultra-low-offset pre-amplifier-less comparator latch. [Thesis]. Hong Kong University of Science and Technology; 2012. Available from: http://repository.ust.hk/ir/Record/1783.1-7774 ; https://doi.org/10.14711/thesis-b1197967 ; http://repository.ust.hk/ir/bitstream/1783.1-7774/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


IUPUI

29. Balasubramanian, Linknath Surya. ASIC implemented MicroBlaze-based Coprocessor for Data Stream Management Systems.

Degree: 2020, IUPUI

Indiana University-Purdue University Indianapolis (IUPUI)

The drastic increase in Internet usage demands the need for processing data in real time with higher efficiency than ever… (more)

Subjects/Keywords: Symbiote Coprocessor Unit; ACG/OCG; sequential comparator; D-word multiplier/divider; FPGA

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Balasubramanian, L. S. (2020). ASIC implemented MicroBlaze-based Coprocessor for Data Stream Management Systems. (Thesis). IUPUI. Retrieved from http://hdl.handle.net/1805/22696

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Balasubramanian, Linknath Surya. “ASIC implemented MicroBlaze-based Coprocessor for Data Stream Management Systems.” 2020. Thesis, IUPUI. Accessed March 07, 2021. http://hdl.handle.net/1805/22696.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Balasubramanian, Linknath Surya. “ASIC implemented MicroBlaze-based Coprocessor for Data Stream Management Systems.” 2020. Web. 07 Mar 2021.

Vancouver:

Balasubramanian LS. ASIC implemented MicroBlaze-based Coprocessor for Data Stream Management Systems. [Internet] [Thesis]. IUPUI; 2020. [cited 2021 Mar 07]. Available from: http://hdl.handle.net/1805/22696.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Balasubramanian LS. ASIC implemented MicroBlaze-based Coprocessor for Data Stream Management Systems. [Thesis]. IUPUI; 2020. Available from: http://hdl.handle.net/1805/22696

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Univerzitet u Beogradu

30. Ostojić, Mladen, 1985-, 33531751. Дигитална заштита синхроних генератора и мотора од испада из синхронизма и уласка генератора у моторни режим.

Degree: Elektrotehnički fakultet, 2020, Univerzitet u Beogradu

Техничке науке – Електротехника-Електроенергетски системи / Technical sciences – Electrical engineering-Power systems

У овој докторској дисертацији представљена су три алгоритма који заједно чине комплетну заштиту синхроног генератора од губитка синхронизма и уласка у моторни режим рада...

Advisors/Committee Members: Mikulović, Jovan, 1968-, 12766311.

Subjects/Keywords: relay protection; synchronous generator; phase comparator; loss of excitation; out of step; islanding operation

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APA (6th Edition):

Ostojić, Mladen, 1985-, 3. (2020). Дигитална заштита синхроних генератора и мотора од испада из синхронизма и уласка генератора у моторни режим. (Thesis). Univerzitet u Beogradu. Retrieved from https://fedorabg.bg.ac.rs/fedora/get/o:22838/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ostojić, Mladen, 1985-, 33531751. “Дигитална заштита синхроних генератора и мотора од испада из синхронизма и уласка генератора у моторни режим.” 2020. Thesis, Univerzitet u Beogradu. Accessed March 07, 2021. https://fedorabg.bg.ac.rs/fedora/get/o:22838/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ostojić, Mladen, 1985-, 33531751. “Дигитална заштита синхроних генератора и мотора од испада из синхронизма и уласка генератора у моторни режим.” 2020. Web. 07 Mar 2021.

Vancouver:

Ostojić, Mladen, 1985- 3. Дигитална заштита синхроних генератора и мотора од испада из синхронизма и уласка генератора у моторни режим. [Internet] [Thesis]. Univerzitet u Beogradu; 2020. [cited 2021 Mar 07]. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:22838/bdef:Content/get.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ostojić, Mladen, 1985- 3. Дигитална заштита синхроних генератора и мотора од испада из синхронизма и уласка генератора у моторни режим. [Thesis]. Univerzitet u Beogradu; 2020. Available from: https://fedorabg.bg.ac.rs/fedora/get/o:22838/bdef:Content/get

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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