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You searched for subject:(CML to CMOS converter). Showing records 1 – 30 of 18008 total matches.

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California State University – Sacramento

1. Penmetsa, Sruthi. A current-mode logic frequency divider for an all digital phase-locked loop in 0.18um CMOS.

Degree: MS, Electrical and Electronic Engineering, 2016, California State University – Sacramento

 A phase-locked loop (PLL) is an important mixed-signal circuit that is used on almost every integrated circuit. A frequency divider is needed in the PLL… (more)

Subjects/Keywords: CML; CML Buffer; Current-mode logic; All-digital phase-locked loop; Design of CML toggle flip-flop; CML to CMOS converter

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APA (6th Edition):

Penmetsa, S. (2016). A current-mode logic frequency divider for an all digital phase-locked loop in 0.18um CMOS. (Masters Thesis). California State University – Sacramento. Retrieved from http://hdl.handle.net/10211.3/182788

Chicago Manual of Style (16th Edition):

Penmetsa, Sruthi. “A current-mode logic frequency divider for an all digital phase-locked loop in 0.18um CMOS.” 2016. Masters Thesis, California State University – Sacramento. Accessed March 23, 2017. http://hdl.handle.net/10211.3/182788.

MLA Handbook (7th Edition):

Penmetsa, Sruthi. “A current-mode logic frequency divider for an all digital phase-locked loop in 0.18um CMOS.” 2016. Web. 23 Mar 2017.

Vancouver:

Penmetsa S. A current-mode logic frequency divider for an all digital phase-locked loop in 0.18um CMOS. [Internet] [Masters thesis]. California State University – Sacramento; 2016. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/10211.3/182788.

Council of Science Editors:

Penmetsa S. A current-mode logic frequency divider for an all digital phase-locked loop in 0.18um CMOS. [Masters Thesis]. California State University – Sacramento; 2016. Available from: http://hdl.handle.net/10211.3/182788


University of Pretoria

2. Veale, Gerhardus Ignatius Potgieter. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC .

Degree: 2010, University of Pretoria

 Low noise low division 2 GHz RF synthesizer integrated circuits (ICs) are conventionally implemented in some form of HBT process such as SiGe or GaAs.… (more)

Subjects/Keywords: Cml-to-cmos converter; Cml flicker noise; Fractional-n; Cmos pfd; Cml pfd; Cml 4-bit counter; Cml; Cml 2/3-prescaler; Ssb phase noise; Pulse-swallow counter; Low division; Programmable modulus accumulator; High voltage charge-pump; In-band phase noise; UCTD

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APA (6th Edition):

Veale, G. I. P. (2010). Low phase noise 2 GHz Fractional-N CMOS synthesizer IC . (Masters Thesis). University of Pretoria. Retrieved from http://upetd.up.ac.za/thesis/available/etd-09132010-162013/

Chicago Manual of Style (16th Edition):

Veale, Gerhardus Ignatius Potgieter. “Low phase noise 2 GHz Fractional-N CMOS synthesizer IC .” 2010. Masters Thesis, University of Pretoria. Accessed March 23, 2017. http://upetd.up.ac.za/thesis/available/etd-09132010-162013/.

MLA Handbook (7th Edition):

Veale, Gerhardus Ignatius Potgieter. “Low phase noise 2 GHz Fractional-N CMOS synthesizer IC .” 2010. Web. 23 Mar 2017.

Vancouver:

Veale GIP. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC . [Internet] [Masters thesis]. University of Pretoria; 2010. [cited 2017 Mar 23]. Available from: http://upetd.up.ac.za/thesis/available/etd-09132010-162013/.

Council of Science Editors:

Veale GIP. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC . [Masters Thesis]. University of Pretoria; 2010. Available from: http://upetd.up.ac.za/thesis/available/etd-09132010-162013/


University of Edinburgh

3. Danesh, Seyed Amir Ali. Time interleaved counter analog to digital converters.

Degree: 2011, University of Edinburgh

 The work explores extending time interleaving in A/D converters, by applying a high-level of parallelism to one of the slowest and simplest types of data-converters,… (more)

Subjects/Keywords: 004.19; ADC; analog to digial converter; time interleaved; counter; TIC; CMOS

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APA (6th Edition):

Danesh, S. A. A. (2011). Time interleaved counter analog to digital converters. (Doctoral Dissertation). University of Edinburgh. Retrieved from http://hdl.handle.net/1842/5790

Chicago Manual of Style (16th Edition):

Danesh, Seyed Amir Ali. “Time interleaved counter analog to digital converters.” 2011. Doctoral Dissertation, University of Edinburgh. Accessed March 23, 2017. http://hdl.handle.net/1842/5790.

MLA Handbook (7th Edition):

Danesh, Seyed Amir Ali. “Time interleaved counter analog to digital converters.” 2011. Web. 23 Mar 2017.

Vancouver:

Danesh SAA. Time interleaved counter analog to digital converters. [Internet] [Doctoral dissertation]. University of Edinburgh; 2011. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/1842/5790.

Council of Science Editors:

Danesh SAA. Time interleaved counter analog to digital converters. [Doctoral Dissertation]. University of Edinburgh; 2011. Available from: http://hdl.handle.net/1842/5790


University of Akron

4. Namburu, Pradeep. A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER.

Degree: MS, Electrical Engineering, 2010, University of Akron

  The current thesis presents the design of a 10-bit Digital-to-Analog Converter (DAC) to be used in a Successive Approximation Register Analog-to-Digital converter (SAR ADC).… (more)

Subjects/Keywords: Electrical Engineering; CMOS gate driver; Current source; Digital-to-Analog Converter

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APA (6th Edition):

Namburu, P. (2010). A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER. (Masters Thesis). University of Akron. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=akron1270567830

Chicago Manual of Style (16th Edition):

Namburu, Pradeep. “A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER.” 2010. Masters Thesis, University of Akron. Accessed March 23, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=akron1270567830.

MLA Handbook (7th Edition):

Namburu, Pradeep. “A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER.” 2010. Web. 23 Mar 2017.

Vancouver:

Namburu P. A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER. [Internet] [Masters thesis]. University of Akron; 2010. [cited 2017 Mar 23]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1270567830.

Council of Science Editors:

Namburu P. A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER. [Masters Thesis]. University of Akron; 2010. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1270567830


University of Waterloo

5. Ali, Areeb. CMOS Impedance Measurement Array for Cell Sensing.

Degree: 2015, University of Waterloo

 Impedance measurement plays a vital role in determining the physical and chemical properties of live cells under different environmental conditions and aids in the development… (more)

Subjects/Keywords: CMOS Impedance Measurement Array Cell Sensor Impedance-to-Digital Converter

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APA (6th Edition):

Ali, A. (2015). CMOS Impedance Measurement Array for Cell Sensing. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/9097

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ali, Areeb. “CMOS Impedance Measurement Array for Cell Sensing.” 2015. Thesis, University of Waterloo. Accessed March 23, 2017. http://hdl.handle.net/10012/9097.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ali, Areeb. “CMOS Impedance Measurement Array for Cell Sensing.” 2015. Web. 23 Mar 2017.

Vancouver:

Ali A. CMOS Impedance Measurement Array for Cell Sensing. [Internet] [Thesis]. University of Waterloo; 2015. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/10012/9097.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ali A. CMOS Impedance Measurement Array for Cell Sensing. [Thesis]. University of Waterloo; 2015. Available from: http://hdl.handle.net/10012/9097

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Delft University of Technology

6. Luo, Y. A High-Resolution, Resistor-Based Temperature Sensor:.

Degree: 2015, Delft University of Technology

 This thesis focuses on developing a high-resolution, energy-efficient smart temperature sensor. A resistor-based temperature-sensing structure is chosen as the core of the sensor. To digitize… (more)

Subjects/Keywords: CMOS; temperature sensor; sensor interface; thermistor; Wien Bridge; delta-sigma; analog-to-digital converter

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APA (6th Edition):

Luo, Y. (2015). A High-Resolution, Resistor-Based Temperature Sensor:. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:9654be35-8148-41d5-8ac3-b8124d71e55e

Chicago Manual of Style (16th Edition):

Luo, Y. “A High-Resolution, Resistor-Based Temperature Sensor:.” 2015. Masters Thesis, Delft University of Technology. Accessed March 23, 2017. http://resolver.tudelft.nl/uuid:9654be35-8148-41d5-8ac3-b8124d71e55e.

MLA Handbook (7th Edition):

Luo, Y. “A High-Resolution, Resistor-Based Temperature Sensor:.” 2015. Web. 23 Mar 2017.

Vancouver:

Luo Y. A High-Resolution, Resistor-Based Temperature Sensor:. [Internet] [Masters thesis]. Delft University of Technology; 2015. [cited 2017 Mar 23]. Available from: http://resolver.tudelft.nl/uuid:9654be35-8148-41d5-8ac3-b8124d71e55e.

Council of Science Editors:

Luo Y. A High-Resolution, Resistor-Based Temperature Sensor:. [Masters Thesis]. Delft University of Technology; 2015. Available from: http://resolver.tudelft.nl/uuid:9654be35-8148-41d5-8ac3-b8124d71e55e


Louisiana State University

7. Sathiaraj, Josephine Ratna. Ternary To Binary Converter Design In CMOS Using Multiple Input Floating Gate MOSFETS.

Degree: MS, Electrical & Computer Engineering, 2009, Louisiana State University

 In this work, a ternary to binary converter circuit is designed in 0.5μm n-well CMOS technology. The circuit takes two inputs corresponding to the ternary… (more)

Subjects/Keywords: multivalued logic; multiple input CMOS; ternary to binary converter; floating gate MOSFET

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APA (6th Edition):

Sathiaraj, J. R. (2009). Ternary To Binary Converter Design In CMOS Using Multiple Input Floating Gate MOSFETS. (Masters Thesis). Louisiana State University. Retrieved from http://etd.lsu.edu/docs/available/etd-11072009-170319/ ;

Chicago Manual of Style (16th Edition):

Sathiaraj, Josephine Ratna. “Ternary To Binary Converter Design In CMOS Using Multiple Input Floating Gate MOSFETS.” 2009. Masters Thesis, Louisiana State University. Accessed March 23, 2017. http://etd.lsu.edu/docs/available/etd-11072009-170319/ ;.

MLA Handbook (7th Edition):

Sathiaraj, Josephine Ratna. “Ternary To Binary Converter Design In CMOS Using Multiple Input Floating Gate MOSFETS.” 2009. Web. 23 Mar 2017.

Vancouver:

Sathiaraj JR. Ternary To Binary Converter Design In CMOS Using Multiple Input Floating Gate MOSFETS. [Internet] [Masters thesis]. Louisiana State University; 2009. [cited 2017 Mar 23]. Available from: http://etd.lsu.edu/docs/available/etd-11072009-170319/ ;.

Council of Science Editors:

Sathiaraj JR. Ternary To Binary Converter Design In CMOS Using Multiple Input Floating Gate MOSFETS. [Masters Thesis]. Louisiana State University; 2009. Available from: http://etd.lsu.edu/docs/available/etd-11072009-170319/ ;


University of Toronto

8. Shahramian, Shahriar. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.

Degree: 2011, University of Toronto

While data converters have been around for nearly nighty years, mm-wave data converters are still in their infancy. Only recently the 40-GHz sampling barrier was… (more)

Subjects/Keywords: Analog to Digital Converter; mm-Wave Circuit; Track and Hold Amplifier; SiGe; CMOS; Data Converter; TIALA; Retimer; 0544

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APA (6th Edition):

Shahramian, S. (2011). Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. (Doctoral Dissertation). University of Toronto. Retrieved from http://hdl.handle.net/1807/30039

Chicago Manual of Style (16th Edition):

Shahramian, Shahriar. “Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.” 2011. Doctoral Dissertation, University of Toronto. Accessed March 23, 2017. http://hdl.handle.net/1807/30039.

MLA Handbook (7th Edition):

Shahramian, Shahriar. “Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.” 2011. Web. 23 Mar 2017.

Vancouver:

Shahramian S. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. [Internet] [Doctoral dissertation]. University of Toronto; 2011. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/1807/30039.

Council of Science Editors:

Shahramian S. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. [Doctoral Dissertation]. University of Toronto; 2011. Available from: http://hdl.handle.net/1807/30039


Indian Institute of Science

9. Harish, C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.

Degree: 2011, Indian Institute of Science

 This thesis focuses on the design and implementation of low power Σ∆ ADCs in 130 nanometer CMOS technology. The design issues in the implementation of… (more)

Subjects/Keywords: Analog to Digital Converter (ADC); CMOS Technologies; Analog to Digital Signal Processing; Sigma Delta ADC; Wireless Applications; Communication Engineering

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APA (6th Edition):

Harish, C. (2011). Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. (Thesis). Indian Institute of Science. Retrieved from http://hdl.handle.net/2005/2049

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Harish, C. “Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.” 2011. Thesis, Indian Institute of Science. Accessed March 23, 2017. http://hdl.handle.net/2005/2049.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Harish, C. “Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.” 2011. Web. 23 Mar 2017.

Vancouver:

Harish C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. [Internet] [Thesis]. Indian Institute of Science; 2011. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/2005/2049.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Harish C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. [Thesis]. Indian Institute of Science; 2011. Available from: http://hdl.handle.net/2005/2049

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

10. Silva, Alexandre Herculano Mendes. Pipelined analog-to-digital conversion using current-mode reference shifting.

Degree: 2012, Universidade Nova

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores

Pipeline Analog-to-digital converters (ADCs) are the most popular architecture for high-speed medium-to-high… (more)

Subjects/Keywords: Analog-to-Digital Converter (ADC),; Current-mode reference shifting; Switched-capacitor; CMOS current reference; pipelined A/D conversion

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APA (6th Edition):

Silva, A. H. M. (2012). Pipelined analog-to-digital conversion using current-mode reference shifting. (Thesis). Universidade Nova. Retrieved from http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/8265

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Silva, Alexandre Herculano Mendes. “Pipelined analog-to-digital conversion using current-mode reference shifting.” 2012. Thesis, Universidade Nova. Accessed March 23, 2017. http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/8265.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Silva, Alexandre Herculano Mendes. “Pipelined analog-to-digital conversion using current-mode reference shifting.” 2012. Web. 23 Mar 2017.

Vancouver:

Silva AHM. Pipelined analog-to-digital conversion using current-mode reference shifting. [Internet] [Thesis]. Universidade Nova; 2012. [cited 2017 Mar 23]. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/8265.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Silva AHM. Pipelined analog-to-digital conversion using current-mode reference shifting. [Thesis]. Universidade Nova; 2012. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/8265

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

11. Pernillo, Jorge A. Analog to Digital Conversion Techniques for nanometer CMOS.

Degree: PhD, Electrical Engineering, 2013, University of Michigan

 This work investigates new approaches to analog-to-digital conversion that are suited for end-of-the-roadmap CMOS, and which also deliver orders-of-magnitude improvements in speed and energy efficiency.… (more)

Subjects/Keywords: ADC; Digital Calibration; Nanometer CMOS; Giga-samples Per Second; Analog-to-Digital Converter; GS/S; Electrical Engineering; Engineering

…104 xv LIST OF ABBREVIATIONS ADC analog-to-digital-converter BER bit error rate CLSA current… …DAC digital-to-analog-converter DNL differential non-linearity DSP digital signal processor… …LTE-A Long Term Evolution Advanced MDAC multiplying digital-to-analog-converter MS/s mega… …ANALOG-TO-DIGITAL CONVERSION TECHNIQUES FOR NANOMETER CMOS by Jorge Pernillo Chair: Michael P… …This requires an ADC architecture that scales with advanced CMOS and that is fast enough to… 

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APA (6th Edition):

Pernillo, J. A. (2013). Analog to Digital Conversion Techniques for nanometer CMOS. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/97792

Chicago Manual of Style (16th Edition):

Pernillo, Jorge A. “Analog to Digital Conversion Techniques for nanometer CMOS.” 2013. Doctoral Dissertation, University of Michigan. Accessed March 23, 2017. http://hdl.handle.net/2027.42/97792.

MLA Handbook (7th Edition):

Pernillo, Jorge A. “Analog to Digital Conversion Techniques for nanometer CMOS.” 2013. Web. 23 Mar 2017.

Vancouver:

Pernillo JA. Analog to Digital Conversion Techniques for nanometer CMOS. [Internet] [Doctoral dissertation]. University of Michigan; 2013. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/2027.42/97792.

Council of Science Editors:

Pernillo JA. Analog to Digital Conversion Techniques for nanometer CMOS. [Doctoral Dissertation]. University of Michigan; 2013. Available from: http://hdl.handle.net/2027.42/97792


Université Catholique de Louvain

12. Couniot, Numa. Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions.

Degree: 2015, Université Catholique de Louvain

For centuries, bacterial cells have been one of the major causes of human diseases, and are still responsible for several millions of deaths every year.… (more)

Subjects/Keywords: Biosensor; Electrokinetic; Capacitance-to-Frequency converter; Bacteria detection; Impedance spectroscopy; CMOS; Capacitive biosensors; Dielectrophoresis; Electroosmosis; Biosensor array

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APA (6th Edition):

Couniot, N. (2015). Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions. (Thesis). Université Catholique de Louvain. Retrieved from http://hdl.handle.net/2078.1/165272

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Couniot, Numa. “Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions.” 2015. Thesis, Université Catholique de Louvain. Accessed March 23, 2017. http://hdl.handle.net/2078.1/165272.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Couniot, Numa. “Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions.” 2015. Web. 23 Mar 2017.

Vancouver:

Couniot N. Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions. [Internet] [Thesis]. Université Catholique de Louvain; 2015. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/2078.1/165272.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Couniot N. Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions. [Thesis]. Université Catholique de Louvain; 2015. Available from: http://hdl.handle.net/2078.1/165272

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Rochester

13. Song, Yu (1980 - ). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.

Degree: PhD, 2011, University of Rochester

 We propose and verify the design of low-power, high-performance CMOS Switched-Capacitor (SC) circuits for analog and radio-frequency (RF) applications. In low-cost CMOS semiconductor processes, SC… (more)

Subjects/Keywords: Analog-to-digital converter; CMOS integrated circuits; Delta-sigma modulation; Phase-locked loop; Switched-capacitor circuit

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APA (6th Edition):

Song, Y. (. -. ). (2011). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. (Doctoral Dissertation). University of Rochester. Retrieved from http://hdl.handle.net/1802/16887

Chicago Manual of Style (16th Edition):

Song, Yu (1980 - ). “CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.” 2011. Doctoral Dissertation, University of Rochester. Accessed March 23, 2017. http://hdl.handle.net/1802/16887.

MLA Handbook (7th Edition):

Song, Yu (1980 - ). “CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.” 2011. Web. 23 Mar 2017.

Vancouver:

Song Y(-). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. [Internet] [Doctoral dissertation]. University of Rochester; 2011. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/1802/16887.

Council of Science Editors:

Song Y(-). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. [Doctoral Dissertation]. University of Rochester; 2011. Available from: http://hdl.handle.net/1802/16887


Georgia Tech

14. Chuang, Kevin. Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 The objective of the research is to develop high-speed ADCs and mixed-signal demodulator for multi-gigabit communication systems using millimeter-wave frequency bands in standard CMOS technology.… (more)

Subjects/Keywords: Analog-to-digital converter; Mixed-signal; Demodulator; Multi-gigabit; CMOS; Analog-to-digital converters; Metal oxide semiconductors, Complementary; Radio detectors; Millimeter wave communication systems

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APA (6th Edition):

Chuang, K. (2011). Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/47814

Chicago Manual of Style (16th Edition):

Chuang, Kevin. “Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems.” 2011. Doctoral Dissertation, Georgia Tech. Accessed March 23, 2017. http://hdl.handle.net/1853/47814.

MLA Handbook (7th Edition):

Chuang, Kevin. “Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems.” 2011. Web. 23 Mar 2017.

Vancouver:

Chuang K. Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/1853/47814.

Council of Science Editors:

Chuang K. Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/47814

15. Andersson, Mattias. Continuous-Time Delta-Sigma Modulators for Wireless Communication.

Degree: 2014, University of Lund

 The ever increasing data rates in wireless communication require analog to digital converters (ADCs) with greater requirements on speed and accuracy, while being power efficient… (more)

Subjects/Keywords: A/D converter; return-to-zero; loop delay; delta-sigma; ADC; CMOS; STF; continuous-time; sigma; delta; filtering; CT; RZ; Electrical Engineering, Electronic Engineering, Information Engineering

…Σ Modulator in 65 nm CMOS With 69 dB SNDR and Reduced Sensitivity to Loop Delay… …Acronyms A/D Analog-to-digital ADC Analog-to-digital converter BW Bandwidth of desired A/D… …A Digital-to-analog DAC Digital-to-analog converter DC Direct current DR Dynamic range DSM… …radio receiver is the analog-to-digital converter (ADC), which provides an interface between… …concept, where the channel-select filter and A/D converter (DSM) are merged to provide… 

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APA (6th Edition):

Andersson, M. (2014). Continuous-Time Delta-Sigma Modulators for Wireless Communication. (Thesis). University of Lund. Retrieved from http://lup.lub.lu.se/record/4302214 ; http://lup.lub.lu.se/record/4302214/file/4302260.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Andersson, Mattias. “Continuous-Time Delta-Sigma Modulators for Wireless Communication.” 2014. Thesis, University of Lund. Accessed March 23, 2017. http://lup.lub.lu.se/record/4302214 ; http://lup.lub.lu.se/record/4302214/file/4302260.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Andersson, Mattias. “Continuous-Time Delta-Sigma Modulators for Wireless Communication.” 2014. Web. 23 Mar 2017.

Vancouver:

Andersson M. Continuous-Time Delta-Sigma Modulators for Wireless Communication. [Internet] [Thesis]. University of Lund; 2014. [cited 2017 Mar 23]. Available from: http://lup.lub.lu.se/record/4302214 ; http://lup.lub.lu.se/record/4302214/file/4302260.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Andersson M. Continuous-Time Delta-Sigma Modulators for Wireless Communication. [Thesis]. University of Lund; 2014. Available from: http://lup.lub.lu.se/record/4302214 ; http://lup.lub.lu.se/record/4302214/file/4302260.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

16. Radic, Aleksandar. Practical Volume-reduction Strategies for Low-power High-frequency Switch Mode Power Supplies.

Degree: 2014, University of Toronto

The miniaturization of dc–dc switch-mode power supplies (SMPS) is of a key importance in volume-sensitive portable devices, such as cell phones, tablet computers, and digital… (more)

Subjects/Keywords: Power Electronics; Power Conversion; DC-DC; Integrated Circuit; Switch Mode Power Supply; Digital Control; Mixed-Signal; CMOS; Analog-to-Digital Converter; Load Transient; 0544

…108 B. Analog-to-Digital Converter for Input Voltage Measurements in Low-Power Digitally… …59 Figure 37. Light-to-heavy load transient waveform of a buck converter with large output… …118 xvi LIST OF ABBREVIATIONS ADC Analog-to-Digital Converter BCMCA Buck Converter with… …Digital-to-Analog Converter DPWM Digital Pulse-Width Modulator EMI Electro-magnetic Interference… …to-digital converter (ADC) and a powerful processing unit. [11, 12]. These ADC… 

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APA (6th Edition):

Radic, A. (2014). Practical Volume-reduction Strategies for Low-power High-frequency Switch Mode Power Supplies. (Doctoral Dissertation). University of Toronto. Retrieved from http://hdl.handle.net/1807/44131

Chicago Manual of Style (16th Edition):

Radic, Aleksandar. “Practical Volume-reduction Strategies for Low-power High-frequency Switch Mode Power Supplies.” 2014. Doctoral Dissertation, University of Toronto. Accessed March 23, 2017. http://hdl.handle.net/1807/44131.

MLA Handbook (7th Edition):

Radic, Aleksandar. “Practical Volume-reduction Strategies for Low-power High-frequency Switch Mode Power Supplies.” 2014. Web. 23 Mar 2017.

Vancouver:

Radic A. Practical Volume-reduction Strategies for Low-power High-frequency Switch Mode Power Supplies. [Internet] [Doctoral dissertation]. University of Toronto; 2014. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/1807/44131.

Council of Science Editors:

Radic A. Practical Volume-reduction Strategies for Low-power High-frequency Switch Mode Power Supplies. [Doctoral Dissertation]. University of Toronto; 2014. Available from: http://hdl.handle.net/1807/44131


University of Victoria

17. Cervantes Smith, Marla Stephanie. ARIEL electron to gamma converter design.

Degree: Department of Physics and Astronomy, 2016, University of Victoria

 The e-linac beam that will serve the ARIEL Electron Target East (AETE) has an energy range from 30 MeV to 50 MeV with a power… (more)

Subjects/Keywords: Electron to gamma converter

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APA (6th Edition):

Cervantes Smith, M. S. (2016). ARIEL electron to gamma converter design. (Masters Thesis). University of Victoria. Retrieved from http://hdl.handle.net/1828/7624

Chicago Manual of Style (16th Edition):

Cervantes Smith, Marla Stephanie. “ARIEL electron to gamma converter design.” 2016. Masters Thesis, University of Victoria. Accessed March 23, 2017. http://hdl.handle.net/1828/7624.

MLA Handbook (7th Edition):

Cervantes Smith, Marla Stephanie. “ARIEL electron to gamma converter design.” 2016. Web. 23 Mar 2017.

Vancouver:

Cervantes Smith MS. ARIEL electron to gamma converter design. [Internet] [Masters thesis]. University of Victoria; 2016. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/1828/7624.

Council of Science Editors:

Cervantes Smith MS. ARIEL electron to gamma converter design. [Masters Thesis]. University of Victoria; 2016. Available from: http://hdl.handle.net/1828/7624

18. Branca, Xavier. Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms.

Degree: Docteur es, Electrotechnique, 2012, Allard, Bruno (thesis director)

Les objectifs de la thèse concernent l’optimisation du rendement énergétique, la minimisation de l’empreinte et du coût de l’alimentation en tension d’amplificateurs audio pour l’application… (more)

Subjects/Keywords: Télécommunications; Téléphonie mobile; Communication mobile; Amplificateur audio; Convertisseur DC-DC; Electronique analogique; Microélectronique; Technologie CMOS; Telecommunications; Mobile communication; Audio amplifier; DC-to-DC converter; Analog Electronics; Microelectronics; CMOS Technology; 621.381 044 072

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APA (6th Edition):

Branca, X. (2012). Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms. (Thesis). Allard, Bruno (thesis director). Retrieved from http://www.theses.fr/fr/2012ISAL0059

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Branca, Xavier. “Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms.” 2012. Thesis, Allard, Bruno (thesis director). Accessed March 23, 2017. http://www.theses.fr/fr/2012ISAL0059.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Branca, Xavier. “Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms.” 2012. Web. 23 Mar 2017.

Vancouver:

Branca X. Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms. [Internet] [Thesis]. Allard, Bruno (thesis director); 2012. [cited 2017 Mar 23]. Available from: http://www.theses.fr/fr/2012ISAL0059.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Branca X. Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms. [Thesis]. Allard, Bruno (thesis director); 2012. Available from: http://www.theses.fr/fr/2012ISAL0059

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

19. Zhang, Liang. Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC.

Degree: Docteur es, Instrumentation et microélectronique, 2013, Hu, Yann (thesis director)

Le sujet de cette thèse est de concevoir un prototype de capteur à pixel CMOS adapté aux couches extérieures du détecteur de vertex de l'International… (more)

Subjects/Keywords: Capteur à pixel CMOS; International Linear Collider (ILC); Détecteur vertex; MIMOSA 31; CMOS pixel sensors (CPS); Monolithic active pixel sensors (MAPS); International Linear Collider (ILC); Vertex detector; Correlated double sampling (CDS); Analog to digital converter (ADC); Column-level; Self-triggered; Multi-bit/step approximation; 539.7; 621.38

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APA (6th Edition):

Zhang, L. (2013). Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC. (Thesis). Hu, Yann (thesis director). Retrieved from http://www.theses.fr/fr/2013STRAE036

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhang, Liang. “Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC.” 2013. Thesis, Hu, Yann (thesis director). Accessed March 23, 2017. http://www.theses.fr/fr/2013STRAE036.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhang, Liang. “Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC.” 2013. Web. 23 Mar 2017.

Vancouver:

Zhang L. Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC. [Internet] [Thesis]. Hu, Yann (thesis director); 2013. [cited 2017 Mar 23]. Available from: http://www.theses.fr/fr/2013STRAE036.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhang L. Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC. [Thesis]. Hu, Yann (thesis director); 2013. Available from: http://www.theses.fr/fr/2013STRAE036

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of New South Wales

20. Rahman, Md Tanvir. Cryogenic Electronics for Quantum Computer Interface: Low Temperature D/A Converters for Silicon Quantum Computer Controller Circuit.

Degree: Electrical Engineering & Telecommunications, 2016, University of New South Wales

 The quest to harness exceptionally high speed computational power exploits the cryogenic Silicon (Si) CMOS technology to find its application in one of the world’s… (more)

Subjects/Keywords: Cryogenic DAC; CMOS; Quantum Computer,; Cryogenic Current Steering D/A Converter,; CMOS

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rahman, M. T. (2016). Cryogenic Electronics for Quantum Computer Interface: Low Temperature D/A Converters for Silicon Quantum Computer Controller Circuit. (Doctoral Dissertation). University of New South Wales. Retrieved from http://handle.unsw.edu.au/1959.4/56014

Chicago Manual of Style (16th Edition):

Rahman, Md Tanvir. “Cryogenic Electronics for Quantum Computer Interface: Low Temperature D/A Converters for Silicon Quantum Computer Controller Circuit.” 2016. Doctoral Dissertation, University of New South Wales. Accessed March 23, 2017. http://handle.unsw.edu.au/1959.4/56014.

MLA Handbook (7th Edition):

Rahman, Md Tanvir. “Cryogenic Electronics for Quantum Computer Interface: Low Temperature D/A Converters for Silicon Quantum Computer Controller Circuit.” 2016. Web. 23 Mar 2017.

Vancouver:

Rahman MT. Cryogenic Electronics for Quantum Computer Interface: Low Temperature D/A Converters for Silicon Quantum Computer Controller Circuit. [Internet] [Doctoral dissertation]. University of New South Wales; 2016. [cited 2017 Mar 23]. Available from: http://handle.unsw.edu.au/1959.4/56014.

Council of Science Editors:

Rahman MT. Cryogenic Electronics for Quantum Computer Interface: Low Temperature D/A Converters for Silicon Quantum Computer Controller Circuit. [Doctoral Dissertation]. University of New South Wales; 2016. Available from: http://handle.unsw.edu.au/1959.4/56014

21. Naraghi, Shahrzad. Time-Based Analog to Digital Converters.

Degree: PhD, Electrical Engineering, 2009, University of Michigan

 Low-power, small analog-to-digital converters (ADCs) have numerous applications in areas ranging from power-aware wireless sensing nodes for environmental monitoring to biomedical monitoring devices in point-of-care… (more)

Subjects/Keywords: Analog-to-Digital Converter; Time-to-Digital Converter; Electrical Engineering; Engineering

…This time duration corresponds to CMOS process scaling from 0.6  m to 65nm. From the data… …feel for how much logic can be used to “assist” a converter for calibration or error… …measurement is implemented with a time-to digital-converter (TDC). In these systems, the required… …then the delay time is digitized by a time-to-digital converter (TDC), as shown in Figure 1.6… …acts as the voltage to frequency converter and quantizer at the same time. The VCO along with… 

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APA (6th Edition):

Naraghi, S. (2009). Time-Based Analog to Digital Converters. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/64787

Chicago Manual of Style (16th Edition):

Naraghi, Shahrzad. “Time-Based Analog to Digital Converters.” 2009. Doctoral Dissertation, University of Michigan. Accessed March 23, 2017. http://hdl.handle.net/2027.42/64787.

MLA Handbook (7th Edition):

Naraghi, Shahrzad. “Time-Based Analog to Digital Converters.” 2009. Web. 23 Mar 2017.

Vancouver:

Naraghi S. Time-Based Analog to Digital Converters. [Internet] [Doctoral dissertation]. University of Michigan; 2009. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/2027.42/64787.

Council of Science Editors:

Naraghi S. Time-Based Analog to Digital Converters. [Doctoral Dissertation]. University of Michigan; 2009. Available from: http://hdl.handle.net/2027.42/64787


Georgia Tech

22. Kim, Suhwan. Mixed-source charger-supply CMOS IC.

Degree: PhD, Electrical and Computer Engineering, 2014, Georgia Tech

 The proposed research objective is to develop, test, and evaluate a mixer and charger-supply CMOS IC that derives and mixes energy and power from mixed… (more)

Subjects/Keywords: DC-DC converter; CMOS; Power supply; Hybrid source

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APA (6th Edition):

Kim, S. (2014). Mixed-source charger-supply CMOS IC. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/52210

Chicago Manual of Style (16th Edition):

Kim, Suhwan. “Mixed-source charger-supply CMOS IC.” 2014. Doctoral Dissertation, Georgia Tech. Accessed March 23, 2017. http://hdl.handle.net/1853/52210.

MLA Handbook (7th Edition):

Kim, Suhwan. “Mixed-source charger-supply CMOS IC.” 2014. Web. 23 Mar 2017.

Vancouver:

Kim S. Mixed-source charger-supply CMOS IC. [Internet] [Doctoral dissertation]. Georgia Tech; 2014. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/1853/52210.

Council of Science Editors:

Kim S. Mixed-source charger-supply CMOS IC. [Doctoral Dissertation]. Georgia Tech; 2014. Available from: http://hdl.handle.net/1853/52210


University of Texas – Austin

23. Jung, Woo Young. Time-based oversampled analog-to-digital converters in nano-scale integrated circuits.

Degree: Electrical and Computer Engineering, 2014, University of Texas – Austin

 In this research, a time-based oversampling delta-sigma (ΔΣ) ADC architecture is introduced. This system uses time, rather than voltage or current, as the analog variable… (more)

Subjects/Keywords: Analog-to-digital converter; Delta-sigma modulation; Time-to-digital converter; Pulse-width modulation; Digital-to-time converter

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APA (6th Edition):

Jung, W. Y. (2014). Time-based oversampled analog-to-digital converters in nano-scale integrated circuits. (Thesis). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/29195

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jung, Woo Young. “Time-based oversampled analog-to-digital converters in nano-scale integrated circuits.” 2014. Thesis, University of Texas – Austin. Accessed March 23, 2017. http://hdl.handle.net/2152/29195.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jung, Woo Young. “Time-based oversampled analog-to-digital converters in nano-scale integrated circuits.” 2014. Web. 23 Mar 2017.

Vancouver:

Jung WY. Time-based oversampled analog-to-digital converters in nano-scale integrated circuits. [Internet] [Thesis]. University of Texas – Austin; 2014. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/2152/29195.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jung WY. Time-based oversampled analog-to-digital converters in nano-scale integrated circuits. [Thesis]. University of Texas – Austin; 2014. Available from: http://hdl.handle.net/2152/29195

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

24. Miri Lavasani, Seyed Hossein. Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators.

Degree: PhD, Electrical and Computer Engineering, 2010, Georgia Tech

 Frequency reference oscillator is a critical component of modern radio transceivers. Currently, most reference oscillators are based on low-frequency quartz crystals that are inherently bulky… (more)

Subjects/Keywords: Phase-noise modeling; Phase-noise; Oscillator; VCO; Micromechanical oscillator; Capacitance cancellation; Negative capacitance; Negative impedance converter; Temperature compensation; Linear CMOS voltage to current converter; Piezoelectric resonator; Capacitive resonator; Tuning enhancement; TIA; Transimpedance amplifier; MEMS; Frequency tuning; Oscillators, Electric; Oscillators, Crystal; Radio frequency oscillators; Microelectromechanical systems; Oscillators, Audio-frequency Noise

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APA (6th Edition):

Miri Lavasani, S. H. (2010). Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/41096

Chicago Manual of Style (16th Edition):

Miri Lavasani, Seyed Hossein. “Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators.” 2010. Doctoral Dissertation, Georgia Tech. Accessed March 23, 2017. http://hdl.handle.net/1853/41096.

MLA Handbook (7th Edition):

Miri Lavasani, Seyed Hossein. “Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators.” 2010. Web. 23 Mar 2017.

Vancouver:

Miri Lavasani SH. Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators. [Internet] [Doctoral dissertation]. Georgia Tech; 2010. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/1853/41096.

Council of Science Editors:

Miri Lavasani SH. Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators. [Doctoral Dissertation]. Georgia Tech; 2010. Available from: http://hdl.handle.net/1853/41096


University of Minnesota

25. Sahoo, Ashish Kumar. Design and Comparison of passive component requirements of a matrix converter and voltage-source based back-to-back converter.

Degree: 2013, University of Minnesota

 A filter is required to eliminate the high frequency switching ripple present in the input current of AC/AC pulse-width modulated (PWM) converters. Design of such… (more)

Subjects/Keywords: Back-to-back converter; Filter design; Matrix converter; Pulse width modulation

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APA (6th Edition):

Sahoo, A. K. (2013). Design and Comparison of passive component requirements of a matrix converter and voltage-source based back-to-back converter. (Thesis). University of Minnesota. Retrieved from http://hdl.handle.net/11299/162391

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sahoo, Ashish Kumar. “Design and Comparison of passive component requirements of a matrix converter and voltage-source based back-to-back converter.” 2013. Thesis, University of Minnesota. Accessed March 23, 2017. http://hdl.handle.net/11299/162391.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sahoo, Ashish Kumar. “Design and Comparison of passive component requirements of a matrix converter and voltage-source based back-to-back converter.” 2013. Web. 23 Mar 2017.

Vancouver:

Sahoo AK. Design and Comparison of passive component requirements of a matrix converter and voltage-source based back-to-back converter. [Internet] [Thesis]. University of Minnesota; 2013. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/11299/162391.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sahoo AK. Design and Comparison of passive component requirements of a matrix converter and voltage-source based back-to-back converter. [Thesis]. University of Minnesota; 2013. Available from: http://hdl.handle.net/11299/162391

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Pretoria

26. Opperman, Tjaart Adriaan Kruger. A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method .

Degree: 2009, University of Pretoria

 This research looks into the design of an integrated in-phase/quadrature (I/Q) VCO operating at 5 GHz. The goal is to design a phase shifter that… (more)

Subjects/Keywords: Vector sum method; Variable gain amplifier; Vga; Inductor capacitor; Phase noise; Vco; Silicon germanium; Sige; Lc; Digital-to-analogue converter; Integrated circuit; Ic; Rf; Radio frequency; Local oscillator; Gilbert mixer; Bicmos; Bipolar cmos; Voltage controlled oscillator; Phase shifter; Phased array antenna; Lo; Dac; UCTD

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APA (6th Edition):

Opperman, T. A. K. (2009). A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method . (Masters Thesis). University of Pretoria. Retrieved from http://upetd.up.ac.za/thesis/available/etd-04082009-171225/

Chicago Manual of Style (16th Edition):

Opperman, Tjaart Adriaan Kruger. “A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method .” 2009. Masters Thesis, University of Pretoria. Accessed March 23, 2017. http://upetd.up.ac.za/thesis/available/etd-04082009-171225/.

MLA Handbook (7th Edition):

Opperman, Tjaart Adriaan Kruger. “A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method .” 2009. Web. 23 Mar 2017.

Vancouver:

Opperman TAK. A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method . [Internet] [Masters thesis]. University of Pretoria; 2009. [cited 2017 Mar 23]. Available from: http://upetd.up.ac.za/thesis/available/etd-04082009-171225/.

Council of Science Editors:

Opperman TAK. A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method . [Masters Thesis]. University of Pretoria; 2009. Available from: http://upetd.up.ac.za/thesis/available/etd-04082009-171225/


EPFL

27. Favi, Claudio. Single-Photon Techniques for Standard CMOS Digital ICs.

Degree: 2011, EPFL

 The advent of single-photon detectors known as Single-Photon Avalanche Diodes in standard CMOS technology opened the way to new perspectives in integrating these ultra sensitive… (more)

Subjects/Keywords: Single-Photon Avalanche Diode (SPAD), digital CMOS; single-photon communication; photon channel capacity; Time-to-Digital Converter (TDC); single-photon imaging; photon processing; Time-Uncorrelated Photon Counting (TUPC); Time-Correlated Single-Photon Counting (TC-SPC); sensor array readout strategies; single-photon clocking; clock distribution; clock networks

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APA (6th Edition):

Favi, C. (2011). Single-Photon Techniques for Standard CMOS Digital ICs. (Thesis). EPFL. Retrieved from http://infoscience.epfl.ch/record/158336

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Favi, Claudio. “Single-Photon Techniques for Standard CMOS Digital ICs.” 2011. Thesis, EPFL. Accessed March 23, 2017. http://infoscience.epfl.ch/record/158336.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Favi, Claudio. “Single-Photon Techniques for Standard CMOS Digital ICs.” 2011. Web. 23 Mar 2017.

Vancouver:

Favi C. Single-Photon Techniques for Standard CMOS Digital ICs. [Internet] [Thesis]. EPFL; 2011. [cited 2017 Mar 23]. Available from: http://infoscience.epfl.ch/record/158336.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Favi C. Single-Photon Techniques for Standard CMOS Digital ICs. [Thesis]. EPFL; 2011. Available from: http://infoscience.epfl.ch/record/158336

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Oulu

28. Mäntyniemi, A. (Antti). An integrated CMOS high precision time-to-digital converter based on stabilised three-stage delay line interpolation.

Degree: 2004, University of Oulu

 Abstract This thesis describes the development of a high precision time-to-digital converter (TDC) in which the conversion is based on a counter and three-stage stabilised… (more)

Subjects/Keywords: CMOS integrated circuits; TDC; delay-locked loop; digital delay lines; interpolation; picosecond resolution; time interval measurement; time-to-digital converter

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mäntyniemi, A. (. (2004). An integrated CMOS high precision time-to-digital converter based on stabilised three-stage delay line interpolation. (Doctoral Dissertation). University of Oulu. Retrieved from http://urn.fi/urn:isbn:951427461X

Chicago Manual of Style (16th Edition):

Mäntyniemi, A (Antti). “An integrated CMOS high precision time-to-digital converter based on stabilised three-stage delay line interpolation.” 2004. Doctoral Dissertation, University of Oulu. Accessed March 23, 2017. http://urn.fi/urn:isbn:951427461X.

MLA Handbook (7th Edition):

Mäntyniemi, A (Antti). “An integrated CMOS high precision time-to-digital converter based on stabilised three-stage delay line interpolation.” 2004. Web. 23 Mar 2017.

Vancouver:

Mäntyniemi A(. An integrated CMOS high precision time-to-digital converter based on stabilised three-stage delay line interpolation. [Internet] [Doctoral dissertation]. University of Oulu; 2004. [cited 2017 Mar 23]. Available from: http://urn.fi/urn:isbn:951427461X.

Council of Science Editors:

Mäntyniemi A(. An integrated CMOS high precision time-to-digital converter based on stabilised three-stage delay line interpolation. [Doctoral Dissertation]. University of Oulu; 2004. Available from: http://urn.fi/urn:isbn:951427461X


Texas Tech University

29. Kamalapuri, Poorvaja. Yield improvement for analog to digital converter test.

Degree: Electrical and Computer Engineering, 2007, Texas Tech University

 A yield of 99% is a very demanding yet achievable target in the semiconductor industry. High volumes and fierce competition call for constant yield management.… (more)

Subjects/Keywords: Analog-to-digital converter; Problem solving; Yield

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APA (6th Edition):

Kamalapuri, P. (2007). Yield improvement for analog to digital converter test. (Masters Thesis). Texas Tech University. Retrieved from http://hdl.handle.net/2346/17931

Chicago Manual of Style (16th Edition):

Kamalapuri, Poorvaja. “Yield improvement for analog to digital converter test.” 2007. Masters Thesis, Texas Tech University. Accessed March 23, 2017. http://hdl.handle.net/2346/17931.

MLA Handbook (7th Edition):

Kamalapuri, Poorvaja. “Yield improvement for analog to digital converter test.” 2007. Web. 23 Mar 2017.

Vancouver:

Kamalapuri P. Yield improvement for analog to digital converter test. [Internet] [Masters thesis]. Texas Tech University; 2007. [cited 2017 Mar 23]. Available from: http://hdl.handle.net/2346/17931.

Council of Science Editors:

Kamalapuri P. Yield improvement for analog to digital converter test. [Masters Thesis]. Texas Tech University; 2007. Available from: http://hdl.handle.net/2346/17931

30. Silva, João Gonçalo Clemente da. Project of a bandgap voltage reference and a temperature sensor for "energy harvest" systems.

Degree: 2013, Universidade Nova

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e Computadores

The objective of this thesis is to study the behaviour of a bandgap… (more)

Subjects/Keywords: Bandgap; Temperature sensor; Temperature to digital converter

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APA (6th Edition):

Silva, J. G. C. d. (2013). Project of a bandgap voltage reference and a temperature sensor for "energy harvest" systems. (Thesis). Universidade Nova. Retrieved from http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/11330

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Silva, João Gonçalo Clemente da. “Project of a bandgap voltage reference and a temperature sensor for "energy harvest" systems.” 2013. Thesis, Universidade Nova. Accessed March 23, 2017. http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/11330.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Silva, João Gonçalo Clemente da. “Project of a bandgap voltage reference and a temperature sensor for "energy harvest" systems.” 2013. Web. 23 Mar 2017.

Vancouver:

Silva JGCd. Project of a bandgap voltage reference and a temperature sensor for "energy harvest" systems. [Internet] [Thesis]. Universidade Nova; 2013. [cited 2017 Mar 23]. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/11330.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Silva JGCd. Project of a bandgap voltage reference and a temperature sensor for "energy harvest" systems. [Thesis]. Universidade Nova; 2013. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/11330

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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