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You searched for subject:(CML to CMOS converter). Showing records 1 – 30 of 21702 total matches.

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University of Pretoria

1. Veale, Gerhardus Ignatius Potgieter. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC.

Degree: Electrical, Electronic and Computer Engineering, 2010, University of Pretoria

 Low noise low division 2 GHz RF synthesizer integrated circuits (ICs) are conventionally implemented in some form of HBT process such as SiGe or GaAs.… (more)

Subjects/Keywords: Cml-to-cmos converter; Cml flicker noise; Fractional-n; Cmos pfd; Cml pfd; Cml 4-bit counter; Cml; Cml 2/3-prescaler; Ssb phase noise; Pulse-swallow counter; Low division; Programmable modulus accumulator; High voltage charge-pump; In-band phase noise; UCTD

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APA (6th Edition):

Veale, G. I. (2010). Low phase noise 2 GHz Fractional-N CMOS synthesizer IC. (Masters Thesis). University of Pretoria. Retrieved from http://hdl.handle.net/2263/27921

Chicago Manual of Style (16th Edition):

Veale, Gerhardus Ignatius. “Low phase noise 2 GHz Fractional-N CMOS synthesizer IC.” 2010. Masters Thesis, University of Pretoria. Accessed April 22, 2018. http://hdl.handle.net/2263/27921.

MLA Handbook (7th Edition):

Veale, Gerhardus Ignatius. “Low phase noise 2 GHz Fractional-N CMOS synthesizer IC.” 2010. Web. 22 Apr 2018.

Vancouver:

Veale GI. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC. [Internet] [Masters thesis]. University of Pretoria; 2010. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/2263/27921.

Council of Science Editors:

Veale GI. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC. [Masters Thesis]. University of Pretoria; 2010. Available from: http://hdl.handle.net/2263/27921


University of Pretoria

2. [No author]. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC .

Degree: 2010, University of Pretoria

 Low noise low division 2 GHz RF synthesizer integrated circuits (ICs) are conventionally implemented in some form of HBT process such as SiGe or GaAs.… (more)

Subjects/Keywords: Cml-to-cmos converter; Cml flicker noise; Fractional-n; Cmos pfd; Cml pfd; Cml 4-bit counter; Cml; Cml 2/3-prescaler; Ssb phase noise; Pulse-swallow counter; Low division; Programmable modulus accumulator; High voltage charge-pump; In-band phase noise; UCTD

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APA (6th Edition):

author], [. (2010). Low phase noise 2 GHz Fractional-N CMOS synthesizer IC . (Masters Thesis). University of Pretoria. Retrieved from http://upetd.up.ac.za/thesis/available/etd-09132010-162013/

Chicago Manual of Style (16th Edition):

author], [No. “Low phase noise 2 GHz Fractional-N CMOS synthesizer IC .” 2010. Masters Thesis, University of Pretoria. Accessed April 22, 2018. http://upetd.up.ac.za/thesis/available/etd-09132010-162013/.

MLA Handbook (7th Edition):

author], [No. “Low phase noise 2 GHz Fractional-N CMOS synthesizer IC .” 2010. Web. 22 Apr 2018.

Vancouver:

author] [. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC . [Internet] [Masters thesis]. University of Pretoria; 2010. [cited 2018 Apr 22]. Available from: http://upetd.up.ac.za/thesis/available/etd-09132010-162013/.

Council of Science Editors:

author] [. Low phase noise 2 GHz Fractional-N CMOS synthesizer IC . [Masters Thesis]. University of Pretoria; 2010. Available from: http://upetd.up.ac.za/thesis/available/etd-09132010-162013/


Brno University of Technology

3. Buček, Vladimír. Návrh číslicově-analogového převodníku s vysokým rozlišením .

Degree: 2011, Brno University of Technology

 Tato práce se zabývá návrhem digitálně-analogového převodníku. Používaná technologie tohoto návrhu je ON SEMICONDUCTOR CMOS07 v návrhovém programu Cadence. V práci se lze setkat s… (more)

Subjects/Keywords: digitálně-analogový převodník; CMOS; napěťová nesymetrie; Digital to analog converter; CMOS; offset

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APA (6th Edition):

Buček, V. (2011). Návrh číslicově-analogového převodníku s vysokým rozlišením . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/1802

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Buček, Vladimír. “Návrh číslicově-analogového převodníku s vysokým rozlišením .” 2011. Thesis, Brno University of Technology. Accessed April 22, 2018. http://hdl.handle.net/11012/1802.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Buček, Vladimír. “Návrh číslicově-analogového převodníku s vysokým rozlišením .” 2011. Web. 22 Apr 2018.

Vancouver:

Buček V. Návrh číslicově-analogového převodníku s vysokým rozlišením . [Internet] [Thesis]. Brno University of Technology; 2011. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/11012/1802.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Buček V. Návrh číslicově-analogového převodníku s vysokým rozlišením . [Thesis]. Brno University of Technology; 2011. Available from: http://hdl.handle.net/11012/1802

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Edinburgh

4. Danesh, Seyed Amir Ali. Time interleaved counter analog to digital converters.

Degree: 2011, University of Edinburgh

 The work explores extending time interleaving in A/D converters, by applying a high-level of parallelism to one of the slowest and simplest types of data-converters,… (more)

Subjects/Keywords: 004.19; ADC; analog to digial converter; time interleaved; counter; TIC; CMOS

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APA (6th Edition):

Danesh, S. A. A. (2011). Time interleaved counter analog to digital converters. (Doctoral Dissertation). University of Edinburgh. Retrieved from http://hdl.handle.net/1842/5790

Chicago Manual of Style (16th Edition):

Danesh, Seyed Amir Ali. “Time interleaved counter analog to digital converters.” 2011. Doctoral Dissertation, University of Edinburgh. Accessed April 22, 2018. http://hdl.handle.net/1842/5790.

MLA Handbook (7th Edition):

Danesh, Seyed Amir Ali. “Time interleaved counter analog to digital converters.” 2011. Web. 22 Apr 2018.

Vancouver:

Danesh SAA. Time interleaved counter analog to digital converters. [Internet] [Doctoral dissertation]. University of Edinburgh; 2011. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/1842/5790.

Council of Science Editors:

Danesh SAA. Time interleaved counter analog to digital converters. [Doctoral Dissertation]. University of Edinburgh; 2011. Available from: http://hdl.handle.net/1842/5790


University of Akron

5. Namburu, Pradeep. A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER.

Degree: MS, Electrical Engineering, 2010, University of Akron

  The current thesis presents the design of a 10-bit Digital-to-Analog Converter (DAC) to be used in a Successive Approximation Register Analog-to-Digital converter (SAR ADC).… (more)

Subjects/Keywords: Electrical Engineering; CMOS gate driver; Current source; Digital-to-Analog Converter

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APA (6th Edition):

Namburu, P. (2010). A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER. (Masters Thesis). University of Akron. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=akron1270567830

Chicago Manual of Style (16th Edition):

Namburu, Pradeep. “A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER.” 2010. Masters Thesis, University of Akron. Accessed April 22, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=akron1270567830.

MLA Handbook (7th Edition):

Namburu, Pradeep. “A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER.” 2010. Web. 22 Apr 2018.

Vancouver:

Namburu P. A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER. [Internet] [Masters thesis]. University of Akron; 2010. [cited 2018 Apr 22]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1270567830.

Council of Science Editors:

Namburu P. A TEMPERATURE-INSENSITIVE GATE-CONTROLLED WEIGHTED CURRENT DIGITAL-TO-ANALOG CONVERTER. [Masters Thesis]. University of Akron; 2010. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=akron1270567830


University of Waterloo

6. Ali, Areeb. CMOS Impedance Measurement Array for Cell Sensing.

Degree: 2015, University of Waterloo

 Impedance measurement plays a vital role in determining the physical and chemical properties of live cells under different environmental conditions and aids in the development… (more)

Subjects/Keywords: CMOS Impedance Measurement Array Cell Sensor Impedance-to-Digital Converter

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APA (6th Edition):

Ali, A. (2015). CMOS Impedance Measurement Array for Cell Sensing. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/9097

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ali, Areeb. “CMOS Impedance Measurement Array for Cell Sensing.” 2015. Thesis, University of Waterloo. Accessed April 22, 2018. http://hdl.handle.net/10012/9097.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ali, Areeb. “CMOS Impedance Measurement Array for Cell Sensing.” 2015. Web. 22 Apr 2018.

Vancouver:

Ali A. CMOS Impedance Measurement Array for Cell Sensing. [Internet] [Thesis]. University of Waterloo; 2015. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/10012/9097.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ali A. CMOS Impedance Measurement Array for Cell Sensing. [Thesis]. University of Waterloo; 2015. Available from: http://hdl.handle.net/10012/9097

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


McMaster University

7. Palubiak, Dariusz. CMOS SINGLE PHOTON AVALANCHE DIODES AND TIME-TO-DIGITAL CONVERTERS FOR TIME-RESOLVED FLUORESCENCE ANALYSIS.

Degree: PhD, 2016, McMaster University

Fluorescence lifetime imaging (FLIM) has the potential to provide rapid screening and detection of diseases. However, time-resolved fluorescence measurements require high-performance detectors with single-photon sensitivity… (more)

Subjects/Keywords: CMOS; Single photon detector; fluorescence lifetime; Time to Digital Converter

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APA (6th Edition):

Palubiak, D. (2016). CMOS SINGLE PHOTON AVALANCHE DIODES AND TIME-TO-DIGITAL CONVERTERS FOR TIME-RESOLVED FLUORESCENCE ANALYSIS. (Doctoral Dissertation). McMaster University. Retrieved from http://hdl.handle.net/11375/18695

Chicago Manual of Style (16th Edition):

Palubiak, Dariusz. “CMOS SINGLE PHOTON AVALANCHE DIODES AND TIME-TO-DIGITAL CONVERTERS FOR TIME-RESOLVED FLUORESCENCE ANALYSIS.” 2016. Doctoral Dissertation, McMaster University. Accessed April 22, 2018. http://hdl.handle.net/11375/18695.

MLA Handbook (7th Edition):

Palubiak, Dariusz. “CMOS SINGLE PHOTON AVALANCHE DIODES AND TIME-TO-DIGITAL CONVERTERS FOR TIME-RESOLVED FLUORESCENCE ANALYSIS.” 2016. Web. 22 Apr 2018.

Vancouver:

Palubiak D. CMOS SINGLE PHOTON AVALANCHE DIODES AND TIME-TO-DIGITAL CONVERTERS FOR TIME-RESOLVED FLUORESCENCE ANALYSIS. [Internet] [Doctoral dissertation]. McMaster University; 2016. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/11375/18695.

Council of Science Editors:

Palubiak D. CMOS SINGLE PHOTON AVALANCHE DIODES AND TIME-TO-DIGITAL CONVERTERS FOR TIME-RESOLVED FLUORESCENCE ANALYSIS. [Doctoral Dissertation]. McMaster University; 2016. Available from: http://hdl.handle.net/11375/18695

8. Mello, Israel Sperotto de. All-MOSFET M-2M digital-to-analog converter for operation with very low supply voltage.

Degree: 2015, Universidade do Rio Grande do Sul

 Desde os anos 80 a evolução dos processos de fabricação de circuitos integrados MOS tem buscado a redução da tensão de alimentação, como forma de… (more)

Subjects/Keywords: Microeletrônica; CMOS analog design; Circuitos digitais; Low voltage design; Digital to analog converter; Mismatch

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APA (6th Edition):

Mello, I. S. d. (2015). All-MOSFET M-2M digital-to-analog converter for operation with very low supply voltage. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/169086

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mello, Israel Sperotto de. “All-MOSFET M-2M digital-to-analog converter for operation with very low supply voltage.” 2015. Thesis, Universidade do Rio Grande do Sul. Accessed April 22, 2018. http://hdl.handle.net/10183/169086.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mello, Israel Sperotto de. “All-MOSFET M-2M digital-to-analog converter for operation with very low supply voltage.” 2015. Web. 22 Apr 2018.

Vancouver:

Mello ISd. All-MOSFET M-2M digital-to-analog converter for operation with very low supply voltage. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2015. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/10183/169086.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mello ISd. All-MOSFET M-2M digital-to-analog converter for operation with very low supply voltage. [Thesis]. Universidade do Rio Grande do Sul; 2015. Available from: http://hdl.handle.net/10183/169086

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Louisiana State University

9. Sathiaraj, Josephine Ratna. Ternary to binary converter design in CMOS using multiple input floating gate MOSFETS.

Degree: MS, Electrical and Computer Engineering, 2009, Louisiana State University

 In this work, a ternary to binary converter circuit is designed in 0.5μm n-well CMOS technology. The circuit takes two inputs corresponding to the ternary… (more)

Subjects/Keywords: multivalued logic; multiple input CMOS; ternary to binary converter; floating gate MOSFET

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APA (6th Edition):

Sathiaraj, J. R. (2009). Ternary to binary converter design in CMOS using multiple input floating gate MOSFETS. (Masters Thesis). Louisiana State University. Retrieved from etd-11072009-170319 ; https://digitalcommons.lsu.edu/gradschool_theses/3963

Chicago Manual of Style (16th Edition):

Sathiaraj, Josephine Ratna. “Ternary to binary converter design in CMOS using multiple input floating gate MOSFETS.” 2009. Masters Thesis, Louisiana State University. Accessed April 22, 2018. etd-11072009-170319 ; https://digitalcommons.lsu.edu/gradschool_theses/3963.

MLA Handbook (7th Edition):

Sathiaraj, Josephine Ratna. “Ternary to binary converter design in CMOS using multiple input floating gate MOSFETS.” 2009. Web. 22 Apr 2018.

Vancouver:

Sathiaraj JR. Ternary to binary converter design in CMOS using multiple input floating gate MOSFETS. [Internet] [Masters thesis]. Louisiana State University; 2009. [cited 2018 Apr 22]. Available from: etd-11072009-170319 ; https://digitalcommons.lsu.edu/gradschool_theses/3963.

Council of Science Editors:

Sathiaraj JR. Ternary to binary converter design in CMOS using multiple input floating gate MOSFETS. [Masters Thesis]. Louisiana State University; 2009. Available from: etd-11072009-170319 ; https://digitalcommons.lsu.edu/gradschool_theses/3963


Delft University of Technology

10. Luo, Y. A High-Resolution, Resistor-Based Temperature Sensor:.

Degree: 2015, Delft University of Technology

 This thesis focuses on developing a high-resolution, energy-efficient smart temperature sensor. A resistor-based temperature-sensing structure is chosen as the core of the sensor. To digitize… (more)

Subjects/Keywords: CMOS; temperature sensor; sensor interface; thermistor; Wien Bridge; delta-sigma; analog-to-digital converter

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APA (6th Edition):

Luo, Y. (2015). A High-Resolution, Resistor-Based Temperature Sensor:. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:9654be35-8148-41d5-8ac3-b8124d71e55e

Chicago Manual of Style (16th Edition):

Luo, Y. “A High-Resolution, Resistor-Based Temperature Sensor:.” 2015. Masters Thesis, Delft University of Technology. Accessed April 22, 2018. http://resolver.tudelft.nl/uuid:9654be35-8148-41d5-8ac3-b8124d71e55e.

MLA Handbook (7th Edition):

Luo, Y. “A High-Resolution, Resistor-Based Temperature Sensor:.” 2015. Web. 22 Apr 2018.

Vancouver:

Luo Y. A High-Resolution, Resistor-Based Temperature Sensor:. [Internet] [Masters thesis]. Delft University of Technology; 2015. [cited 2018 Apr 22]. Available from: http://resolver.tudelft.nl/uuid:9654be35-8148-41d5-8ac3-b8124d71e55e.

Council of Science Editors:

Luo Y. A High-Resolution, Resistor-Based Temperature Sensor:. [Masters Thesis]. Delft University of Technology; 2015. Available from: http://resolver.tudelft.nl/uuid:9654be35-8148-41d5-8ac3-b8124d71e55e


University of Toronto

11. Shahramian, Shahriar. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.

Degree: 2011, University of Toronto

While data converters have been around for nearly nighty years, mm-wave data converters are still in their infancy. Only recently the 40-GHz sampling barrier was… (more)

Subjects/Keywords: Analog to Digital Converter; mm-Wave Circuit; Track and Hold Amplifier; SiGe; CMOS; Data Converter; TIALA; Retimer; 0544

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APA (6th Edition):

Shahramian, S. (2011). Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. (Doctoral Dissertation). University of Toronto. Retrieved from http://hdl.handle.net/1807/30039

Chicago Manual of Style (16th Edition):

Shahramian, Shahriar. “Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.” 2011. Doctoral Dissertation, University of Toronto. Accessed April 22, 2018. http://hdl.handle.net/1807/30039.

MLA Handbook (7th Edition):

Shahramian, Shahriar. “Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures.” 2011. Web. 22 Apr 2018.

Vancouver:

Shahramian S. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. [Internet] [Doctoral dissertation]. University of Toronto; 2011. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/1807/30039.

Council of Science Editors:

Shahramian S. Millimeter-wave Analog to Digital Converters: Technology Challenges and Architectures. [Doctoral Dissertation]. University of Toronto; 2011. Available from: http://hdl.handle.net/1807/30039


Indian Institute of Science

12. Harish, C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.

Degree: 2011, Indian Institute of Science

 This thesis focuses on the design and implementation of low power Σ∆ ADCs in 130 nanometer CMOS technology. The design issues in the implementation of… (more)

Subjects/Keywords: Analog to Digital Converter (ADC); CMOS Technologies; Analog to Digital Signal Processing; Sigma Delta ADC; Wireless Applications; Communication Engineering

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APA (6th Edition):

Harish, C. (2011). Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. (Thesis). Indian Institute of Science. Retrieved from http://hdl.handle.net/2005/2049

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Harish, C. “Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.” 2011. Thesis, Indian Institute of Science. Accessed April 22, 2018. http://hdl.handle.net/2005/2049.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Harish, C. “Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.” 2011. Web. 22 Apr 2018.

Vancouver:

Harish C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. [Internet] [Thesis]. Indian Institute of Science; 2011. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/2005/2049.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Harish C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. [Thesis]. Indian Institute of Science; 2011. Available from: http://hdl.handle.net/2005/2049

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Indian Institute of Science

13. Harish, C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.

Degree: 2011, Indian Institute of Science

 This thesis focuses on the design and implementation of low power Σ∆ ADCs in 130 nanometer CMOS technology. The design issues in the implementation of… (more)

Subjects/Keywords: Analog to Digital Converter (ADC); CMOS Technologies; Analog to Digital Signal Processing; Sigma Delta ADC; Wireless Applications; Communication Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Harish, C. (2011). Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. (Thesis). Indian Institute of Science. Retrieved from http://etd.iisc.ernet.in/handle/2005/2049 ; http://etd.ncsi.iisc.ernet.in/abstracts/2645/G24903-Abs.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Harish, C. “Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.” 2011. Thesis, Indian Institute of Science. Accessed April 22, 2018. http://etd.iisc.ernet.in/handle/2005/2049 ; http://etd.ncsi.iisc.ernet.in/abstracts/2645/G24903-Abs.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Harish, C. “Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications.” 2011. Web. 22 Apr 2018.

Vancouver:

Harish C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. [Internet] [Thesis]. Indian Institute of Science; 2011. [cited 2018 Apr 22]. Available from: http://etd.iisc.ernet.in/handle/2005/2049 ; http://etd.ncsi.iisc.ernet.in/abstracts/2645/G24903-Abs.pdf.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Harish C. Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications. [Thesis]. Indian Institute of Science; 2011. Available from: http://etd.iisc.ernet.in/handle/2005/2049 ; http://etd.ncsi.iisc.ernet.in/abstracts/2645/G24903-Abs.pdf

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Université Catholique de Louvain

14. Couniot, Numa. Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions.

Degree: 2015, Université Catholique de Louvain

For centuries, bacterial cells have been one of the major causes of human diseases, and are still responsible for several millions of deaths every year.… (more)

Subjects/Keywords: Biosensor; Electrokinetic; Capacitance-to-Frequency converter; Bacteria detection; Impedance spectroscopy; CMOS; Capacitive biosensors; Dielectrophoresis; Electroosmosis; Biosensor array

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APA (6th Edition):

Couniot, N. (2015). Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions. (Thesis). Université Catholique de Louvain. Retrieved from http://hdl.handle.net/2078.1/165272

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Couniot, Numa. “Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions.” 2015. Thesis, Université Catholique de Louvain. Accessed April 22, 2018. http://hdl.handle.net/2078.1/165272.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Couniot, Numa. “Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions.” 2015. Web. 22 Apr 2018.

Vancouver:

Couniot N. Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions. [Internet] [Thesis]. Université Catholique de Louvain; 2015. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/2078.1/165272.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Couniot N. Highly-sensitive CMOS capacitive biosensors towards detection of single bacterial cell in electrolyte solutions. [Thesis]. Université Catholique de Louvain; 2015. Available from: http://hdl.handle.net/2078.1/165272

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Rochester

15. Song, Yu (1980 - ). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.

Degree: PhD, 2011, University of Rochester

 We propose and verify the design of low-power, high-performance CMOS Switched-Capacitor (SC) circuits for analog and radio-frequency (RF) applications. In low-cost CMOS semiconductor processes, SC… (more)

Subjects/Keywords: Analog-to-digital converter; CMOS integrated circuits; Delta-sigma modulation; Phase-locked loop; Switched-capacitor circuit

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APA (6th Edition):

Song, Y. (. -. ). (2011). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. (Doctoral Dissertation). University of Rochester. Retrieved from http://hdl.handle.net/1802/16887

Chicago Manual of Style (16th Edition):

Song, Yu (1980 - ). “CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.” 2011. Doctoral Dissertation, University of Rochester. Accessed April 22, 2018. http://hdl.handle.net/1802/16887.

MLA Handbook (7th Edition):

Song, Yu (1980 - ). “CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques.” 2011. Web. 22 Apr 2018.

Vancouver:

Song Y(-). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. [Internet] [Doctoral dissertation]. University of Rochester; 2011. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/1802/16887.

Council of Science Editors:

Song Y(-). CMOS analog and radio-frequency integrated-circuit design employing low-power switched-capacitor techniques. [Doctoral Dissertation]. University of Rochester; 2011. Available from: http://hdl.handle.net/1802/16887


Universidade Nova

16. Silva, Alexandre Herculano Mendes. Pipelined analog-to-digital conversion using current-mode reference shifting.

Degree: 2012, Universidade Nova

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores

Pipeline Analog-to-digital converters (ADCs) are the most popular architecture for high-speed medium-to-high… (more)

Subjects/Keywords: Analog-to-Digital Converter (ADC),; Current-mode reference shifting; Switched-capacitor; CMOS current reference; pipelined A/D conversion

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APA (6th Edition):

Silva, A. H. M. (2012). Pipelined analog-to-digital conversion using current-mode reference shifting. (Thesis). Universidade Nova. Retrieved from http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/8265

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Silva, Alexandre Herculano Mendes. “Pipelined analog-to-digital conversion using current-mode reference shifting.” 2012. Thesis, Universidade Nova. Accessed April 22, 2018. http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/8265.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Silva, Alexandre Herculano Mendes. “Pipelined analog-to-digital conversion using current-mode reference shifting.” 2012. Web. 22 Apr 2018.

Vancouver:

Silva AHM. Pipelined analog-to-digital conversion using current-mode reference shifting. [Internet] [Thesis]. Universidade Nova; 2012. [cited 2018 Apr 22]. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/8265.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Silva AHM. Pipelined analog-to-digital conversion using current-mode reference shifting. [Thesis]. Universidade Nova; 2012. Available from: http://www.rcaap.pt/detail.jsp?id=oai:run.unl.pt:10362/8265

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Linköping University

17. Zhang, Dai. Design and Evaluation of an Ultra-Low Power Successive Approximation ADC.

Degree: Electrical Engineering, 2009, Linköping University

  Analog-to-digital converters (ADC) targeted for use in medical implant devices serve an important role as the interface between analog signal and digital processing system.… (more)

Subjects/Keywords: Analog-to-digital converter (ADC); charge redistribution; CMOS; low power; low supply voltage; successive approximation; latched comparator; Electrical engineering; Elektroteknik

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APA (6th Edition):

Zhang, D. (2009). Design and Evaluation of an Ultra-Low Power Successive Approximation ADC. (Thesis). Linköping University. Retrieved from http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-18219

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zhang, Dai. “Design and Evaluation of an Ultra-Low Power Successive Approximation ADC.” 2009. Thesis, Linköping University. Accessed April 22, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-18219.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zhang, Dai. “Design and Evaluation of an Ultra-Low Power Successive Approximation ADC.” 2009. Web. 22 Apr 2018.

Vancouver:

Zhang D. Design and Evaluation of an Ultra-Low Power Successive Approximation ADC. [Internet] [Thesis]. Linköping University; 2009. [cited 2018 Apr 22]. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-18219.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zhang D. Design and Evaluation of an Ultra-Low Power Successive Approximation ADC. [Thesis]. Linköping University; 2009. Available from: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-18219

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Michigan

18. Ansari Ogholbeik, Elnaz. Design Automation of Low Power Circuits in Nano-Scale CMOS and Beyond-CMOS Technologies.

Degree: PhD, Electrical Engineering, 2016, University of Michigan

 Today’s integrated system on chips (SoCs) usually consist of billions of transistors accounting for both digital and analog blocks. Integrating such massive blocks on a… (more)

Subjects/Keywords: Design Automation; Very Large Scale Analog (VLSA); Digital to Analog Converter (DAC); Beyond CMOS; Internet of Things (IoT); Electrical Engineering; Engineering

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APA (6th Edition):

Ansari Ogholbeik, E. (2016). Design Automation of Low Power Circuits in Nano-Scale CMOS and Beyond-CMOS Technologies. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/133177

Chicago Manual of Style (16th Edition):

Ansari Ogholbeik, Elnaz. “Design Automation of Low Power Circuits in Nano-Scale CMOS and Beyond-CMOS Technologies.” 2016. Doctoral Dissertation, University of Michigan. Accessed April 22, 2018. http://hdl.handle.net/2027.42/133177.

MLA Handbook (7th Edition):

Ansari Ogholbeik, Elnaz. “Design Automation of Low Power Circuits in Nano-Scale CMOS and Beyond-CMOS Technologies.” 2016. Web. 22 Apr 2018.

Vancouver:

Ansari Ogholbeik E. Design Automation of Low Power Circuits in Nano-Scale CMOS and Beyond-CMOS Technologies. [Internet] [Doctoral dissertation]. University of Michigan; 2016. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/2027.42/133177.

Council of Science Editors:

Ansari Ogholbeik E. Design Automation of Low Power Circuits in Nano-Scale CMOS and Beyond-CMOS Technologies. [Doctoral Dissertation]. University of Michigan; 2016. Available from: http://hdl.handle.net/2027.42/133177


INP Toulouse

19. Perbet, Lucas. Optimisation de blocs constitutifs d'un convertisseur A/N pipeline entechnologie CMOS 0.18 µm pour utilisation en environnement spatial : Optimization of building blocks of a pipeline ADC in CMOS 0.18µm technology for space applications.

Degree: Docteur es, Micro Nano Systèmes, 2017, INP Toulouse

L’imagerie constitue un axe majeur de l’exploration de l’univers et de la Terre depuis l’espace, que l’on se trouve dans le domaine du visible ou… (more)

Subjects/Keywords: Convertisseur analogique-numérique; Interrupteur; Comparateur; Amplificateur; Environnement spatial; CMOS; ASIC; Analog-to-Digital converter; Switch; Comparator; Amplifier; Space environment; CMOS; ASIC; 621.381

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APA (6th Edition):

Perbet, L. (2017). Optimisation de blocs constitutifs d'un convertisseur A/N pipeline entechnologie CMOS 0.18 µm pour utilisation en environnement spatial : Optimization of building blocks of a pipeline ADC in CMOS 0.18µm technology for space applications. (Doctoral Dissertation). INP Toulouse. Retrieved from http://www.theses.fr/2017INPT0037

Chicago Manual of Style (16th Edition):

Perbet, Lucas. “Optimisation de blocs constitutifs d'un convertisseur A/N pipeline entechnologie CMOS 0.18 µm pour utilisation en environnement spatial : Optimization of building blocks of a pipeline ADC in CMOS 0.18µm technology for space applications.” 2017. Doctoral Dissertation, INP Toulouse. Accessed April 22, 2018. http://www.theses.fr/2017INPT0037.

MLA Handbook (7th Edition):

Perbet, Lucas. “Optimisation de blocs constitutifs d'un convertisseur A/N pipeline entechnologie CMOS 0.18 µm pour utilisation en environnement spatial : Optimization of building blocks of a pipeline ADC in CMOS 0.18µm technology for space applications.” 2017. Web. 22 Apr 2018.

Vancouver:

Perbet L. Optimisation de blocs constitutifs d'un convertisseur A/N pipeline entechnologie CMOS 0.18 µm pour utilisation en environnement spatial : Optimization of building blocks of a pipeline ADC in CMOS 0.18µm technology for space applications. [Internet] [Doctoral dissertation]. INP Toulouse; 2017. [cited 2018 Apr 22]. Available from: http://www.theses.fr/2017INPT0037.

Council of Science Editors:

Perbet L. Optimisation de blocs constitutifs d'un convertisseur A/N pipeline entechnologie CMOS 0.18 µm pour utilisation en environnement spatial : Optimization of building blocks of a pipeline ADC in CMOS 0.18µm technology for space applications. [Doctoral Dissertation]. INP Toulouse; 2017. Available from: http://www.theses.fr/2017INPT0037


Georgia Tech

20. Chuang, Kevin. Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 The objective of the research is to develop high-speed ADCs and mixed-signal demodulator for multi-gigabit communication systems using millimeter-wave frequency bands in standard CMOS technology.… (more)

Subjects/Keywords: Analog-to-digital converter; Mixed-signal; Demodulator; Multi-gigabit; CMOS; Analog-to-digital converters; Metal oxide semiconductors, Complementary; Radio detectors; Millimeter wave communication systems

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APA (6th Edition):

Chuang, K. (2011). Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/47814

Chicago Manual of Style (16th Edition):

Chuang, Kevin. “Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems.” 2011. Doctoral Dissertation, Georgia Tech. Accessed April 22, 2018. http://hdl.handle.net/1853/47814.

MLA Handbook (7th Edition):

Chuang, Kevin. “Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems.” 2011. Web. 22 Apr 2018.

Vancouver:

Chuang K. Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/1853/47814.

Council of Science Editors:

Chuang K. Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/47814


California State University – Sacramento

21. Morgan, Jeffrey. Design of a phase frequency detector and charge pump for a phase-locked loop in 0.18??m CMOS.

Degree: MS, Electrical and Electronic Engineering, 2017, California State University – Sacramento

 The design and simulation of a phase frequency detector and a charge pump for a low-jitter, high-frequency phase-locked loop in 0.18??m CMOS are explored. The… (more)

Subjects/Keywords: CMOS; Analog/Mixed-signal; Integrated circuit; CML; Current-mode logic; Operational amplifier; Microelectronics

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APA (6th Edition):

Morgan, J. (2017). Design of a phase frequency detector and charge pump for a phase-locked loop in 0.18??m CMOS. (Masters Thesis). California State University – Sacramento. Retrieved from http://hdl.handle.net/10211.3/190177

Chicago Manual of Style (16th Edition):

Morgan, Jeffrey. “Design of a phase frequency detector and charge pump for a phase-locked loop in 0.18??m CMOS.” 2017. Masters Thesis, California State University – Sacramento. Accessed April 22, 2018. http://hdl.handle.net/10211.3/190177.

MLA Handbook (7th Edition):

Morgan, Jeffrey. “Design of a phase frequency detector and charge pump for a phase-locked loop in 0.18??m CMOS.” 2017. Web. 22 Apr 2018.

Vancouver:

Morgan J. Design of a phase frequency detector and charge pump for a phase-locked loop in 0.18??m CMOS. [Internet] [Masters thesis]. California State University – Sacramento; 2017. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/10211.3/190177.

Council of Science Editors:

Morgan J. Design of a phase frequency detector and charge pump for a phase-locked loop in 0.18??m CMOS. [Masters Thesis]. California State University – Sacramento; 2017. Available from: http://hdl.handle.net/10211.3/190177


University of Lund

22. Andersson, Mattias. Continuous-Time Delta-Sigma Modulators for Wireless Communication.

Degree: 2014, University of Lund

 The ever increasing data rates in wireless communication require analog to digital converters (ADCs) with greater requirements on speed and accuracy, while being power efficient… (more)

Subjects/Keywords: Elektroteknik och elektronik; return-to-zero; A/D converter; loop delay; delta-sigma; ADC; CMOS; STF; continuous-time; sigma; delta; filtering; CT; RZ

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APA (6th Edition):

Andersson, M. (2014). Continuous-Time Delta-Sigma Modulators for Wireless Communication. (Doctoral Dissertation). University of Lund. Retrieved from http://lup.lub.lu.se/record/4302214 ; http://portal.research.lu.se/ws/files/3333980/4302260.pdf

Chicago Manual of Style (16th Edition):

Andersson, Mattias. “Continuous-Time Delta-Sigma Modulators for Wireless Communication.” 2014. Doctoral Dissertation, University of Lund. Accessed April 22, 2018. http://lup.lub.lu.se/record/4302214 ; http://portal.research.lu.se/ws/files/3333980/4302260.pdf.

MLA Handbook (7th Edition):

Andersson, Mattias. “Continuous-Time Delta-Sigma Modulators for Wireless Communication.” 2014. Web. 22 Apr 2018.

Vancouver:

Andersson M. Continuous-Time Delta-Sigma Modulators for Wireless Communication. [Internet] [Doctoral dissertation]. University of Lund; 2014. [cited 2018 Apr 22]. Available from: http://lup.lub.lu.se/record/4302214 ; http://portal.research.lu.se/ws/files/3333980/4302260.pdf.

Council of Science Editors:

Andersson M. Continuous-Time Delta-Sigma Modulators for Wireless Communication. [Doctoral Dissertation]. University of Lund; 2014. Available from: http://lup.lub.lu.se/record/4302214 ; http://portal.research.lu.se/ws/files/3333980/4302260.pdf

23. Zhang, Liang. Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC.

Degree: Docteur es, Instrumentation et microélectronique, 2013, Université de Strasbourg

Le sujet de cette thèse est de concevoir un prototype de capteur à pixel CMOS adapté aux couches extérieures du détecteur de vertex de l'International… (more)

Subjects/Keywords: Capteur à pixel CMOS; International Linear Collider (ILC); Détecteur vertex; MIMOSA 31; CMOS pixel sensors (CPS); Monolithic active pixel sensors (MAPS); International Linear Collider (ILC); Vertex detector; Correlated double sampling (CDS); Analog to digital converter (ADC); Column-level; Self-triggered; Multi-bit/step approximation; 539.7; 621.38

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APA (6th Edition):

Zhang, L. (2013). Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC. (Doctoral Dissertation). Université de Strasbourg. Retrieved from http://www.theses.fr/2013STRAE036

Chicago Manual of Style (16th Edition):

Zhang, Liang. “Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC.” 2013. Doctoral Dissertation, Université de Strasbourg. Accessed April 22, 2018. http://www.theses.fr/2013STRAE036.

MLA Handbook (7th Edition):

Zhang, Liang. “Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC.” 2013. Web. 22 Apr 2018.

Vancouver:

Zhang L. Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC. [Internet] [Doctoral dissertation]. Université de Strasbourg; 2013. [cited 2018 Apr 22]. Available from: http://www.theses.fr/2013STRAE036.

Council of Science Editors:

Zhang L. Development of a CMOS pixel sensor for the outer layers of the ILC vertex detector : Développement d'un capteur de pixels CMOS pour les couches externes du détecteur de vertex ILC. [Doctoral Dissertation]. Université de Strasbourg; 2013. Available from: http://www.theses.fr/2013STRAE036

24. Branca, Xavier. Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms.

Degree: Docteur es, Electrotechnique, 2012, INSA Lyon

Les objectifs de la thèse concernent l’optimisation du rendement énergétique, la minimisation de l’empreinte et du coût de l’alimentation en tension d’amplificateurs audio pour l’application… (more)

Subjects/Keywords: Télécommunications; Téléphonie mobile; Communication mobile; Amplificateur audio; Convertisseur DC-DC; Electronique analogique; Microélectronique; Technologie CMOS; Telecommunications; Mobile communication; Audio amplifier; DC-to-DC converter; Analog Electronics; Microelectronics; CMOS Technology; 621.381 044 072

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APA (6th Edition):

Branca, X. (2012). Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms. (Doctoral Dissertation). INSA Lyon. Retrieved from http://www.theses.fr/2012ISAL0059

Chicago Manual of Style (16th Edition):

Branca, Xavier. “Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms.” 2012. Doctoral Dissertation, INSA Lyon. Accessed April 22, 2018. http://www.theses.fr/2012ISAL0059.

MLA Handbook (7th Edition):

Branca, Xavier. “Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms.” 2012. Web. 22 Apr 2018.

Vancouver:

Branca X. Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms. [Internet] [Doctoral dissertation]. INSA Lyon; 2012. [cited 2018 Apr 22]. Available from: http://www.theses.fr/2012ISAL0059.

Council of Science Editors:

Branca X. Etude et conception d'un convertisseur de tension mono-inductance double-sortie bipolaires pour la téléphonie mobile : Study and realisation of a single inductor bipolar output converter for mobile platforms. [Doctoral Dissertation]. INSA Lyon; 2012. Available from: http://www.theses.fr/2012ISAL0059


Brno University of Technology

25. Dušek, Petr. Návrh převodníku DA pro nízkonapěťové aplikace v technologii CMOS .

Degree: 2015, Brno University of Technology

 Tato práce se zabývá návrhem přesného digitálně analogového převodníku, dále jen DAC. Práce poskytuje podklady pro pochopení principu převodu digitálního signálu na signál analogový. V… (more)

Subjects/Keywords: Technologie CMOS; převodník DA; nízkonapěťové aplikace; CMOS technology; DA converter; low voltage applications

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APA (6th Edition):

Dušek, P. (2015). Návrh převodníku DA pro nízkonapěťové aplikace v technologii CMOS . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/39890

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Dušek, Petr. “Návrh převodníku DA pro nízkonapěťové aplikace v technologii CMOS .” 2015. Thesis, Brno University of Technology. Accessed April 22, 2018. http://hdl.handle.net/11012/39890.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Dušek, Petr. “Návrh převodníku DA pro nízkonapěťové aplikace v technologii CMOS .” 2015. Web. 22 Apr 2018.

Vancouver:

Dušek P. Návrh převodníku DA pro nízkonapěťové aplikace v technologii CMOS . [Internet] [Thesis]. Brno University of Technology; 2015. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/11012/39890.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Dušek P. Návrh převodníku DA pro nízkonapěťové aplikace v technologii CMOS . [Thesis]. Brno University of Technology; 2015. Available from: http://hdl.handle.net/11012/39890

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Indian Institute of Science

26. Javed, Gaggatur Syed. Integrated Interfaces for Sensing Applications.

Degree: 2016, Indian Institute of Science

 Sensor interfaces are needed to communicate the measured real-world analog values to the base¬band digital processor. They are dominated by the presence of high accuracy,… (more)

Subjects/Keywords: Sensing Applications;

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APA (6th Edition):

Javed, G. S. (2016). Integrated Interfaces for Sensing Applications. (Thesis). Indian Institute of Science. Retrieved from http://hdl.handle.net/2005/2914

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Javed, Gaggatur Syed. “Integrated Interfaces for Sensing Applications.” 2016. Thesis, Indian Institute of Science. Accessed April 22, 2018. http://hdl.handle.net/2005/2914.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Javed, Gaggatur Syed. “Integrated Interfaces for Sensing Applications.” 2016. Web. 22 Apr 2018.

Vancouver:

Javed GS. Integrated Interfaces for Sensing Applications. [Internet] [Thesis]. Indian Institute of Science; 2016. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/2005/2914.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Javed GS. Integrated Interfaces for Sensing Applications. [Thesis]. Indian Institute of Science; 2016. Available from: http://hdl.handle.net/2005/2914

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

27. Kim, Suhwan. Mixed-source charger-supply CMOS IC.

Degree: PhD, Electrical and Computer Engineering, 2014, Georgia Tech

 The proposed research objective is to develop, test, and evaluate a mixer and charger-supply CMOS IC that derives and mixes energy and power from mixed… (more)

Subjects/Keywords: DC-DC converter; CMOS; Power supply; Hybrid source

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APA (6th Edition):

Kim, S. (2014). Mixed-source charger-supply CMOS IC. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/52210

Chicago Manual of Style (16th Edition):

Kim, Suhwan. “Mixed-source charger-supply CMOS IC.” 2014. Doctoral Dissertation, Georgia Tech. Accessed April 22, 2018. http://hdl.handle.net/1853/52210.

MLA Handbook (7th Edition):

Kim, Suhwan. “Mixed-source charger-supply CMOS IC.” 2014. Web. 22 Apr 2018.

Vancouver:

Kim S. Mixed-source charger-supply CMOS IC. [Internet] [Doctoral dissertation]. Georgia Tech; 2014. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/1853/52210.

Council of Science Editors:

Kim S. Mixed-source charger-supply CMOS IC. [Doctoral Dissertation]. Georgia Tech; 2014. Available from: http://hdl.handle.net/1853/52210


University of Texas – Austin

28. Jung, Woo Young. Time-based oversampled analog-to-digital converters in nano-scale integrated circuits.

Degree: Electrical and Computer Engineering, 2014, University of Texas – Austin

 In this research, a time-based oversampling delta-sigma (ΔΣ) ADC architecture is introduced. This system uses time, rather than voltage or current, as the analog variable… (more)

Subjects/Keywords: Analog-to-digital converter; Delta-sigma modulation; Time-to-digital converter; Pulse-width modulation; Digital-to-time converter

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jung, W. Y. (2014). Time-based oversampled analog-to-digital converters in nano-scale integrated circuits. (Thesis). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/29195

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jung, Woo Young. “Time-based oversampled analog-to-digital converters in nano-scale integrated circuits.” 2014. Thesis, University of Texas – Austin. Accessed April 22, 2018. http://hdl.handle.net/2152/29195.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jung, Woo Young. “Time-based oversampled analog-to-digital converters in nano-scale integrated circuits.” 2014. Web. 22 Apr 2018.

Vancouver:

Jung WY. Time-based oversampled analog-to-digital converters in nano-scale integrated circuits. [Internet] [Thesis]. University of Texas – Austin; 2014. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/2152/29195.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jung WY. Time-based oversampled analog-to-digital converters in nano-scale integrated circuits. [Thesis]. University of Texas – Austin; 2014. Available from: http://hdl.handle.net/2152/29195

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

29. Buček, Vladimír. Operacni zesilovač CMOS pracující v rozsahu napájecích napětí .

Degree: 2009, Brno University of Technology

 Cílem této práce bylo seznámit se s návrhem operačního zesilovače technologií CMOS. Nejdříve byla analyzována struktura tranzistorů PMOS a NMOS, díky kterým jsme mohli postupně… (more)

Subjects/Keywords: operační zesilovač; CMOS; rail-to-rail; operational amplifier; CMOS; rail-to-rail

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Buček, V. (2009). Operacni zesilovač CMOS pracující v rozsahu napájecích napětí . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/7330

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Buček, Vladimír. “Operacni zesilovač CMOS pracující v rozsahu napájecích napětí .” 2009. Thesis, Brno University of Technology. Accessed April 22, 2018. http://hdl.handle.net/11012/7330.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Buček, Vladimír. “Operacni zesilovač CMOS pracující v rozsahu napájecích napětí .” 2009. Web. 22 Apr 2018.

Vancouver:

Buček V. Operacni zesilovač CMOS pracující v rozsahu napájecích napětí . [Internet] [Thesis]. Brno University of Technology; 2009. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/11012/7330.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Buček V. Operacni zesilovač CMOS pracující v rozsahu napájecích napětí . [Thesis]. Brno University of Technology; 2009. Available from: http://hdl.handle.net/11012/7330

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

30. Miri Lavasani, Seyed Hossein. Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators.

Degree: PhD, Electrical and Computer Engineering, 2010, Georgia Tech

 Frequency reference oscillator is a critical component of modern radio transceivers. Currently, most reference oscillators are based on low-frequency quartz crystals that are inherently bulky… (more)

Subjects/Keywords: Phase-noise modeling; Phase-noise; Oscillator; VCO; Micromechanical oscillator; Capacitance cancellation; Negative capacitance; Negative impedance converter; Temperature compensation; Linear CMOS voltage to current converter; Piezoelectric resonator; Capacitive resonator; Tuning enhancement; TIA; Transimpedance amplifier; MEMS; Frequency tuning; Oscillators, Electric; Oscillators, Crystal; Radio frequency oscillators; Microelectromechanical systems; Oscillators, Audio-frequency Noise

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Miri Lavasani, S. H. (2010). Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/41096

Chicago Manual of Style (16th Edition):

Miri Lavasani, Seyed Hossein. “Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators.” 2010. Doctoral Dissertation, Georgia Tech. Accessed April 22, 2018. http://hdl.handle.net/1853/41096.

MLA Handbook (7th Edition):

Miri Lavasani, Seyed Hossein. “Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators.” 2010. Web. 22 Apr 2018.

Vancouver:

Miri Lavasani SH. Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators. [Internet] [Doctoral dissertation]. Georgia Tech; 2010. [cited 2018 Apr 22]. Available from: http://hdl.handle.net/1853/41096.

Council of Science Editors:

Miri Lavasani SH. Design and phase-noise modeling of temperature-compensated high frequency MEMS-CMOS reference oscillators. [Doctoral Dissertation]. Georgia Tech; 2010. Available from: http://hdl.handle.net/1853/41096

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