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You searched for subject:(Analog to digital converters). Showing records 1 – 30 of 42404 total matches.

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Oregon State University

1. Wang, Jingguang. Techniques for improving timing accuracy of multi-gigahertz track/hold circuits.

Degree: MS, Electrical and Computer Engineering, 2008, Oregon State University

 Multi-Gigahertz sampling rate Analog-to-Digital Converters (ADC) with 5-8 bits resolution are used in many signal communication applications. Unfortunately, the performance of the high speed ADC… (more)

Subjects/Keywords: ADC; Analog-to-digital converters

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APA (6th Edition):

Wang, J. (2008). Techniques for improving timing accuracy of multi-gigahertz track/hold circuits. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/10041

Chicago Manual of Style (16th Edition):

Wang, Jingguang. “Techniques for improving timing accuracy of multi-gigahertz track/hold circuits.” 2008. Masters Thesis, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/10041.

MLA Handbook (7th Edition):

Wang, Jingguang. “Techniques for improving timing accuracy of multi-gigahertz track/hold circuits.” 2008. Web. 19 Sep 2019.

Vancouver:

Wang J. Techniques for improving timing accuracy of multi-gigahertz track/hold circuits. [Internet] [Masters thesis]. Oregon State University; 2008. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/10041.

Council of Science Editors:

Wang J. Techniques for improving timing accuracy of multi-gigahertz track/hold circuits. [Masters Thesis]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/10041


Oregon State University

2. Hu, Yue. Efficient use of time information in analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 Time-domain data conversion has recently drawn increased research attention for its highly digital nature in favor of process technology scaling. Also, as the time information… (more)

Subjects/Keywords: Analog-to-digital converters

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APA (6th Edition):

Hu, Y. (2014). Efficient use of time information in analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/52553

Chicago Manual of Style (16th Edition):

Hu, Yue. “Efficient use of time information in analog-to-digital converters.” 2014. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/52553.

MLA Handbook (7th Edition):

Hu, Yue. “Efficient use of time information in analog-to-digital converters.” 2014. Web. 19 Sep 2019.

Vancouver:

Hu Y. Efficient use of time information in analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/52553.

Council of Science Editors:

Hu Y. Efficient use of time information in analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/52553


Oregon State University

3. Tong, Tao. Design techniques for successive approximation register analog-to-digital converters.

Degree: MS, Electrical and Computer Engineering, 2011, Oregon State University

 Successive approximation register analog-to-digital converters (SAR ADCs) have been widely used for medium-speed, medium-resolution applications due to their excellent power efficiency and digital compatibility. Recently,… (more)

Subjects/Keywords: analog-to-digital converters

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APA (6th Edition):

Tong, T. (2011). Design techniques for successive approximation register analog-to-digital converters. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/22662

Chicago Manual of Style (16th Edition):

Tong, Tao. “Design techniques for successive approximation register analog-to-digital converters.” 2011. Masters Thesis, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/22662.

MLA Handbook (7th Edition):

Tong, Tao. “Design techniques for successive approximation register analog-to-digital converters.” 2011. Web. 19 Sep 2019.

Vancouver:

Tong T. Design techniques for successive approximation register analog-to-digital converters. [Internet] [Masters thesis]. Oregon State University; 2011. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/22662.

Council of Science Editors:

Tong T. Design techniques for successive approximation register analog-to-digital converters. [Masters Thesis]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/22662


Oregon State University

4. Maghari, Nima. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 Delta-sigma analog-to-digital converters (ADCs) are suitable for many applications due to several advantages such as relaxed anti-aliasing filter, high signal-to noise and distortion ratio (SNDR)… (more)

Subjects/Keywords: Analog Ciruits; Analog-to-digital converters

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APA (6th Edition):

Maghari, N. (2010). Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/18851

Chicago Manual of Style (16th Edition):

Maghari, Nima. “Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.” 2010. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/18851.

MLA Handbook (7th Edition):

Maghari, Nima. “Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.” 2010. Web. 19 Sep 2019.

Vancouver:

Maghari N. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/18851.

Council of Science Editors:

Maghari N. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/18851


Oregon State University

5. Nishida, Yoshio. Improved design techniques for analog and mixed circuits.

Degree: PhD, Electrical and Computer Engineering, 2008, Oregon State University

 Although the digital revolution can realize many of past analog components in the digital forms, our world is surrounded with analog signals such as voice,… (more)

Subjects/Keywords: analog; Analog-to-digital converters  – Design

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APA (6th Edition):

Nishida, Y. (2008). Improved design techniques for analog and mixed circuits. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/7985

Chicago Manual of Style (16th Edition):

Nishida, Yoshio. “Improved design techniques for analog and mixed circuits.” 2008. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/7985.

MLA Handbook (7th Edition):

Nishida, Yoshio. “Improved design techniques for analog and mixed circuits.” 2008. Web. 19 Sep 2019.

Vancouver:

Nishida Y. Improved design techniques for analog and mixed circuits. [Internet] [Doctoral dissertation]. Oregon State University; 2008. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/7985.

Council of Science Editors:

Nishida Y. Improved design techniques for analog and mixed circuits. [Doctoral Dissertation]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/7985


Ryerson University

6. Park, Young Jun. Time-interleaved pulse-shrinking and all-digital time-to-digital converters.

Degree: 2017, Ryerson University

 This dissertation deals with the design of sub-per-stage delay time-to-digital converters (TDCs). Two classes of TDCs namely pulse-shrinking TDCs and TDCs are investigated. In pulse-shrinking… (more)

Subjects/Keywords: Analog-to-digital converters; Digital-to-analog converters

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APA (6th Edition):

Park, Y. J. (2017). Time-interleaved pulse-shrinking and all-digital time-to-digital converters. (Thesis). Ryerson University. Retrieved from https://digital.library.ryerson.ca/islandora/object/RULA%3A6433

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Park, Young Jun. “Time-interleaved pulse-shrinking and all-digital time-to-digital converters.” 2017. Thesis, Ryerson University. Accessed September 19, 2019. https://digital.library.ryerson.ca/islandora/object/RULA%3A6433.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Park, Young Jun. “Time-interleaved pulse-shrinking and all-digital time-to-digital converters.” 2017. Web. 19 Sep 2019.

Vancouver:

Park YJ. Time-interleaved pulse-shrinking and all-digital time-to-digital converters. [Internet] [Thesis]. Ryerson University; 2017. [cited 2019 Sep 19]. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A6433.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Park YJ. Time-interleaved pulse-shrinking and all-digital time-to-digital converters. [Thesis]. Ryerson University; 2017. Available from: https://digital.library.ryerson.ca/islandora/object/RULA%3A6433

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Dalhousie University

7. D'souza, Rowena Joan. Mismatch Calibration of Time-Interleaved Digital-to-Analog Converters.

Degree: Master of Applied Science, Department of Electrical & Computer Engineering, 2010, Dalhousie University

 This thesis presents a stable technique for distribution of data in Time Interleaved Digital-to-Analog Converters (TIDAC) that allows usage of the entire Nyquist bandwidth. The… (more)

Subjects/Keywords: Digital-to-analog converters; Time-interleaving

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APA (6th Edition):

D'souza, R. J. (2010). Mismatch Calibration of Time-Interleaved Digital-to-Analog Converters. (Masters Thesis). Dalhousie University. Retrieved from http://hdl.handle.net/10222/12994

Chicago Manual of Style (16th Edition):

D'souza, Rowena Joan. “Mismatch Calibration of Time-Interleaved Digital-to-Analog Converters.” 2010. Masters Thesis, Dalhousie University. Accessed September 19, 2019. http://hdl.handle.net/10222/12994.

MLA Handbook (7th Edition):

D'souza, Rowena Joan. “Mismatch Calibration of Time-Interleaved Digital-to-Analog Converters.” 2010. Web. 19 Sep 2019.

Vancouver:

D'souza RJ. Mismatch Calibration of Time-Interleaved Digital-to-Analog Converters. [Internet] [Masters thesis]. Dalhousie University; 2010. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/10222/12994.

Council of Science Editors:

D'souza RJ. Mismatch Calibration of Time-Interleaved Digital-to-Analog Converters. [Masters Thesis]. Dalhousie University; 2010. Available from: http://hdl.handle.net/10222/12994

8. Meganathan D. A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;.

Degree: A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits, 2014, Anna University

High speed and medium resolution Analog to Digital Converters newline ADC are widely used in commercial applications including data newlinecommunication and image signal processing In… (more)

Subjects/Keywords: Analog to Digital Converters; Complementary Metal Oxide

Page 1

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APA (6th Edition):

D, M. (2014). A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/29245

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

D, Meganathan. “A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;.” 2014. Thesis, Anna University. Accessed September 19, 2019. http://shodhganga.inflibnet.ac.in/handle/10603/29245.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

D, Meganathan. “A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;.” 2014. Web. 19 Sep 2019.

Vancouver:

D M. A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;. [Internet] [Thesis]. Anna University; 2014. [cited 2019 Sep 19]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/29245.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

D M. A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits;. [Thesis]. Anna University; 2014. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/29245

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

9. Rao, Sachin B. Linearizing techniques for voltage controlled oscillator based analog to digital converters.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 Voltage controlled oscillator (VCO) based ADC is an important class of time-domain ADC that has gained widespread acceptance due to their several desirable properties. VCO-based… (more)

Subjects/Keywords: VCO-based ADC; Analog-to-digital converters

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APA (6th Edition):

Rao, S. B. (2013). Linearizing techniques for voltage controlled oscillator based analog to digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/38709

Chicago Manual of Style (16th Edition):

Rao, Sachin B. “Linearizing techniques for voltage controlled oscillator based analog to digital converters.” 2013. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/38709.

MLA Handbook (7th Edition):

Rao, Sachin B. “Linearizing techniques for voltage controlled oscillator based analog to digital converters.” 2013. Web. 19 Sep 2019.

Vancouver:

Rao SB. Linearizing techniques for voltage controlled oscillator based analog to digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/38709.

Council of Science Editors:

Rao SB. Linearizing techniques for voltage controlled oscillator based analog to digital converters. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/38709


Oregon State University

10. Leung, Jerry. Data driven optimization in SAR ADC.

Degree: MS, Electrical and Computer Engineering, 2014, Oregon State University

 Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques… (more)

Subjects/Keywords: SAR; Successive approximation analog-to-digital converters

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APA (6th Edition):

Leung, J. (2014). Data driven optimization in SAR ADC. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/54631

Chicago Manual of Style (16th Edition):

Leung, Jerry. “Data driven optimization in SAR ADC.” 2014. Masters Thesis, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/54631.

MLA Handbook (7th Edition):

Leung, Jerry. “Data driven optimization in SAR ADC.” 2014. Web. 19 Sep 2019.

Vancouver:

Leung J. Data driven optimization in SAR ADC. [Internet] [Masters thesis]. Oregon State University; 2014. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/54631.

Council of Science Editors:

Leung J. Data driven optimization in SAR ADC. [Masters Thesis]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/54631


Oregon State University

11. Waters, Allen. Automated verilog-to-layout synthesis of ADCs using custom analog cells.

Degree: PhD, Electrical and Computer Engineering, 2015, Oregon State University

 A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools… (more)

Subjects/Keywords: Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Waters, A. (2015). Automated verilog-to-layout synthesis of ADCs using custom analog cells. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/55310

Chicago Manual of Style (16th Edition):

Waters, Allen. “Automated verilog-to-layout synthesis of ADCs using custom analog cells.” 2015. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/55310.

MLA Handbook (7th Edition):

Waters, Allen. “Automated verilog-to-layout synthesis of ADCs using custom analog cells.” 2015. Web. 19 Sep 2019.

Vancouver:

Waters A. Automated verilog-to-layout synthesis of ADCs using custom analog cells. [Internet] [Doctoral dissertation]. Oregon State University; 2015. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/55310.

Council of Science Editors:

Waters A. Automated verilog-to-layout synthesis of ADCs using custom analog cells. [Doctoral Dissertation]. Oregon State University; 2015. Available from: http://hdl.handle.net/1957/55310


Hong Kong University of Science and Technology

12. Yang, Shiliang. A reconfigurable pipelined-ΣΔ ADC with interpolation-based nonlinear calibration.

Degree: 2014, Hong Kong University of Science and Technology

 In the deep sub-micron process, the transistor intrinsic gain is low and the supply voltage is low, resulting in the great difficulty in designing a… (more)

Subjects/Keywords: Analog-to-digital converters; Calibration; Operational amplifiers

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APA (6th Edition):

Yang, S. (2014). A reconfigurable pipelined-ΣΔ ADC with interpolation-based nonlinear calibration. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1347291 ; http://repository.ust.hk/ir/bitstream/1783.1-71878/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Shiliang. “A reconfigurable pipelined-ΣΔ ADC with interpolation-based nonlinear calibration.” 2014. Thesis, Hong Kong University of Science and Technology. Accessed September 19, 2019. https://doi.org/10.14711/thesis-b1347291 ; http://repository.ust.hk/ir/bitstream/1783.1-71878/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Shiliang. “A reconfigurable pipelined-ΣΔ ADC with interpolation-based nonlinear calibration.” 2014. Web. 19 Sep 2019.

Vancouver:

Yang S. A reconfigurable pipelined-ΣΔ ADC with interpolation-based nonlinear calibration. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2014. [cited 2019 Sep 19]. Available from: https://doi.org/10.14711/thesis-b1347291 ; http://repository.ust.hk/ir/bitstream/1783.1-71878/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang S. A reconfigurable pipelined-ΣΔ ADC with interpolation-based nonlinear calibration. [Thesis]. Hong Kong University of Science and Technology; 2014. Available from: https://doi.org/10.14711/thesis-b1347291 ; http://repository.ust.hk/ir/bitstream/1783.1-71878/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

13. Guerber, Jon. Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters.

Degree: PhD, Electrical and Computer Engineering, 2012, Oregon State University

 In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and… (more)

Subjects/Keywords: SAR ADC; Analog-to-digital converters

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APA (6th Edition):

Guerber, J. (2012). Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/36019

Chicago Manual of Style (16th Edition):

Guerber, Jon. “Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters.” 2012. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/36019.

MLA Handbook (7th Edition):

Guerber, Jon. “Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters.” 2012. Web. 19 Sep 2019.

Vancouver:

Guerber J. Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2012. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/36019.

Council of Science Editors:

Guerber J. Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters. [Doctoral Dissertation]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/36019


Oregon State University

14. Musah, Tawfiq. Low power design techniques for analog-to-digital converters in submicron CMOS.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 Advances in process technologies have led to the development of low-power high speed digital signal processing blocks that occupy small areas. These advances are critical… (more)

Subjects/Keywords: correlated level shifting; Analog-to-digital converters

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APA (6th Edition):

Musah, T. (2010). Low power design techniques for analog-to-digital converters in submicron CMOS. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/18826

Chicago Manual of Style (16th Edition):

Musah, Tawfiq. “Low power design techniques for analog-to-digital converters in submicron CMOS.” 2010. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/18826.

MLA Handbook (7th Edition):

Musah, Tawfiq. “Low power design techniques for analog-to-digital converters in submicron CMOS.” 2010. Web. 19 Sep 2019.

Vancouver:

Musah T. Low power design techniques for analog-to-digital converters in submicron CMOS. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/18826.

Council of Science Editors:

Musah T. Low power design techniques for analog-to-digital converters in submicron CMOS. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/18826


Oregon State University

15. Zanbaghi, Ramin. Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2011, Oregon State University

 There is a significant need in recent mobile communication and wireless broadband systems for high-performance analog-to-digital converters (ADCs) that have wide bandwidth (BW>5-MHz) and high… (more)

Subjects/Keywords: delta-sigma modulator; Analog-to-digital converters

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APA (6th Edition):

Zanbaghi, R. (2011). Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/23456

Chicago Manual of Style (16th Edition):

Zanbaghi, Ramin. “Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters.” 2011. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/23456.

MLA Handbook (7th Edition):

Zanbaghi, Ramin. “Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters.” 2011. Web. 19 Sep 2019.

Vancouver:

Zanbaghi R. Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2011. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/23456.

Council of Science Editors:

Zanbaghi R. Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/23456


Oregon State University

16. Oh, Taehwan. Power efficient analog-to-digital converters using both voltage and time domain information.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 As advanced wired and wireless communication systems attempt to achieve higher performance, the demand for high resolution and wide signal bandwidth in their associated ADCs… (more)

Subjects/Keywords: Delta-sigma; Analog-to-digital converters

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APA (6th Edition):

Oh, T. (2013). Power efficient analog-to-digital converters using both voltage and time domain information. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/39042

Chicago Manual of Style (16th Edition):

Oh, Taehwan. “Power efficient analog-to-digital converters using both voltage and time domain information.” 2013. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/39042.

MLA Handbook (7th Edition):

Oh, Taehwan. “Power efficient analog-to-digital converters using both voltage and time domain information.” 2013. Web. 19 Sep 2019.

Vancouver:

Oh T. Power efficient analog-to-digital converters using both voltage and time domain information. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/39042.

Council of Science Editors:

Oh T. Power efficient analog-to-digital converters using both voltage and time domain information. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/39042


Oregon State University

17. Gande, Manideep. Design techniques for time based data converters.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 Modern day CMOS processes are characterized by voltage scaling and geometry scaling. Geometry scaling helps reduce gate delays, thereby aiding in the design of data… (more)

Subjects/Keywords: Time based data converters; Analog-to-digital converters

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APA (6th Edition):

Gande, M. (2013). Design techniques for time based data converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/39773

Chicago Manual of Style (16th Edition):

Gande, Manideep. “Design techniques for time based data converters.” 2013. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/39773.

MLA Handbook (7th Edition):

Gande, Manideep. “Design techniques for time based data converters.” 2013. Web. 19 Sep 2019.

Vancouver:

Gande M. Design techniques for time based data converters. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/39773.

Council of Science Editors:

Gande M. Design techniques for time based data converters. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/39773


Hong Kong University of Science and Technology

18. Lin, Tsz Ngai. The design of efficient successive approximation register ADC and its digital processing unit for an impedance array sensor.

Degree: 2016, Hong Kong University of Science and Technology

 Electrochemical impedance spectroscopy (EIS) is an application of biosensors that commonly used in biological sensing area. Performing impedance measurement will involve applying the voltage stimulus… (more)

Subjects/Keywords: Analog-to-digital converters; Design and construction; Impedance spectroscopy; Image converters

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APA (6th Edition):

Lin, T. N. (2016). The design of efficient successive approximation register ADC and its digital processing unit for an impedance array sensor. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1627685 ; http://repository.ust.hk/ir/bitstream/1783.1-86978/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Tsz Ngai. “The design of efficient successive approximation register ADC and its digital processing unit for an impedance array sensor.” 2016. Thesis, Hong Kong University of Science and Technology. Accessed September 19, 2019. https://doi.org/10.14711/thesis-b1627685 ; http://repository.ust.hk/ir/bitstream/1783.1-86978/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Tsz Ngai. “The design of efficient successive approximation register ADC and its digital processing unit for an impedance array sensor.” 2016. Web. 19 Sep 2019.

Vancouver:

Lin TN. The design of efficient successive approximation register ADC and its digital processing unit for an impedance array sensor. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2016. [cited 2019 Sep 19]. Available from: https://doi.org/10.14711/thesis-b1627685 ; http://repository.ust.hk/ir/bitstream/1783.1-86978/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin TN. The design of efficient successive approximation register ADC and its digital processing unit for an impedance array sensor. [Thesis]. Hong Kong University of Science and Technology; 2016. Available from: https://doi.org/10.14711/thesis-b1627685 ; http://repository.ust.hk/ir/bitstream/1783.1-86978/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Waterloo

19. Shirtliff, Jason Neil. Clock Edge Timing Adjustment Techniques for Correction of Timing Mismatches in Interleaved Analog-to-Digital Converters.

Degree: 2010, University of Waterloo

 Time-interleaved analog-to-digital converters make use of parallelization to increase the rate at which an analog signal can be digitized. Using M channels at their maximum… (more)

Subjects/Keywords: analog circuit design; timing mismatches; interleaved analog to digital converters; microelectronics

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APA (6th Edition):

Shirtliff, J. N. (2010). Clock Edge Timing Adjustment Techniques for Correction of Timing Mismatches in Interleaved Analog-to-Digital Converters. (Thesis). University of Waterloo. Retrieved from http://hdl.handle.net/10012/5523

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Shirtliff, Jason Neil. “Clock Edge Timing Adjustment Techniques for Correction of Timing Mismatches in Interleaved Analog-to-Digital Converters.” 2010. Thesis, University of Waterloo. Accessed September 19, 2019. http://hdl.handle.net/10012/5523.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Shirtliff, Jason Neil. “Clock Edge Timing Adjustment Techniques for Correction of Timing Mismatches in Interleaved Analog-to-Digital Converters.” 2010. Web. 19 Sep 2019.

Vancouver:

Shirtliff JN. Clock Edge Timing Adjustment Techniques for Correction of Timing Mismatches in Interleaved Analog-to-Digital Converters. [Internet] [Thesis]. University of Waterloo; 2010. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/10012/5523.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Shirtliff JN. Clock Edge Timing Adjustment Techniques for Correction of Timing Mismatches in Interleaved Analog-to-Digital Converters. [Thesis]. University of Waterloo; 2010. Available from: http://hdl.handle.net/10012/5523

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

20. Chan, Man Pun. Design of monolithic digital current-mode controllers for DC-DC converters.

Degree: 2013, Hong Kong University of Science and Technology

 Monolithic digital controllers for dc-dc converters are the future trend of voltage regulators for space-constrained portable devices because they can be highly integrated on-chip. This… (more)

Subjects/Keywords: DC-to-DC converters; Analog-to-digital converters; Electric switchgear; Digital control systems

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chan, M. P. (2013). Design of monolithic digital current-mode controllers for DC-DC converters. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1251005 ; http://repository.ust.hk/ir/bitstream/1783.1-81377/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chan, Man Pun. “Design of monolithic digital current-mode controllers for DC-DC converters.” 2013. Thesis, Hong Kong University of Science and Technology. Accessed September 19, 2019. https://doi.org/10.14711/thesis-b1251005 ; http://repository.ust.hk/ir/bitstream/1783.1-81377/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chan, Man Pun. “Design of monolithic digital current-mode controllers for DC-DC converters.” 2013. Web. 19 Sep 2019.

Vancouver:

Chan MP. Design of monolithic digital current-mode controllers for DC-DC converters. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2013. [cited 2019 Sep 19]. Available from: https://doi.org/10.14711/thesis-b1251005 ; http://repository.ust.hk/ir/bitstream/1783.1-81377/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chan MP. Design of monolithic digital current-mode controllers for DC-DC converters. [Thesis]. Hong Kong University of Science and Technology; 2013. Available from: https://doi.org/10.14711/thesis-b1251005 ; http://repository.ust.hk/ir/bitstream/1783.1-81377/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Indian Institute of Science

21. Chandravadan, Vora Santoshkumar. Novel Methods For Estimation Of Static Nonlinearity Of High-Speed High-Resolution Waveform Digitizers.

Degree: 2009, Indian Institute of Science

Analog-to-digital converter (ADC) is the main workhorse in a digital waveform recorder. Strictly speaking, an ADC is supposed to perform uniformly, irrespective of the characteristics… (more)

Subjects/Keywords: Analog-to-Digital Waveforms; Electric Converters; Analog-to-Digital Converters (ADC); Digital Electronics; Waveform Digitizers; Analog-to-Digital Converters - Nonlinearity; Static Nonlinearity; Dynamic Nonlinearity; Low Linearity Ramp; Electrical Engineering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chandravadan, V. S. (2009). Novel Methods For Estimation Of Static Nonlinearity Of High-Speed High-Resolution Waveform Digitizers. (Thesis). Indian Institute of Science. Retrieved from http://hdl.handle.net/2005/1019

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chandravadan, Vora Santoshkumar. “Novel Methods For Estimation Of Static Nonlinearity Of High-Speed High-Resolution Waveform Digitizers.” 2009. Thesis, Indian Institute of Science. Accessed September 19, 2019. http://hdl.handle.net/2005/1019.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chandravadan, Vora Santoshkumar. “Novel Methods For Estimation Of Static Nonlinearity Of High-Speed High-Resolution Waveform Digitizers.” 2009. Web. 19 Sep 2019.

Vancouver:

Chandravadan VS. Novel Methods For Estimation Of Static Nonlinearity Of High-Speed High-Resolution Waveform Digitizers. [Internet] [Thesis]. Indian Institute of Science; 2009. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/2005/1019.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chandravadan VS. Novel Methods For Estimation Of Static Nonlinearity Of High-Speed High-Resolution Waveform Digitizers. [Thesis]. Indian Institute of Science; 2009. Available from: http://hdl.handle.net/2005/1019

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

22. Wu, Chao ECE. A single-channel high-speed pipelined-SAR ADC with an open-loop MDAC.

Degree: 2018, Hong Kong University of Science and Technology

 High-speed high-precision analog-to-digital converters (ADCs) are widely used in the fields of image processing, information storage and wireless communication. To achieve high speed and high… (more)

Subjects/Keywords: Analog-to-digital converters; Successive approximation analog-to-digital converters; Signal processing; Digital techniques; Real-time data processing; Electronic data processing

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APA (6th Edition):

Wu, C. E. (2018). A single-channel high-speed pipelined-SAR ADC with an open-loop MDAC. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-991012615563203412 ; http://repository.ust.hk/ir/bitstream/1783.1-93162/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wu, Chao ECE. “A single-channel high-speed pipelined-SAR ADC with an open-loop MDAC.” 2018. Thesis, Hong Kong University of Science and Technology. Accessed September 19, 2019. https://doi.org/10.14711/thesis-991012615563203412 ; http://repository.ust.hk/ir/bitstream/1783.1-93162/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wu, Chao ECE. “A single-channel high-speed pipelined-SAR ADC with an open-loop MDAC.” 2018. Web. 19 Sep 2019.

Vancouver:

Wu CE. A single-channel high-speed pipelined-SAR ADC with an open-loop MDAC. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2018. [cited 2019 Sep 19]. Available from: https://doi.org/10.14711/thesis-991012615563203412 ; http://repository.ust.hk/ir/bitstream/1783.1-93162/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wu CE. A single-channel high-speed pipelined-SAR ADC with an open-loop MDAC. [Thesis]. Hong Kong University of Science and Technology; 2018. Available from: https://doi.org/10.14711/thesis-991012615563203412 ; http://repository.ust.hk/ir/bitstream/1783.1-93162/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

23. Chen, Denis Guangyin. Successive-Approximation-Register Analog-to-Digital-Converter for Low-power CMOS Image Sensing and Compression.

Degree: 2013, Hong Kong University of Science and Technology

 Mobile and portable applications have become the driving force behind the growth of the Complementary Metal-Oxide Semiconductor (CMOS) image sensor's industry. Low power and increased… (more)

Subjects/Keywords: Image converters; Metal oxide semiconductors, Complementary; Image processing; Digital techniques; Analog-to-digital converters

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APA (6th Edition):

Chen, D. G. (2013). Successive-Approximation-Register Analog-to-Digital-Converter for Low-power CMOS Image Sensing and Compression. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-b1214726 ; http://repository.ust.hk/ir/bitstream/1783.1-8143/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Denis Guangyin. “Successive-Approximation-Register Analog-to-Digital-Converter for Low-power CMOS Image Sensing and Compression.” 2013. Thesis, Hong Kong University of Science and Technology. Accessed September 19, 2019. https://doi.org/10.14711/thesis-b1214726 ; http://repository.ust.hk/ir/bitstream/1783.1-8143/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Denis Guangyin. “Successive-Approximation-Register Analog-to-Digital-Converter for Low-power CMOS Image Sensing and Compression.” 2013. Web. 19 Sep 2019.

Vancouver:

Chen DG. Successive-Approximation-Register Analog-to-Digital-Converter for Low-power CMOS Image Sensing and Compression. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2013. [cited 2019 Sep 19]. Available from: https://doi.org/10.14711/thesis-b1214726 ; http://repository.ust.hk/ir/bitstream/1783.1-8143/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen DG. Successive-Approximation-Register Analog-to-Digital-Converter for Low-power CMOS Image Sensing and Compression. [Thesis]. Hong Kong University of Science and Technology; 2013. Available from: https://doi.org/10.14711/thesis-b1214726 ; http://repository.ust.hk/ir/bitstream/1783.1-8143/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ)

24. Mountrichas, Lampros. Study and design of analog to digital and digital to analog converters.

Degree: 2016, Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ)

In today’s technology with the vast implementation of digital processing analog−to−digital and digital−to−analog converters are some of the most important blocks. The increasing speed of… (more)

Subjects/Keywords: Μετατροπέας αναλογικού σήματος σε ψηφιακό; Μετατροπέας ψηφιακού σήματος σε αναλογικό; Analog to digital converters; Digital to analog converters

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APA (6th Edition):

Mountrichas, L. (2016). Study and design of analog to digital and digital to analog converters. (Thesis). Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ). Retrieved from http://hdl.handle.net/10442/hedi/39753

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mountrichas, Lampros. “Study and design of analog to digital and digital to analog converters.” 2016. Thesis, Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ). Accessed September 19, 2019. http://hdl.handle.net/10442/hedi/39753.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mountrichas, Lampros. “Study and design of analog to digital and digital to analog converters.” 2016. Web. 19 Sep 2019.

Vancouver:

Mountrichas L. Study and design of analog to digital and digital to analog converters. [Internet] [Thesis]. Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ); 2016. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/10442/hedi/39753.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mountrichas L. Study and design of analog to digital and digital to analog converters. [Thesis]. Aristotle University Of Thessaloniki (AUTH); Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης (ΑΠΘ); 2016. Available from: http://hdl.handle.net/10442/hedi/39753

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Adelaide

25. Clare, Bradley. Performance of photonic oversampled analog-to-digital converters.

Degree: 2007, University of Adelaide

 In an increasingly digital world, the need for high speed and high fidelity analog-to-digital (A/D) converters is paramount. Performance improvements in electronic A/Ds have not… (more)

Subjects/Keywords: Digital-to-analog converters; Analog-to-digital converters; Digital communications; Digital-to-analog converters; Analog-to-digital converters; Digital communications

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Clare, B. (2007). Performance of photonic oversampled analog-to-digital converters. (Thesis). University of Adelaide. Retrieved from http://hdl.handle.net/2440/38835

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Clare, Bradley. “Performance of photonic oversampled analog-to-digital converters.” 2007. Thesis, University of Adelaide. Accessed September 19, 2019. http://hdl.handle.net/2440/38835.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Clare, Bradley. “Performance of photonic oversampled analog-to-digital converters.” 2007. Web. 19 Sep 2019.

Vancouver:

Clare B. Performance of photonic oversampled analog-to-digital converters. [Internet] [Thesis]. University of Adelaide; 2007. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/2440/38835.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Clare B. Performance of photonic oversampled analog-to-digital converters. [Thesis]. University of Adelaide; 2007. Available from: http://hdl.handle.net/2440/38835

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


The Ohio State University

26. Joo, Eon Kyeong. A study of non-uniform quantization methods for memoryless sources.

Degree: PhD, Graduate School, 1987, The Ohio State University

Subjects/Keywords: Engineering; Digital-to-analog converters

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APA (6th Edition):

Joo, E. K. (1987). A study of non-uniform quantization methods for memoryless sources. (Doctoral Dissertation). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1487324944215857

Chicago Manual of Style (16th Edition):

Joo, Eon Kyeong. “A study of non-uniform quantization methods for memoryless sources.” 1987. Doctoral Dissertation, The Ohio State University. Accessed September 19, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487324944215857.

MLA Handbook (7th Edition):

Joo, Eon Kyeong. “A study of non-uniform quantization methods for memoryless sources.” 1987. Web. 19 Sep 2019.

Vancouver:

Joo EK. A study of non-uniform quantization methods for memoryless sources. [Internet] [Doctoral dissertation]. The Ohio State University; 1987. [cited 2019 Sep 19]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1487324944215857.

Council of Science Editors:

Joo EK. A study of non-uniform quantization methods for memoryless sources. [Doctoral Dissertation]. The Ohio State University; 1987. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1487324944215857


Texas A&M University

27. Gadde, Venkata Veera Satya Sair. Filter Design Considerations for High Performance Continuous-Time Low-Pass Sigma-Delta ADC.

Degree: 2011, Texas A&M University

 Continuous-time filters are critical components in the implementation of large bandwidth, high frequency, and high resolution continuous-time (CT) sigma-delta (??) analog-to-digital converters (ADCs). The loop… (more)

Subjects/Keywords: Continuos-time filters; Sigma-delta modulators; Analog-to-digital converters

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APA (6th Edition):

Gadde, V. V. S. S. (2011). Filter Design Considerations for High Performance Continuous-Time Low-Pass Sigma-Delta ADC. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7430

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gadde, Venkata Veera Satya Sair. “Filter Design Considerations for High Performance Continuous-Time Low-Pass Sigma-Delta ADC.” 2011. Thesis, Texas A&M University. Accessed September 19, 2019. http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7430.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gadde, Venkata Veera Satya Sair. “Filter Design Considerations for High Performance Continuous-Time Low-Pass Sigma-Delta ADC.” 2011. Web. 19 Sep 2019.

Vancouver:

Gadde VVSS. Filter Design Considerations for High Performance Continuous-Time Low-Pass Sigma-Delta ADC. [Internet] [Thesis]. Texas A&M University; 2011. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7430.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gadde VVSS. Filter Design Considerations for High Performance Continuous-Time Low-Pass Sigma-Delta ADC. [Thesis]. Texas A&M University; 2011. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7430

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

28. Zhang, Yi. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.

Degree: PhD, Electrical and Computer Engineering, 2016, Oregon State University

 Incremental ADCs (IADCs) have found wide applications in sensor interface circuitry since, compared to ∆Σ ADCs, they provide low-latency high-accuracy conversion and easy multiplexing among… (more)

Subjects/Keywords: Incremental ADC; Analog-to-digital converters  – Design and construction

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zhang, Y. (2016). Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/59929

Chicago Manual of Style (16th Edition):

Zhang, Yi. “Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.” 2016. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/59929.

MLA Handbook (7th Edition):

Zhang, Yi. “Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.” 2016. Web. 19 Sep 2019.

Vancouver:

Zhang Y. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. [Internet] [Doctoral dissertation]. Oregon State University; 2016. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/59929.

Council of Science Editors:

Zhang Y. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. [Doctoral Dissertation]. Oregon State University; 2016. Available from: http://hdl.handle.net/1957/59929


Oregon State University

29. Batten, Robert D., 1973-. Adaptive, wideband analog-to-digital conversion for convergent communication systems.

Degree: PhD, Electrical and Computer Engineering, 2008, Oregon State University

 The exponential rate of advances in modern communication devices in the last several years have brought us higher levels of functionality and performance as well… (more)

Subjects/Keywords: Delta Sigma; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Batten, Robert D., 1. (2008). Adaptive, wideband analog-to-digital conversion for convergent communication systems. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/10903

Chicago Manual of Style (16th Edition):

Batten, Robert D., 1973-. “Adaptive, wideband analog-to-digital conversion for convergent communication systems.” 2008. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/10903.

MLA Handbook (7th Edition):

Batten, Robert D., 1973-. “Adaptive, wideband analog-to-digital conversion for convergent communication systems.” 2008. Web. 19 Sep 2019.

Vancouver:

Batten, Robert D. 1. Adaptive, wideband analog-to-digital conversion for convergent communication systems. [Internet] [Doctoral dissertation]. Oregon State University; 2008. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/10903.

Council of Science Editors:

Batten, Robert D. 1. Adaptive, wideband analog-to-digital conversion for convergent communication systems. [Doctoral Dissertation]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/10903


Oregon State University

30. Yu, Wenhuan. Design techniques for low power ADCs.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 This dissertation presents an incremental analog-to-digital converter (ADC) with digital digital-to-analog converter (DAC) mismatch correction. A theoretical time-domain analysis technique was developed to predict the… (more)

Subjects/Keywords: data converter; Analog-to-digital converters  – Design and construction

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yu, W. (2010). Design techniques for low power ADCs. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/14316

Chicago Manual of Style (16th Edition):

Yu, Wenhuan. “Design techniques for low power ADCs.” 2010. Doctoral Dissertation, Oregon State University. Accessed September 19, 2019. http://hdl.handle.net/1957/14316.

MLA Handbook (7th Edition):

Yu, Wenhuan. “Design techniques for low power ADCs.” 2010. Web. 19 Sep 2019.

Vancouver:

Yu W. Design techniques for low power ADCs. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2019 Sep 19]. Available from: http://hdl.handle.net/1957/14316.

Council of Science Editors:

Yu W. Design techniques for low power ADCs. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/14316

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