Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for subject:(Analog Circuits). Showing records 1 – 30 of 248 total matches.

[1] [2] [3] [4] [5] [6] [7] [8] [9]

Search Limiters

Last 2 Years | English Only

Degrees

Levels

Languages

Country

▼ Search Limiters


University of Pretoria

1. Reddy, Reeshen. Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology.

Degree: MEng, Electrical, Electronic and Computer Engineering, 2015, University of Pretoria

 High-speed digital to analogue converters (DAC), which are optimised for large bandwidth signal synthesis applications, are a fundamental building block and enabling technology in industrial… (more)

Subjects/Keywords: Microelectronic; Digital-analogue conversion; BiCMOS integrated circuits; Dynamic range; Analogue-digital integrated circuits; Mixed analogue digital integrated circuits; UCTD

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Reddy, R. (2015). Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology. (Masters Thesis). University of Pretoria. Retrieved from http://hdl.handle.net/2263/48947

Chicago Manual of Style (16th Edition):

Reddy, Reeshen. “Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology.” 2015. Masters Thesis, University of Pretoria. Accessed October 19, 2019. http://hdl.handle.net/2263/48947.

MLA Handbook (7th Edition):

Reddy, Reeshen. “Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology.” 2015. Web. 19 Oct 2019.

Vancouver:

Reddy R. Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology. [Internet] [Masters thesis]. University of Pretoria; 2015. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/2263/48947.

Council of Science Editors:

Reddy R. Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology. [Masters Thesis]. University of Pretoria; 2015. Available from: http://hdl.handle.net/2263/48947


University of Alberta

2. Holmes, Stephen Michael. High-speed configurable analog block design for a field-programmable analog array.

Degree: MS, Department of Electrical and Computer Engineering, 2011, University of Alberta

 This thesis is an exploration into the design of configurable analog block (CAB) for field programmable analog arrays (FPAAs) designed in modern complementary metal-oxide-semiconductor (CMOS)… (more)

Subjects/Keywords: OTA; CAB; FPAA; circuits; Analog

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Holmes, S. M. (2011). High-speed configurable analog block design for a field-programmable analog array. (Masters Thesis). University of Alberta. Retrieved from https://era.library.ualberta.ca/files/0k225b288

Chicago Manual of Style (16th Edition):

Holmes, Stephen Michael. “High-speed configurable analog block design for a field-programmable analog array.” 2011. Masters Thesis, University of Alberta. Accessed October 19, 2019. https://era.library.ualberta.ca/files/0k225b288.

MLA Handbook (7th Edition):

Holmes, Stephen Michael. “High-speed configurable analog block design for a field-programmable analog array.” 2011. Web. 19 Oct 2019.

Vancouver:

Holmes SM. High-speed configurable analog block design for a field-programmable analog array. [Internet] [Masters thesis]. University of Alberta; 2011. [cited 2019 Oct 19]. Available from: https://era.library.ualberta.ca/files/0k225b288.

Council of Science Editors:

Holmes SM. High-speed configurable analog block design for a field-programmable analog array. [Masters Thesis]. University of Alberta; 2011. Available from: https://era.library.ualberta.ca/files/0k225b288


Baylor University

3. [No author]. Robotic path planning solution using phase delay in analog circuits.

Degree: 2016, Baylor University

 Path planning is a principle component of research in the field of robotics. The purpose of any path planning method is to successfully determine an… (more)

Subjects/Keywords: Path planning. Robotics. Analog circuits.

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

author], [. (2016). Robotic path planning solution using phase delay in analog circuits. (Thesis). Baylor University. Retrieved from http://hdl.handle.net/2104/9817

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

author], [No. “Robotic path planning solution using phase delay in analog circuits. ” 2016. Thesis, Baylor University. Accessed October 19, 2019. http://hdl.handle.net/2104/9817.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

author], [No. “Robotic path planning solution using phase delay in analog circuits. ” 2016. Web. 19 Oct 2019.

Vancouver:

author] [. Robotic path planning solution using phase delay in analog circuits. [Internet] [Thesis]. Baylor University; 2016. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/2104/9817.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

author] [. Robotic path planning solution using phase delay in analog circuits. [Thesis]. Baylor University; 2016. Available from: http://hdl.handle.net/2104/9817

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Arizona State University

4. Anabtawi, Nijad. Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments.

Degree: PhD, Electrical Engineering, 2011, Arizona State University

 In this work, a high resolution analog-to-digital converter (ADC) for use in harsh environments is presented. The ADC is implemented in bulk CMOS technology and… (more)

Subjects/Keywords: Electrical Engineering; Analog Integrated Circuits

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Anabtawi, N. (2011). Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments. (Doctoral Dissertation). Arizona State University. Retrieved from http://repository.asu.edu/items/8842

Chicago Manual of Style (16th Edition):

Anabtawi, Nijad. “Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments.” 2011. Doctoral Dissertation, Arizona State University. Accessed October 19, 2019. http://repository.asu.edu/items/8842.

MLA Handbook (7th Edition):

Anabtawi, Nijad. “Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments.” 2011. Web. 19 Oct 2019.

Vancouver:

Anabtawi N. Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments. [Internet] [Doctoral dissertation]. Arizona State University; 2011. [cited 2019 Oct 19]. Available from: http://repository.asu.edu/items/8842.

Council of Science Editors:

Anabtawi N. Design of a Continuous Time Sigma Delta Analog-to-Digital Converter for Operation in Extreme Environments. [Doctoral Dissertation]. Arizona State University; 2011. Available from: http://repository.asu.edu/items/8842


Iowa State University

5. Liu, Zhiqiang. Design and verification approaches for reliability and functional safety of analog integrated circuits.

Degree: 2018, Iowa State University

 New breakthroughs in semiconductor design have enabled a rapid integration of semiconductor chips into systems that affect all aspects of the society. Examples of emerging… (more)

Subjects/Keywords: Analog Design; Analog Integrated Circuits; Analog Verification; Electrical and Electronics

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liu, Z. (2018). Design and verification approaches for reliability and functional safety of analog integrated circuits. (Thesis). Iowa State University. Retrieved from https://lib.dr.iastate.edu/etd/17246

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Zhiqiang. “Design and verification approaches for reliability and functional safety of analog integrated circuits.” 2018. Thesis, Iowa State University. Accessed October 19, 2019. https://lib.dr.iastate.edu/etd/17246.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Zhiqiang. “Design and verification approaches for reliability and functional safety of analog integrated circuits.” 2018. Web. 19 Oct 2019.

Vancouver:

Liu Z. Design and verification approaches for reliability and functional safety of analog integrated circuits. [Internet] [Thesis]. Iowa State University; 2018. [cited 2019 Oct 19]. Available from: https://lib.dr.iastate.edu/etd/17246.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu Z. Design and verification approaches for reliability and functional safety of analog integrated circuits. [Thesis]. Iowa State University; 2018. Available from: https://lib.dr.iastate.edu/etd/17246

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Hong Kong University of Science and Technology

6. Zheng, Jiawei ECE. Low noise CMOS circuit techniques for biopotential sensing.

Degree: 2018, Hong Kong University of Science and Technology

 Faithful recording of the biopotential signal is the prerequisite for the diagnosis and treatment of various diseases. Typical local field potentials of bio-signals such as… (more)

Subjects/Keywords: Analog CMOS integrated circuits; Integrated circuits; Electronic noise

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zheng, J. E. (2018). Low noise CMOS circuit techniques for biopotential sensing. (Thesis). Hong Kong University of Science and Technology. Retrieved from https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zheng, Jiawei ECE. “Low noise CMOS circuit techniques for biopotential sensing.” 2018. Thesis, Hong Kong University of Science and Technology. Accessed October 19, 2019. https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zheng, Jiawei ECE. “Low noise CMOS circuit techniques for biopotential sensing.” 2018. Web. 19 Oct 2019.

Vancouver:

Zheng JE. Low noise CMOS circuit techniques for biopotential sensing. [Internet] [Thesis]. Hong Kong University of Science and Technology; 2018. [cited 2019 Oct 19]. Available from: https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zheng JE. Low noise CMOS circuit techniques for biopotential sensing. [Thesis]. Hong Kong University of Science and Technology; 2018. Available from: https://doi.org/10.14711/thesis-991012637268503412 ; http://repository.ust.hk/ir/bitstream/1783.1-96408/1/th_redirect.html

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

7. Sudhanshu, Maheshwari. Integrable analogue signal processing circuits using current conveyors; -.

Degree: Electronics Engineering, 2004, Aligarh Muslim University

Abstract available newline newline

Bibliography p. 232-246, Appendix p. 247

Advisors/Committee Members: Khan, Iqbal A.

Subjects/Keywords: Analogue; Integrable; Conveyors; Circuits; Functions

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sudhanshu, M. (2004). Integrable analogue signal processing circuits using current conveyors; -. (Thesis). Aligarh Muslim University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/52773

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sudhanshu, Maheshwari. “Integrable analogue signal processing circuits using current conveyors; -.” 2004. Thesis, Aligarh Muslim University. Accessed October 19, 2019. http://shodhganga.inflibnet.ac.in/handle/10603/52773.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sudhanshu, Maheshwari. “Integrable analogue signal processing circuits using current conveyors; -.” 2004. Web. 19 Oct 2019.

Vancouver:

Sudhanshu M. Integrable analogue signal processing circuits using current conveyors; -. [Internet] [Thesis]. Aligarh Muslim University; 2004. [cited 2019 Oct 19]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/52773.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sudhanshu M. Integrable analogue signal processing circuits using current conveyors; -. [Thesis]. Aligarh Muslim University; 2004. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/52773

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Limerick

8. Zaidi, Muhaned Ali Hussein. Design and evaluation of high-speed operational amplifier designs using the negative Miller capacitance design technique.

Degree: 2018, University of Limerick

 The operational amplifier (op-amp) is one of the most commonly used analogue circuits for analogue and mixed-signal Integrated Circuit (IC) designs. The op-amp is widely… (more)

Subjects/Keywords: operational amplifier (op-amp); analogue circuits; complementary metal-oxide-semiconductor (CMOS)

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Zaidi, M. A. H. (2018). Design and evaluation of high-speed operational amplifier designs using the negative Miller capacitance design technique. (Thesis). University of Limerick. Retrieved from http://hdl.handle.net/10344/7599

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Zaidi, Muhaned Ali Hussein. “Design and evaluation of high-speed operational amplifier designs using the negative Miller capacitance design technique.” 2018. Thesis, University of Limerick. Accessed October 19, 2019. http://hdl.handle.net/10344/7599.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Zaidi, Muhaned Ali Hussein. “Design and evaluation of high-speed operational amplifier designs using the negative Miller capacitance design technique.” 2018. Web. 19 Oct 2019.

Vancouver:

Zaidi MAH. Design and evaluation of high-speed operational amplifier designs using the negative Miller capacitance design technique. [Internet] [Thesis]. University of Limerick; 2018. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/10344/7599.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Zaidi MAH. Design and evaluation of high-speed operational amplifier designs using the negative Miller capacitance design technique. [Thesis]. University of Limerick; 2018. Available from: http://hdl.handle.net/10344/7599

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Michigan

9. Fredenburg, Jeffrey Alan. Noise-Shaping SAR ADCs.

Degree: PhD, Electrical Engineering, 2015, University of Michigan

 This work investigates hybrid analog-to-digital converters (ADCs) that combine the phenomenal energy efficiency of successive-approximation (SAR) ADCs with the resolution enhancement strategies used by noise-shaping… (more)

Subjects/Keywords: Analog-to-Digital Converter; Noise-shaping SAR; Successive-approximation ADC; Analog Circuits; Electrical Engineering; Engineering

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Fredenburg, J. A. (2015). Noise-Shaping SAR ADCs. (Doctoral Dissertation). University of Michigan. Retrieved from http://hdl.handle.net/2027.42/113647

Chicago Manual of Style (16th Edition):

Fredenburg, Jeffrey Alan. “Noise-Shaping SAR ADCs.” 2015. Doctoral Dissertation, University of Michigan. Accessed October 19, 2019. http://hdl.handle.net/2027.42/113647.

MLA Handbook (7th Edition):

Fredenburg, Jeffrey Alan. “Noise-Shaping SAR ADCs.” 2015. Web. 19 Oct 2019.

Vancouver:

Fredenburg JA. Noise-Shaping SAR ADCs. [Internet] [Doctoral dissertation]. University of Michigan; 2015. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/2027.42/113647.

Council of Science Editors:

Fredenburg JA. Noise-Shaping SAR ADCs. [Doctoral Dissertation]. University of Michigan; 2015. Available from: http://hdl.handle.net/2027.42/113647


University of Oulu

10. Loikkanen, M. (Mikko). Design and compensation of high performance class AB amplifiers.

Degree: 2010, University of Oulu

 Abstract Class A and class AB operational amplifiers are an essential part of a mixed- signal chip, where they are used as active filter sub-blocks,… (more)

Subjects/Keywords: CMOS analog integrated circuits; amplifiers; analog circuits; compensation; feedback amplifiers; operational amplifiers; power supply rejection ratio

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Loikkanen, M. (. (2010). Design and compensation of high performance class AB amplifiers. (Doctoral Dissertation). University of Oulu. Retrieved from http://urn.fi/urn:isbn:9789514261770

Chicago Manual of Style (16th Edition):

Loikkanen, M (Mikko). “Design and compensation of high performance class AB amplifiers.” 2010. Doctoral Dissertation, University of Oulu. Accessed October 19, 2019. http://urn.fi/urn:isbn:9789514261770.

MLA Handbook (7th Edition):

Loikkanen, M (Mikko). “Design and compensation of high performance class AB amplifiers.” 2010. Web. 19 Oct 2019.

Vancouver:

Loikkanen M(. Design and compensation of high performance class AB amplifiers. [Internet] [Doctoral dissertation]. University of Oulu; 2010. [cited 2019 Oct 19]. Available from: http://urn.fi/urn:isbn:9789514261770.

Council of Science Editors:

Loikkanen M(. Design and compensation of high performance class AB amplifiers. [Doctoral Dissertation]. University of Oulu; 2010. Available from: http://urn.fi/urn:isbn:9789514261770


University of Oulu

11. Korhonen, E. (Esa). On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus.

Degree: 2010, University of Oulu

 Abstract The static linearity testing of analog-to-digital and digital-to-analog converters (ADCs and DACs) has traditionally required test instruments with higher linearity and resolution than that… (more)

Subjects/Keywords: algorithms; analog-digital conversion; built-in testing; digital-analog conversion; manufacturing testing; mixed analog-digital integrated circuits; self-testing

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Korhonen, E. (. (2010). On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus. (Doctoral Dissertation). University of Oulu. Retrieved from http://urn.fi/urn:isbn:9789514263064

Chicago Manual of Style (16th Edition):

Korhonen, E (Esa). “On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus.” 2010. Doctoral Dissertation, University of Oulu. Accessed October 19, 2019. http://urn.fi/urn:isbn:9789514263064.

MLA Handbook (7th Edition):

Korhonen, E (Esa). “On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus.” 2010. Web. 19 Oct 2019.

Vancouver:

Korhonen E(. On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus. [Internet] [Doctoral dissertation]. University of Oulu; 2010. [cited 2019 Oct 19]. Available from: http://urn.fi/urn:isbn:9789514263064.

Council of Science Editors:

Korhonen E(. On-chip testing of A/D and D/A converters:static linearity testing without statistically known stimulus. [Doctoral Dissertation]. University of Oulu; 2010. Available from: http://urn.fi/urn:isbn:9789514263064


Indian Institute of Science

12. Vasudevamurthy, Rajath. Time-based All-Digital Technique for Analog Built-in Self Test.

Degree: 2013, Indian Institute of Science

 A scheme for Built-in-Self-Test (BIST) of analog signals with minimal area overhead, for measuring on-chip voltages in an all-digital manner is presented in this thesis.… (more)

Subjects/Keywords: Electronic Circuits; On-Chip Analog Test Voltages; Electronic Circuit Design; Analog Circuits; Built-in Self Test (BIST); Time-to-Digital Converters; Analog Routing; Analog Built-in Self Test; Time Based Analog-to-Digital Converter; Analog-to-Digital Converters; Integrated Circuit; Analog IP Test; Electronic Engineering

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Vasudevamurthy, R. (2013). Time-based All-Digital Technique for Analog Built-in Self Test. (Thesis). Indian Institute of Science. Retrieved from http://hdl.handle.net/2005/2841

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Vasudevamurthy, Rajath. “Time-based All-Digital Technique for Analog Built-in Self Test.” 2013. Thesis, Indian Institute of Science. Accessed October 19, 2019. http://hdl.handle.net/2005/2841.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Vasudevamurthy, Rajath. “Time-based All-Digital Technique for Analog Built-in Self Test.” 2013. Web. 19 Oct 2019.

Vancouver:

Vasudevamurthy R. Time-based All-Digital Technique for Analog Built-in Self Test. [Internet] [Thesis]. Indian Institute of Science; 2013. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/2005/2841.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Vasudevamurthy R. Time-based All-Digital Technique for Analog Built-in Self Test. [Thesis]. Indian Institute of Science; 2013. Available from: http://hdl.handle.net/2005/2841

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Anna University

13. Kavithamani, A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.

Degree: Electrical and Electronics Engineering, 2014, Anna University

This research work deals with the diagnosis of soft faults in analog electronic circuits Soft faults that occur even in a single component of a… (more)

Subjects/Keywords: Analog electronic circuits; Electrical engineering; Electronic circuits; Fault diagnosis; Frequency response method

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kavithamani, A. (2014). Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/24720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kavithamani, A. “Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.” 2014. Thesis, Anna University. Accessed October 19, 2019. http://shodhganga.inflibnet.ac.in/handle/10603/24720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kavithamani, A. “Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.” 2014. Web. 19 Oct 2019.

Vancouver:

Kavithamani A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. [Internet] [Thesis]. Anna University; 2014. [cited 2019 Oct 19]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/24720.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kavithamani A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. [Thesis]. Anna University; 2014. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/24720

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

14. Veselý, Jan. Návrh laboratorní úlohy s obvodem FPAA .

Degree: 2015, Brno University of Technology

 Tento dokument popisuje vlastnosti a možnosti programovatelných analogových obvodů (FPAAs), konkrétně pak typ AN221E04 a vývojové desky s tímto zařízením. Dále přináší také návrh použití… (more)

Subjects/Keywords: Programovatelné obvody; FPAA; analogové obvody; laboratorní úlohy; programmable circuits; FPAA; analog circuits; laboratory exercise

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Veselý, J. (2015). Návrh laboratorní úlohy s obvodem FPAA . (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/32662

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Veselý, Jan. “Návrh laboratorní úlohy s obvodem FPAA .” 2015. Thesis, Brno University of Technology. Accessed October 19, 2019. http://hdl.handle.net/11012/32662.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Veselý, Jan. “Návrh laboratorní úlohy s obvodem FPAA .” 2015. Web. 19 Oct 2019.

Vancouver:

Veselý J. Návrh laboratorní úlohy s obvodem FPAA . [Internet] [Thesis]. Brno University of Technology; 2015. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/11012/32662.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Veselý J. Návrh laboratorní úlohy s obvodem FPAA . [Thesis]. Brno University of Technology; 2015. Available from: http://hdl.handle.net/11012/32662

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Toronto

15. Hoffman, James. Distributed Circuits in SiGe BiCMOS for Next-generation Fiber-optic Communications.

Degree: 2016, University of Toronto

In this thesis, various distributed circuits topologies in SiGe BiCMOS are investigated as a means to overcome the strict requirements of next-generation optical communications. A… (more)

Subjects/Keywords: Broadband analog; Distributed circuits; fiber-optic communication; IC design; millimeter-wave circuits; SiGe BiCMOS; 0544

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hoffman, J. (2016). Distributed Circuits in SiGe BiCMOS for Next-generation Fiber-optic Communications. (Masters Thesis). University of Toronto. Retrieved from http://hdl.handle.net/1807/72728

Chicago Manual of Style (16th Edition):

Hoffman, James. “Distributed Circuits in SiGe BiCMOS for Next-generation Fiber-optic Communications.” 2016. Masters Thesis, University of Toronto. Accessed October 19, 2019. http://hdl.handle.net/1807/72728.

MLA Handbook (7th Edition):

Hoffman, James. “Distributed Circuits in SiGe BiCMOS for Next-generation Fiber-optic Communications.” 2016. Web. 19 Oct 2019.

Vancouver:

Hoffman J. Distributed Circuits in SiGe BiCMOS for Next-generation Fiber-optic Communications. [Internet] [Masters thesis]. University of Toronto; 2016. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1807/72728.

Council of Science Editors:

Hoffman J. Distributed Circuits in SiGe BiCMOS for Next-generation Fiber-optic Communications. [Masters Thesis]. University of Toronto; 2016. Available from: http://hdl.handle.net/1807/72728


University of Newcastle

16. Laskovski, Anthony Nikola. Implantable microelectronics for biological signals.

Degree: PhD, 2011, University of Newcastle

Research Doctorate - Doctor of Philosophy (PhD)

Ageing populations in the developed world are perhaps one of the greatest concerns for providing quality healthcare in… (more)

Subjects/Keywords: implants; telemetry; biomedical engineering; analogue circuits; RF; radio frequency; wireless power; telemetry

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Laskovski, A. N. (2011). Implantable microelectronics for biological signals. (Doctoral Dissertation). University of Newcastle. Retrieved from http://hdl.handle.net/1959.13/923580

Chicago Manual of Style (16th Edition):

Laskovski, Anthony Nikola. “Implantable microelectronics for biological signals.” 2011. Doctoral Dissertation, University of Newcastle. Accessed October 19, 2019. http://hdl.handle.net/1959.13/923580.

MLA Handbook (7th Edition):

Laskovski, Anthony Nikola. “Implantable microelectronics for biological signals.” 2011. Web. 19 Oct 2019.

Vancouver:

Laskovski AN. Implantable microelectronics for biological signals. [Internet] [Doctoral dissertation]. University of Newcastle; 2011. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1959.13/923580.

Council of Science Editors:

Laskovski AN. Implantable microelectronics for biological signals. [Doctoral Dissertation]. University of Newcastle; 2011. Available from: http://hdl.handle.net/1959.13/923580

17. Hamanaka, Cristian Otsuka. Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF.

Degree: Mestrado, Microeletrônica, 2007, University of São Paulo

Este trabalho consiste no projeto de uma Fonte de Tensão de Referência CMOS com coeficiente de temperatura inferior a 50 ppm/ºC. Esta fonte deve ser… (more)

Subjects/Keywords: Analog circuts; Circuitos analógicos; Circuitos integrados MOS; Integrated circuits; Microeletronic; Microeletrônica

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hamanaka, C. O. (2007). Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF. (Masters Thesis). University of São Paulo. Retrieved from http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09012008-164614/ ;

Chicago Manual of Style (16th Edition):

Hamanaka, Cristian Otsuka. “Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF.” 2007. Masters Thesis, University of São Paulo. Accessed October 19, 2019. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09012008-164614/ ;.

MLA Handbook (7th Edition):

Hamanaka, Cristian Otsuka. “Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF.” 2007. Web. 19 Oct 2019.

Vancouver:

Hamanaka CO. Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF. [Internet] [Masters thesis]. University of São Paulo; 2007. [cited 2019 Oct 19]. Available from: http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09012008-164614/ ;.

Council of Science Editors:

Hamanaka CO. Projeto de circuitos para geração de tensão de referência em sistemas receptores/transmissores RF. [Masters Thesis]. University of São Paulo; 2007. Available from: http://www.teses.usp.br/teses/disponiveis/3/3140/tde-09012008-164614/ ;


Texas A&M University

18. Assaad, Rida Shawky. Design Techniques for High Speed Low Voltage and Low Power Non-Calibrated Pipeline Analog to Digital Converters.

Degree: 2011, Texas A&M University

 The profound digitization of modern microelectronic modules made Analog-to- Digital converters (ADC) key components in many systems. With resolutions up to 14bits and sampling rates… (more)

Subjects/Keywords: pipeline ADC; analog circuit design; amplifier design; switched-capacitor circuits.

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Assaad, R. S. (2011). Design Techniques for High Speed Low Voltage and Low Power Non-Calibrated Pipeline Analog to Digital Converters. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7541

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Assaad, Rida Shawky. “Design Techniques for High Speed Low Voltage and Low Power Non-Calibrated Pipeline Analog to Digital Converters.” 2011. Thesis, Texas A&M University. Accessed October 19, 2019. http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7541.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Assaad, Rida Shawky. “Design Techniques for High Speed Low Voltage and Low Power Non-Calibrated Pipeline Analog to Digital Converters.” 2011. Web. 19 Oct 2019.

Vancouver:

Assaad RS. Design Techniques for High Speed Low Voltage and Low Power Non-Calibrated Pipeline Analog to Digital Converters. [Internet] [Thesis]. Texas A&M University; 2011. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7541.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Assaad RS. Design Techniques for High Speed Low Voltage and Low Power Non-Calibrated Pipeline Analog to Digital Converters. [Thesis]. Texas A&M University; 2011. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7541

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

19. Gao, Yang. An Energy Efficient Asynchronous Time-Domain Comparator.

Degree: 2013, Texas A&M University

 In energy-limited applications, such as wearable battery powered systems and implantable circuits for biological applications, ultra-low power analog-to-digital converters (ADCs) are essential for sustaining long… (more)

Subjects/Keywords: Analog-to-digital converter; asynchronous circuits; comparator; successive approximation

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gao, Y. (2013). An Energy Efficient Asynchronous Time-Domain Comparator. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/149314

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gao, Yang. “An Energy Efficient Asynchronous Time-Domain Comparator.” 2013. Thesis, Texas A&M University. Accessed October 19, 2019. http://hdl.handle.net/1969.1/149314.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gao, Yang. “An Energy Efficient Asynchronous Time-Domain Comparator.” 2013. Web. 19 Oct 2019.

Vancouver:

Gao Y. An Energy Efficient Asynchronous Time-Domain Comparator. [Internet] [Thesis]. Texas A&M University; 2013. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1969.1/149314.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gao Y. An Energy Efficient Asynchronous Time-Domain Comparator. [Thesis]. Texas A&M University; 2013. Available from: http://hdl.handle.net/1969.1/149314

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

20. Yin, Leyi 1983-. Formal Verification and In-Situ Test of Analog and Mixed-Signal Circuits.

Degree: 2012, Texas A&M University

 As CMOS technologies continuously scale down, designing robust analog and mixed-signal (AMS) circuits becomes increasingly difficult. Consequently, there are pressing needs for AMS design checking… (more)

Subjects/Keywords: analog and mixed-signal circuits; in-situ test; formal verification

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yin, L. 1. (2012). Formal Verification and In-Situ Test of Analog and Mixed-Signal Circuits. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/151616

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yin, Leyi 1983-. “Formal Verification and In-Situ Test of Analog and Mixed-Signal Circuits.” 2012. Thesis, Texas A&M University. Accessed October 19, 2019. http://hdl.handle.net/1969.1/151616.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yin, Leyi 1983-. “Formal Verification and In-Situ Test of Analog and Mixed-Signal Circuits.” 2012. Web. 19 Oct 2019.

Vancouver:

Yin L1. Formal Verification and In-Situ Test of Analog and Mixed-Signal Circuits. [Internet] [Thesis]. Texas A&M University; 2012. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1969.1/151616.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yin L1. Formal Verification and In-Situ Test of Analog and Mixed-Signal Circuits. [Thesis]. Texas A&M University; 2012. Available from: http://hdl.handle.net/1969.1/151616

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Sul

21. Rossetto, Alan Carlos Junior. Análise dos efeitos de dose total ionizante em circuitos analógicos CMOS.

Degree: 2014, Universidade do Rio Grande do Sul

Este trabalho apresenta um estudo sobre o comportamento de circuitos analógicos CMOS quando sujeitos aos efeitos de dose total ionizante. Os efeitos de dose total… (more)

Subjects/Keywords: Radiação ionizante; Analog circuits; Radiation; Cmos; Circuitos analógicos; Total ionizing dose

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Rossetto, A. C. J. (2014). Análise dos efeitos de dose total ionizante em circuitos analógicos CMOS. (Thesis). Universidade do Rio Grande do Sul. Retrieved from http://hdl.handle.net/10183/115557

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Rossetto, Alan Carlos Junior. “Análise dos efeitos de dose total ionizante em circuitos analógicos CMOS.” 2014. Thesis, Universidade do Rio Grande do Sul. Accessed October 19, 2019. http://hdl.handle.net/10183/115557.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Rossetto, Alan Carlos Junior. “Análise dos efeitos de dose total ionizante em circuitos analógicos CMOS.” 2014. Web. 19 Oct 2019.

Vancouver:

Rossetto ACJ. Análise dos efeitos de dose total ionizante em circuitos analógicos CMOS. [Internet] [Thesis]. Universidade do Rio Grande do Sul; 2014. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/10183/115557.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Rossetto ACJ. Análise dos efeitos de dose total ionizante em circuitos analógicos CMOS. [Thesis]. Universidade do Rio Grande do Sul; 2014. Available from: http://hdl.handle.net/10183/115557

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Anna University

22. Kavithamani, A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.

Degree: Electrical and Electronics Engineering, 2014, Anna University

This research work deals with the diagnosis of soft faults in analog electronic circuits Soft faults that occur even in a single component of a… (more)

Subjects/Keywords: -; Analog electronic circuits; Electrical engineering; Fault diagnosis; Frequency response method

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Kavithamani, A. (2014). Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. (Thesis). Anna University. Retrieved from http://shodhganga.inflibnet.ac.in/handle/10603/24732

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kavithamani, A. “Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.” 2014. Thesis, Anna University. Accessed October 19, 2019. http://shodhganga.inflibnet.ac.in/handle/10603/24732.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kavithamani, A. “Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -.” 2014. Web. 19 Oct 2019.

Vancouver:

Kavithamani A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. [Internet] [Thesis]. Anna University; 2014. [cited 2019 Oct 19]. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/24732.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kavithamani A. Certain new approaches to fault diagnosis of analog electronic circuits using frequency response methods; -. [Thesis]. Anna University; 2014. Available from: http://shodhganga.inflibnet.ac.in/handle/10603/24732

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

23. Cho, Chang-Hyuk. A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology.

Degree: PhD, Electrical and Computer Engineering, 2005, Georgia Tech

 High-speed, medium-resolution, analog-to-digital converters (ADCs) are important building blocks in a wide range of applications. High-speed, medium-resolution ADCs have been implemented by various ADC architectures… (more)

Subjects/Keywords: CMOS analog circuits; Data converters

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Cho, C. (2005). A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/7578

Chicago Manual of Style (16th Edition):

Cho, Chang-Hyuk. “A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology.” 2005. Doctoral Dissertation, Georgia Tech. Accessed October 19, 2019. http://hdl.handle.net/1853/7578.

MLA Handbook (7th Edition):

Cho, Chang-Hyuk. “A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology.” 2005. Web. 19 Oct 2019.

Vancouver:

Cho C. A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology. [Internet] [Doctoral dissertation]. Georgia Tech; 2005. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1853/7578.

Council of Science Editors:

Cho C. A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology. [Doctoral Dissertation]. Georgia Tech; 2005. Available from: http://hdl.handle.net/1853/7578


Ohio University

24. Dai, Hong. Development of a decomposition approach for testing large analog circuits.

Degree: PhD, Electrical Engineering & Computer Science (Engineering and Technology), 1989, Ohio University

  The objective of this dissertation is to develop a new testing method for large scale circuits. This new method must be useful for functional… (more)

Subjects/Keywords: decomposition approach; analog circuits; networks

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Dai, H. (1989). Development of a decomposition approach for testing large analog circuits. (Doctoral Dissertation). Ohio University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1172006982

Chicago Manual of Style (16th Edition):

Dai, Hong. “Development of a decomposition approach for testing large analog circuits.” 1989. Doctoral Dissertation, Ohio University. Accessed October 19, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1172006982.

MLA Handbook (7th Edition):

Dai, Hong. “Development of a decomposition approach for testing large analog circuits.” 1989. Web. 19 Oct 2019.

Vancouver:

Dai H. Development of a decomposition approach for testing large analog circuits. [Internet] [Doctoral dissertation]. Ohio University; 1989. [cited 2019 Oct 19]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1172006982.

Council of Science Editors:

Dai H. Development of a decomposition approach for testing large analog circuits. [Doctoral Dissertation]. Ohio University; 1989. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1172006982


Carnegie Mellon University

25. Liu, Shaolong. SAR ADCs Design and Calibration in Nano-scaled Technologies.

Degree: 2017, Carnegie Mellon University

 The rapid progress of scaling and integration of modern complimentary metal oxide semiconductor (CMOS) technology motivates the replacement of traditional analog signal processing by digital… (more)

Subjects/Keywords: ADC; analog-to-digital converter; Calibration; Integrated circuits; Low power; Offset

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liu, S. (2017). SAR ADCs Design and Calibration in Nano-scaled Technologies. (Thesis). Carnegie Mellon University. Retrieved from http://repository.cmu.edu/dissertations/1073

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Shaolong. “SAR ADCs Design and Calibration in Nano-scaled Technologies.” 2017. Thesis, Carnegie Mellon University. Accessed October 19, 2019. http://repository.cmu.edu/dissertations/1073.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Shaolong. “SAR ADCs Design and Calibration in Nano-scaled Technologies.” 2017. Web. 19 Oct 2019.

Vancouver:

Liu S. SAR ADCs Design and Calibration in Nano-scaled Technologies. [Internet] [Thesis]. Carnegie Mellon University; 2017. [cited 2019 Oct 19]. Available from: http://repository.cmu.edu/dissertations/1073.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu S. SAR ADCs Design and Calibration in Nano-scaled Technologies. [Thesis]. Carnegie Mellon University; 2017. Available from: http://repository.cmu.edu/dissertations/1073

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

26. Annor Fordjour, Samuel. A Four-stage Power and Area Efficient OTA with 30 × (400pf – 12nf) Capacitive Load Drive Range.

Degree: MS, Electrical Engineering, 2016, Texas A&M University

 Multistage operational transconductance amplifier (OTA) has been a major research focus as a solution to high DC Gain high Gain Bandwidth and wide voltage swing… (more)

Subjects/Keywords: CMOS analog integrated circuits; frequency compensation; multistage amplifiers; operational transconductance amplifiers

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Annor Fordjour, S. (2016). A Four-stage Power and Area Efficient OTA with 30 × (400pf – 12nf) Capacitive Load Drive Range. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/158979

Chicago Manual of Style (16th Edition):

Annor Fordjour, Samuel. “A Four-stage Power and Area Efficient OTA with 30 × (400pf – 12nf) Capacitive Load Drive Range.” 2016. Masters Thesis, Texas A&M University. Accessed October 19, 2019. http://hdl.handle.net/1969.1/158979.

MLA Handbook (7th Edition):

Annor Fordjour, Samuel. “A Four-stage Power and Area Efficient OTA with 30 × (400pf – 12nf) Capacitive Load Drive Range.” 2016. Web. 19 Oct 2019.

Vancouver:

Annor Fordjour S. A Four-stage Power and Area Efficient OTA with 30 × (400pf – 12nf) Capacitive Load Drive Range. [Internet] [Masters thesis]. Texas A&M University; 2016. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1969.1/158979.

Council of Science Editors:

Annor Fordjour S. A Four-stage Power and Area Efficient OTA with 30 × (400pf – 12nf) Capacitive Load Drive Range. [Masters Thesis]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/158979


University of Adelaide

27. Al-Sarawi, Said Fares Khalil. Design techniques for low power mixed analog-digital circuits with application to smart wireless systems.

Degree: 2003, University of Adelaide

 This dissertation presents and discusses new design techniques for mixed analog-digital circuits with emphases on low power and small area for standard low-cost CMOS VLSI… (more)

Subjects/Keywords: transistors; analog-digital; wireless; circuits

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Al-Sarawi, S. F. K. (2003). Design techniques for low power mixed analog-digital circuits with application to smart wireless systems. (Thesis). University of Adelaide. Retrieved from http://hdl.handle.net/2440/80082

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Al-Sarawi, Said Fares Khalil. “Design techniques for low power mixed analog-digital circuits with application to smart wireless systems.” 2003. Thesis, University of Adelaide. Accessed October 19, 2019. http://hdl.handle.net/2440/80082.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Al-Sarawi, Said Fares Khalil. “Design techniques for low power mixed analog-digital circuits with application to smart wireless systems.” 2003. Web. 19 Oct 2019.

Vancouver:

Al-Sarawi SFK. Design techniques for low power mixed analog-digital circuits with application to smart wireless systems. [Internet] [Thesis]. University of Adelaide; 2003. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/2440/80082.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Al-Sarawi SFK. Design techniques for low power mixed analog-digital circuits with application to smart wireless systems. [Thesis]. University of Adelaide; 2003. Available from: http://hdl.handle.net/2440/80082

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


McMaster University

28. Wood, Richard P. THE DESIGN, FABRICATION AND CHARACTERIZATION OF SILICON OXIDE NITRIDE OXIDE SEMICONDUCTOR THIN FILM GATES FOR USE IN MODELING SPIKING ANALOG NEURAL CIRCUITS.

Degree: PhD, 2012, McMaster University

  This Thesis details the design, fabrication and characterization of organic semiconductor field effect transistors with silicon oxide-nitride-oxide-semiconductor (SONOS) gates for use in spiking analog(more)

Subjects/Keywords: Neuromorphic Engineering; SONOS; Organic Electronics; Spiking Analog Neural Circuits

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wood, R. P. (2012). THE DESIGN, FABRICATION AND CHARACTERIZATION OF SILICON OXIDE NITRIDE OXIDE SEMICONDUCTOR THIN FILM GATES FOR USE IN MODELING SPIKING ANALOG NEURAL CIRCUITS. (Doctoral Dissertation). McMaster University. Retrieved from http://hdl.handle.net/11375/12778

Chicago Manual of Style (16th Edition):

Wood, Richard P. “THE DESIGN, FABRICATION AND CHARACTERIZATION OF SILICON OXIDE NITRIDE OXIDE SEMICONDUCTOR THIN FILM GATES FOR USE IN MODELING SPIKING ANALOG NEURAL CIRCUITS.” 2012. Doctoral Dissertation, McMaster University. Accessed October 19, 2019. http://hdl.handle.net/11375/12778.

MLA Handbook (7th Edition):

Wood, Richard P. “THE DESIGN, FABRICATION AND CHARACTERIZATION OF SILICON OXIDE NITRIDE OXIDE SEMICONDUCTOR THIN FILM GATES FOR USE IN MODELING SPIKING ANALOG NEURAL CIRCUITS.” 2012. Web. 19 Oct 2019.

Vancouver:

Wood RP. THE DESIGN, FABRICATION AND CHARACTERIZATION OF SILICON OXIDE NITRIDE OXIDE SEMICONDUCTOR THIN FILM GATES FOR USE IN MODELING SPIKING ANALOG NEURAL CIRCUITS. [Internet] [Doctoral dissertation]. McMaster University; 2012. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/11375/12778.

Council of Science Editors:

Wood RP. THE DESIGN, FABRICATION AND CHARACTERIZATION OF SILICON OXIDE NITRIDE OXIDE SEMICONDUCTOR THIN FILM GATES FOR USE IN MODELING SPIKING ANALOG NEURAL CIRCUITS. [Doctoral Dissertation]. McMaster University; 2012. Available from: http://hdl.handle.net/11375/12778


Texas A&M University

29. Mincey, John Steven. A Matched Filter and Coherent Digitizer for Pulsed Doppler Radar Systems.

Degree: PhD, Electrical Engineering, 2016, Texas A&M University

 In this dissertation, a matched filter and coherent digitizer will be presented for pulsed Doppler radar systems. The matched filter is used to filter as… (more)

Subjects/Keywords: analog circuits; filter; finite impulse response; FIR; radar

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mincey, J. S. (2016). A Matched Filter and Coherent Digitizer for Pulsed Doppler Radar Systems. (Doctoral Dissertation). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/174249

Chicago Manual of Style (16th Edition):

Mincey, John Steven. “A Matched Filter and Coherent Digitizer for Pulsed Doppler Radar Systems.” 2016. Doctoral Dissertation, Texas A&M University. Accessed October 19, 2019. http://hdl.handle.net/1969.1/174249.

MLA Handbook (7th Edition):

Mincey, John Steven. “A Matched Filter and Coherent Digitizer for Pulsed Doppler Radar Systems.” 2016. Web. 19 Oct 2019.

Vancouver:

Mincey JS. A Matched Filter and Coherent Digitizer for Pulsed Doppler Radar Systems. [Internet] [Doctoral dissertation]. Texas A&M University; 2016. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1969.1/174249.

Council of Science Editors:

Mincey JS. A Matched Filter and Coherent Digitizer for Pulsed Doppler Radar Systems. [Doctoral Dissertation]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/174249


Texas A&M University

30. Li, Ang. Noise-Sensitive Loops Identification for Linear Time-Varying Analog Circuits.

Degree: MS, Computer Engineering, 2016, Texas A&M University

 The continuing scaling of VLSI technology and the increase of design complexity have rendered the robustness of analog circuits a significant design concern. Analog circuits(more)

Subjects/Keywords: linear time-varying; analog circuits; noise-sensitive; Floquet Theory; loop finder

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, A. (2016). Noise-Sensitive Loops Identification for Linear Time-Varying Analog Circuits. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/157820

Chicago Manual of Style (16th Edition):

Li, Ang. “Noise-Sensitive Loops Identification for Linear Time-Varying Analog Circuits.” 2016. Masters Thesis, Texas A&M University. Accessed October 19, 2019. http://hdl.handle.net/1969.1/157820.

MLA Handbook (7th Edition):

Li, Ang. “Noise-Sensitive Loops Identification for Linear Time-Varying Analog Circuits.” 2016. Web. 19 Oct 2019.

Vancouver:

Li A. Noise-Sensitive Loops Identification for Linear Time-Varying Analog Circuits. [Internet] [Masters thesis]. Texas A&M University; 2016. [cited 2019 Oct 19]. Available from: http://hdl.handle.net/1969.1/157820.

Council of Science Editors:

Li A. Noise-Sensitive Loops Identification for Linear Time-Varying Analog Circuits. [Masters Thesis]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/157820

[1] [2] [3] [4] [5] [6] [7] [8] [9]

.