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Dept: Electrical and Computer Engineering

You searched for subject:(African American Female Principals in High Poverty Urban Schools). Showing records 1 – 30 of 547 total matches.

[1] [2] [3] [4] [5] … [19]

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University of California – Irvine

1. YANTIR, Hasan Erdem. Efficient Acceleration of Computation Using Associative In-memory Processing.

Degree: Electrical and Computer Engineering, 2018, University of California – Irvine

 The complexity of the computational problems is rising faster than the computational platforms' capabilities. This forces researchers to find alternative paradigms and methods for efficient… (more)

Subjects/Keywords: Computer engineering; Computer science; Electrical engineering; Associative Processors; Computer Architecture; Content Addressable Memories; High-performance Computing; In-memory Computation; Parallel Processing

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APA (6th Edition):

YANTIR, H. E. (2018). Efficient Acceleration of Computation Using Associative In-memory Processing. (Thesis). University of California – Irvine. Retrieved from http://www.escholarship.org/uc/item/3939f48b

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

YANTIR, Hasan Erdem. “Efficient Acceleration of Computation Using Associative In-memory Processing.” 2018. Thesis, University of California – Irvine. Accessed July 21, 2019. http://www.escholarship.org/uc/item/3939f48b.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

YANTIR, Hasan Erdem. “Efficient Acceleration of Computation Using Associative In-memory Processing.” 2018. Web. 21 Jul 2019.

Vancouver:

YANTIR HE. Efficient Acceleration of Computation Using Associative In-memory Processing. [Internet] [Thesis]. University of California – Irvine; 2018. [cited 2019 Jul 21]. Available from: http://www.escholarship.org/uc/item/3939f48b.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

YANTIR HE. Efficient Acceleration of Computation Using Associative In-memory Processing. [Thesis]. University of California – Irvine; 2018. Available from: http://www.escholarship.org/uc/item/3939f48b

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Virginia Tech

2. Kim, Han Bin. High-Level Synthesis and Implementation of Built-In Self-Testable Data Path Intensive Circuit.

Degree: PhD, Electrical and Computer Engineering, 1999, Virginia Tech

 A high-level built-in self-test (BIST) synthesis is a process of transforming a behavioral description into a register-transfer level structural description while minimizing BIST overhead. Existing… (more)

Subjects/Keywords: ASIC; DSP; Built-In Self-Test; BIST; High-Level Synthesis; Data Path

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APA (6th Edition):

Kim, H. B. (1999). High-Level Synthesis and Implementation of Built-In Self-Testable Data Path Intensive Circuit. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/30257

Chicago Manual of Style (16th Edition):

Kim, Han Bin. “High-Level Synthesis and Implementation of Built-In Self-Testable Data Path Intensive Circuit.” 1999. Doctoral Dissertation, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/30257.

MLA Handbook (7th Edition):

Kim, Han Bin. “High-Level Synthesis and Implementation of Built-In Self-Testable Data Path Intensive Circuit.” 1999. Web. 21 Jul 2019.

Vancouver:

Kim HB. High-Level Synthesis and Implementation of Built-In Self-Testable Data Path Intensive Circuit. [Internet] [Doctoral dissertation]. Virginia Tech; 1999. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/30257.

Council of Science Editors:

Kim HB. High-Level Synthesis and Implementation of Built-In Self-Testable Data Path Intensive Circuit. [Doctoral Dissertation]. Virginia Tech; 1999. Available from: http://hdl.handle.net/10919/30257


Mississippi State University

3. Disyadej, Thongchai. ESTIMATION OF THE LIGHTNING ATTRACTIVE WIDTH OF HIGH VOLTAGE TRANSMISSION LINES.

Degree: PhD, Electrical and Computer Engineering, 2010, Mississippi State University

  This research is devoted to an investigation on the attractive width of high voltage transmission lines to lightning strikes. In order to design the… (more)

Subjects/Keywords: Transmission Lines; High Voltage; Lightning

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APA (6th Edition):

Disyadej, T. (2010). ESTIMATION OF THE LIGHTNING ATTRACTIVE WIDTH OF HIGH VOLTAGE TRANSMISSION LINES. (Doctoral Dissertation). Mississippi State University. Retrieved from http://sun.library.msstate.edu/ETD-db/theses/available/etd-03312010-231537/ ;

Chicago Manual of Style (16th Edition):

Disyadej, Thongchai. “ESTIMATION OF THE LIGHTNING ATTRACTIVE WIDTH OF HIGH VOLTAGE TRANSMISSION LINES.” 2010. Doctoral Dissertation, Mississippi State University. Accessed July 21, 2019. http://sun.library.msstate.edu/ETD-db/theses/available/etd-03312010-231537/ ;.

MLA Handbook (7th Edition):

Disyadej, Thongchai. “ESTIMATION OF THE LIGHTNING ATTRACTIVE WIDTH OF HIGH VOLTAGE TRANSMISSION LINES.” 2010. Web. 21 Jul 2019.

Vancouver:

Disyadej T. ESTIMATION OF THE LIGHTNING ATTRACTIVE WIDTH OF HIGH VOLTAGE TRANSMISSION LINES. [Internet] [Doctoral dissertation]. Mississippi State University; 2010. [cited 2019 Jul 21]. Available from: http://sun.library.msstate.edu/ETD-db/theses/available/etd-03312010-231537/ ;.

Council of Science Editors:

Disyadej T. ESTIMATION OF THE LIGHTNING ATTRACTIVE WIDTH OF HIGH VOLTAGE TRANSMISSION LINES. [Doctoral Dissertation]. Mississippi State University; 2010. Available from: http://sun.library.msstate.edu/ETD-db/theses/available/etd-03312010-231537/ ;


Rutgers University

4. Alexandrov, Petre. Development of 4H-SiC high voltage unipolar power switching devices:.

Degree: PhD, Electrical and Computer Engineering, 2009, Rutgers University

4H-SiC is a promising material for switching high power and high temperature device applications. The superior properties of SiC, such as wider band-gap and higher… (more)

Subjects/Keywords: High voltages; Switching circuits

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APA (6th Edition):

Alexandrov, P. (2009). Development of 4H-SiC high voltage unipolar power switching devices:. (Doctoral Dissertation). Rutgers University. Retrieved from http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000051772

Chicago Manual of Style (16th Edition):

Alexandrov, Petre. “Development of 4H-SiC high voltage unipolar power switching devices:.” 2009. Doctoral Dissertation, Rutgers University. Accessed July 21, 2019. http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000051772.

MLA Handbook (7th Edition):

Alexandrov, Petre. “Development of 4H-SiC high voltage unipolar power switching devices:.” 2009. Web. 21 Jul 2019.

Vancouver:

Alexandrov P. Development of 4H-SiC high voltage unipolar power switching devices:. [Internet] [Doctoral dissertation]. Rutgers University; 2009. [cited 2019 Jul 21]. Available from: http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000051772.

Council of Science Editors:

Alexandrov P. Development of 4H-SiC high voltage unipolar power switching devices:. [Doctoral Dissertation]. Rutgers University; 2009. Available from: http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000051772

5. -7307-3794. Approximate high-level synthesis of quality and energy optimized hardware processors.

Degree: Electrical and Computer Engineering, 2018, University of Texas – Austin

 Approximate computing is a technique that exploits trade-offs between energy/performance and quality of computed results. Such techniques have been explored at various design levels for… (more)

Subjects/Keywords: Approximate computing; High-level synthesis

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APA (6th Edition):

-7307-3794. (2018). Approximate high-level synthesis of quality and energy optimized hardware processors. (Thesis). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/63811

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

-7307-3794. “Approximate high-level synthesis of quality and energy optimized hardware processors.” 2018. Thesis, University of Texas – Austin. Accessed July 21, 2019. http://hdl.handle.net/2152/63811.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

-7307-3794. “Approximate high-level synthesis of quality and energy optimized hardware processors.” 2018. Web. 21 Jul 2019.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Vancouver:

-7307-3794. Approximate high-level synthesis of quality and energy optimized hardware processors. [Internet] [Thesis]. University of Texas – Austin; 2018. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/2152/63811.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

-7307-3794. Approximate high-level synthesis of quality and energy optimized hardware processors. [Thesis]. University of Texas – Austin; 2018. Available from: http://hdl.handle.net/2152/63811

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete
Not specified: Masters Thesis or Doctoral Dissertation


University of Texas – Austin

6. Lee, Dongwook. Learning-based system-level power modeling of hardware IPs.

Degree: Electrical and Computer Engineering, 2017, University of Texas – Austin

 Accurate power models for hardware components at high levels of abstraction are a critical component to enable system-level power analysis and optimization. Virtual platform prototypes… (more)

Subjects/Keywords: Power estimation; High-level synthesis

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APA (6th Edition):

Lee, D. (2017). Learning-based system-level power modeling of hardware IPs. (Thesis). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/63013

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lee, Dongwook. “Learning-based system-level power modeling of hardware IPs.” 2017. Thesis, University of Texas – Austin. Accessed July 21, 2019. http://hdl.handle.net/2152/63013.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lee, Dongwook. “Learning-based system-level power modeling of hardware IPs.” 2017. Web. 21 Jul 2019.

Vancouver:

Lee D. Learning-based system-level power modeling of hardware IPs. [Internet] [Thesis]. University of Texas – Austin; 2017. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/2152/63013.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lee D. Learning-based system-level power modeling of hardware IPs. [Thesis]. University of Texas – Austin; 2017. Available from: http://hdl.handle.net/2152/63013

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Georgia Tech

7. Chen, Te-Hui. High-speed, low cost test platform using FPGA technology.

Degree: PhD, Electrical and Computer Engineering, 2016, Georgia Tech

 The object of this research is to develop a low-cost, adaptable testing platform for multi-GHz digital applications, with concentration on the test requirement of advanced… (more)

Subjects/Keywords: FPGA; High-speed testing

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APA (6th Edition):

Chen, T. (2016). High-speed, low cost test platform using FPGA technology. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/56246

Chicago Manual of Style (16th Edition):

Chen, Te-Hui. “High-speed, low cost test platform using FPGA technology.” 2016. Doctoral Dissertation, Georgia Tech. Accessed July 21, 2019. http://hdl.handle.net/1853/56246.

MLA Handbook (7th Edition):

Chen, Te-Hui. “High-speed, low cost test platform using FPGA technology.” 2016. Web. 21 Jul 2019.

Vancouver:

Chen T. High-speed, low cost test platform using FPGA technology. [Internet] [Doctoral dissertation]. Georgia Tech; 2016. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1853/56246.

Council of Science Editors:

Chen T. High-speed, low cost test platform using FPGA technology. [Doctoral Dissertation]. Georgia Tech; 2016. Available from: http://hdl.handle.net/1853/56246


University of Manitoba

8. Vykhodtsev, Anton. Dielectric spectroscopy characteristics of new and aged high voltage insulating polymeric materials.

Degree: Electrical and Computer Engineering, 2017, University of Manitoba

 Increased use of solid polymeric materials in the insulating structures of high voltage equipment for electric power systems over the past years has occurred despite… (more)

Subjects/Keywords: High voltage; Dielectric response; Ageing

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APA (6th Edition):

Vykhodtsev, A. (2017). Dielectric spectroscopy characteristics of new and aged high voltage insulating polymeric materials. (Masters Thesis). University of Manitoba. Retrieved from http://hdl.handle.net/1993/32719

Chicago Manual of Style (16th Edition):

Vykhodtsev, Anton. “Dielectric spectroscopy characteristics of new and aged high voltage insulating polymeric materials.” 2017. Masters Thesis, University of Manitoba. Accessed July 21, 2019. http://hdl.handle.net/1993/32719.

MLA Handbook (7th Edition):

Vykhodtsev, Anton. “Dielectric spectroscopy characteristics of new and aged high voltage insulating polymeric materials.” 2017. Web. 21 Jul 2019.

Vancouver:

Vykhodtsev A. Dielectric spectroscopy characteristics of new and aged high voltage insulating polymeric materials. [Internet] [Masters thesis]. University of Manitoba; 2017. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1993/32719.

Council of Science Editors:

Vykhodtsev A. Dielectric spectroscopy characteristics of new and aged high voltage insulating polymeric materials. [Masters Thesis]. University of Manitoba; 2017. Available from: http://hdl.handle.net/1993/32719

9. Falcone, Jessica Dominique. Validation of high density electrode arrays for cochlear implants: a computational and structural approach.

Degree: MS, Electrical and Computer Engineering, 2011, Georgia Tech

 Creating high resolution, or high-density, electrode arrays may be the key for improving cochlear implant users' speech perception in noise, comprehension of lexical languages, and… (more)

Subjects/Keywords: Neural probability model; In vitro studies; Cochlear implants; Comsol; Activating function; High density electrode arrays; Microelectromechanical systems; Neural stimulation

…then compared to that of a high density electrode located at 10 mm. As shown in 15 Figure… …magnitude higher for the high density electrodes. The reason for this scenario is illustrated in… …Figure 3.5 Comparison of current focusing with σ = 1 for high density electrodes and… …contemporary electrodes: (A) for ΣN = 250, I = 2 mA for high density and I = 0.35 mA for… …contemporary, (B) for ΣN = 500, I = 2.58 mA for high density and I = 0.42 mA for… 

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APA (6th Edition):

Falcone, J. D. (2011). Validation of high density electrode arrays for cochlear implants: a computational and structural approach. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/39563

Chicago Manual of Style (16th Edition):

Falcone, Jessica Dominique. “Validation of high density electrode arrays for cochlear implants: a computational and structural approach.” 2011. Masters Thesis, Georgia Tech. Accessed July 21, 2019. http://hdl.handle.net/1853/39563.

MLA Handbook (7th Edition):

Falcone, Jessica Dominique. “Validation of high density electrode arrays for cochlear implants: a computational and structural approach.” 2011. Web. 21 Jul 2019.

Vancouver:

Falcone JD. Validation of high density electrode arrays for cochlear implants: a computational and structural approach. [Internet] [Masters thesis]. Georgia Tech; 2011. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1853/39563.

Council of Science Editors:

Falcone JD. Validation of high density electrode arrays for cochlear implants: a computational and structural approach. [Masters Thesis]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/39563


Virginia Tech

10. Ning, Puqi. Design and Development of High Density High Temperature Power Module with Cooling System.

Degree: PhD, Electrical and Computer Engineering, 2010, Virginia Tech

 In recent years, the SiC power semiconductor has emerged as an attractive alternative that pushes the limitations of junction temperature, power rating, and switching frequency… (more)

Subjects/Keywords: SiC devices; high temperature; high power density; planar package; wirebond package

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APA (6th Edition):

Ning, P. (2010). Design and Development of High Density High Temperature Power Module with Cooling System. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/27766

Chicago Manual of Style (16th Edition):

Ning, Puqi. “Design and Development of High Density High Temperature Power Module with Cooling System.” 2010. Doctoral Dissertation, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/27766.

MLA Handbook (7th Edition):

Ning, Puqi. “Design and Development of High Density High Temperature Power Module with Cooling System.” 2010. Web. 21 Jul 2019.

Vancouver:

Ning P. Design and Development of High Density High Temperature Power Module with Cooling System. [Internet] [Doctoral dissertation]. Virginia Tech; 2010. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/27766.

Council of Science Editors:

Ning P. Design and Development of High Density High Temperature Power Module with Cooling System. [Doctoral Dissertation]. Virginia Tech; 2010. Available from: http://hdl.handle.net/10919/27766


Virginia Tech

11. Fu, Dianbo. Topology Investigation and System Optimization of Resonant Converters.

Degree: PhD, Electrical and Computer Engineering, 2010, Virginia Tech

 Over the past several years, energy efficiency and power density have become the top concerns for power conversion. Rising energy intensity leads to a higher… (more)

Subjects/Keywords: multi-element; high efficiency; resonant converter; high power density

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APA (6th Edition):

Fu, D. (2010). Topology Investigation and System Optimization of Resonant Converters. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/27783

Chicago Manual of Style (16th Edition):

Fu, Dianbo. “Topology Investigation and System Optimization of Resonant Converters.” 2010. Doctoral Dissertation, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/27783.

MLA Handbook (7th Edition):

Fu, Dianbo. “Topology Investigation and System Optimization of Resonant Converters.” 2010. Web. 21 Jul 2019.

Vancouver:

Fu D. Topology Investigation and System Optimization of Resonant Converters. [Internet] [Doctoral dissertation]. Virginia Tech; 2010. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/27783.

Council of Science Editors:

Fu D. Topology Investigation and System Optimization of Resonant Converters. [Doctoral Dissertation]. Virginia Tech; 2010. Available from: http://hdl.handle.net/10919/27783

12. Tang, Jiacheng. Adaptive Control of Poverty Dynamics.

Degree: MS, Electrical and Computer Engineering, 2017, The Ohio State University

 Adaptive control methods, FMRLC and indirect adaptive neural network, are analyzed in this thesis as the financial adviser to help poor people gain certain amount… (more)

Subjects/Keywords: Electrical Engineering; financial dynamic models; poverty

…the purpose of the MIMO poverty dynamics in [7] is to represent a more developed… …block in Figure 3.1 for SISO poverty dynamics. The desired assets r(kT ), is a… …FMRLC method from Section 3.1 applied on each poverty dynamic model introduced in Section 2.1… …classical PID controller. 5.1 Implementation of FMRLC on SISO poverty dynamics In the first… …individual start to gain certain amount of assets. However, only high expense increases in 25… 

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APA (6th Edition):

Tang, J. (2017). Adaptive Control of Poverty Dynamics. (Masters Thesis). The Ohio State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=osu1492449938477326

Chicago Manual of Style (16th Edition):

Tang, Jiacheng. “Adaptive Control of Poverty Dynamics.” 2017. Masters Thesis, The Ohio State University. Accessed July 21, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=osu1492449938477326.

MLA Handbook (7th Edition):

Tang, Jiacheng. “Adaptive Control of Poverty Dynamics.” 2017. Web. 21 Jul 2019.

Vancouver:

Tang J. Adaptive Control of Poverty Dynamics. [Internet] [Masters thesis]. The Ohio State University; 2017. [cited 2019 Jul 21]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1492449938477326.

Council of Science Editors:

Tang J. Adaptive Control of Poverty Dynamics. [Masters Thesis]. The Ohio State University; 2017. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=osu1492449938477326


Virginia Tech

13. Cui, Han. Constant-Flux Inductor with Enclosed-Winding Geometry for Improved Energy Density.

Degree: MS, Electrical and Computer Engineering, 2013, Virginia Tech

 The passive components such as inductors and capacitors are bulky parts on circuit boards. Researchers in academia, government, and industry have been searching for ways… (more)

Subjects/Keywords: constant-flux; time constant; magnetic field; uniformity factor; high-density inductor; high-density transformer; high-density magnetic; distributed core; distributed winding

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APA (6th Edition):

Cui, H. (2013). Constant-Flux Inductor with Enclosed-Winding Geometry for Improved Energy Density. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/34722

Chicago Manual of Style (16th Edition):

Cui, Han. “Constant-Flux Inductor with Enclosed-Winding Geometry for Improved Energy Density.” 2013. Masters Thesis, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/34722.

MLA Handbook (7th Edition):

Cui, Han. “Constant-Flux Inductor with Enclosed-Winding Geometry for Improved Energy Density.” 2013. Web. 21 Jul 2019.

Vancouver:

Cui H. Constant-Flux Inductor with Enclosed-Winding Geometry for Improved Energy Density. [Internet] [Masters thesis]. Virginia Tech; 2013. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/34722.

Council of Science Editors:

Cui H. Constant-Flux Inductor with Enclosed-Winding Geometry for Improved Energy Density. [Masters Thesis]. Virginia Tech; 2013. Available from: http://hdl.handle.net/10919/34722


Georgia Tech

14. Kasimoglu, Ismail Hakki. Estimation of a Coronary Vessel Wall Deformation with High-Frequency Ultrasound Elastography.

Degree: PhD, Electrical and Computer Engineering, 2007, Georgia Tech

 Elastography, which is based on applying pressure and estimating the resulting deformation, involves the forward problem to obtain the strain distributions and inverse problem to… (more)

Subjects/Keywords: Elastography; High-frequency ultrasound; Image acquisition; Image segmentation; Porcine coronary artery; Stopping function; Geodesic active contour; Local phase; Level set; Ultrasonics in medicine; Coronary arteries Mechanical properties; Elasticity; Strains and stresses

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APA (6th Edition):

Kasimoglu, I. H. (2007). Estimation of a Coronary Vessel Wall Deformation with High-Frequency Ultrasound Elastography. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/19762

Chicago Manual of Style (16th Edition):

Kasimoglu, Ismail Hakki. “Estimation of a Coronary Vessel Wall Deformation with High-Frequency Ultrasound Elastography.” 2007. Doctoral Dissertation, Georgia Tech. Accessed July 21, 2019. http://hdl.handle.net/1853/19762.

MLA Handbook (7th Edition):

Kasimoglu, Ismail Hakki. “Estimation of a Coronary Vessel Wall Deformation with High-Frequency Ultrasound Elastography.” 2007. Web. 21 Jul 2019.

Vancouver:

Kasimoglu IH. Estimation of a Coronary Vessel Wall Deformation with High-Frequency Ultrasound Elastography. [Internet] [Doctoral dissertation]. Georgia Tech; 2007. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1853/19762.

Council of Science Editors:

Kasimoglu IH. Estimation of a Coronary Vessel Wall Deformation with High-Frequency Ultrasound Elastography. [Doctoral Dissertation]. Georgia Tech; 2007. Available from: http://hdl.handle.net/1853/19762


University of Florida

15. Puligundla, Sudeep. Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits.

Degree: PhD, Electrical and Computer Engineering, 2007, University of Florida

 Over the past decade, advancements in areas of semiconductor device physics, IC manufacturing and integration technologies on silicon have considerably increased the operating frequencies (ft)… (more)

Subjects/Keywords: Amplifiers; Architectural design; Delay circuits; Delay lines; Electric potential; Noise spectra; Propagation delay; Signals; Transistors; Vibration; amplifiers, architecture, built, delay, embedded, high, in, indicators, limiting, line, logarithmic, samplers, signal, snapshot, speed, strength, test, vernier

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APA (6th Edition):

Puligundla, S. (2007). Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits. (Doctoral Dissertation). University of Florida. Retrieved from http://ufdc.ufl.edu/UFE0021507

Chicago Manual of Style (16th Edition):

Puligundla, Sudeep. “Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits.” 2007. Doctoral Dissertation, University of Florida. Accessed July 21, 2019. http://ufdc.ufl.edu/UFE0021507.

MLA Handbook (7th Edition):

Puligundla, Sudeep. “Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits.” 2007. Web. 21 Jul 2019.

Vancouver:

Puligundla S. Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits. [Internet] [Doctoral dissertation]. University of Florida; 2007. [cited 2019 Jul 21]. Available from: http://ufdc.ufl.edu/UFE0021507.

Council of Science Editors:

Puligundla S. Signal-Strength Indicators and High-Speed Samplers for Embedded Test of Mixed-Signal Integrated Circuits. [Doctoral Dissertation]. University of Florida; 2007. Available from: http://ufdc.ufl.edu/UFE0021507


Georgia Tech

16. Khan, Talha Mansur. Organic semiconductor bulk heterojunction diodes with low dark current for photovoltaic, photodetection, and scintillator-free ionizing radiation detection applications.

Degree: PhD, Electrical and Computer Engineering, 2016, Georgia Tech

 Solid-state organic semiconductor-based photovoltaics (OPV) are an emerging technology being developed to generate clean and sustainable electricity in light weight, flexible and shatter-proof form factors.… (more)

Subjects/Keywords: Organic solar cells; Organic photodetectors; High detectivity

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Khan, T. M. (2016). Organic semiconductor bulk heterojunction diodes with low dark current for photovoltaic, photodetection, and scintillator-free ionizing radiation detection applications. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/58182

Chicago Manual of Style (16th Edition):

Khan, Talha Mansur. “Organic semiconductor bulk heterojunction diodes with low dark current for photovoltaic, photodetection, and scintillator-free ionizing radiation detection applications.” 2016. Doctoral Dissertation, Georgia Tech. Accessed July 21, 2019. http://hdl.handle.net/1853/58182.

MLA Handbook (7th Edition):

Khan, Talha Mansur. “Organic semiconductor bulk heterojunction diodes with low dark current for photovoltaic, photodetection, and scintillator-free ionizing radiation detection applications.” 2016. Web. 21 Jul 2019.

Vancouver:

Khan TM. Organic semiconductor bulk heterojunction diodes with low dark current for photovoltaic, photodetection, and scintillator-free ionizing radiation detection applications. [Internet] [Doctoral dissertation]. Georgia Tech; 2016. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1853/58182.

Council of Science Editors:

Khan TM. Organic semiconductor bulk heterojunction diodes with low dark current for photovoltaic, photodetection, and scintillator-free ionizing radiation detection applications. [Doctoral Dissertation]. Georgia Tech; 2016. Available from: http://hdl.handle.net/1853/58182


Queens University

17. Grant, Ryan Eric. Improving High Performance Networking Technologies for Data Center Clusters .

Degree: Electrical and Computer Engineering, 2012, Queens University

 This dissertation demonstrates new methods for increasing the performance and scalability of high performance networking technologies for use in clustered computing systems, concentrating on Ethernet/High-Speed… (more)

Subjects/Keywords: Data centers; Cluster Computing; High Performance Networks

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Grant, R. E. (2012). Improving High Performance Networking Technologies for Data Center Clusters . (Thesis). Queens University. Retrieved from http://hdl.handle.net/1974/7502

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Grant, Ryan Eric. “Improving High Performance Networking Technologies for Data Center Clusters .” 2012. Thesis, Queens University. Accessed July 21, 2019. http://hdl.handle.net/1974/7502.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Grant, Ryan Eric. “Improving High Performance Networking Technologies for Data Center Clusters .” 2012. Web. 21 Jul 2019.

Vancouver:

Grant RE. Improving High Performance Networking Technologies for Data Center Clusters . [Internet] [Thesis]. Queens University; 2012. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1974/7502.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Grant RE. Improving High Performance Networking Technologies for Data Center Clusters . [Thesis]. Queens University; 2012. Available from: http://hdl.handle.net/1974/7502

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of California – Irvine

18. Molainezhad, Fatemehe. Analysis and Design of High-Speed CMOS Frequency Dividers.

Degree: Electrical and Computer Engineering, 2015, University of California – Irvine

 A frequency divider is one of the most fundamental and challenging blocks used in high-speed communication systems. Three high-speed dividers with different topologies, LC-tank frequency… (more)

Subjects/Keywords: Electrical engineering; CMOS; Frequency Dividers; High-Speed

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APA (6th Edition):

Molainezhad, F. (2015). Analysis and Design of High-Speed CMOS Frequency Dividers. (Thesis). University of California – Irvine. Retrieved from http://www.escholarship.org/uc/item/9q86n8b2

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Molainezhad, Fatemehe. “Analysis and Design of High-Speed CMOS Frequency Dividers.” 2015. Thesis, University of California – Irvine. Accessed July 21, 2019. http://www.escholarship.org/uc/item/9q86n8b2.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Molainezhad, Fatemehe. “Analysis and Design of High-Speed CMOS Frequency Dividers.” 2015. Web. 21 Jul 2019.

Vancouver:

Molainezhad F. Analysis and Design of High-Speed CMOS Frequency Dividers. [Internet] [Thesis]. University of California – Irvine; 2015. [cited 2019 Jul 21]. Available from: http://www.escholarship.org/uc/item/9q86n8b2.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Molainezhad F. Analysis and Design of High-Speed CMOS Frequency Dividers. [Thesis]. University of California – Irvine; 2015. Available from: http://www.escholarship.org/uc/item/9q86n8b2

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oregon State University

19. Zhao, Jing. Flexible dual TCP/UDP streaming for H.264 HD video over WLANs.

Degree: MS, Electrical and Computer Engineering, 2013, Oregon State University

High Definition video streaming over WLANs faces many challenges because video data requires not only data integrity but also frames have strict playout deadline. Traditional… (more)

Subjects/Keywords: High definition video streaming; Wireless LANs

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APA (6th Edition):

Zhao, J. (2013). Flexible dual TCP/UDP streaming for H.264 HD video over WLANs. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/39393

Chicago Manual of Style (16th Edition):

Zhao, Jing. “Flexible dual TCP/UDP streaming for H.264 HD video over WLANs.” 2013. Masters Thesis, Oregon State University. Accessed July 21, 2019. http://hdl.handle.net/1957/39393.

MLA Handbook (7th Edition):

Zhao, Jing. “Flexible dual TCP/UDP streaming for H.264 HD video over WLANs.” 2013. Web. 21 Jul 2019.

Vancouver:

Zhao J. Flexible dual TCP/UDP streaming for H.264 HD video over WLANs. [Internet] [Masters thesis]. Oregon State University; 2013. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1957/39393.

Council of Science Editors:

Zhao J. Flexible dual TCP/UDP streaming for H.264 HD video over WLANs. [Masters Thesis]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/39393


Georgia Tech

20. Sargent, Lee Harris. Ecocar 3 interconnect definitions, descriptions and justifications.

Degree: MS, Electrical and Computer Engineering, 2017, Georgia Tech

 This thesis will serve as an accurate interconnect definition document for the Georgia Tech EcoCAR 3 competition vehicle. In this thesis I will outline the… (more)

Subjects/Keywords: EcoCAR; Hybrid; Automotive; High voltage; Battery

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APA (6th Edition):

Sargent, L. H. (2017). Ecocar 3 interconnect definitions, descriptions and justifications. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/59225

Chicago Manual of Style (16th Edition):

Sargent, Lee Harris. “Ecocar 3 interconnect definitions, descriptions and justifications.” 2017. Masters Thesis, Georgia Tech. Accessed July 21, 2019. http://hdl.handle.net/1853/59225.

MLA Handbook (7th Edition):

Sargent, Lee Harris. “Ecocar 3 interconnect definitions, descriptions and justifications.” 2017. Web. 21 Jul 2019.

Vancouver:

Sargent LH. Ecocar 3 interconnect definitions, descriptions and justifications. [Internet] [Masters thesis]. Georgia Tech; 2017. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1853/59225.

Council of Science Editors:

Sargent LH. Ecocar 3 interconnect definitions, descriptions and justifications. [Masters Thesis]. Georgia Tech; 2017. Available from: http://hdl.handle.net/1853/59225


Virginia Tech

21. Gabriel, Matthew Frederick. An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design.

Degree: MS, Electrical and Computer Engineering, 2013, Virginia Tech

 The size and complexity of many scientific and enterprise-level applications require a high degree of parallelization in order to produce outputs within an acceptable period… (more)

Subjects/Keywords: High Performance Computing; Speedup; Amdahl; Gustafson

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gabriel, M. F. (2013). An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/22053

Chicago Manual of Style (16th Edition):

Gabriel, Matthew Frederick. “An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design.” 2013. Masters Thesis, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/22053.

MLA Handbook (7th Edition):

Gabriel, Matthew Frederick. “An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design.” 2013. Web. 21 Jul 2019.

Vancouver:

Gabriel MF. An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design. [Internet] [Masters thesis]. Virginia Tech; 2013. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/22053.

Council of Science Editors:

Gabriel MF. An Expanded Speedup Model for the Early Phases of High Performance Computing Cluster (HPCC) Design. [Masters Thesis]. Virginia Tech; 2013. Available from: http://hdl.handle.net/10919/22053


Virginia Tech

22. Deshpande, Kshitija Bharat. Investigation of High Latitude Ionospheric Irregularities utilizing Modeling and GPS Observations.

Degree: PhD, Electrical and Computer Engineering, 2014, Virginia Tech

 Complex magnetosphere-ionosphere coupling mechanisms result in high latitude irregularities that are difficult to characterize. Until recently, the polar and auroral irregularities remained largely unexplored. Inadequate… (more)

Subjects/Keywords: Ionosphere; Irregularities; High Latitude; GPS; Modeling; SIGMA

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APA (6th Edition):

Deshpande, K. B. (2014). Investigation of High Latitude Ionospheric Irregularities utilizing Modeling and GPS Observations. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/49507

Chicago Manual of Style (16th Edition):

Deshpande, Kshitija Bharat. “Investigation of High Latitude Ionospheric Irregularities utilizing Modeling and GPS Observations.” 2014. Doctoral Dissertation, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/49507.

MLA Handbook (7th Edition):

Deshpande, Kshitija Bharat. “Investigation of High Latitude Ionospheric Irregularities utilizing Modeling and GPS Observations.” 2014. Web. 21 Jul 2019.

Vancouver:

Deshpande KB. Investigation of High Latitude Ionospheric Irregularities utilizing Modeling and GPS Observations. [Internet] [Doctoral dissertation]. Virginia Tech; 2014. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/49507.

Council of Science Editors:

Deshpande KB. Investigation of High Latitude Ionospheric Irregularities utilizing Modeling and GPS Observations. [Doctoral Dissertation]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/49507


Virginia Tech

23. Vo, Huy Nhu. High-resolution Optical Scanning Holography.

Degree: MS, Electrical and Computer Engineering, 2010, Virginia Tech

 Optical scanning holography, which was proposed by Poon[1], is a fascinating technology to record holographic information. The technique is applied in the operation of scanning… (more)

Subjects/Keywords: optical scanning holography; reconstruction; high-resolution

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APA (6th Edition):

Vo, H. N. (2010). High-resolution Optical Scanning Holography. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/32527

Chicago Manual of Style (16th Edition):

Vo, Huy Nhu. “High-resolution Optical Scanning Holography.” 2010. Masters Thesis, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/32527.

MLA Handbook (7th Edition):

Vo, Huy Nhu. “High-resolution Optical Scanning Holography.” 2010. Web. 21 Jul 2019.

Vancouver:

Vo HN. High-resolution Optical Scanning Holography. [Internet] [Masters thesis]. Virginia Tech; 2010. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/32527.

Council of Science Editors:

Vo HN. High-resolution Optical Scanning Holography. [Masters Thesis]. Virginia Tech; 2010. Available from: http://hdl.handle.net/10919/32527


Mississippi State University

24. Maralani, Ayden. DESIGN OF OPERATIONAL AMPLIFIERS AND UTILIZING SIC JFET FOR ANALOG DESIGN.

Degree: PhD, Electrical and Computer Engineering, 2009, Mississippi State University

  Demand for capable and reliable semiconductor and fabrication technology for high temperature and power electronics applications has been increasing in recent years. Silicon Carbide… (more)

Subjects/Keywords: sic; jfet; high temperature; operational amplifier; analog

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APA (6th Edition):

Maralani, A. (2009). DESIGN OF OPERATIONAL AMPLIFIERS AND UTILIZING SIC JFET FOR ANALOG DESIGN. (Doctoral Dissertation). Mississippi State University. Retrieved from http://sun.library.msstate.edu/ETD-db/theses/available/etd-11042009-143743/ ;

Chicago Manual of Style (16th Edition):

Maralani, Ayden. “DESIGN OF OPERATIONAL AMPLIFIERS AND UTILIZING SIC JFET FOR ANALOG DESIGN.” 2009. Doctoral Dissertation, Mississippi State University. Accessed July 21, 2019. http://sun.library.msstate.edu/ETD-db/theses/available/etd-11042009-143743/ ;.

MLA Handbook (7th Edition):

Maralani, Ayden. “DESIGN OF OPERATIONAL AMPLIFIERS AND UTILIZING SIC JFET FOR ANALOG DESIGN.” 2009. Web. 21 Jul 2019.

Vancouver:

Maralani A. DESIGN OF OPERATIONAL AMPLIFIERS AND UTILIZING SIC JFET FOR ANALOG DESIGN. [Internet] [Doctoral dissertation]. Mississippi State University; 2009. [cited 2019 Jul 21]. Available from: http://sun.library.msstate.edu/ETD-db/theses/available/etd-11042009-143743/ ;.

Council of Science Editors:

Maralani A. DESIGN OF OPERATIONAL AMPLIFIERS AND UTILIZING SIC JFET FOR ANALOG DESIGN. [Doctoral Dissertation]. Mississippi State University; 2009. Available from: http://sun.library.msstate.edu/ETD-db/theses/available/etd-11042009-143743/ ;


Queens University

25. Abnavi, Somayeh. High Frequency Class DE Converter Using a Multilayer Coreless PCB Transformer .

Degree: Electrical and Computer Engineering, Queens University

 In modern power electronics equipment, it is desirable to design a low profile, high power density, and fast dynamic response converter. Increases in switching frequency… (more)

Subjects/Keywords: High Frequency Converter

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Abnavi, S. (n.d.). High Frequency Class DE Converter Using a Multilayer Coreless PCB Transformer . (Thesis). Queens University. Retrieved from http://hdl.handle.net/1974/15263

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Abnavi, Somayeh. “High Frequency Class DE Converter Using a Multilayer Coreless PCB Transformer .” Thesis, Queens University. Accessed July 21, 2019. http://hdl.handle.net/1974/15263.

Note: this citation may be lacking information needed for this citation format:
No year of publication.
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Abnavi, Somayeh. “High Frequency Class DE Converter Using a Multilayer Coreless PCB Transformer .” Web. 21 Jul 2019.

Note: this citation may be lacking information needed for this citation format:
No year of publication.

Vancouver:

Abnavi S. High Frequency Class DE Converter Using a Multilayer Coreless PCB Transformer . [Internet] [Thesis]. Queens University; [cited 2019 Jul 21]. Available from: http://hdl.handle.net/1974/15263.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.

Council of Science Editors:

Abnavi S. High Frequency Class DE Converter Using a Multilayer Coreless PCB Transformer . [Thesis]. Queens University; Available from: http://hdl.handle.net/1974/15263

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
No year of publication.

26. Wang, Yanzhen. Investigation of electrical and material characteristics of high-k / III-V MOS devices and SiOx ReRAMs.

Degree: Electrical and Computer Engineering, 2013, University of Texas – Austin

 In the past few decades, Si-based CMOS technology is approaching to its physical quantum limit by scaling down the gate length and gate oxide thickness… (more)

Subjects/Keywords: High k; III-V; SiOx ReRAM

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APA (6th Edition):

Wang, Y. (2013). Investigation of electrical and material characteristics of high-k / III-V MOS devices and SiOx ReRAMs. (Thesis). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/21961

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Yanzhen. “Investigation of electrical and material characteristics of high-k / III-V MOS devices and SiOx ReRAMs.” 2013. Thesis, University of Texas – Austin. Accessed July 21, 2019. http://hdl.handle.net/2152/21961.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Yanzhen. “Investigation of electrical and material characteristics of high-k / III-V MOS devices and SiOx ReRAMs.” 2013. Web. 21 Jul 2019.

Vancouver:

Wang Y. Investigation of electrical and material characteristics of high-k / III-V MOS devices and SiOx ReRAMs. [Internet] [Thesis]. University of Texas – Austin; 2013. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/2152/21961.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang Y. Investigation of electrical and material characteristics of high-k / III-V MOS devices and SiOx ReRAMs. [Thesis]. University of Texas – Austin; 2013. Available from: http://hdl.handle.net/2152/21961

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Texas – Austin

27. Chu, Wesley Donald. Wallace and Dadda Multipliers implemented using carry lookahead adders.

Degree: Electrical and Computer Engineering, 2013, University of Texas – Austin

 In a previous paper it was shown that the use of carry lookahead adders can reduce the delay it takes to compute the product with… (more)

Subjects/Keywords: Wallace multipliers; High speed computer arithmetic

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APA (6th Edition):

Chu, W. D. (2013). Wallace and Dadda Multipliers implemented using carry lookahead adders. (Thesis). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/24007

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chu, Wesley Donald. “Wallace and Dadda Multipliers implemented using carry lookahead adders.” 2013. Thesis, University of Texas – Austin. Accessed July 21, 2019. http://hdl.handle.net/2152/24007.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chu, Wesley Donald. “Wallace and Dadda Multipliers implemented using carry lookahead adders.” 2013. Web. 21 Jul 2019.

Vancouver:

Chu WD. Wallace and Dadda Multipliers implemented using carry lookahead adders. [Internet] [Thesis]. University of Texas – Austin; 2013. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/2152/24007.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chu WD. Wallace and Dadda Multipliers implemented using carry lookahead adders. [Thesis]. University of Texas – Austin; 2013. Available from: http://hdl.handle.net/2152/24007

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


University of Windsor

28. Tang, Qing Yun. FPGA Based Acceleration of Matrix Decomposition and Clustering Algorithm Using High Level Synthesis.

Degree: MA, Electrical and Computer Engineering, 2016, University of Windsor

 FPGAs have shown great promise for accelerating computationally intensive algorithms. However, FPGA-based accelerator design is tedious and time consuming if we rely on traditional HDL… (more)

Subjects/Keywords: FPGA; Hardware Acceleration; High Level Synthesis; OpenCL

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APA (6th Edition):

Tang, Q. Y. (2016). FPGA Based Acceleration of Matrix Decomposition and Clustering Algorithm Using High Level Synthesis. (Masters Thesis). University of Windsor. Retrieved from https://scholar.uwindsor.ca/etd/5669

Chicago Manual of Style (16th Edition):

Tang, Qing Yun. “FPGA Based Acceleration of Matrix Decomposition and Clustering Algorithm Using High Level Synthesis.” 2016. Masters Thesis, University of Windsor. Accessed July 21, 2019. https://scholar.uwindsor.ca/etd/5669.

MLA Handbook (7th Edition):

Tang, Qing Yun. “FPGA Based Acceleration of Matrix Decomposition and Clustering Algorithm Using High Level Synthesis.” 2016. Web. 21 Jul 2019.

Vancouver:

Tang QY. FPGA Based Acceleration of Matrix Decomposition and Clustering Algorithm Using High Level Synthesis. [Internet] [Masters thesis]. University of Windsor; 2016. [cited 2019 Jul 21]. Available from: https://scholar.uwindsor.ca/etd/5669.

Council of Science Editors:

Tang QY. FPGA Based Acceleration of Matrix Decomposition and Clustering Algorithm Using High Level Synthesis. [Masters Thesis]. University of Windsor; 2016. Available from: https://scholar.uwindsor.ca/etd/5669


Virginia Tech

29. Wei, Jia. High Frequency High-Efficiency Voltage Regulators for Future Microprocessors.

Degree: PhD, Electrical and Computer Engineering, 2004, Virginia Tech

 Microprocessors in today's computers continue to get faster and more powerful. From the Intel 80X86 series to today's Pentium IV, CPUs have greatly improved in… (more)

Subjects/Keywords: Voltage Regulator; High Efficiency; High Frequency

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wei, J. (2004). High Frequency High-Efficiency Voltage Regulators for Future Microprocessors. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/11254

Chicago Manual of Style (16th Edition):

Wei, Jia. “High Frequency High-Efficiency Voltage Regulators for Future Microprocessors.” 2004. Doctoral Dissertation, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/11254.

MLA Handbook (7th Edition):

Wei, Jia. “High Frequency High-Efficiency Voltage Regulators for Future Microprocessors.” 2004. Web. 21 Jul 2019.

Vancouver:

Wei J. High Frequency High-Efficiency Voltage Regulators for Future Microprocessors. [Internet] [Doctoral dissertation]. Virginia Tech; 2004. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/11254.

Council of Science Editors:

Wei J. High Frequency High-Efficiency Voltage Regulators for Future Microprocessors. [Doctoral Dissertation]. Virginia Tech; 2004. Available from: http://hdl.handle.net/10919/11254


Virginia Tech

30. Reusch, David Clayton. High Frequency, High Power Density Integrated Point of Load and Bus Converters.

Degree: PhD, Electrical and Computer Engineering, 2012, Virginia Tech

 The increased power consumption and power density demands of modern technologies combined with the focus on global energy savings have increased the demands on DC/DC… (more)

Subjects/Keywords: bus converter; gallium nitride; magnetic integration; point-of-load converter; high frequency; High power density

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Reusch, D. C. (2012). High Frequency, High Power Density Integrated Point of Load and Bus Converters. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/26920

Chicago Manual of Style (16th Edition):

Reusch, David Clayton. “High Frequency, High Power Density Integrated Point of Load and Bus Converters.” 2012. Doctoral Dissertation, Virginia Tech. Accessed July 21, 2019. http://hdl.handle.net/10919/26920.

MLA Handbook (7th Edition):

Reusch, David Clayton. “High Frequency, High Power Density Integrated Point of Load and Bus Converters.” 2012. Web. 21 Jul 2019.

Vancouver:

Reusch DC. High Frequency, High Power Density Integrated Point of Load and Bus Converters. [Internet] [Doctoral dissertation]. Virginia Tech; 2012. [cited 2019 Jul 21]. Available from: http://hdl.handle.net/10919/26920.

Council of Science Editors:

Reusch DC. High Frequency, High Power Density Integrated Point of Load and Bus Converters. [Doctoral Dissertation]. Virginia Tech; 2012. Available from: http://hdl.handle.net/10919/26920

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