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University of Ottawa

1. Wang, Wei. Accessing an FPGA-based Hardware Accelerator in a Paravirtualized Environment .

Degree: 2013, University of Ottawa

In this thesis we present pvFPGA, the first system design solution for virtualizing an FPGA - based hardware accelerator on the x86 platform. The accelerator design on the FPGA can be used for accelerating various applications, regardless of the application computation latencies. Our design adopts the Xen virtual machine monitor (VMM) to build a paravirtualized environment, and a Xilinx Virtex - 6 as an FPGA accelerator. The accelerator communicates with the x86 server via PCI Express (PCIe). In comparison to the current GPU virtualization solutions, which primarily intercept and redirect API calls to the hosted or privileged domain’s user space, pvFPGA virtualizes an FPGA accelerator directly at the lower device driver layer. This gives rise to higher efficiency and lower overhead. In pvFPGA, each unprivileged domain allocates a shared data pool for both user - kernel and inter-domain data transfer. In addition, we propose the coprovisor, a new component that enables multiple domains to simultaneously access an FPGA accelerator. The experimental results have shown that 1) pvFPGA achieves close-to-zero overhead compared to accessing the FPGA accelerator without the VMM layer, 2) the FPGA accelerator is successfully shared by multiple domains, 3) distributing different maximum data transfer bandwidths to different domains can be achieved by regulating the size of the shared data pool at the split driver loading time, 4) request turnaround time is improved through DMA (Direct Memory Access) context switches implemented by the coprovisor.

Subjects/Keywords: FPGA; hardware accelerator; paravirtualization; pvFPGA; coprovisor; data pool; DMA context switch

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, W. (2013). Accessing an FPGA-based Hardware Accelerator in a Paravirtualized Environment . (Thesis). University of Ottawa. Retrieved from http://hdl.handle.net/10393/24283

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Wei. “Accessing an FPGA-based Hardware Accelerator in a Paravirtualized Environment .” 2013. Thesis, University of Ottawa. Accessed November 30, 2020. http://hdl.handle.net/10393/24283.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Wei. “Accessing an FPGA-based Hardware Accelerator in a Paravirtualized Environment .” 2013. Web. 30 Nov 2020.

Vancouver:

Wang W. Accessing an FPGA-based Hardware Accelerator in a Paravirtualized Environment . [Internet] [Thesis]. University of Ottawa; 2013. [cited 2020 Nov 30]. Available from: http://hdl.handle.net/10393/24283.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang W. Accessing an FPGA-based Hardware Accelerator in a Paravirtualized Environment . [Thesis]. University of Ottawa; 2013. Available from: http://hdl.handle.net/10393/24283

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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